Freescale Semiconductor Document Number: MRF1535N Technical Data Rev. 13, 6/2009 RF Power Field Effect Transistors MRF1535NT1 N-Channel Enhancement-Mode Lateral MOSFETs MRF1535FNT1 Designed for broadband commercial and industrial applications with frequen- cies to 520 MHz. The high gain and broadband performance of these devices make them ideal for large-signal, common source amplifier applications in 12.5 volt mobile FM equipment. 520 MHz, 35 W, 12.5 V • Specified Performance @ 520 MHz, 12.5 Volts LATERAL N-CHANNEL Output Power (cid:151) 35 Watts BROADBAND Power Gain (cid:151) 13.5 dB RF POWER MOSFETs Efficiency (cid:151) 55% • Capable of Handling 20:1 VSWR, @ 15.6 Vdc, 520 MHz, 2 dB Overdrive Features • Excellent Thermal Stability • Characterized with Series Equivalent Large-Signal Impedance Parameters • Broadband-Full Power Across the Band: 135-175 MHz 400-470 MHz CASE 1264-10, STYLE 1 450-520 MHz TO-272-6 WRAP • 200(cid:2)C Capable Plastic Package PLASTIC • N Suffix Indicates Lead-Free Terminations. RoHS Compliant. MRF1535NT1 • In Tape and Reel. T1 Suffix = 500 Units per 44 mm, 13 inch Reel. CASE 1264A-03, STYLE 1 TO-272-6 PLASTIC MRF1535FNT1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage VDSS -0.5, +40 Vdc Gate-Source Voltage VGS ±20 Vdc Drain Current (cid:151) Continuous ID 6 Adc Total Device Dissipation @ TC = 25°C (1) PD 135 W Derate above 25°C 0.50 W/°C Storage Temperature Range Tstg -65 to +150 °C Operating Junction Temperature TJ 200 °C Table 2. Thermal Characteristics Characteristic Symbol Value(2) Unit Thermal Resistance, Junction to Case RθJC 0.90 °C/W Table 3. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit Per JESD22-A113, IPC/JEDEC J-STD-020 3 260 °C TJ(cid:150)TC 1. Calculated based on the formula PD = RθJC 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. © Freescale Semiconductor, Inc., 2008-2009. All rights reserved. MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 1

Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Drain-Source Breakdown Voltage V(BR)DSS 60 (cid:151) (cid:151) Vdc (VGS = 0 Vdc, ID = 100 μAdc) Zero Gate Voltage Drain Current IDSS (cid:151) (cid:151) 1 μAdc (VDS = 60 Vdc, VGS = 0 Vdc) Gate-Source Leakage Current IGSS (cid:151) (cid:151) 0.3 μAdc (VGS = 10 Vdc, VDS = 0 Vdc) On Characteristics Gate Threshold Voltage VGS(th) 1 (cid:151) 2.6 Vdc (VDS = 12.5 Vdc, ID = 400 μA) Drain-Source On-Voltage RDS(on) (cid:151) (cid:151) 0.7 Ω (VGS = 5 Vdc, ID = 0.6 A) Drain-Source On-Voltage VDS(on) (cid:151) (cid:151) 1 Vdc (VGS = 10 Vdc, ID = 2.0 Adc) Dynamic Characteristics Input Capacitance (Includes Input Matching Capacitance) Ciss (cid:151) (cid:151) 250 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Output Capacitance Coss (cid:151) (cid:151) 150 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) Reverse Transfer Capacitance Crss (cid:151) (cid:151) 20 pF (VDS = 12.5 Vdc, VGS = 0 V, f = 1 MHz) RF Characteristics (In Freescale Test Fixture) Common-Source Amplifier Power Gain Gps (cid:151) 13.5 (cid:151) dB (VDD = 12.5 Vdc, Pout = 35 Watts, IDQ = 500 mA) f = 520 MHz Drain Efficiency η (cid:151) 55 (cid:151) % (VDD = 12.5 Vdc, Pout = 35 Watts, IDQ = 500 mA) f = 520 MHz MRF1535NT1 MRF1535FNT1 RF Device Data 2 Freescale Semiconductor

VGG VDD + B1 + C11 C10 R4 C23 C22 C21 R3 L5 C9 R2 RF RF INPUT R1 OUTPUT N1 DUT N2 C1 Z1 L1 Z2 Z3 L2 Z4 Z5 Z6 Z7 Z8 Z9 L3 L4 Z10 C20 C2 C3 C4 C5 C6 C7 C12 C13 C14 C15 C16 C17 C18 C19 C8 B1 Ferroxcube #VK200 L4 1 Turn, #26 AWG, 0.240″ ID C1, C9, C20, C23 330 pF, 100 mil Chip Capacitors L5 4 Turn, #24 AWG, 0.180″ ID C2, C5 0 to 20 pF Trimmer Capacitors N1, N2 Type N Flange Mounts C3, C15 33 pF, 100 mil Chip Capacitors R1 6.5 Ω, 1/4 W Chip Resistor C4, C6, C19 18 pF, 100 mil Chip Capacitors R2 39 Ω Chip Resistor (0805) C7 160 pF, 100 mil Chip Capacitor R3 1.2 kΩ, 1/8 W Chip Resistor C8 240 pF, 100 mil Chip Capacitor R4 33 kΩ, 1/4 W Chip Resistor C10, C21 10 μF, 50 V Electrolytic Capacitors Z1 0.970″ x 0.080″ Microstrip C11, C22 470 pF, 100 mil Chip Capacitors Z2 0.380″ x 0.080″ Microstrip C12, C13 150 pF, 100 mil Chip Capacitors Z3 0.190″ x 0.080″ Microstrip C14 110 pF, 100 mil Chip Capacitor Z4 0.160″ x 0.080″ Microstrip C16 68 pF, 100 mil Chip Capacitor Z5, Z6 0.110″ x 0.200″ Microstrip C17 120 pF, 100 mil Chip Capacitor Z7 0.490″ x 0.080″ Microstrip C18 51 pF, 100 mil Chip Capacitor Z8 0.250″ x 0.080″ Microstrip L1 17.5 nH, Coilcraft #A05T Z9 0.320″ x 0.080″ Microstrip L2 5 nH, Coilcraft #A02T Z10 0.240″ x 0.080″ Microstrip L3 1 Turn, #26 AWG, 0.250″ ID Board Glass Teflon®, 31 mils Figure 1. 135 - 175 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 135 - 175 MHz 60 0 R (WATTS) 5400 111753555 MMMHHHzzz LOSS (dB) −5 POWE 30 TURN −10 155 MHz T E 135 MHz U R P T 175 MHz UT 20 PU O N , ut L, I −15 Po 10 IR VDD = 12.5 Vdc VDD = 12.5 Vdc 0 −20 0 1 2 3 4 10 20 30 40 50 60 Pin, INPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 2. Output Power versus Input Power Figure 3. Input Return Loss versus Output Power MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 3

TYPICAL CHARACTERISTICS, 135 - 175 MHz 19 80 VDD = 12.5 Vdc 155 MHz 18 70 17 %) Y ( C 16 N 60 dB) CIE 175 MHz 135 MHz N ( 15 FFI AI E G 14 AIN 50 R D 13 (cid:2), 40 155 MHz 12 VDD = 12.5 Vdc 175 MHz 135 MHz 11 30 10 20 30 40 50 60 10 20 30 40 50 60 70 80 Pout, OUTPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 4. Gain versus Output Power Figure 5. Drain Efficiency versus Output Power 50 80 S) T 155 MHz AT 45 %) 70 R (W 155 MHz CY ( E N 175 MHz W E O 175 MHz CI P 40 FI 60 UT EF 135 MHz P 135 MHz N , OUTut 35 (cid:2), DRAI 50 Po VDD = 12.5 Vdc VDD = 12.5 Vdc Pin = 30 dBm Pin = 30 dBm 30 40 200 400 600 800 1000 1200 200 400 600 800 1000 1200 IDQ, BIASING CURRENT (mA) IDQ, BIASING CURRENT (mA) Figure 6. Output Power versus Biasing Current Figure 7. Drain Efficiency versus Biasing Current 70 80 S) 60 ATT %) 70 135 MHz ER (W 50 175 MHz 155 MHz NCY ( 175 MHz W E O 135 MHz CI UT P 40 EFFI 60 155 MHz P N OUT 30 RAI , ut (cid:2), D 50 Po 20 IPDiQn == 3205 0d BmmA IPDiQn == 3205 0d BmmA 10 40 10 11 12 13 14 15 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage Figure 9. Drain Efficiency versus Supply Voltage MRF1535NT1 MRF1535FNT1 RF Device Data 4 Freescale Semiconductor

B1 VGG VDD + R2 + C14 C13 C12 C11 R3 C25 L1 C24 C23 C22 R1 C10 DUT N1 C1 Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 C19 Z10 N2 RF RF INPUT OUTPUT C2 C3 C4 C5 C6 C7 C8 C9 C15 C16 C17 C18 C20 C21 B1 Ferroxcube VK200 C21 1.8 pF, 100 mil Chip Capacitor C1 160 pF, 100 mil Chip Capacitor L1 47.5 nH, 5 Turn, Coilcraft C2 3 pF, 100 mil Chip Capacitor N1, N2 Type N Flange Mounts C3 3.6 pF, 100 mil Chip Capacitor R1 500 Ω Chip Resistor (0805) C4 2.2 pF, 100 mil Chip Capacitor R2 1 kΩ Chip Resistor (0805) C5 10 pF, 100 mil Chip Capacitor R3 33 kΩ, 1/8 W Chip Resistor C6, C7 16 pF, 100 mil Chip Capacitors Z1 0.480″ x 0.080″ Microstrip C8, C15, C16 27 pF, 100 mil Chip Capacitors Z2 1.070″ x 0.080″ Microstrip C9 43 pF, 100 mil Chip Capacitor Z3 0.290″ x 0.080″ Microstrip C10, C14, C25 160 pF, 100 mil Chip Capacitors Z4 0.160″ x 0.080″ Microstrip C11, C22 10 μF, 50 V Electrolytic Capacitors Z5, Z8 0.120″ x 0.080″ Microstrip C12, C24 1,200 pF, 100 mil Chip Capacitors Z6, Z7 0.120″ x 0.223″ Microstrip C13, C23 0.1 μF, 100 mil Chip Capacitors Z9 1.380″ x 0.080″ Microstrip C17, C18 24 pF, 100 mil Chip Capacitors Z10 0.625″ x 0.080″ Microstrip ® C19 160 pF, 100 mil Chip Capacitor Board Glass Teflon , 31 mils C20 8.2 pF, 100 mil Chip Capacitor Figure 10. 450 - 520 MHz Broadband Test Circuit TYPICAL CHARACTERISTICS, 450 - 520 MHz 60 0 450 MHz R (WATTS) 5400 470 MHz 552000 M MHHzz LOSS (dB) −5 VDD = 12.5 Vdc WE RN O 30 U 450 MHz P T T E U R P T UT 20 PU−10 470 MHz O N , ut L, I Po10 IR 520 MHz VDD = 12.5 Vdc 500 MHz 0 −15 0 1 2 3 4 5 6 0 10 20 30 40 50 60 Pin, INPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 11. Output Power versus Input Power Figure 12. Input Return Loss versus Output Power MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 5

TYPICAL CHARACTERISTICS, 450 - 520 MHz 15 70 470 MHz VDD = 12.5 Vdc 520 MHz 500 MHz 14 Y (%) 60 470 MHz 450 MHz 13 C B) 450 MHz CIEN 50 N (d 12 FFI GAI N E 40 AI 11 R D (cid:2), 30 10 520 MHz 500 MHz VDD = 12.5 Vdc 9 20 0 10 20 30 40 50 60 0 10 20 30 40 50 60 Pout, OUTPUT POWER (WATTS) Pout, OUTPUT POWER (WATTS) Figure 13. Gain versus Output Power Figure 14. Drain Efficiency versus Output Power 50 80 S) 450 MHz T AT 45 %) 70 ER (W 470 MHz NCY ( 520 MHz 500 MHz W 500 MHz E O CI T P 40 FFI 60 U 520 MHz E 450 MHz UTP AIN 470 MHz O R , Pout35 VDD = 12.5 Vdc (cid:2), D 50 VDD = 12.5 Vdc Pin = 34 dBm Pin = 34 dBm 30 40 200 400 600 800 1000 1200 200 400 600 800 1000 1200 IDQ, BIASING CURRENT (mA) IDQ, BIASING CURRENT (mA) Figure 15. Output Power versus Biasing Current Figure 16. Drain Efficiency versus Biasing Current 70 80 S) 60 TT %) 70 ER (WA 50 ENCY ( 520 MHz W CI PO 40 450 MHz FFI 60 UT N E 450 MHz OUTP 30 520 MHz 500 MHz470 MHz DRAI 470 MHz 500 MHz , Pout 20 IPDiQn == 3245 0d BmmA (cid:2), 50 IPDiQn == 3245 0d BmmA 10 40 10 11 12 13 14 15 10 11 12 13 14 15 VDD, SUPPLY VOLTAGE (VOLTS) VDD, SUPPLY VOLTAGE (VOLTS) Figure 17. Output Power versus Supply Voltage Figure 18. Drain Efficiency versus Supply Voltage MRF1535NT1 MRF1535FNT1 RF Device Data 6 Freescale Semiconductor

TYPICAL CHARACTERISTICS 1010 2S) P M A X 109 S R U O H R ( O CT 108 A F F T T M 107 90 100 110 120 130 140 150 160 170 180 190 200 210 TJ, JUNCTION TEMPERATURE (°C) This above graph displays calculated MTTF in hours x ampere2 drain current. Life tests at elevated temperatures have correlated to better than ±10% of the theoretical prediction for metal failure. Divide MTTF factor by ID2 for MTTF in a particular application. Figure 19. MTTF Factor versus Junction Temperature MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 7

Zo = 10 Ω Zin ZOL* f = 175 MHz f = 135 MHz f = 135 MHz f = 175 MHz ZOL* f = 520 MHz f = 450 MHz f = 450 MHz f = 520 MHz Zin VDD = 12.5 V, IDQ = 250 mA, Pout = 35 W VDD = 12.5 V, IDQ = 500 mA, Pout = 35 W f Zin ZOL* f Zin ZOL* MHz Ω Ω MHz Ω Ω 135 5.0 + j0.9 1.7 + j0.2 450 0.8 - j1.4 1.0 - j0.8 155 5.0 + j0.9 1.7 + j0.2 470 0.9 - j1.4 1.1 - j0.6 175 3.0 + j1.0 1.3 + j0.1 500 1.0 - j1.4 1.1 - j0.6 520 0.9 - j1.4 1.1 - j0.5 Zin = Complex conjugate of source Zin = Complex conjugate of source impedance. impedance. ZOL* = Complex conjugate of the load ZOL* = Complex conjugate of the load impedance at given output power, impedance at given output power, voltage, frequency, and ηD > 50 %. voltage, frequency, and ηD > 50 %. Note: ZOL* was chosen based on tradeoffs between gain, drain efficiency, and device stability. Input Device Output Matching Under Test Matching Network Network Z Z * in OL Figure 20. Series Equivalent Input and Output Impedance MRF1535NT1 MRF1535FNT1 RF Device Data 8 Freescale Semiconductor

Table 5. Common Source Scattering Parameters (V = 12.5 Vdc) DD I = 250 mA DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.89 -173 8.496 83 0.014 -26 0.76 -170 100 0.90 -175 3.936 72 0.014 -14 0.79 -170 150 0.91 -175 2.429 63 0.011 -23 0.82 -170 200 0.92 -175 1.627 57 0.010 -44 0.86 -170 250 0.94 -176 1.186 53 0.007 -16 0.88 -170 300 0.95 -176 0.888 49 0.005 -44 0.91 -171 350 0.96 -176 0.686 48 0.005 36 0.92 -170 400 0.96 -176 0.568 44 0.005 -1 0.94 -171 450 0.97 -176 0.457 44 0.004 49 0.94 -172 500 0.97 -176 0.394 44 0.003 -51 0.95 -171 550 0.98 -176 0.332 42 0.001 31 0.95 -173 600 0.98 -177 0.286 41 0.013 99 0.94 -173 I = 1.0 A DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.90 -173 8.49 83 0.006 -39 0.86 -176 100 0.90 -175 3.92 72 0.009 -5 0.86 -176 150 0.91 -175 2.44 63 0.006 7 0.87 -176 200 0.92 -175 1.62 57 0.008 21 0.88 -175 250 0.94 -176 1.19 53 0.006 8 0.89 -174 300 0.95 -176 0.89 48 0.008 3 0.89 -174 350 0.96 -176 0.69 48 0.007 48 0.91 -174 400 0.96 -176 0.57 44 0.004 41 0.93 -173 450 0.97 -176 0.46 44 0.004 43 0.93 -173 500 0.97 -176 0.39 44 0.003 57 0.94 -173 550 0.98 -176 0.33 41 0.006 62 0.94 -174 600 0.98 -177 0.28 41 0.009 96 0.93 -173 I = 2.0 A DQ S11 S21 S12 S22 ff MHz |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 50 0.94 -176 9.42 88 0.005 -72 0.89 -177 100 0.94 -178 4.56 82 0.005 4 0.89 -177 150 0.94 -178 2.99 78 0.003 7 0.89 -177 200 0.94 -178 2.14 74 0.005 17 0.90 -176 250 0.95 -178 1.67 71 0.004 40 0.90 -175 300 0.95 -178 1.32 67 0.007 35 0.91 -175 350 0.95 -178 1.08 67 0.005 57 0.92 -174 400 0.96 -178 0.93 63 0.003 50 0.93 -173 450 0.96 -178 0.78 62 0.007 68 0.93 -173 500 0.96 -177 0.68 61 0.004 99 0.94 -173 550 0.97 -177 0.59 58 0.008 78 0.93 -175 600 0.97 -178 0.51 57 0.009 92 0.92 -174 MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 9

APPLICATIONS INFORMATION DESIGN CONSIDERATIONS This device is a common-source, RF power, N-Channel drain-source voltage under these conditions is termed enhancement mode, Lateral Metal-Oxide Semiconductor V . For MOSFETs, V has a positive temperature DS(on) DS(on) Field-Effect Transistor (MOSFET). Freescale Application coefficient at high temperatures because it contributes to the Note AN211A, (cid:147)FETs in Theory and Practice(cid:148), is suggested power dissipation within the device. reading for those not familiar with the construction and char- BV values for this device are higher than normally re- DSS acteristics of FETs. quired for typical applications. Measurement of BV is not DSS This surface mount packaged device was designed pri- recommended and may result in possible damage to the de- marily for VHF and UHF mobile power amplifier applications. vice. Manufacturability is improved by utilizing the tape and reel GATE CHARACTERISTICS capability for fully automated pick and placement of parts. The gate of the RF MOSFET is a polysilicon material, and However, care should be taken in the design process to in- is electrically isolated from the source by a layer of oxide. sure proper heat sinking of the device. The DC input resistance is very high - on the order of 109 Ω The major advantages of Lateral RF power MOSFETs in- (cid:151) resulting in a leakage current of a few nanoamperes. clude high gain, simple bias systems, relative immunity from Gate control is achieved by applying a positive voltage to thermal runaway, and the ability to withstand severely mis- the gate greater than the gate-to-source threshold voltage, matched loads without suffering damage. V . GS(th) MOSFET CAPACITANCES Gate Voltage Rating (cid:151) Never exceed the gate voltage The physical structure of a MOSFET results in capacitors rating. Exceeding the rated VGS can result in permanent between all three terminals. The metal oxide gate structure damage to the oxide layer in the gate region. determines the capacitors from gate-to-drain (C ), and Gate Termination (cid:151) The gates of these devices are es- gd gate-to-source (C ). The PN junction formed during fab- sentially capacitors. Circuits that leave the gate open-cir- gs rication of the RF MOSFET results in a junction capacitance cuited or floating should be avoided. These conditions can from drain-to-source (C ). These capacitances are charac- result in turn-on of the devices due to voltage build-up on ds terized as input (C ), output (C ) and reverse transfer the input capacitor due to leakage currents or pickup. iss oss (Crss) capacitances on data sheets. The relationships be- Gate Protection (cid:151) These devices do not have an internal tween the inter-terminal capacitances and those given on monolithic zener diode from gate-to-source. If gate protec- data sheets are shown below. The C can be specified in tion is required, an external zener diode is recommended. iss two ways: Using a resistor to keep the gate-to-source impedance low also helps dampen transients and serves another important 1. Drain shorted to source and positive voltage at the gate. function. Voltage transients on the drain can be coupled to 2. Positive voltage of the drain in respect to source and zero the gate through the parasitic gate-drain capacitance. If the volts at the gate. gate-to-source impedance and the rate of voltage change In the latter case, the numbers are lower. However, neither on the drain are both high, then the signal coupled to the gate method represents the actual operating conditions in RF ap- may be large enough to exceed the gate-threshold voltage plications. and turn the device on. DC BIAS Since this device is an enhancement mode FET, drain cur- Drain rent flows only when the gate is at a higher potential than the source. RF power FETs operate optimally with a quiescent Cgd drain current (I ), whose value is application dependent. DQ This device was characterized at I = 500 mA, which is the Gate Ciss = Cgd + Cgs DQ suggested value of bias current for typical applications. For Cds Coss = Cgd + Cds Crss = Cgd special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. Cgs The gate is a dc open circuit and draws no current. There- fore, the gate bias circuit may generally be just a simple re- Source sistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL DRAIN CHARACTERISTICS Power output of this device may be controlled to some de- One critical figure of merit for a FET is its static resistance gree with a low power dc control signal applied to the gate, in the full-on condition. This on-resistance, R , occurs thus facilitating applications such as manual gain control, DS(on) in the linear region of the output characteristic and is speci- ALC/AGC and modulation systems. This characteristic is fied at a specific gate-source voltage and drain current. The very dependent on frequency and load line. MRF1535NT1 MRF1535FNT1 RF Device Data 10 Freescale Semiconductor

AMPLIFIER DESIGN Impedance matching networks similar to those used with resistive loading, or output to input feedback. The RF test fix- bipolar transistors are suitable for this device. For examples ture implements a parallel resistor and capacitor in series see Freescale Application Note AN721, (cid:147)Impedance with the gate, and has a load line selected for a higher effi- Matching Networks Applied to RF Power Transistors.(cid:148) ciency, lower gain, and more stable operating region. Large-signal impedances are provided, and will yield a good Two-port stability analysis with this device(cid:146)s first pass approximation. S-parameters provides a useful tool for selection of loading Since RF power MOSFETs are triode devices, they are not or feedback circuitry to assure stable operation. See Free- unilateral. This coupled with the very high gain of this device scale Application Note AN215A, (cid:147)RF Small-Signal Design yields a device capable of self oscillation. Stability may be Using Two-Port Parameters(cid:148) for a discussion of two port achieved by techniques such as drain loading, input shunt network theory and stability. MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 11

PACKAGE DIMENSIONS MRF1535NT1 MRF1535FNT1 RF Device Data 12 Freescale Semiconductor

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MRF1535NT1 MRF1535FNT1 RF Device Data 14 Freescale Semiconductor

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MRF1535NT1 MRF1535FNT1 RF Device Data 16 Freescale Semiconductor

MRF1535NT1 MRF1535FNT1 RF Device Data Freescale Semiconductor 17

PRODUCT DOCUMENTATION, TOOLS AND SOFTWARE Refer to the following documents to aid your design process. Application Notes • AN211A: Field Effect Transistors in Theory and Practice • AN215A: RF Small-Signal Design Using Two-Port Parameters • AN721: Impedance Matching Networks Applied to RF Power Transistors • AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages • AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over-Molded Plastic Packages • AN3789: Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices Software • Electromigration MTTF Calculator For Software and Tools, do a Part Number search at http://www.freescale.com, and select the (cid:147)Part Number(cid:148) link. Go to the Software & Tools tab on the part(cid:146)s Product Summary page to download the respective tool. REVISION HISTORY The following table summarizes revisions to this document. Revision Date Description 11 Feb. 2008 • Changed DC Bias IDQ value from 150 to 500 to match Functional Test IDQ specification, p. 10 • Replaced Case Outline 1264-09 with 1264-10, Issue L, p. 1, 12-14. Removed Drain-ID label from top view and View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact. Renamed E2 with E3. Added Pin 7 designation. Corrected positional tolerance for bolt hole radius. Added JEDEC Standard Package Number. • Replaced Case Outline 1264A-02 with 1264A-03, Issue D, p. 1, 15-17. Removed Drain-ID label from View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact (Changed D2 and E2 dimensions from basic to .604 Min and .162 Min, respectively). Added dimension E3. Added Pin 7 designation. Corrected positional tolerance for bolt hole radius. Added JEDEC Standard Package Number. • Added Product Documentation and Revision History, p. 18 12 June 2008 • Corrected specified performance values for power gain and efficiency on p. 1 to match typical performance values in the functional test table on p. 2 13 June 2009 • Modified data sheet to reflect MSL rating change from 1 to 3 as a result of the standardization of packing process as described in Product and Process Change Notification number, PCN13516, p. 1 • Added AN1907, Solder Reflow Attach Method for High Power RF Devices in Plastic Packages and AN3789, Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages to Product Documentation, Application Notes, p. 18 • Added Electromigration MTTF Calculator availability to Product Software, p. 18 MRF1535NT1 MRF1535FNT1 RF Device Data 18 Freescale Semiconductor

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