STY140NS10 W N-CHANNEL 100V - 0.009 - 140A MAX247™ MESH OVERLAY™ POWER MOSFET TYPE VDSS RDS(on) ID STY140NS10 100V <0.011W 140A n TYPICAL RDS(on) = 0.009W ) STANDARD THRESHOLD DRIVE s n ( n 100% AVALANCHE TESTED ct u DESCRIPTION d Using the latest high voltage MESH OVERLAY™ o process, STMicroelectronics has designed an advanced r P 3 family of power MOSFETs with outstanding 2 1 performances. The new patent pending strip layout e coupled with the Company’s proprietary edge termination t structure, gives the lowest RDS(on) per area, e Max247™ l exceptional avalanche and dv/dt capabilities and o unrivalled gate charge and switching characteristics. s b O INTERNAL SCHEMATIC DIAGRAM - APPLICATIONS ) HIGH CURRENT, HIGH SWITCHING SsPEED n ( SWITCH MODE POWER SUPPLYt (SMPS) n c u d o r P e t e l o s AbBSOLUTE MAXIMUM RATINGS O Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 100 V VDGR Drain-gate Voltage (RGS = 20 kW ) 100 V VGS Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 140 A ID Drain Current (continuos) at TC = 100°C 99 A IDM(•) Drain Current (pulsed) 560 A Ptot Total Dissipation at TC = 25°C 450 W Derating Factor 3 W/°C EAS(1) Single Pulse Avalanche Energy 2900 mJ dv/dt (2) Peak Diode Recovery voltage slope 5 V/ns Tstg Storage Temperature -55 to 175 °C Tj Operating Junction Temperature -55 to 175 °C (•) Pulse width limited by safe operating area. (1) Starting Tj = 25 oC, ID = 70A, VDD= 50V (2)ISD £ 140A, di/dt £ 200A/µs, VDD £ V(BR)DSS, Tj £ TJMAX. August 2001 1/8 .

STY140NS10 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.33 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W Tj Maximum Lead Temperature For Soldering Purpose Typ 300 °C ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown ID = 250 µA, VGS = 0 100 V Voltage IDSS Zero Gate Voltage VDS = Max Rating 1 s )µA Drain Current (VGS = 0) VDS = Max Rating TC = 125°C 10( µA t c IGSS Gate-body Leakage VGS = ± 20V u ±100 nA Current (VDS = 0) d o r ON (1) P Symbol Parameter Test Conditions e Min. Typ. Max. Unit t VGS(th) Gate Threshold Voltage VDS = VGS ID = 250e µA 2 4 V l o RDS(on) Static Drain-source On VGS = 10 V IDs = 70 A 0.009 0.011 W Resistance b O DYNAMIC - ) Symbol Parameter s Test Conditions Min. Typ. Max. Unit ( gfs (*) Forward Transconductanccet VDS = 20 V ID=70 A 50 S u Ciss Input Capacitanced VDS = 25V, f = 1 MHz, VGS = 0 12600 pF Coss Output Capacitoance 2100 pF Crss Reverse Trransfer 690 pF CapacitanP ce e t e l o s b O 2/8

STY140NS10 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) Turn-on Delay Time VDD = 50 V ID = 70 A 40 ns tr Rise Time RG=4.7 W VGS = 10 V 150 ns (Resistive Load, Figure 1) Qg Total Gate Charge VDD=50V ID=140A VGS=10V 450 600 nC Qgs Gate-Source Charge (see test circuit, Figure 2) 70 nC Qgd Gate-Drain Charge 170 nC SWITCHING OFF ) s ( Symbol Parameter Test Conditions Min. Typ. Matx. Unit c td(off) Turn-off Delay Time VDD = 50 V ID = 70 A 465 u ns tf Fall Time RG=4.7W, VGS = 10 V 270d ns (Resistive Load, Figure 1) o r P SOURCE DRAIN DIODE e t Symbol Parameter Test Conditions e Min. Typ. Max. Unit l o ISD Source-drain Current s 140 A ISDM (•) Source-drain Current (pulsed) b 560 A O VSD (*) Forward On Voltage ISD = 140 A VGS = 0 1.5 V - trr Reverse Recovery Time IS)D = 140 A di/dt = 100A/µs 275 ns Qrr Reverse Recovery Charge sVr = 20 V Tj = 150°C 2 m C IRRM Reverse Recovery Currentt( (Inductive Load, Figure 3) 15 A c (*)Pulsed: Pulse duration = 300 µs, duty cycule 1.5 %. (•)Pulse width limited by safe operatingd area. o r P e t e l o Safes Operating Area Thermal Impedance b O 3/8

STY140NS10 Output Characteristics Transfer Characteristics ) s ( t c u d o r P Transconductance Static Drain-source O n Resistance e t e l o s b O - ) s ( t c u d o r P e t e l o s Gate Charge vs Gate-source Voltage Capacitance Variations b O 4/8

STY140NS10 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature ) s ( t c u d o r P Source-drain Diode Forward Characteristics Normalized Breakdo wn Voltage vs Temperature e t e l o s b O - ) s ( t c u d o r P e t e l o s . . b O 5/8

STY140NS10 Fig. 1: Switching Times Test Circuits For Resistive Fig. 2: Gate Charge test Circuit Load ) s ( t c u d o r P Fig. 3: Test Circuit For Diode Recovery Behaviour e t e l o s b O - ) s ( t c u d o r P e t e l o s b O 6/8

STY140NS10 Max247 MECHANICAL DATA mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 ) s b1 2.00 2.40 ( t c b2 3.00 3.40 u d c 0.40 0.80 o D 19.70 20.30 r P e 5.35 5.55 e E 15.30 15.90 e t l L 14.20 15.20 o s L1 3.70 4.30 b O - ) s ( t c u d o r P e t e l o s b O P025Q 7/8

STY140NS10 ) s ( t c u d o r P e t e l o s b O - ) s ( t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (cid:226) 2001 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8