Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia

PBLS2002D 20 V PNP BISS loadswitch Rev. 02 — 27 August 2009 Product data sheet 1. Product profile 1.1 General description PNP low V Breakthrough in Small Signal (BISS) transistor and NPN Resistor- CEsat Equipped Transistor (RET) in a SOT457 (SC-74) small Surface Mounted Device (SMD) plastic package. 1.2 Features n Low V (BISS) and resistor-equipped transistor in one package CEsat n Low threshold voltage (<1V) compared to MOSFET n Low drive power required n Space-saving solution n Reduction of component count 1.3 Applications n Supply line switches n Battery charger switches n High-side switches for LEDs, drivers and backlights n Portable equipment 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit TR1; PNP low V transistor CEsat V collector-emitter voltage open base - - - 20 V CEO I collector current (DC) - - - 1 A C R collector-emitter saturation I =- 1A; [1] - 185 280 mW CEsat C resistance I =- 100mA B TR2; NPN resistor-equipped transistor V collector-emitter voltage open base - - 50 V CEO I output current - - 100 mA O R1 bias resistor1 (input) 3.3 4.7 6.1 kW R2/R1 bias resistor ratio 0.8 1 1.2 [1] Pulse test: t £ 300m s;d£ 0.02 p

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 2. Pinning information Table 2. Pinning Pin Description Simplified outline Symbol 1 emitter TR1 6 5 4 6 5 4 2 base TR1 3 output (collector) TR2 4 GND (emitter) TR2 R1 R2 1 2 3 5 input (base) TR2 TR2 TR1 6 collector TR1 1 2 3 sym036 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PBLS2002D SC-74 plastic surface mounted package; 6leads SOT457 4. Marking Table 4. Marking codes Type number Marking code PBLS2002D F7 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR1; PNP low V transistor CEsat V collector-base voltage open emitter - - 20 V CBO V collector-emitter voltage open base - - 20 V CEO V emitter-base voltage open collector - - 5 V EBO I collector current (DC) - - 1 A C I peak collector current t £ 300m s - - 2 A CM p I base current (DC) - - 0.3 A B I peak base current t £ 300m s - - 0.6 A BM p P total power dissipation T £ 25(cid:176) C [1] - 250 mW tot amb [2] - 350 mW [3] - 400 mW PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 2 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR2; NPN resistor-equipped transistor V collector-base voltage open emitter - 50 V CBO V collector-emitter voltage open base - 50 V CEO V emitter-base voltage open collector - 10 V EBO V input voltage I positive - +30 V negative - - 10 V I output current - 100 mA O I peak collector current t £ 300m s - 100 mA CM p P total power dissipation T £ 25(cid:176) C [1] - 200 mW tot amb Per device P total power dissipation [1] - 400 mW tot [2] - 530 mW [3] - 600 mW T storage temperature - 65 +150 (cid:176) C stg T junction temperature - 150 (cid:176) C j T ambient temperature - 65 +150 (cid:176) C amb [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. [3] Device mounted on a ceramic PCB, Al O , standard footprint. 2 3 006aaa414 0.8 Ptot (W) (1) 0.6 (2) (3) 0.4 0.2 0 0 40 80 120 160 Tamb ((cid:176)C) (1) Ceramic PCB, Al O , standard footprint 2 3 (2) FR4 PCB, mounting pad for collector 1cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 3 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per device R thermal resistance from in free air [1] - - 315 K/W th(j-a) junction to ambient [2] - - 236 K/W [3] - - 210 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2. [3] Device mounted on a ceramic PCB, Al O , standard footprint. 2 3 103 006aaa415 duty cycle = Zth(j-a) 1 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 10 0.02 0.01 0 1 10- 1 10- 5 10- 4 10- 3 10- 2 10- 1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical values PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 4 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 103 006aaa463 Zth(j-a) d = 1 (K/W) 0.75 0.5 102 0.33 0.2 0.1 0.05 10 0.02 0.01 0 1 10- 5 10- 4 10- 3 10- 2 10- 1 1 10 102 103 tp (s) FR4 PCB, mounting pad for collector 1cm2 Fig 3. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical values 103 006aaa464 Zth(j-a) (K/W) d = 1 0.75 0.5 102 0.33 0.2 0.1 0.05 10 0.02 0.01 0 1 10- 5 10- 4 10- 3 10- 2 10- 1 1 10 102 103 tp (s) Ceramic PCB, Al O , standard footprint 2 3 Fig 4. TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time; typical values PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 5 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 7. Characteristics Table 7. Characteristics T =25(cid:176) C unless otherwise specified amb Symbol Parameter Conditions Min Typ Max Unit TR1; PNP low V transistor CEsat I collector-base cut-off V =- 20V; I =0A - - - 0.1 m A CBO CB E current V =- 20V; I =0A; - - - 50 m A CB E T =150(cid:176) C j I collector-emitter V =- 20V; V =0V - - - 0.1 m A CES CE BE cut-off current I emitter-base cut-off V =- 5V; I =0A - - - 0.1 m A EBO EB C current h DCcurrent gain V =- 2V; I =- 1mA 220 495 - FE CE C V =- 2V; I =- 100mA 220 440 - CE C V =- 2V; I =- 500mA [1] 220 310 - CE C V =- 2V; I =- 1A [1] 155 220 - CE C V =- 2V; I =- 2A [1] 60 120 - CE C V collector-emitter I =- 100mA; I =- 1mA - - 55 - 90 mV CEsat C B saturation voltage I =- 500mA; I =- 50mA [1] - - 100 - 150 mV C B I =- 1A; I =- 50mA [1] - - 200 - 300 mV C B I =- 1A; I =- 100mA [1] - - 185 - 280 mV C B R collector-emitter I =- 1A; I =- 100mA [1] - 185 280 mW CEsat C B saturation resistance V base-emitter I =- 1A; I =- 50mA [1] - - 0.95 - 1.1 V BEsat C B saturation voltage I =- 1A; I =- 100mA [1] - - 1 - 1.1 V C B V base-emitter V =- 5V; I =- 1A [1] - - 0.85 - 1.1 V BEon CE C turn-onvoltage t delay time I =- 1A; I =- 50mA; - 8 - ns d C Bon I =50mA t rise time Boff - 34 - ns r t turn-on time - 42 - ns on t storage time - 140 - ns s t fall time - 45 - ns f t turn-off time - 185 - ns off f transition frequency I =- 50mA; V =- 10V; 150 185 - MHz T C CE f=100MHz C collector capacitance V =- 10V; I =i =0A; - 15 20 pF c CB E e f=1MHz PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 6 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch Table 7. Characteristics …continued T =25(cid:176) C unless otherwise specified amb Symbol Parameter Conditions Min Typ Max Unit TR2; NPN resistor-equipped transistor I collector-base cut-off V =50V; I =0A - - 100 nA CBO CB E current I collector-emitter V =30V; I =0A - - 1 m A CEO CE B cut-off current V =30V; I =0A; - - 50 m A CE B T =150(cid:176) C j I emitter-base cut-off V =5V; I =0A - - 900 m A EBO EB C current h DCcurrent gain V =5V; I =10mA 30 - - FE CE C V collector-emitter I =10mA; I =0.5mA - - 150 mV CEsat C B saturation voltage V off-state input voltage V =5V; I =100m A - 1.1 0.5 V I(off) CE C V on-state input voltage V =0.3V; I =20mA 2.5 1.9 - V I(on) CE C R1 bias resistor1 (input) 3.3 4.7 6.1 kW R2/R1 bias resistor ratio 0.8 1 1.2 C collector capacitance V =10V; I =i =0A; - - 2.5 pF c CB E e f=1MHz [1] Pulse test: t £ 300m s;d£ 0.02 p PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 7 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 1000 006aaa416 - 1 006aaa417 hFE VCEsat 800 (V) (1) - 10- 1 600 (2) (1) (2) (3) 400 - 10- 2 (3) 200 0 - 10- 3 - 10- 1 - 1 - 10 - 102 - 103 - 104 - 10- 1 - 1 - 10 - 102 - 103 - 104 IC (mA) IC (mA) V =- 2V I /I =20 CE C B (1) T =100(cid:176) C (1) T =100(cid:176) C amb amb (2) T =25(cid:176) C (2) T =25(cid:176) C amb amb (3) T =- 55(cid:176) C (3) T =- 55(cid:176) C amb amb Fig 5. TR1 (PNP): DC current gain as a function of Fig 6. TR1 (PNP): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values - 1.0 006aaa418 - 1.2 006aaa419 VBE VB(VEs)at (V) - 1.0 - 0.8 (1) (1) - 0.8 (2) - 0.6 (2) (3) - 0.6 (3) - 0.4 - 0.4 - 0.2 - 0.2 - 10- 1 - 1 - 10 - 102 - 103 - 104 - 10- 1 - 1 - 10 - 102 - 103 - 104 IC (mA) IC (mA) V =- 5V I /I =20 CE C B (1) T =- 55(cid:176) C (1) T =- 55(cid:176) C amb amb (2) T =25(cid:176) C (2) T =25(cid:176) C amb amb (3) T =100(cid:176) C (3) T =100(cid:176) C amb amb Fig 7. TR1 (PNP): Base-emitter voltage as a function Fig 8. TR1 (PNP): Base-emitter saturation voltage as of collector current; typical values a function of collector current; typical values PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 8 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch - 2.0 006aaa420 102 006aaa421 IC IB = - 13 mA -- 1110..74 mmAA (A) - 9.1 mA RCEsat - 1.6 - 7.8 mA (W ) - 6.5 mA 10 - 5.2 mA - 1.2 - 3.9 mA - 0.8 - 2.6 mA 1 (1) - 1.3 mA (2) - 0.4 (3) - 0 10- 1 - 0 - 2 - 4 - 6 - 10- 1 - 1 - 10 - 102 - 103 - 104 VCE (V) IC (mA) T =25(cid:176) C I /I =20 amb C B (1) T =100(cid:176) C amb (2) T =25(cid:176) C amb (3) T =- 55(cid:176) C amb Fig 9. TR1 (PNP): Collector current as a function of Fig 10. TR1 (PNP): Collector-emitter saturation collector-emitter voltage; typical values resistance as a function of collector current; typical values - 1 006aaa422 103 006aaa423 RCEsat VCEsat (W ) (V) 102 - 10- 1 (1) 10 (2) - 10- 2 1 (3) (1) (2) (3) - 10- 3 10- 1 - 10- 1 - 1 - 10 - 102 - 103 - 104 - 10- 1 - 1 - 10 - 102 - 103 - 104 IC (mA) IC (mA) T =25(cid:176) C T =25(cid:176) C amb amb (1) I /I =100 (1) I /I =100 C B C B (2) I /I =50 (2) I /I =50 C B C B (3) I /I =10 (3) I /I =10 C B C B Fig 11. TR1 (PNP): Collector-emitter saturation Fig 12. TR1 (PNP): Collector-emitter saturation voltage as a function of collector current; resistance as a function of collector current; typical values typical values PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 9 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 103 006aaa030 1 006aaa031 hFE (1) (2) VCEsat (3) (V) 102 (1) 10- 1 (2) (3) 10 1 10- 2 10- 1 1 10 102 1 10 102 IC (mA) IC (mA) V =5V I /I =20 CE C B (1) T =150(cid:176) C (1) T =100(cid:176) C amb amb (2) T =25(cid:176) C (2) T =25(cid:176) C amb amb (3) T =- 40(cid:176) C (3) T =- 40(cid:176) C amb amb Fig 13. TR2 (NPN): DC current gain as a function of Fig 14. TR2 (NPN): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values 006aaa032 006aaa033 10 10 VI(on) VI(off) (V) (V) (1) (1) 1 (2) 1 (2) (3) (3) 10- 1 10- 1 10- 1 1 10 102 10- 2 10- 1 1 10 IC (mA) IC (mA) V =0.3V V =5V CE CE (1) T =- 40(cid:176) C (1) T =- 40(cid:176) C amb amb (2) T =25(cid:176) C (2) T =25(cid:176) C amb amb (3) T =100(cid:176) C (3) T =100(cid:176) C amb amb Fig 15. TR2 (NPN): On-state input voltage as a Fig 16. TR2 (NPN): Off-state input voltage as a function of collector current; typical values function of collector current; typical values PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 10 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 8. Test information - IB 90 % input pulse (idealized waveform) - IBon (100 %) 10 % - IBoff output pulse - IC (idealized waveform) 90 % - IC (100 %) 10 % t td tr ts tf ton toff 006aaa266 Fig 17. BISS transistor switching time definition VBB VCC RB RC (probe) Vo (probe) oscilloscope oscilloscope 450 W 450 W R2 VI DUT R1 mgd624 I =- 1A; I =- 50mA; I =50mA; R1=open; R2=45W ; R =145W ; R =10W C Bon Boff B C Fig 18. Test circuit for switching times PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 11 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 9. Package outline 3.1 1.1 2.7 0.9 6 5 4 0.6 0.2 3.0 1.7 2.5 1.3 pin 1 index 1 2 3 0.40 0.26 0.95 0.25 0.10 1.9 Dimensions in mm 04-11-08 Fig 19. Package outline SOT457 (SC-74) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description Packing quantity 3000 10000 PBLS2002D SOT457 4mm pitch, 8mm tape and reel; T1 [2] -115 -135 4mm pitch, 8mm tape and reel; T2 [3] -125 -165 [1] For further information and the availability of packing methods, seeSection14. [2] T1: normal taping [3] T2: reverse taping PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 12 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 11. Soldering 3.45 1.95 solder lands 0.95 solder resist 3.30 2.825 0.45 0.55 occupied area solder paste 1.60 1.70 3.10 3.20 msc422 Dimensions in mm Fig 20. Reflow soldering footprint 5.30 solder lands 5.05 0.45 1.45 4.45 solder resist occupied area 1.40 msc423 4.30 Dimensions in mm Fig 21. Wave soldering footprint PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 13 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 12. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PBLS2002D_2 20090827 Product data sheet - PBLS2002D_1 Modifications: • This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content. • Figure 21 “Wave soldering footprint”: updated PBLS2002D_1 20050623 Product data sheet - - PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 14 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] Theproductstatusofdevice(s)describedinthisdocumentmayhavechangedsincethisdocumentwaspublishedandmaydifferincaseofmultipledevices.Thelatestproductstatus information is available on the Internet at URLhttp://www.nxp.com. 13.2 Definitions damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in Applications —Applications that are described herein for any of these modifications or additions. NXP Semiconductors does not give any products are for illustrative purposes only. NXP Semiconductors makes no representations or warranties as to the accuracy or completeness of representation or warranty that such applications will be suitable for the informationincludedhereinandshallhavenoliabilityfortheconsequencesof specified use without further testing or modification. use of such information. Limiting values —Stress above one or more limiting values (as defined in Short data sheet —A short data sheet is an extract from a full data sheet theAbsoluteMaximumRatingsSystemofIEC60134)maycausepermanent withthesameproducttypenumber(s)andtitle.Ashortdatasheetisintended damagetothedevice.Limitingvaluesarestressratingsonlyandoperationof forquickreferenceonlyandshouldnotbereliedupontocontaindetailedand the device at these or any other conditions above those given in the full information. For detailed and full information see the relevant full data Characteristics sections of this document is not implied. Exposure to limiting sheet, which is available on request via the local NXP Semiconductors sales values for extended periods may affect device reliability. office. In case of any inconsistency or conflict with the short data sheet, the Terms and conditions of sale —NXP Semiconductors products are sold full data sheet shall prevail. subjecttothegeneraltermsandconditionsofcommercialsale,aspublished athttp://www.nxp.com/profile/terms, including those pertaining to warranty, 13.3 Disclaimers intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such General —Information in this document is believed to be accurate and terms and conditions, the latter will prevail. reliable.However,NXPSemiconductorsdoesnotgiveanyrepresentationsor No offer to sell or license —Nothing in this document may be interpreted warranties,expressedorimplied,astotheaccuracyorcompletenessofsuch or construed as an offer to sell products that is open for acceptance or the information and shall have no liability for the consequences of use of such grant,conveyanceorimplicationofanylicenseunderanycopyrights,patents information. or other industrial or intellectual property rights. Right to make changes —NXPSemiconductorsreservestherighttomake Export control —This document as well as the item(s) described herein changes to information published in this document, including without may be subject to export control regulations. Export might require a prior limitation specifications and product descriptions, at any time and without authorization from national authorities. notice.Thisdocumentsupersedesandreplacesallinformationsuppliedprior to the publication hereof. Quick reference data —The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this Suitability for use —NXP Semiconductors products are not designed, document, and as such is not complete, exhaustive or legally binding. authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected 13.4 Trademarks to result in personal injury, death or severe property or environmental Notice:Allreferencedbrands,productnames,servicenamesandtrademarks are the property of their respective owners. 14. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:salesaddresses@nxp.com PBLS2002D_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 27 August 2009 15 of 16

PBLS2002D NXP Semiconductors 20 V PNP BISS loadswitch 15. Contents 1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 11 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 10 Packing information. . . . . . . . . . . . . . . . . . . . . 12 11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Contact information. . . . . . . . . . . . . . . . . . . . . 15 15 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Pleasebeawarethatimportantnoticesconcerningthisdocumentandtheproduct(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 27 August 2009 Document identifier: PBLS2002D_2