SiHF15N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES D TO-220 FULLPAK • Low figure-of-merit (FOM) R x Q on g • Low input capacitance (C ) iss • Reduced switching and conduction losses G • Ultra low gate charge (Q ) g Available • Avalanche energy rated (UIS) • Material categorization: for definitions of compliance S please see www.vishay.com/doc?99912 G D S N-Channel MOSFET APPLICATIONS • Server and telecom power supplies PRODUCT SUMMARY • Switch mode power supplies (SMPS) V (V) at T max. 650 • Power factor correction power supplies (PFC) DS J RDS(on) max. () at 25 °C VGS = 10 V 0.28 • Lighting Q max. (nC) 78 - High-intensity discharge (HID) g Q (nC) 9 - Fluorescent ballast lighting gs Q (nC) 17 • Industrial gd Configuration Single - Welding - Induction heating - Motor drives - Battery chargers - Renewable energy - Solar (PV inverters) ORDERING INFORMATION Package TO-220 FULLPAK Lead (Pb)-free SiHF15N60E-E3 Lead (Pb)-free and Halogen-free SiHF15N60E-GE3 ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted) C PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V 600 DS V Gate-Source Voltage V ± 30 GS T = 25 °C 15 Continuous Drain Current (T = 150 °C) e V at 10 V C I J GS D T = 100 °C 9.6 A C Pulsed Drain Current a I 39 DM Linear Derating Factor 0.27 W/°C Single Pulse Avalanche Energy b E 102 mJ AS Maximum Power Dissipation P 34 W D Operating Junction and Storage Temperature Range T , T -55 to +150 °C J stg Drain-Source Voltage Slope V = 0 V to 80 % V 70 DS DS dV/dt V/ns Reverse Diode dV/dt d 7.7 Soldering Recommendations (Peak temperature) c For 10 s 300 °C Mounting Torque M3 screw 0.6 Nm Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 11.6 mH, Rg = 25 , IAS = 4.2 A. c. 1.6 mm from case. d. ISD  ID, dI/dt = 100 A/μs, starting TJ = 25 °C. e. Limited by maximum junction temperature. S16-1602-Rev. I, 15-Aug-16 1 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SiHF15N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum Junction-to-Ambient R - 65 thJA °C/W Maximum Junction-to-Case (Drain) R - 3.7 thJC SPECIFICATIONS (T = 25 °C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 μA 600 - - V DS GS D VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.71 - V/°C Gate-Source Threshold Voltage (N) V V = V , I = 250 μA 2 - 4 V GS(th) DS GS D V = ± 20 V - - ± 100 nA GS Gate-Source Leakage I GSS V = ± 30 V - - ± 1 μA GS V = 600 V, V = 0 V - - 1 DS GS Zero Gate Voltage Drain Current I μA DSS V = 480 V, V = 0 V, T = 125 °C - - 10 DS GS J Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 8 A - 0.23 0.28  Forward Transconductance g V = 30 V, I = 8 A - 4.6 - S fs DS D Dynamic Input Capacitance C - 1350 - iss V = 0 V, GS Output Capacitance C V = 100 V, - 70 - oss DS f = 1 MHz Reverse Transfer Capacitance C - 5 - rss pF Effective Output Capacitance, Energy C - 53 - Related a o(er) V = 0 V to 480 V, V = 0 V DS GS Effective Output Capacitance, Time C - 177 - Related b o(tr) Total Gate Charge Q - 39 78 g Gate-Source Charge Q V = 10 V I = 8 A, V = 480 V - 11 - nC gs GS D DS Gate-Drain Charge Q - 17 - gd Turn-On Delay Time t - 16 32 d(on) Rise Time t - 26 52 r VDD = 480 V, ID = 8 A, ns Turn-Off Delay Time td(off) VGS = 10 V, Rg = 9.1  - 41 82 Fall Time t - 22 44 f Gate Input Resistance Rg f = 1 MHz, open drain 0.3 0.86 1.7  Drain-Source Body Diode Characteristics MOSFET symbol Continuous Source-Drain Diode Current IS showing the  D - - 15 A integral reverse G Pulsed Diode Forward Current I - - 60 SM p - n junction diode S Diode Forward Voltage V T = 25 °C, I = 8 A, V = 0 V - 1.0 1.2 V SD J S GS Reverse Recovery Time t - 302 604 ns rr T = 25 °C, I = I = 8 A, Reverse Recovery Charge Q J F S - 4.0 8 μC rr dI/dt = 100 A/μs, V = 25 V R Reverse Recovery Current I - 24 - A RRM Notes a. C is a fixed capacitance that gives the same energy as C while V is rising from 0 % to 80 % V . oss(er) oss DS DSS b. C is a fixed capacitance that gives the same charging time as C while V is rising from 0 % to 80 % V . oss(tr) oss DS DSS S16-1602-Rev. I, 15-Aug-16 2 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SiHF15N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 50 3 TOP 15 V A) 1143 VV TJ = 25 °C ID = 8 A nt ( 40 1121 VV eed) 2.5 urce Curre 30 BOTTOM 1 059876 VVVVVV n-to-Source (Normaliz 1.25 , Drain-to-SoD 1200 R, DraiDS(on)On Resistanc 0.15 VGS = 10 V I 0 0 0 5 10 15 20 25 30 - 60- 40- 20 0 20 40 60 80 100120140160 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C) Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 30 10 000 A) TOP 111543 VVV TJ = 150 °C nt ( 25 1121 VV Ciss o-Source Curre 1250 BOTTOM 1 09876 VVVVV pacitance (pF) 1100000 Coss VCCCGirosssSsss = === 0 CCC gVgdsd,s +f+ = CC 1ggd dM, CHdzs Shorted n-t 10 Ca ai 10 Crss Dr , D 5 I 5 V 0 1 0 5 10 15 20 25 30 0 100 200 300 400 500 600 V , Drain-to-Source Voltage (V) DS V , Drain-to-Source Voltage (V) DS Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 50 10 A) T = 25 °C 9 nt ( 40 J 8 urre 2000 7 C o-Source 2300 TJ = 150 °C C (pF) oss 200 Coss Eoss 456 E (μJ) oss n-t 3 ai Dr 10 2 , D I 1 0 20 0 0 5 10 15 20 25 0 100 200 300 400 500 600 VGS, Gate-to-Source Voltage (V) VDS Fig. 3 - Typical Transfer Characteristics Fig. 6 - C and E vs. V oss oss DS S16-1602-Rev. I, 15-Aug-16 3 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SiHF15N60E www.vishay.com Vishay Siliconix 24 20 V = 480 V ge (V) 20 VVDDDSSS == 310200 VV e Volta 16 ent (A) 15 ourc 12 Curr 10 o-S ain ate-t 8 , DrD 5 G I , S 4 G V 0 0 0 20 40 60 80 25 50 75 100 125 150 Qg, Total Gate Charge (nC) TJ, Case Temperature (°C) Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 10 - Maximum Drain Current vs. Case Temperature 100 750 A) 725 se Drain Current ( 10 TJ = 150 °C TJ = 25 °C Drain-to-Sourcedown Voltage (V) 666725705050 Rever 1 V, DSBreak 567050 , D IS V = 0 V 550 GS 0.1 525 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 - 60- 40- 20 0 20 40 60 80 100120140160 V , Source-Drain Voltage (V) T , Junction Temperature (°C) SD J Fig. 8 - Typical Source-Drain Diode Forward Voltage Fig. 11 - Temperature vs. Drain-to-Source Voltage 100 Operation in this Area Limited by RDS(on) IDMLimited 10 A) 100 μs ent ( Limited by RDS(on)* Curr 1 n ai 1 ms Dr , D I 0.1 10 ms T = 25 °C C T = 150 °C J Single Pulse BVDSS Limited 0.01 1 10 100 1000 V , Drain-to-Source Voltage (V) DS * V > minimum V at which R is specified GS GS DS(on) Fig. 9 - Maximum Safe Operating Area S16-1602-Rev. I, 15-Aug-16 4 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SiHF15N60E www.vishay.com Vishay Siliconix 1 Duty Cycle = 0.5 nt sie 0.2 ective Tranmpedance 0.1 0.1 d Effmal I 0.020.05 alizeTher Single Pulse m or N 0.01 0.0001 0.001 0.01 0.1 1 10 Pulse Time (s) Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS V DS t p VGS D.U.T. VDD R G + -VDD V DS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % I AS Fig. 13 - Switching Time Test Circuit Fig. 16 - Unclamped Inductive Waveforms V DS Q G 90 % 10 V Q Q GS GD 10 % V G V GS t t t t d(on) r d(off) f Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform L Current regulator V Same type as D.U.T. DS Vary t to obtain p required IAS 50 kΩ RG D.U.T + 12 V 0.2 µF 0.3 µF V - DD + I V AS D.U.T. - DS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit I I G D Current sampling resistors Fig. 18 - Gate Charge Test Circuit S16-1602-Rev. I, 15-Aug-16 5 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

SiHF15N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations D.U.T. (cid:129) Low stray inductance (cid:129) Ground plane (cid:129) Low leakage inductance current transformer - + - + - Rg (cid:129) dV/dt controlled by Rg + (cid:129) Driver same type as D.U.T. V - DD (cid:129) ISD controlled by duty factor “D” (cid:129) D.U.T. - device under test Driver gate drive Period D = P.W. P.W. Period V = 10 Va GS D.U.T. l waveform SD Reverse recovery Body diode forward current current dI/dt D.U.T. V waveform DS Diode recovery dV/dt V DD Re-applied voltage Body diode forward drop Inductor current Ripple ≤ 5 % ISD Note a. V = 5 V for logic level devices GS Fig. 19 - For N-Channel           Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91480. S16-1602-Rev. I, 15-Aug-16 6 Document Number: 91480 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Package Information Vishay Siliconix TO-220 FULLPAK (HIGH VOLTAGE) E A Ø P A1 n d1 d3 D u L1 V L b3 A2 b2 c b e MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. A 4.570 4.830 0.180 0.190 A1 2.570 2.830 0.101 0.111 A2 2.510 2.850 0.099 0.112 b 0.622 0.890 0.024 0.035 b2 1.229 1.400 0.048 0.055 b3 1.229 1.400 0.048 0.055 c 0.440 0.629 0.017 0.025 D 8.650 9.800 0.341 0.386 d1 15.88 16.120 0.622 0.635 d3 12.300 12.920 0.484 0.509 E 10.360 10.630 0.408 0.419 e 2.54 BSC 0.100 BSC L 13.200 13.730 0.520 0.541 L1 3.100 3.500 0.122 0.138 n 6.050 6.150 0.238 0.242 Ø P 3.050 3.450 0.120 0.136 u 2.400 2.500 0.094 0.098 v 0.400 0.500 0.016 0.020 ECN: X09-0126-Rev. B, 26-Oct-09 DWG: 5972 Notes 1. To be used only for process drawing. 2. These dimensions apply to all TO-220, FULLPAK leadframe versions 3 leads. 3. All critical dimensions should C meet C > 1.33. pk 4. All dimensions include burrs and plating thickness. 5. No chipping or package damage. Document Number: 91359 www.vishay.com Revision: 26-Oct-09 1

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