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F D C 8 6 May 2013 0 2 FDC8602 D u Dual N-Channel Shielded Gate PowerTrench® MOSFET a l N 100 V, 1.2 A, 350 mΩ - C Features General Description h a n (cid:132) Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild n e (cid:132) Max rDS(on) = 350 mΩ at VGS = 10 V, ID = 1.2 A Semiconductor‘s advanced PowerTrench® process that l S (cid:132) Max r = 575 mΩ at V = 6 V, I = 0.9 A incorporates Shielded Gate technology. This process has been h DS(on) GS D optimized for rDS(on), switching performance and ruggedness. ie (cid:132) High performance trench technology for extremely low rDS(on) ld (cid:132) High power and current handling capability in a widely used e d surface mount package G Applications (cid:132) Fast switching speed a t e (cid:132) 100% UIL Tested (cid:132) Load Switch P (cid:132) RoHS Compliant (cid:132) Synchronous Rectifier o w e r T r e n c h ® D2 M S1 O S D1 F E T G2 S2 Pin 1 G1 SuperSOTTM -6 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol Parameter Ratings Units V Drain to Source Voltage 100 V DS V Gate to Source Voltage ±20 V GS Drain Current -Continuous (Note 1a) 1.2 A I D -Pulsed 5 A E Single Pulse Avalanche Energy (Note 3) 1.5 mJ AS Power Dissipation (Note 1a) 0.96 P W D Power Dissipation (Note 1b) 0.69 T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 60 θJC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 130 θJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity .862 FDC8602 SSOT-6 7 ’’ 8 mm 3000 units ©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDC8602 Rev.C1

F D Electrical Characteristics T = 25 °C unless otherwise noted C J 8 6 Symbol Parameter Test Conditions Min Typ Max Units 0 2 Off Characteristics D BV Drain to Source Breakdown Voltage I = 250 μA, V = 0 V 100 V u DSS D GS a Δ BΔVTDSS BCroeeaffkicdioewntn Voltage Temperature ID = 250 μA, referenced to 25 °C 73 mV/°C l N J - C I Zero Gate Voltage Drain Current V = 80 V, V = 0 V 1 μA DSS DS GS h IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA a n n On Characteristics e VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 2 3.2 4 V l S Δ ΔVTGS(th) GTeamtep teor aStuoruer cCeo Tehffriceisehnotld Voltage ID = 250 μA, referenced to 25 °C -8 mV/°C hie J l d V = 10 V, I = 1.2 A 285 350 GS D e r Static Drain to Source On Resistance V = 6 V, I = 0.9 A 409 575 mΩ d DS(on) GS D G V = 10V, I = 1.2A, T = 125 °C 489 600 GS D J a gFS Forward Transconductance VDS = 10 V, ID = 1.2 A 1.3 S te P Dynamic Characteristics o w C Input Capacitance 53 70 pF iss V = 50 V, V = 0 V, e C Output Capacitance DS GS 17 25 pF r oss f = 1MHz T C Reverse Transfer Capacitance 0.8 5 pF r rss e R Gate Resistance 1.6 Ω n g c h Switching Characteristics ® M t Turn-On Delay Time 3.5 10 ns d(on) tr Rise Time VDD = 50 V, ID = 1.2 A, 1.7 10 ns OS td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 5.4 11 ns F E t Fall Time 2.3 10 ns f T Q Total Gate Charge V = 0 V to 10 V 1.2 2 nC g(TOT) GS Qg(TOT) Total Gate Charge VGS = 0 V to 5 V VDD = 50 V, 0.6 1 nC Qgs Gate to Source Charge ID = 1.2 A 0.4 nC Q Gate to Drain “Miller” Charge 0.4 nC gd Drain-Source Diode Characteristics V Source-Drain Diode Forward Voltage V = 0 V, I = 1.2 A (Note 2) 0.86 1.3 V SD GS S trr Reverse Recovery Time I = 1.2 A, di/dt = 100 A/μs 27 43 ns Q Reverse Recovery Charge F 12 21 nC rr NOTES: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 130 °C/W when mounted on b) 180 °C/W when mounted on a a 1 in2 pad of 2 oz copper minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 1 A, VDD = 100 V, VGS = 10 V. ©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDC8602 Rev.C1

F D C 8 Typical Characteristics T = 25 °C unless otherwise noted 6 J 0 2 D 5 4 u AIN CURRENT (A) 234 VGS = 10 VPULSE DURVAGTSIO =N 8 = V 80 μs VVGGSS == 67 VV NORMALIZEDOURCE ON-RESISTANCE 23 VGS = 5 V VVGGSS = = 6 8 V VVGS = 7 V al N-Channel S DR DUTY CYCLE = 0.5% MAX O S 1 h I, D 01 VGS = 5 V DRAIN T 0 PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs VGS = 10 V ielded 0 1 2 3 4 5 0 1 2 3 4 5 G VDS, DRAIN TO SOU RCE VOLTAGE (V) ID, DRAIN CURR ENT (A) a t e Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance P vs Drain Current and Gate Voltage o w e r 2.0 1200 T r ANCE 1.8 IVDG =S 1=. 21 0A V )mΩ ID = 1.2 A PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A μXs enc NORMALIZED O SOURCE ON-RESIST 1111....0246 , rDRAIN TO DS(on) (CE ON-RESISTANCE369000000 TJ = 125 oC h MOSFET® N T 0.8 UR TJ = 25 oC RAI SO D 0.6 0 -75 -50 -25 0 25 50 75 100 125 150 5 6 7 8 9 10 TJ, JUNCTION TEM PERATURE (oC) VGS, GATE TO SOUR CE VOLTAGE (V) Figure 3. Normalized On Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 5 10 PULSE DURATION = 80 μs A) VGS = 0 V DUTY CYCLE = 0.5% MAX T ( A) 4 VDS = 5 V REN 1 TJ = 150 oC T ( UR RREN 3 AIN C 0.1 TJ = 25 oC U R C D N 2 E DRAI TJ = 150 oC TJ = 25 oC VERS 0.01 , D 1 RE I , S TJ = -55 oC TJ = -55 oC I 0 0.001 2 3 4 5 6 7 8 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOU RCE VOLTAGE (V) VSD, BODY DIODE FOR WARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2011 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com FDC8602 Rev.C1

F D Typical Characteristics T = 25 °C unless otherwise noted C J 8 6 0 2 10 500 D GE (V) 8 ID = 1.2 A VDD = 50 V Ciss ua TA l N CE VOL 6 VDD = 25 V VDD = 75 V CE (pF) 10 Coss -Ch SOUR 4 CITAN ann E TO CAPA 1 el AT 2 Crss S G f = 1 MHz h , GS VGS = 0 V ie V 0 0.1 ld 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1 10 100 e Qg, GATE CH ARGE (nC) VDS, DRAIN TO SOU RCE VOLTAGE (V) d G a Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain t e to Source Voltage P o w 2 10 e r T A) re T ( 1 A) n REN TJ = 25 oC NT ( 1 100 us ch UR RE ® E C TJ = 100 oC CUR THIS AREA IS 1 ms M NCH AIN 0.1 LIMITED BY rDS(on) 10 ms OS LA DR SINGLE PULSE F VA , D TJ = MAX RATED 100 ms E I, AAS TJ = 125 oC I0.01 TRAθJ =A 2=5 1 o8C0 oC/W 1D10C ss T 0.1 0.005 0.01 0.1 1 10 0.1 1 10 100 400 tAV, TIME IN AVA LANCHE (ms) VDS, DRAIN to SOU RCE VOLTAGE (V) Figure 9. Unclamped Inductive Figure 10. Forward Bias Safe Switching Capability Operating Area W) 100 VGS = 10 V SINGLE PULSE R ( RθJA = 180 oC/W E W T = 25 oC O A P T N E 10 NSI A R T K A E P , K) 1 P P( 0.5 10-4 10-3 10-2 10-1 1 10 100 1000 t, PULSE WIDTH (s ec) Figure 11. Single Pulse Maximum Power Dissipation ©2011 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com FDC8602 Rev.C1

F D Typical Characteristics T = 25 °C unless otherwise noted C J 8 6 0 2 2 DUTY CYCLE-DESCENDING ORDER D 1 u D = 0.5 a MAL A 00..21 l N ERZJθ 0.05 -C D TH NCE, 0.1 00..0021 PDM ha LIZEEDA nn MAMP t1 e ORI t2 l S N SINGLE PULSE NOTES: 0.01 RθJA = 180 oC/W DPEUATKY FTAJ C= TPODRM: xD Z =θ JtA1 /xt2 RθJA + TA hie l d 0.005 e 10-4 10-3 10-2 10-1 1 10 100 1000 d t, RECTANGULAR PULSE DURATION (sec) G a Figure 12. Junction-to-Ambient Transient Thermal Response Curve t e P o w e r T r e n c h ® M O S F E T ©2011 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com FDC8602 Rev.C1

F D Dimensional Outline and Pad Layout C 8 6 0 2 D u a l N - C h a n n e l S h i e l d e d G a t e P o w e r T r e n c h ® M O S F E T ©2011 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com FDC8602 Rev.C1

F D C 8 6 0 2 D TRADEMARKS u The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not a intended to be an exhaustive list of all such trademarks. l N 2Cool™ FPS™ Sync-Lock™ - AccuPower™ F-PFS™ ® ®* C AX-CAP®* FRFET® PowtmerTrench® h BitSiC™ Global Power ResourceSM PowerXS™ a Build it Now™ Green Bridge™ Programmable Active Droop™ TinyBoost™ n CorePLUS™ Green FPS™ QFET® TinyBuck™ n TinyCalc™ e CCoRrOePSOSVWOELRT™™ GGmreaexn™ FPS™ e-Series™ QQuSi™et Series™ TTIinNyYLOogPiTc®O™ l S CTL™ GTO™ RapidConfigure™ TinyPower™ h Current Transfer Logic™ IntelliMAX™ ™ i DDEcuEoaUSl XCPPAoEoREl™KD®® IMaSnaOdr kPBiLneAgtt NeSrAm™Ra™ll Speakers Sound Louder SSiagvninaglW oiuser ™world, 1mW/W/kW at a time™ TTTiirnnayynWPSWiiCreM®™™ elde TriFault Detect™ d EESffiBceCn™tMax™ MMeICgRaBOuCcOk™UPLER™ SSMmAarRtMTa SxT™ART™ TRUECURRENT®* G μSerDes™ MicroFET™ Solutions for Your Success™ a ® MicroPak™ SPM® te FFFFAaAaiiCCrrccTThh ®iiQllddu® Sieetm Siecroiensd™uctor® MMMmiioWcllteriSoorDnaPMvraievkare2x™™™™ SSSSTuuupppEeeeArrrLFSSTEOOHTTT™®™™--36 UUUlHntriCFa E®FTR™FET™ Pow FFaAsStvTC®ore™ OOPptToOHLiTO™GIC® SSuuppererMSOOTS™®-8 VVCisuXa™lMax™ erT FETBench™ OPTOPLANAR® SyncFET™ VXoSl™tagePlus™ re n c h *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. ® DISCLAIMER M FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE O RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY S PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. F THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY E THEREIN, WHICH COVERS THESE PRODUCTS. T LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used here in: 1. Life support devices or systems are devices or systems which, (a) are 2. A critical component in any component of a life support, device, or intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or instructions for use provided in the labeling, can be reasonably effectiveness. expected to result in a significant injury of the user. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Datasheet contains the design specifications for product development. Specifications Advance Information Formative / In Design may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to No Identification Needed Full Production make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Obsolete Not In Production Semiconductor. The datasheet is for reference information only. Rev. I64 ©2011 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com FDC8602 Rev.C1

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