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  • 型号: STD9NM40N
  • 制造商: STMicroelectronics
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STD9NM40N产品简介:

ICGOO电子元器件商城为您提供STD9NM40N由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 STD9NM40N价格参考¥0.89-¥0.89。STMicroelectronicsSTD9NM40N封装/规格:晶体管 - FET,MOSFET - 单, 表面贴装 N 沟道 400V 5.6A(Tc) 60W(Tc) DPAK。您可以下载STD9NM40N参考资料、Datasheet数据手册功能说明书,资料中有STD9NM40N 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

分立半导体产品

描述

MOSFET N-CH 400V 5.6A DPAKMOSFET N-Ch 400V 0.73Ohm 5.6A pwr Mdmesh II

产品分类

FET - 单分离式半导体

FET功能

标准

FET类型

MOSFET N 通道,金属氧化物

Id-ContinuousDrainCurrent

5.6 A

Id-连续漏极电流

5.6 A

品牌

STMicroelectronics

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

晶体管,MOSFET,STMicroelectronics STD9NM40NMDmesh™ II

数据手册

点击此处下载产品Datasheet

产品型号

STD9NM40N

Pd-PowerDissipation

60 W

Pd-功率耗散

60 W

Qg-GateCharge

14 nC

Qg-栅极电荷

14 nC

RdsOn-Drain-SourceResistance

790 mOhms

RdsOn-漏源导通电阻

790 mOhms

Vds-Drain-SourceBreakdownVoltage

400 V

Vds-漏源极击穿电压

400 V

Vgs-Gate-SourceBreakdownVoltage

25 V

Vgs-栅源极击穿电压

25 V

Vgsth-Gate-SourceThresholdVoltage

3 V

Vgsth-栅源极阈值电压

3 V

上升时间

4.4 ns

下降时间

8.8 ns

不同Id时的Vgs(th)(最大值)

4V @ 250µA

不同Vds时的输入电容(Ciss)

365pF @ 50V

不同Vgs时的栅极电荷(Qg)

14nC @ 10V

不同 Id、Vgs时的 RdsOn(最大值)

790 毫欧 @ 2.5A,10V

产品种类

MOSFET

供应商器件封装

D-Pak

其它名称

497-13426-6

其它有关文件

http://www.st.com/web/catalog/sense_power/FM100/CL824/SC1167/PF255265?referrer=70071840

典型关闭延迟时间

25 ns

功率-最大值

60W

包装

Digi-Reel®

商标

STMicroelectronics

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

TO-252-3,DPak(2 引线+接片),SC-63

封装/箱体

DPAK-2

工厂包装数量

2500

晶体管极性

N-Channel

最大工作温度

+ 150 C

标准包装

1

漏源极电压(Vdss)

400V

电流-连续漏极(Id)(25°C时)

5.6A (Tc)

系列

STD9NM40N

配置

Single

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PDF Datasheet 数据手册内容提取

STD9NM40N, STP9NM40N Ω N-channel 400 V, 0.73 typ., 5.6 A MDmesh™ II Power MOSFET in DPAK and TO-220 packages Datasheet — production data Features Order codes V @T R max. I DSS JMAX DS(on) D STD9NM40N 450 V < 0.79 Ω 5.6 A TAB STP9NM40N TAB ■ 100% avalanche tested 3 1 23 ■ Low input capacitance and gate charge 1 DPAK TO-220 ■ Low gate input resistance Applications ■ Switching applications Description Figure 1. Internal schematic diagram These devices are N-channel Power MOSFETs developed using the second generation of MDmesh™ technology. This revolutionary Power (cid:36)(cid:8)(cid:18)(cid:12)(cid:0)(cid:52)(cid:33)(cid:34)(cid:9) MOSFET associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. (cid:39)(cid:8)(cid:17)(cid:9) (cid:51)(cid:8)(cid:19)(cid:9) (cid:33)(cid:45)(cid:16)(cid:17)(cid:20)(cid:23)(cid:21)(cid:86)(cid:17) Table 1. Device summary Order codes Marking Packages Packaging STD9NM40N DPAK Tape and reel 9NM40N STP9NM40N TO-220 Tube December 2012 Doc ID 023762 Rev 2 1/18 This is information on a product in full production. www.st.com 18

Contents STD9NM40N, STP9NM40N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Electrical ratings 1 Electrical ratings T able 2. Absolute maximum ratings Symbol Parameter Value Unit V Drain-source voltage 400 V DS V Gate-source voltage ± 25 V GS I Drain current (continuous) at T = 25 °C 5.6 A D C I Drain current (continuous) at T = 100 °C 4.3 A D C I (1) Drain current (pulsed) 22.4 DM P Total dissipation at T = 25 °C 60 W TOT C dv/dt (2) Peak diode recovery voltage slope 40 V/ns T Storage temperature - 55 to 150 °C stg T Max. operating junction temperature 150 °C j 1. Pulse width limited by safe operating area. 2. I ≤ 5.6 A, di/dt ≤ 400 A/µs, V < V , V = 80% V SD Peak (BR)DSS DS (BR)DSS T able 3. Thermal data Value Symbol Parameter Unit DPAK TO-220 R Thermal resistance junction-case max 2.08 °C/W thj-case R Thermal resistance junction-pcb max 50 °C/W thj-pcb T able 4. Avalanche characteristics Symbol Parameter Value Unit Avalanche current, repetitive or not-repetitive I 2 A AR (pulse width limited by T max) j Single pulse avalanche energy E 140 mJ AS (starting T = 25°C, I = I , V = 50 V) j D AR DD Doc ID 023762 Rev 2 3/18

Electrical characteristics STD9NM40N, STP9NM40N 2 Electrical characteristics (T = 25 °C unless otherwise specified) C Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source V breakdown voltage I = 1 mA 400 V (BR)DSS D (V = 0) GS Zero gate voltage V = 400 V 1 µA I DS DSS drain current (V = 0) V = 400 V, T = 125 °C 100 µA GS DS C Gate-body leakage I V = ± 25 V ± 100 nA GSS current (V = 0) GS DS V Gate threshold voltage V = V , I = 250 µA 2 3 4 V GS(th) DS GS D Static drain-source on- R V = 10 V, I = 2.5 A 0.73 0.79 Ω DS(on) resistance GS D Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Input capacitance C 365 pF Ciss Output capacitance VDS = 50 V, f = 1 MHz, - 30 - pF Coss Reverse transfer VGS = 0 2.3 pF rss capacitance Equivalent output Coss(eq)(1) capacitance time VDS = 0 to 50 V, VGS = 0 - 147.5 - pF related Intrinsic gate R f = 1 MHz, I =0 - 5.4 - Ω G resistance D Q Total gate charge V = 320 V, I = 5.6 A, 14 nC g DD D Q Gate-source charge V = 10 V - 3 - nC gs GS Q Gate-drain charge (see Figure17) 7 nC gd 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as C when V oss DS increases from 0 to 80% V DSS 4/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max Unit t Turn-on delay time 7 ns d(on) V = 200 V, I = 5.6 A, t Rise time DD D 4.4 ns r R = 4.7 Ω, V = 10 V - - t Turn-off-delay time G GS 25 ns d(off) (see Figure16) t Fall time 8.8 ns f Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I Source-drain current 5.6 A SD - I (1) Source-drain current (pulsed) 22.4 A SDM V (2) Forward on voltage I = 5.6 A, V = 0 - 1.5 V SD SD GS t Reverse recovery time 187 ns rr I = 5.6 A, di/dt = 100 A/µs Q Reverse recovery charge SD - 1.3 µC rr V = 60 V (see Figure21) I Reverse recovery current DD 14 A RRM t Reverse recovery time I = 5.6 A, di/dt = 100 A/µs 224 ns rr SD Q Reverse recovery charge V = 60 V, T = 150 °C - 1.5 µC rr DD j I Reverse recovery current (see Figure21) 13 A RRM 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 023762 Rev 2 5/18

Electrical characteristics STD9NM40N, STP9NM40N 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for DPAK Figure 3. Thermal impedance for DPAK ID AM16303v1 (A) Tj=150°C Tc=25°C Single pulse 10 10µs 1 OperLiatimiotne id n btyh ism aarx eaR iDsS(on) 110m0sµs 10ms 0.1 0.1 1 10 100 VDS(V) Figure 4. Safe operating area for TO-220 Figure 5. Thermal impedance for TO-220 ID AM15517v1 (A) 10 1 Operatimiotne idn tbyh is maarx eaR iDsS(on) 11100m0µsµss Li Tj=150°C Tc=25°C 10ms Single pulse 0.1 0.1 1 10 100 VDS(V) Figure 6. Output characteristics Figure 7. Transfer characteristics AM16304v1 AM16305v1 ID ID (A) (A) VGS=10V VDS=20V 10 10 6V 8 8 6 6 4 4 5V 2 2 0 0 0 2 4 6 8 10 12 14 16 18 VDS(V) 0 2 4 6 8 VGS(V) 6/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Electrical characteristics Figure 8. Static drain-source on-resistance Figure 9. Gate charge vs gate-source voltage RDS(on) AM00891v1 VGS AM16306v1 (Ω) VGS=10V (V) VDS VDS(V) 0.077 12 VIDDD==53.62A0V 300 0.076 10 250 0.075 8 200 0.074 6 150 0.073 4 100 0.072 0.071 2 50 0.070 0 0 0 1 2 3 4 5 ID(A) 0 2 4 6 8 10 12 14 Qg(nC) Figure 10. Capacitance variations Figure 11. Output capacitance stored energy C AM16308v1 Eoss AM16309v1 (pF) (µJ) 1.6 1000 1.4 1.2 Ciss 1.0 100 0.8 0.6 Coss 10 0.4 0.2 Crss 1 0 0.1 1 10 100 VDS(V) 0 50 100 150 200 250 300 350 VDS(V) Figure 12. Normalized gate threshold voltage Figure 13. Normalized on resistance vs vs temperature temperature VGS(th) AM07923v1 RDS(on) AM07924v1 (norm) (norm) 2.1 ID = 250 µA ID = 2.5 A 1.00 1.7 0.90 1.3 0.80 0.9 0.70 0.5 -50 -25 0 25 50 75 100 TJ(°C) -50 -25 0 25 50 75 100 TJ(°C) Doc ID 023762 Rev 2 7/18

Electrical characteristics STD9NM40N, STP9NM40N Figure 14. Normalized V vs temperature Figure 15. Source-drain diode forward DS characteristics VDS AM09028v1 VSD(V) AM16310v1 (norm) ID=1mA TJ=-50°C 1.10 1.3 1.08 1.2 1.06 1.1 1.04 TJ=25°C 1.0 1.02 0.9 1.00 TJ=150°C 0.8 0.98 0.96 0.7 0.94 0.6 0.92 0.5 -50 -25 0 25 50 75 100 TJ(°C) 0 1 2 3 4 5 ISD(A) 8/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Test circuits 3 Test circuits Figure 16. Switching times test circuit for Figure 17. Gate charge test circuit resistive load VDD 12V 47kΩ 1kΩ 100nF RL 2μ20F0 3μ.F3 VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. μF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test switching and diode recovery times circuit L A A A D FAST L=100μH VD G D.U.T. DIODE 2200 3.3 μF μF VDD S B 3.3 1000 B B μF μF 25Ω D VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf 90% 90% IDM 10% ID 0 10% VDS VDD VDD 90% VGS AM01472v1 0 10% AM01473v1 Doc ID 023762 Rev 2 9/18

Package mechanical data STD9NM40N, STP9NM40N 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 10/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Package mechanical data Table 9. DPAK (TO-252) mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 5.10 E 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1 L1 2.80 L2 0.80 L4 0.60 1 R 0.20 V2 0° 8° Doc ID 023762 Rev 2 11/18

Package mechanical data STD9NM40N, STP9NM40N Figure 22. DPAK (TO-252) drawing 0068772_I Figure 23. DPAK footprint(a) 6.7 1.8 3 1.6 2.3 6.7 2.3 1.6 AM08850v1 a. All dimensions are in millimeters 12/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Package mechanical data Table 10. TO-220 type A mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅ P 3.75 3.85 Q 2.65 2.95 Doc ID 023762 Rev 2 13/18

Package mechanical data STD9NM40N, STP9NM40N Figure 24. TO-220 type A drawing 0015988_typeA_Rev_S 14/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Packaging mechanical data 5 Packaging mechanical data Table 11. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. Min. Max. A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 B1 12.1 C 12.8 13.2 D 1.5 1.6 D 20.2 D1 1.5 G 16.4 18.4 E 1.65 1.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 Doc ID 023762 Rev 2 15/18

Packaging mechanical data STD9NM40N, STP9NM40N Figure 25. Tape for DPAK (TO-252) 10 pitches cumulative tolerance on tape +/- 0.2 mm Top cover P0 D P2 T tape E F K0 W B1 B0 For machine ref. only A0 P1 D1 including draft and radii concentric around B0 User direction of feed R Bending radius User direction of feed AM08852v1 Figure 26. Reel for DPAK (TO-252) T REEL DIMENSIONS 40mm min. Access hole At slot location B D C N A G measured Tape slot In core for Full radius At hub Tape start AM08851v1 16/18 Doc ID 023762 Rev 2

STD9NM40N, STP9NM40N Revision history 6 Revision history T able 12. Document revision history Date Revision Changes 08-Oct-2012 1 First release. – Minor text changes 14-Dec-2012 2 – Added: TO-220 package Doc ID 023762 Rev 2 17/18

STD9NM40N, STP9NM40N Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 18/18 Doc ID 023762 Rev 2

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