Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia

PEMD9; PUMD9 NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k Rev. 6 — 22 November 2011 Product data sheet 1. Product profile 1.1 General description NPN/PNP double Resistor-EquippedTransistors(RET) in Surface-Mounted Device(SMD) plastic packages. Table 1. Product overview Type number Package PNP/PNP NPN/NPN Package complement complement configuration NXP JEITA PEMD9 SOT666 - PEMB9 PEMH9 ultra small and flat lead PUMD9 SOT363 SC-88 PUMB9 PUMH9 very small 1.2 Features and benefits  100mA output current capability  Reduces component count  Built-in bias resistors  Reduces pick and place costs  Simplifies circuit design  AEC-Q101qualified 1.3 Applications  Low current peripheral driver  Control of IC inputs  Replaces general-purpose transistors in digital applications 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity V collector-emitter voltage open base - - 50 V CEO I output current - - 100 mA O R1 bias resistor1 (input) 7 10 13 k R2/R1 bias resistor ratio 3.7 4.7 5.7

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol 1 GND (emitter)TR1 6 5 4 6 5 4 2 input (base)TR1 3 output (collector)TR2 4 GND (emitter)TR2 R1 R2 5 input (base)TR2 TR2 1 2 3 TR1 6 output (collector)TR1 001aab555 R2 R1 1 2 3 006aaa143 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PEMD9 - plastic surface-mounted package; 6leads SOT666 PUMD9 SC-88 plastic surface-mounted package; 6leads SOT363 4. Marking Table 5. Marking codes Type number Marking code[1] PEMD9 D9 PUMD9 D*9 [1] * = placeholder for manufacturing site code PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 2 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity V collector-base voltage open emitter - 50 V CBO V collector-emitter voltage open base - 50 V CEO V emitter-base voltage open collector - 6 V EBO V input voltageTR1 I positive - +40 V negative - 6 V input voltageTR2 positive - +6 V negative - 40 V I output current - 100 mA O I peak collector current single pulse; - 100 mA CM t 1ms p P total power dissipation T 25C tot amb PEMD9(SOT666) [1][2] - 200 mW PUMD9(SOT363) [1] - 200 mW Per device P total power dissipation T 25C tot amb PEMD9(SOT666) [1][2] - 300 mW PUMD9(SOT363) [1] - 300 mW T junction temperature - 150 C j T ambient temperature 65 +150 C amb T storage temperature 65 +150 C stg [1] Device mounted on an FR4Printed-Circuit Board(PCB), single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 3 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac749 400 Ptot (mW) 300 200 100 0 -75 -25 25 75 125 175 Tamb (°C) FR4PCB, standard footprint Fig 1. Per device: Power derating curve for SOT363(SC-88) and SOT666 6. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor R thermal resistance from in free air th(j-a) junction to ambient PEMD9(SOT666) [1][2] - - 625 K/W PUMD9(SOT363) [1] - - 625 K/W Per device R thermal resistance from in free air th(j-a) junction to ambient PEMD9(SOT666) [1][2] - - 417 K/W PUMD9 (SOT363) [1] - - 417 K/W [1] Device mounted on an FR4PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 4 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 103 006aac751 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4PCB, standard footprint Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PEMD9(SOT666); typical values 103 006aac750 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4PCB, standard footprint Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PUMD9(SOT363); typical values PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 5 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 7. Characteristics Table 8. Characteristics T =25C unless otherwise specified. amb Symbol Parameter Conditions Min Typ Max Unit Per transistor; for the PNP transistor (TR2) with negative polarity I collector-base cut-off V =50V; I =0A - - 100 nA CBO CB E current I collector-emitter cut-off V =30V; I =0A - - 1 A CEO CE B current V =30V; I =0A; - - 5 A CE B T =150C j I emitter-base cut-off V =5V; I =0A - - 150 A EBO EB C current h DCcurrent gain V =5V; I =5mA 100 - - FE CE C V collector-emitter I =5mA; I =0.25mA - - 100 mV CEsat C B saturation voltage V off-state input voltage V =5V; I =100A - 0.7 0.5 V I(off) CE C V on-state input voltage V =0.3V; I =1mA 1.4 0.8 - V I(on) CE C R1 bias resistor1 (input) 7 10 13 k R2/R1 bias resistor ratio 3.7 4.7 5.7 C collector capacitance V =10V; I =i =0A; c CB E e f=1MHz TR1(NPN) - - 2.5 pF TR2(PNP) - - 3 pF f transition frequency V =5V; I =10mA; [1] T CE C f=100MHz TR1(NPN) - 230 - MHz TR2(PNP) - 180 - MHz [1] Characteristics of built-in transistor PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 6 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 103 006aac784 1 006aac785 hFE (1) (2) (3) VCEsat (V) 102 (1) 10-1 (2) (3) 10 1 10-2 10-1 1 10 102 10-1 1 10 102 IC (mA) IC (mA) V =5V I /I =20 CE C B (1) Tamb=100C (1) Tamb=100C (2) Tamb=25C (2) Tamb=25C (3) Tamb=40C (3) Tamb=40C Fig 4. TR1(NPN): DCcurrent gain as a function of Fig 5. TR1(NPN): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values 006aac786 006aac787 10 10 VI(on) VI(off) (V) (V) (1) 1 1 (1) (2) (2) (3) (3) 10-1 10-1 10-1 1 10 102 10-1 1 10 IC (mA) IC (mA) V =0.3V V =5V CE CE (1) Tamb=40C (1) Tamb=40C (2) Tamb=25C (2) Tamb=25C (3) Tamb=100C (3) Tamb=100C Fig 6. TR1(NPN): On-state input voltage as a Fig 7. TR1(NPN): Off-state input voltage as a function of collector current; typical values function of collector current; typical values PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 7 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 3 006aac788 103 006aac757 Cc (pF) fT (MHz) 2 102 1 0 10 0 10 20 30 40 50 10-1 1 10 102 VCB (V) IC (mA) f=1MHz; Tamb=25C VCE=5V; Tamb=25C Fig 8. TR1(NPN): Collector capacitance as a function Fig 9. TR1(NPN): Transition frequency as a function of collector-base voltage; typical values of collector current; typical values of built-in transistor 103 006aac789 -1 006aac790 hFE (1) (2) VCEsat (3) (V) 102 -10-1 (1) 10 (2) (3) 1 -10-2 -10-1 -1 -10 -102 -10-1 -1 -10 -102 IC (mA) IC (mA) VCE=5V IC/IB=20 (1) Tamb=100C (1) Tamb=100C (2) Tamb=25C (2) Tamb=25C (3) Tamb=40C (3) Tamb=40C Fig 10. TR2(PNP): DCcurrent gain as a function of Fig 11. TR2(PNP): Collector-emitter saturation collector current; typical values voltage as a function of collector current; typical values PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 8 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac791 006aac792 -10 -10 VI(on) VI(off) (V) (V) (1) -1 (2) -1 (1) (3) (2) (3) -10-1 -10-1 -10-1 -1 -10 -102 -10-1 -1 -10 IC (mA) IC (mA) VCE=0.3V VCE=5V (1) Tamb=40C (1) Tamb=40C (2) Tamb=25C (2) Tamb=25C (3) Tamb=100C (3) Tamb=100C Fig 12. TR2(PNP): On-state input voltage as a Fig 13. TR2(PNP): Off-state input voltage as a function of collector current; typical values function of collector current; typical values 7 006aac793 103 006aac763 Cc (pF) 6 fT 5 (MHz) 4 102 3 2 1 0 10 0 -10 -20 -30 -40 -50 -10-1 -1 -10 -102 VCB (V) IC (mA) f=1MHz; Tamb=25C VCE=5V; Tamb=25C Fig 14. TR2(PNP): Collector capacitance as a function Fig 15. TR2(PNP): Transition frequency as a function of collector-base voltage; typical values of collector current; typical values of built-in transistor PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 9 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 1.7 0.6 2.2 1.1 1.5 0.5 1.8 0.8 6 5 4 6 5 4 0.45 0.15 0.3 0.1 1.7 1.3 2.2 1.35 1.5 1.1 2.0 1.15 pin 1 pin 1 index index 1 2 3 1 2 3 0.5 00..2177 00..1088 0.65 00..32 00..2150 1 1.3 Dimensions in mm 04-11-08 Dimensions in mm 06-03-16 Fig 16. Package outline PEMD9(SOT666) Fig 17. Package outline PUMD9(SOT363) 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type Package Description Packing quantity number 3000 4000 8000 10000 PEMD9 SOT666 2mm pitch, 8mm tape and reel - - -315 - 4mm pitch, 8mm tape and reel - -115 - - PUMD9 SOT363 4mm pitch, 8mm tape and reel; T1 [2] -115 - - -135 4mm pitch, 8mm tape and reel; T2 [3] -125 - - -165 [1] For further information and the availability of packing methods, see Section14. [2] T1: normal taping [3] T2: reverse taping PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 10 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 11. Soldering 2.75 2.45 2.1 1.6 solder lands 0.4 (6×) 0.25 0.3 0.538 (2×) (2×) placement area 0.55 2 1.7 1.075 (2×) solder paste occupied area 0.325 0.375 (4×) (4×) Dimensions in mm 1.7 0.45 0.6 (4×) (2×) 0.5 0.65 (4×) (2×) sot666_fr Reflow soldering is the only recommended soldering method. Fig 18. Reflow soldering footprint PEMD9(SOT666) PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 11 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2.65 solder lands 2.35 1.5 0.6 0.5 0.4 (2×) (4×) (4×) solder resist solder paste 0.5 0.6 occupied area (4×) (2×) 0.6 Dimensions in mm (4×) 1.8 sot363_fr Fig 19. Reflow soldering footprint PUMD9(SOT363) 1.5 solder lands 4.5 0.3 2.5 solder resist occupied area 1.5 Dimensions in mm preferred transport 1.3 1.3 direction during soldering 2.45 5.3 sot363_fw Fig 20. Wave soldering footprint PUMD9(SOT363) PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 12 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PEMD9_PUMD9v.6 20111122 Product data sheet - PEMD9_PUMD9v.5 Modifications: • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 1 “Product profile”: updated • Section 4 “Marking”: updated • Figure1 to 15: added • Section 5 “Limiting values”: updated • Section 6 “Thermal characteristics”: updated • Table 8 “Characteristics”: V redefined to V on-state input voltage, V redefined to i(on) I(on) i(off) V off-state input voltage, I updated, f added I(off) CEO T • Section 8 “Test information”: added • Section 9 “Package outline”: superseded by minimized package outline drawings • Section 10 “Packing information”: added • Section 11 “Soldering”: added • Section 13 “Legal information”: updated PEMD9_PUMD9v.5 20040415 Product data sheet - PEMD9_PUMD9v.4 PEMD9_PUMD9v.4 20031104 Product specification - PEMD9v.2 PUMD9v.3 PEMD9v.2 20020905 Product specification - PEMD9v.1 PEMD9v.1 20011022 Preliminary specification - - PUMD9v.3 20010216 Product specification - PUMD9v.2 PUMD9v.2 19990520 Product specification - PUMD9v.1 PUMD9v.1 19990107 Product specification - - PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 13 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. 13.2 Definitions malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of Draft — The document is a draft version only. The content is still under NXP Semiconductors products in such equipment or applications and internal review and subject to formal approval, which may result in therefore such inclusion and/or use is at the customer’s own risk. modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of Applications — Applications that are described herein for any of these information included herein and shall have no liability for the consequences of products are for illustrative purposes only. NXP Semiconductors makes no use of such information. representation or warranty that such applications will be suitable for the specified use without further testing or modification. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended Customers are responsible for the design and operation of their applications for quick reference only and should not be relied upon to contain detailed and and products using NXP Semiconductors products, and NXP Semiconductors full information. For detailed and full information see the relevant full data accepts no liability for any assistance with applications or customer product sheet, which is available on request via the local NXP Semiconductors sales design. It is customer’s sole responsibility to determine whether the NXP office. In case of any inconsistency or conflict with the short data sheet, the Semiconductors product is suitable and fit for the customer’s applications and full data sheet shall prevail. products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate Product specification — The information and data provided in a Product design and operating safeguards to minimize the risks associated with their data sheet shall define the specification of the product as agreed between applications and products. NXP Semiconductors and its customer, unless NXP Semiconductors and NXP Semiconductors does not accept any liability related to any default, customer have explicitly agreed otherwise in writing. In no event however, damage, costs or problem which is based on any weakness or default in the shall an agreement be valid in which the NXP Semiconductors product is customer’s applications or products, or the application or use by customer’s deemed to offer functions and qualities beyond those described in the third party customer(s). Customer is responsible for doing all necessary Product data sheet. testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and 13.3 Disclaimers the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limited warranty and liability — Information in this document is believed to Limiting values — Stress above one or more limiting values (as defined in be accurate and reliable. However, NXP Semiconductors does not give any the Absolute Maximum Ratings System of IEC60134) will cause permanent representations or warranties, expressed or implied, as to the accuracy or damage to the device. Limiting values are stress ratings only and (proper) completeness of such information and shall have no liability for the operation of the device at these or any other conditions above those given in consequences of use of such information. the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or In no event shall NXP Semiconductors be liable for any indirect, incidental, repeated exposure to limiting values will permanently and irreversibly affect punitive, special or consequential damages (including - without limitation - lost the quality and reliability of the device. profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such Terms and conditions of commercial sale — NXP Semiconductors damages are based on tort (including negligence), warranty, breach of products are sold subject to the general terms and conditions of commercial contract or any other legal theory. sale, as published at http://www.nxp.com/profile/terms, unless otherwise Notwithstanding any damages that customer might incur for any reason agreed in a valid written individual agreement. In case an individual whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards agreement is concluded only the terms and conditions of the respective customer for the products described herein shall be limited in accordance agreement shall apply. NXP Semiconductors hereby expressly objects to with the Terms and conditions of commercial sale of NXP Semiconductors. applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without No offer to sell or license — Nothing in this document may be interpreted or limitation specifications and product descriptions, at any time and without construed as an offer to sell products that is open for acceptance or the grant, notice. This document supersedes and replaces all information supplied prior conveyance or implication of any license under any copyrights, patents or to the publication hereof. other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, Export control — This document as well as the item(s) described herein authorized or warranted to be suitable for use in life support, life-critical or may be subject to export control regulations. Export might require a prior safety-critical systems or equipment, nor in applications where failure or authorization from competent authorities. PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 14 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k Quick reference data — The Quick reference data is an extract of the 13.4 Trademarks product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PEMD9_PUMD9 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 22 November 2011 15 of 16

PEMD9; PUMD9 NXP Semiconductors NPN/PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 15. Contents 1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 General description . . . . . . . . . . . . . . . . . . . . . 1 1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2 4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 10 8.1 Quality information . . . . . . . . . . . . . . . . . . . . . 10 9 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 10 10 Packing information . . . . . . . . . . . . . . . . . . . . 10 11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Contact information. . . . . . . . . . . . . . . . . . . . . 15 15 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 22 November 2011 Document identifier: PEMD9_PUMD9