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F D M S 0 October 2014 3 1 2 FDMS031 S 2 S ® TM N N-Channel PowerTrench SyncFET (cid:3) - C 30 V, 42 A, 4.9 m(cid:58) h a n Features General Description n e (cid:132) Max rDS(on) = 4.9 m(cid:58) at VGS = 10 V, ID = 18 A The FDMS0312S has been designed to minimize losses in l P power conversion application. Advancements in both silicon and (cid:132) Max rDS(on) = 5.8 m(cid:58) at VGS = 4.5 V, ID = 14 A package technologies have been combined to offer the lowest ow (cid:132) Advanced Package and Silicon combination for low rDS(on) rDS(on) while maintaining excellent switching performance. This e and high efficiency device has the added benefit of an efficient monolithic Schottky rT body diode. r (cid:132) SyncFET Schottky Body Diode e n (cid:132) MSL1 robust package design Applications c h ® (cid:132) 100% UIL tested (cid:132) Synchronous Rectifier for DC/DC Converters S (cid:132) RoHS Compliant (cid:132) Notebook Vcore/ GPU low side switch y n (cid:132) Networking Point of Load low side switch c F (cid:132) Desktop E T T M Top Bottom Pin 1 S D 5 4 G S S G D 6 3 S D 7 2 S D D D 8 1 S D D Power 56 MOSFET Maximum Ratings T = 25 °C unless otherwise noted A Symbol Parameter Ratings Units V Drain to Source Voltage 30 V DS V Gate to Source Voltage (Note 4) ±20 V GS Drain Current -Continuous (Package limited) T = 25 °C 42 C -Continuous (Silicon limited) T = 25 °C 83 I C A D -Continuous T = 25 °C (Note 1a) 19 A -Pulsed 90 E Single Pulse Avalanche Energy (Note 3) 60 mJ AS Power Dissipation T = 25 °C 46 P C W D Power Dissipation T = 25 °C (Note 1a) 2.5 A T , T Operating and Storage Junction Temperature Range -55 to +150 °C J STG Thermal Characteristics R Thermal Resistance, Junction to Case 2.7 (cid:84)JC °C/W R Thermal Resistance, Junction to Ambient (Note 1a) 50 (cid:84)JA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FDMS0312S FDMS0312S Power 56 3 ’’ 12 mm 3000 units ©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDMS0312S Rev.D1

F D Electrical Characteristics TJ = 25 °C unless otherwise noted M S Symbol Parameter Test Conditions Min Typ Max Units 0 3 Off Characteristics 1 2 BV Drain to Source Breakdown Voltage I = 1 mA, V = 0 V 30 V S DSS D GS (cid:39)(cid:3)(cid:3)(cid:3)B(cid:39)VTDJSS BCroeeaffkicdioewntn Voltage Temperature ID = 10 mA, referenced to 25 °C 18 mV/°C N-C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 500 (cid:80)A ha I Gate to Source Leakage Current, Forward V = 20 V, V = 0 V 100 nA n GSS GS DS n e On Characteristics(Note 2) l P VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA 1.2 1.9 3.0 V o w (cid:3)(cid:3)(cid:39)(cid:3)(cid:3)(cid:39)VTGJS(th) GTeamtep teor aStuoruer cCeo Tehffriceisehnotld Voltage ID = 10 mA, referenced to 25 °C -5 mV/°C er T VGS = 10 V, ID = 18 A 3 . 6 4.9 re rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 14 A 4.7 5.8 m(cid:58) n c VGS = 10 V, ID = 18 A, TJ= 125 °C 5 6.2 h g Forward Transconductance V = 5 V, I = 18 A 97 S ® FS DS D S Dynamic Characteristics y n C Input Capacitance 2120 2820 pF c iss F V = 15 V, V = 0 V, C Output Capacitance DS GS 735 975 pF E oss f = 1 MHz T Crss Reverse Transfer Capacitance 90 135 pF T M Rg Gate Resistance 1.1 2.2 (cid:58) Switching Characteristics t Turn-On Delay Time 12 21 ns d(on) tr Rise Time VDD = 15 V, ID = 18 A, 5 10 ns td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 (cid:58) 28 44 ns t Fall Time 4 10 ns f Q Total Gate Charge V = 0 V to 10 V 33 46 nC g GS Qg Total Gate Charge VGS = 0 V to 4.5 V VDD = 15 V, 15 22 nC Qgs Gate to Source Gate Charge ID = 18 A 6.5 nC Q Gate to Drain “Miller” Charge 4.0 nC gd Drain-Source Diode Characteristics V = 0 V, I = 2 A (Note 2) 0.48 0.7 V Source to Drain Diode Forward Voltage GS S V SD V = 0 V, I = 18 A (Note 2) 0.80 1.2 GS S t Reverse Recovery Time 26 42 ns Qrr Reverse Recovery Charge IF = 18 A, di/dt = 300 A/(cid:80)s 26 42 nC rr Notes: 1. R(cid:84)JA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R(cid:84)JC isguaranteed by design while R(cid:84)CA is determined by the user's board design. a. 50 °C/W when mounted on a b. 125 °C/W when mounted on a 1 in2pad of 2 oz copper. minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300(cid:80)s, Duty cycle < 2.0%. 3. EAS of 60 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 11 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 16 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. FDMS0312S Rev.D1 2 www.fairchildsemi.com

F D M Typical Characteristics TJ = 25 °C unless otherwise noted S 0 3 90 12 1 E 2 NC VGS = 3 V S URRENT (A) 60 VVVGGGSSS === 414 0.V5 V V PDUULTSYE C DYUCRLEA T=I O0V.N5G %=S 8=M0 3A (cid:80).X5s V MALIZEDCE ON-RESISTA 1068 VGS = 3.5 V PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A (cid:80)Xs N-Chann ,IDRAIN CD 30 VGS = 3 V NORRAIN TO SOUR 24 VGS = 4 V VGS = 4.5 V VGS = 10 V el Powe D r 0 0 T 0.0 0.5 1.0 1.5 2.0 0 30 60 90 re VDS,DRAIN TO SOURCE VOLTAGE (V) ID,DRAIN CURRENT (A) nc h Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance ® vs Drain Current and Gate Voltage S y n 1.5 12 c TANCE 1.4 VIDG =S 1=8 1 A0 V ()m(cid:58) 10 ID= 18 A PDUULTSYE C DYUCRLEA T=I O0.N5 %= 8M0A (cid:80)Xs FET NORMALIZEDO SOURCE ON-RESIS 01111.....90123 rDRAIN TO ,DS(on)CE ON-RESISTANCE 68 TJ= 125 oC TM RAIN T 0.8 SOUR 4 TJ= 25 oC D 0.7 2 -75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10 TJ,JUNCTION TEMPERATURE (oC) VGS,GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance Figure 4. On-Resistance vs Gate to vs Junction Temperature Source Voltage 90 100 PULSE DURATION = 80 (cid:80)s T (A) VGS= 0 V DUTY CYCLE = 0.5% MAX EN 10 A) R T ( 60 VDS = 5 V UR TJ= 125 oC N C CURRE TJ = 125 oC DRAIN 1 AIN 30 RSE 0.1 TJ = 25 oC R E I, DD TJ = 25 oC TJ = -55 oC I, REVS 0.01 TJ = -55 oC 0 0.001 1 2 3 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMS0312S Rev.D1 3 www.fairchildsemi.com

F D Typical Characteristics M T = 25 °C unless otherwise noted J S 0 3 10 3000 1 AGE (V) 8 ID= 18 A F) Ciss S N2 T p1000 OL VDD = 10 V VDD = 20 V E ( -C URCE V 6 VDD = 15 V CITANC Coss han O A n E TO S 4 CAP el P V, GATGS 02 10500 fV =G S1 =M 0H Vz Crss owerT 0 5 10 15 20 25 30 35 0.1 1 10 30 r Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V) en c Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain h to Source Voltage ® S y 30 90 n c F NT (A) T (A) ETT RRE 10 TJ= 25 oC REN 60 M CU UR VGS= 10 V CHE TJ= 100 oC AIN C AN DR 30 L A ,D Limited by Package VGS= 4.5 V V I A I, AS TJ= 125 oC R(cid:84)JC = 2.7 oC/W 1 0 0.01 0.1 1 10 100 25 50 75 100 125 150 tAV, TIME IN AVALANCHE (ms) Tc,CASE TEMPERATURE (oC) Figure 9. Unclamped Inductive Figure 10. Maximum Continuous Drain Switching Capability Current vs Case Temperature 300 3000 100 R (W)1000 VGS = 10 V 100 (cid:80)s E A) W URRENT ( 10 110 m mss SIENT PO 100 DRAIN C 1 TLIHMISIT AERDE BAYS I ISrND GS(LoEn) PULSE 11 0s0 ms AK TRAN 10 I, D 0.1 TTRJA(cid:84)J==A M2=5 A1 oX2C5 R oACT/WED D10C s ,PPE()PK 1 SRTAI(cid:84)NJ=AG 2=L5 E1 o 2PC5U oLCS/WE 0.01 0.5 0.01 0.1 1 10 100200 10-4 10-3 10-2 10-1 1 10 100 1000 VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec) Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum Operating Area Power Dissipation FDMS0312S Rev.D1 4 www.fairchildsemi.com

F D Typical Characteristics M T = 25 °C unless otherwise noted J S 0 3 2 1 1 2 DUTY CYCLE-DESCENDING ORDER S D = 0.5 N MAL A 0.1 00..21 -C LIZED THEREDANCE,ZJ(cid:84) 0.01 000...000521 PDM hannel RMAIMP t1 Po NO 0.001 t2 w SINGLE PULSE NOTES: e 0.0001 R(cid:84)JA = 125 oC/W DPEUATYK FTAJ C= TPODRM: xD Z =(cid:84) JtA1 /xt2 R(cid:84)JA + TA rTre 10-4 10-3 10-2 10-1 1 10 100 1000 n c t, RECTANGULAR PULSE DURATION (sec) h ® Figure 13. Junction-to-Ambient Transient Thermal Response Curve S y n c F E T T M FDMS0312S Rev.D1 5 www.fairchildsemi.com

F D Typical Characteristics (continued) M S 0 3 1 SyncFET Schottky body diode 2 S Characteristics Schottky barrier diodes exhibit significant leakage at high tem- N perature and high reverse voltage. This will increase the power - Fairchild’s SyncFET process embeds a Schottky diode in parallel in the device. C h with PowerTrench MoSFET. This diode exhibits similar a characteristics to a discrete external Schottky diode in parallel n n with a MOSFET. Figure 14 shows the reverses recovery e characteristic of the FDMS0312S. l P o w 20 10-2 e 15 RENT (A)10-3 TTJJ== 110205 ooCC rTren R di/dt = 300 A/(cid:80)s U c T (A) 10 GE C h® CURREN 5 RSE LEAKA1100--54 TJ= 25 oC SyncF 0 VE E RE T -5 , DSS10-6 TM 0 30 60 90 120 150 I 0 5 10 15 20 25 30 TIME (ns) V , REVERSE VOLTAGE (V) DS Figure 14. FDMS0312S SyncFET body Figure 15. SyncFET body diode reverses diode reverse recovery characteristic leakage versus drain-source voltage FDMS0312S Rev.D1 6 www.fairchildsemi.com

PQFN85X6,1.27P CASE483AE ISSUEA 5.10 A 5.10 3.91 PKG SEE CL B DETAILB 1.27 8 5 8 7 6 5 0.77 4.52 3.75 PKGCL 6.15 5.85 6.61 5.65 KEEPOUT AREA 1.27 1 4 1 2 3 4 TOPVIEW 1.27 0.61 3.81 LANDPATTERN OPTIONALDRAFT RECOMMENDATION ANGLEMAYAPPEAR SEE ONFOURSIDES 5.00 4.80 DETAILC OFTHEPACKAGE 0.35 0.15 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 0.10 C 0.30 0.05 0.05 SIDEVIEW 0.00 (cid:19)(cid:131)(cid:16)(cid:20)(cid:21)(cid:131) 8X 0.08 C 0.35 C 5.20 0.15 4.80 1.10 SEATING 0.90 PLANE DETAILC DETAILB 3.81 SCALE:2:1 SCALE:2:1 1.27 0.51 (8X) 0.31 (0.34) NOTES:UNLESSOTHERWISESPECIFIED 0.10 C A B A.PACKAGESTANDARDREFERENCE:JEDECMO-240, 1 2 3 4 ISSUEA,VAR.AA,. B.DIMENSIONSDONOTINCLUDEBURRSORMOLDFLASH. 0.76 MOLDFLASHORBURRSDOESNOTEXCEED0.10MM. 0.51 (0.52) C.ALLDIMENSIONSAREINMILLIMETERS. 6.25 D.DIMENSIONINGANDTOLERANCINGPERASMEY14.5M-2009. 5.90 E.ITISRECOMMENDEDTOHAVENOTRACESOR VIASWITHINTHEKEEPOUTAREA. (0.50) 3.48+0.30 -0.10 (0.30) (2X) 8 7 6 5 +0.10 (cid:19)(cid:17)(cid:23)(cid:23)(cid:147)(cid:19)(cid:17)(cid:20)(cid:19) 0.20 (8X) 3.96 -0.15 3.61 BOTTOMVIEW

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