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  • 型号: HMC668LP3E
  • 制造商: Hittite
  • 库位|库存: xxxx|xxxx
  • 要求:
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HMC668LP3E产品简介:

ICGOO电子元器件商城为您提供HMC668LP3E由Hittite设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 HMC668LP3E价格参考。HittiteHMC668LP3E封装/规格:RF 放大器, RF Amplifier IC General Purpose 700MHz ~ 1.2GHz 16-QFN (3x3)。您可以下载HMC668LP3E参考资料、Datasheet数据手册功能说明书,资料中有HMC668LP3E 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

射频/IF 和 RFID

描述

IC MMIC AMP LNA BYPASS 16-QFN

产品分类

RF 放大器

品牌

Hittite Microwave Corporation

数据手册

点击此处下载产品Datasheet

产品图片

P1dB

13dBm

产品型号

HMC668LP3E

RF类型

通用

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

供应商器件封装

16-QFN(3x3)

其它名称

1127-1517

包装

剪带

噪声系数

0.9dB

增益

16dB

封装/外壳

16-VFQFN 裸露焊盘

标准包装

100

测试频率

-

电压-电源

3V,5V

电流-电源

57mA

频率

700MHz ~ 1.2GHz

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PDF Datasheet 数据手册内容提取

HMC668LP3 668LP3E / v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Typical Applications Features The HmC668lp3(e) is ideal for: Noise figure: 0.9 dB T m • Cellular/3G and lTe/wimAX/4G output ip3: +33 dBm s • BTs & infrastructure Gain: 16 dB E - • repeaters and femtocells failsafe operation: e Bypass is enabled when lNA is unpowered • Tower mounted Amplifiers s single supply: +3V or +5V oi • Test & measurement equipment T 16 lead 3x3mm QfN package: 9 mm2 N Functional Diagram General Description w E o The HmC668lp3(e) is a versatile, high dynamic range l GaAs mmiC low Noise Amplifier that integrates a low loss lNA bypass mode on the iC. The amplifier is ide- - s al foLr receivers and lNA modules operating between r 0.7 and 1.2 GHz and provides 0.9 dB noise figure, e 16 dB of gain and +33 dBm ip3 from a single supply O i of +5V @ 57mA. input and output return losses are f i excellent and no external matching components are l required. A single control line is used to switch be- p m tween lNA mode and a low loss bypass mode. The S failsafe topology enables the lNA bypass path, when A no DC power is available. The HmC668lp3(e) offers improved noise figure versus the previously released B HmC373lp3(e). Electrical Specifications, T = +25° C, Rbias = 0 Ohm A O lNA mode Bypass mode failsafe mode parameter Vdd = +3V Vdd = +5V Units min. Typ. max. min. Typ. max. min. Typ. max. min. Typ. max. frequency range 0.7 - 1.2 0.7 - 1.2 0.7 - 1.2 0.7 - 1.2 GHz Gain 12 15 13 16 -2.5 -1.5 -2.5 -1.5 dB Gain Variation over Temperature 0.03 0.016 0.0008 0.0008 dB / °C Noise figure 0.85 1.1 0.9 1.1 dB input return loss 12 13 12 12 dB output return loss 13 14 13 13 dB reverse isolation 22 23 - - dB power for 1dB Compression 13 13 22 24 dBm (p1dB)[1] Third order intercept (ip3)[2] 27 33 26 26 dBm supply Current (idd) 32 40 57 70 0.05 - mA switching speed (90% -10%) lNA mode to Bypass mode 200 - ns Bypass mode to lNA mode 85 85 ns [1] p1dB for lNA mode is referenced to rfoUT while p1dB for Bypass and failsafe modes are referenced to rfiN. [2] ip3 for lNA mode is referenced to rfoUT while ip3 for Bypass and failsafe modes are referenced to rfiN. InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 - 1 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 LNA - Broadband Gain & Return Loss LNA - Gain vs. Temperature [1] 25 22 T 20 15 S21 20 ++2855CC m -40C B) 10 18 s SPONSE (d -505 VVdddd==53VV S22 GAIN (dB) 16 E se - RE-10 14 T oi -15 12 N -20 S11 -25 10 w 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0.6 0.7 E0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) o l - L LNA - Gain vs. Temperature [2] LNA - Return Loss vs. Temperature [1] s r 22 0 e O 20 +25C +25C fi +85C -5 +85C B) 18 -40C SS (dB)-10 -40C Output Return Loss pli GAIN (d 16 S URN LO-15 Am 14 ET R Input Return Loss -20 12 B 10 -25 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) O LNA - Output IP3 vs. LNA - Noise Figure vs. Temperature [3] Temperature, Output Power @ 0 dBm 2 48 42 1.7 Vdd=5V 43 37 Vdd=3V E (dB) 1.4 +85C +25C 38 Vdd=5V 32 OISE FIGUR 01..81 IP3 (dBm) 2383 Vdd=3V 2227 IP3 (dBm) N 0.5 23 +25C 17 -40C +85C -40C 0.2 18 12 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) Frequency (GHz) [1] Vdd = 5V [2] Vdd = 3V [3] measurement reference plane shown on evaluation pCB drawing. InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 7 - 2 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 LNA - Output P1dB vs. Temperature [1] LNA - Output P1dB vs. Temperature [2] 20 20 T 18 18 m +25C +85C 16 16 -40C s m) 14 m) 14 E - B B e B (d 12 B (d 12 d d s P1 10 P1 10 oi 8 +25C 8 T +85C N 6 -40C 6 w 4 4 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 E0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) o l - LNA - Gain, P1dB, LNAL - Gain, P1dB, s Output IP3 vs. Current [1] @ 900 MHz Output IP3 vs. Current [2] @ 900 MHz r 18 46 16 40 e i O Gain f Gain 16 42 14 36 i m) m) l B B d d p B ( 14 38 B ( 12 32 Am N (dB) , P1d 12 P1dB S34 IP3 (dBm) N (dB) , P1d 10 P1dB 28 IP3 (dBm) AI AI G 10 30 G 8 24 IP3 B IP3 8 26 6 20 35 40 45 50 55 60 15 20 25 30 35 Idd (mA) Idd (mA) O LNA - Output P1dB, Gain & LNA - Reverse Isolation vs. Temperature [1] Noise Figure [3] vs. Vdd @ 900 MHz -10 20 1.1 -15 +25C +85C 18 P1dB 1 -40C m) Gain ISOLATION (dB)---322050 AIN (dB) & P1dB (dB 1146 00..89NOISE FIGURE (dB -35 G 12 NF 0.7) -40 10 0.6 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 3 3.5 4 4.5 5 FREQUENCY (GHz) Voltage Supply (V) [1] Vdd = 5V [2] Vdd = 3V [3] measurement reference plane shown on evaluation pCB drawing. InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 - 3 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Bypass Mode - Bypass Mode - Broadband Gain & Return Loss Input IP3 vs. Output Power @ 900 MHz 0 40 T -2 -4 35 ++2855CC m B) -6 S21 -40C s E (d -8 SS1212 m) 30 E - SPONS--1120 IP3 (dB 25 se E R-14 T oi -16 20 N -18 -20 15 w 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -10 -E5 0 5 10 15 FREQUENCY (GHz) Pout (dBm) o l Bypass Mode - Input IP3 vs. Temperature, BypLass Mode - - s Output Power @ 5 dBm Insertion Loss vs. Temperature r 36 0 e O i +25C f 32 +85C -1 -40C i l m) 28 B) -2 p IP3 (dB 24 S GAIN (d -3 Am +25C 20 -4 +85C -40C B 16 -5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) O Bypass Mode - Bypass Mode - Input Return Loss vs. Temperature Output Return Loss vs. Temperature 0 0 -5 B) -5 ++2855CC B) d -40C d SS ( SS (-10 O O N L-10 N L UR UR-15 T T E E R R -15 +25C -20 +85C -40C -20 -25 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 7 - 4 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Failsafe Mode - Failsafe Mode - Broadband Gain & Return Loss Input IP3 vs. Output Power @ 900 MHz 0 40 T -2 m +25C -4 35 +85C s B) -6 S21 -40C - E (d -8 SS1212 m) 30 E se SPONS--1120 IP3 (dB 25 E oi R-14 T -16 20 N -18 w -20 15 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -10 -E5 0 5 10 15 FREQUENCY (GHz) Pout (dBm) o l - Failsafe Mode - Input IP3 vs. FailLsafe Mode - s Temperature, Output Power @ 5 dBm Insertion Loss vs. Temperature r 36 0 e O i f +25C 32 +85C -1 i -40C l p m) 28 B) -2 Am IP3 (dB 24 S GAIN (d -3 ++2855CC -40C 20 -4 B 16 -5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) O Failsafe Mode - Failsafe Mode - Input Return Loss vs. Temperature Output Return Loss vs. Temperature 0 0 +25C +25C -5 +85C B) -5 +85C B) -40C d -40C d SS ( SS (-10 O O N L-10 N L UR UR-15 T T E E R R -15 -20 -20 -25 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 FREQUENCY (GHz) FREQUENCY (GHz) InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 - 5 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Absolute Maximum Ratings Typical Supply Current vs. Vdd Drain Bias Voltage (Vdd) +6 Vdc idd (mA) rbias Ω T Control Voltage (Vctl) +6 Vdc Vdd= 3V Vdd= 5V m rf input power lNA mode +5 dBm 0 32 57 s (rfiN) Bypass / failsafe mode +20 dBm 15 26 E 49 Channel Temperature 150 °C - 47 20 37 Continuous pdiss (T = 85 °C) e 0.70 w 180 [1] 10 20 (derate 10.71 mw/°C above 85 °C) s [1] recommended maximum rbias Thermal resistance 93.33 °C/w T oi (channel to ground paddle) N storage Temperature -65 to +150° C operating Temperature -40 to +85° C w E esD sensitivity (HBm) Class 1A Truth Table o l lNA mode Vctl = Vdd = 3 to 5V - eleCTrosTATiC seNsiTiVe DeViCe LBypass mode Vctl= 0V, Vdd = 3 to 5V s oBserVe HANDliNG preCAUTioNs failsafe mode Vctl = Vdd = N/C r e O i f i l p m S A B O InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 7 - 6 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Outline Drawing T m s E - e s oi T N w E o l - L s r e O i f NoTes: i 1. leADfrAme mATeriAl: Copper AlloY l 2. DimeNsioNs Are iN iNCHes [millimeTers] p 3. leAD spACiNG TolerANCe is NoN-CUmUlATiVe m S 4. pAD BUrr leNGTH sHAll Be 0.15mm mAXimUm. A pAD BUrr HeiGHT sHAll Be 0.05mm mAXimUm. 5. pACKAGe wArp sHAll NoT eXCeeD 0.05mm. 6. All GroUND leADs AND GroUND pADDle mUsT Be solDereD To pCB rf GroUND. B 7. refer To HiTTiTe AppliCATioN NoTe for sUGGesTeD lAND pATTerN. O Package Information part Number package Body material lead finish msl rating package marking [3] HmC668lp3 low stress injection molded plastic sn/pb solder msl1 [1] 668 XXXX HmC668lp3e roHs-compliant low stress injection molded plastic 100% matte sn msl1 [2] 668 XXXX [1] max peak reflow temperature of 235 °C [2] max peak reflow temperature of 260 °C [3] 4-Digit lot number XXXX InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 - 7 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Pin Descriptions pin Number function Description interface schematic T No connection required. These pins may be 1, 2, 4, 5, 8, 9, m N/C connected to rf GND. performance will not 11, 12, 13, 15 be affected. s E - e This pin is DC coupled. s 3 rfiN off-chip DC blocking capacitor required. T oi N AC Ground. Attach bypass capacitor per w 6 ACG E application circuit. o l - external resistor pin for current contLrol. see 7 res s table for external resistor value vs. bias current data. r e O i f i l 10 rfoUT This pin is matched to 50 ohms p m S 14 Vdd power supply voltage pin. external bypass A capacitors required. B Control voltage pin for lNA / Bypass 16 Vctl modes. setting voltage equal to VDD enables lNA mode. external Bypass capacitor required. O InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 7 - 8 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Application Circuit T m s E - e s oi T N w E o l - L s r e O i f i l p m S A B O InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 7 - 9 rliicgehntss eo fi sth girrda nptaerdti ebsy t himatp mlicPaayht ioroens nuolret of:rto hm9er 7wits8is ue-s 2eu.n5 dS0epre- ca3infi3yc ap4tiao3tne sn ts ou rb Fjpeaactte xtno:t cr9higa7hnt8gs e-o 2wf Ai5thn0oaulo-t g3n oD3tiec7vei3.c eN s o. OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D

HMC668LP3 / 668LP3E v03.0610 GaAs PHEMT MMIC LNA w/ FAILSAFE BYPASS MODE, 700 - 1200 MHz 7 Evaluation PCB T m s E - e s T oi N w E o l - L s r e O i f i l p m S A B O List of Materials for Evaluation PCB 121922 [1] The circuit board used in the application should use item Description rf circuit design techniques. signal lines should J1 - J2 pCB mount smA Connector have 50 ohm impedance while the package ground J3 - J4 DC pin leads and exposed paddle should be connected C1 100 pf Capacitor, 0402 pkg. directly to the ground plane similar to that shown. C2 8200 pf Capacitor, 0402 pkg. A sufficient number of via holes should be used to C3 10 nf Capacitor, 0603 pkg. connect the top and bottom ground planes. The C4 1 µf Capacitor, 0603 pkg. evaluation circuit board shown is available from C5 100 pf Capacitor, 0603 pkg. Hittite upon request. l2 15 nH inductor, 0402 pkg. r1 0 ohm resistor, 0402 pkg. U1 HmC668lp3(e) Amplifier pCB [2] 118911 evaluation Board [1] reference this number when ordering complete evaluation pCB [2] Circuit Board material: rogers 4350 InfoFrmoarti opn rfiucrneis,h edd eblyi vAenarlyog a Dnedvic etos isp blaelcieeve do trod beer asc:c uHraittet iatned Mreliiacbrleo. wHoawvevee r,C noo rpFoorra tpiroicne,, 2d0el iAvelrpyh, aan Rd otoa dpl,a cCeh oerldmerssf:o Arnda,l oMg AD e0v1ic8e2s4, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that mPayh roesnulet f:ro m9 7its8 u-s2e.5 S0pe-c3ifi3ca4tio3n s s u bFjeact xto: c9ha7n8ge- 2wi5th0ou-t 3no3tic7e3. N o OPrhdoneer: O78n1--3li2n9e- 4a7t0 0w (cid:127)w Owrd.ehri totnitlein.ec aot mwww.analog.com 7 - 10 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks aArep thpe lpircopaetrityo onf thSeiur rpesppeoctrivte: oPwhneorsn.e: 978-250-33A4p3p l icoart i oanp Spusp@pohrti:t Ptihteo.nceo: 1m-800-ANALOG-D