Product Specification PE4270 SPST CATV UltraCMOS™ Switch Product Description 1 - 3000 MHz The PE4270 is a is a high-isolation Switch designed for CATV Features applications, covering a broad frequency range from 1 to 3000 • Integrated 0.25 watt terminations MHz. This single-supply SPST switch offers a single-pin • CTB performance of 90 dBc CMOS control interface with industry leading CTB performance. It also provides low insertion loss, high isolation • High isolation: 90 dB at 5 MHz, 63 dB and extremely low bias requirements while operating on a at 1000 MHz single 3-volt supply. In a typical CATV application, the PE4270 • Low insertion loss: 0.5 dB at 50 MHz, provides for a cost effective and manufacturable solution vs. 0.70 dB at 1000 MHz mechanical relays. • High input IP2: >80 dBm The PE4270 is manufactured on Peregrine’s UltraCMOS™ • CMOS/TTL single-pin control process, a patented variation of silicon-on-insulator (SOI) • Single +3-volt supply operation technology on a sapphire substrate, offering the performance • Extremely low bias: 8 µA @ 3 V of GaAs with the economy and integration of conventional CMOS. • Available in a 6-lead DFN package Figure 1. Functional Diagram Figure 2. Package Type Peregrine Specification 71/0010 6-lead DFN RF1 RF2 ESD ESD 75Ω CMOS 75Ω Control Driver CTRL Table 1. Electrical Specifications @ +25 °C (Z = Z = 75 Ω ) S L Parameter Condition Minimum Typical Maximum Units Operating Frequency 1 1 3000 MHz Insertion Loss 110 –0 05 0M MHHz z 00..5700 00..6855 dB Isolation 110 –0 05 0M MHHz z 8650 9603 dB Return Loss 5V C- T1R0L0 =0 3M.0HVz , 15 16 dB 1 dB Compression 2,4 1000 MHz 28 30 dBm CTB / CSO 7P7O & = 14140 d cBhmanVn els; -90 dBc Input IP2 2 1000 MHz 80 dBm Input IP3 2 1000 MHz 50 dBm Video Feedthrough 3 15 mV pp Switching Time 2 µS Notes: 1. Device linearity will begin to degrade below 1 MHz. 2. Measured in a 50 Ω system. 3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth. 4. Note Absolute Maximum ratings in Table 3. Document No. 70-0148-06 │www.psemi.com ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Figure 3. Pin Configuration Table 4. Operating Ranges Parameter Min Typ Max Unit V Power Supply 2.7 3.0 3.3 V V 1 6 RF2 DD DD I Power Supply Current DD 8 20 µA (V = 3V, V = 3V) Exposed DD CTRL GND 2 Solder Pad 5 GND T Operating temperature -40 85 °C OP (bottom side) Control Voltage High 0.7xV 5 V DD Control Voltage Low 0 0.3xV V RF1 3 4 CTRL DD Table 5. Control Logic Truth Table Table 2. Pin Descriptions Control Voltage (CTRL) Signal Path (RF1 to RF2) Pin High1 ON Pin Name No. Description Low OFF 1 V Nominal 3 V supply connection. DD Notes: 1. CTRL accepts both CMOS and TTL voltage leads. 2 GND Ground connection. 2 3 RF1 RF port. 1 Electrostatic Discharge (ESD) Precautions CMOS or TTL logic level: When handling this UltraCMOS™ device, observe 4 CTRL High = RF1 to RF2 signal path the same precautions that you would use with Low = RF1 isolated from RF2 other ESD-sensitive devices. Although this device 5 GND Ground connection. 3 contains circuitry to protect it from damage due to 6 RF2 RF port. 1 ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. Notes: 1. Both RF pins must be held at 0 V or require external DC DC blocking capacitors Latch-Up Avoidance 2. The exposed pad must be soldered to the ground plane for proper switch performance. Unlike conventional CMOS devices, UltraCMOS™ Table 3. Absolute Maximum Ratings devices are immune to latch-up. Symbol Parameter/Condition Min Max Unit Device Description VDD Power supply voltage -0.3 4.0 V The PE4270 high isolation SPST CATV Switch is V Voltage on CTRL input -0.3 5.5 V designed to support CATV applications such as I premise disconnect of a CATV signal path. This T Storage temperature -65 150 °C ST function is typically performed by bulky and PIN ICnTpRutL p=o1w/CeTr R(5L0= 0Ω ), 33/24 dBm expensive mechanical relays. The high isolation characteristics, high compression point, and VESD E(HSuDm vaonl tBagoedy Model) 500 V integrated 75-ohm terminations make the PE4270 an ideal, cost effective and manufacturable Exceeding absolute maximum ratings may cause product of choice. permanent damage. Operation should be restricted to the limits in the Operating Ranges The control logic input pin (CTRL) is typically table. Operation between operating range driven by a 3-volt CMOS logic level signal, and maximum and absolute maximum for extended has a threshold of 50% of VDD. For flexibility to periods may reduce reliability. support systems that have 5-volt control logic drivers, the control logic input has been designed to handle a 5-volt logic HIGH signal. (A minimal Moisture Sensitivity Level current will be sourced out of the V pin when the DD The Moisture Sensitivity Level rating for the control logic input voltage level exceeds V .) DD PE4270 in the 6-lead 3x3 DFN package is MSL1. ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0148-06 │ UltraCMOS™ RFIC Solutions Page 2 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted) (75 Ω impedance except as indicated) Figure 4. Insertion Loss - RF1 to RF2 Figure 5. 1dB Compression & 3rd Order Intercept Point (T = 25°C) Figure 6. Isolation - RF1 to RF2 Document No. 70-0148-06 │www.psemi.com ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted) (75-ohm impedance) Figure 7. RF1 Return Loss (Switch = ON) Figure 8. RF1 Return Loss (Switch = OFF) Figure 9. RF2 Return Loss (Switch = ON) Figure 10. RF2 Return Loss (Switch = OFF) ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0148-06 │ UltraCMOS™ RFIC Solutions Page 4 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Evaluation Kit Figure 11. Evaluation Board Layouts Peregrine Specification 101/0167 (with F connectors) The PE4270 EK board was designed to ease customer evaluation of Peregrine’s high performance SPST CATV MOSFET switch. RF1 is connected through a 75 Ω transmission line via the top left F connector, J1. RF2 is connected through a 75 Ω transmission line via the top right F connector, J2. A 75 Ω through transmission line is available via F connectors J3 and J4. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. V is supplied via J6-2, while DD the control logic voltage is supplied via J5-2. It is the responsibility of the customer to determine proper supply decoupling for their design application. It has been observed that by removing C1 and C2 from the evaluation board has not shown to degrade RF performance. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide model with trace width of 0.021”, trace gaps of 0.030”, dielectric thickness of 0.028”, metal thickness of 0.0021” and ε of 4.6. Note that the predominate r mode for these transmission lines is coplanar waveguide with a ground plane. Figure 12. Evaluation Board Schematic Peregrine Specification 102/0224 Document No. 70-0148-06 │www.psemi.com ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Figure 13. Package Drawing 6-lead DFN P ) m L Sm L 3 x 6 3 0 ( NOTE: The exposed solder pad (on the bottom of the package) is not electrically connected to any other pin (isolated). Figure 14. Marking Specifications 4270 YYWW ZZZZZ YYWW = Date Code (last two digits of year and work week) ZZZZZ = Last five digits of Lot Number ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0148-06 │ UltraCMOS™ RFIC Solutions Page 6 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Figure 15. Tape and Reel Specifications 6-lead DFN Tape Feed Direction Pin 1 Top of Device Table 6. Dimensions Dimension DFN 3x3 mm Device Orientation in Tape Ao 3.23 ± 0.1 Bo 3.17 ± 0.1 Ko 1.37 ± 0.1 P 4 ± 0.1 W 8 +0.3, -0.1 T 0.254 ± 0.02 R7 Quantity 3000 R13 Quantity N.A. Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel Table 7. Ordering Information Order Code Part Marking Description Package Shipping Method 4270-51 4270 PE4270G-06DFN 3x3mm-12800F Green 6-lead 3x3 mm DFN Tape or loose 4270-52 4270 PE4270G-06DFN 3x3mm-3000C Green 6-lead 3x3 mm DFN 3000 units / T&R 4270-00 PE4270-EK PE4270-06DFN 3x3mm-EK Evaluation Kit 1 / Box Document No. 70-0148-06 │www.psemi.com ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

PE4270 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation Peregrine Semiconductor, Asia Pacific (APAC) 9380 Carroll Park Drive Shanghai, 200040, P.R. China San Diego, CA 92121 Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Tel: 858-731-9400 Fax: 858-731-9499 Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Europe Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Peregrine Semiconductor Europe Tel: +82-31-728-3939 Bâtiment Maine Fax: +82-31-728-3940 13-15 rue des Quatre Vents Peregrine Semiconductor K.K., Japan F-92380 Garches, France Teikoku Hotel Tower 10B-6 Tel: +33-1-4741-9173 1-1-1 Uchisaiwai-cho, Chiyoda-ku Fax : +33-1-4741-9173 Tokyo 100-0011 Japan Tel: +81-3-3502-5211 High-Reliability and Defense Products Fax: +81-3-3502-5213 Americas San Diego, CA, USA Phone: 858-731-9475 Fax: 848-731-9499 Europe/Asia-Pacific Aix-En-Provence Cedex 3, France Phone: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this The product is in a formative or design stage. The data information. Use shall be entirely at the user’s own risk. sheet contains design target specifications for product development. Specifications and features may change in No patent rights or licenses to any circuits described in this any manner without notice. data sheet are implied or granted to any third party. Preliminary Specification Peregrine’s products are not designed or intended for use in The data sheet contains preliminary data. Additional data devices or systems intended for surgical implant, or in other may be added at a later date. Peregrine reserves the right applications intended to support or sustain life, or in any to change specifications at any time without notice in order application in which the failure of the Peregrine product could to supply the best possible product. create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of Product Specification its products in such applications. The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify The Peregrine name, logo, and UTSi are registered trademarks customers of the intended changes by issuing a CNF and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks (Customer Notification Form). of Peregrine Semiconductor Corp. ©2005-2010 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0148-06 │ UltraCMOS™ RFIC Solutions Page 8 of 8 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com