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ICGOO电子元器件商城为您提供AS5040-ASST由AUSTRIAMICROSYSTEMS设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 AS5040-ASST价格参考¥49.94-¥49.94。AUSTRIAMICROSYSTEMSAS5040-ASST封装/规格:编码器, Rotary Encoder Magnetic 512 PWM 。您可以下载AS5040-ASST参考资料、Datasheet数据手册功能说明书,资料中有AS5040-ASST 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

传感器,变送器

描述

IC ENCODER PROG 10-BIT 16-SSOP板机接口霍耳效应/磁性传感器 10Bit Rotary Sensor w/Digital Interface

产品分类

磁性传感器 - 霍尔效应,数字开关,线性,罗盘 (IC)传感器 IC

品牌

ams

产品手册

http://ams.com/eng/content/download/1285/7214/494

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

板机接口霍耳效应/磁性传感器,ams AS5040-ASST-

数据手册

http://www.ams.com/eng/content/download/1285/7214

产品型号

AS5040-ASST

产品

Magnetic Encoders

产品目录页面

点击此处下载产品Datasheet

产品种类

板机接口霍耳效应/磁性传感器

供应商器件封装

16-SSOP

其它名称

AS5040-ASSTCT

包装

剪切带 (CT)

商标

ams

安装风格

SMD/SMT

封装

Reel

封装/外壳

16-SSOP(0.209",5.30mm 宽)

封装/箱体

SSOP-16

工作温度

-40°C ~ 125°C

工厂包装数量

2000

应用说明

http://www.austriamicrosystems.com/eng/content/view/download/11922http://www.austriamicrosystems.com/eng/content/view/download/11921

感应范围

45mT ~ 75mT

标准包装

1

特性

可编程

电压-电源

3 V ~ 3.6 V,4.5 V ~ 5.5 V

电流-电源

21mA

电流-输出(最大值)

4mA

类型

线性,旋转编码器 - 可编程

输出类型

正交,带刻度角(增量)

配用

/product-detail/zh/AS5040%20PB/AS5040%20PB-ND/2339619

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PDF Datasheet 数据手册内容提取

AS5040 10-Bit 360º Programmable Magnetic Rotary Encoder General Description The AS5040 is a contactless magnetic rotary encoder for accurate angular measurement over a full turn of 360°. It is a system-on-chip, combining integrated Hall elements, analog front end and digital signal processing in a single device. To measure the angle, only a simple two-pole magnet, rotating over the center of the chip, is required. The magnet may be placed above or below the IC. The absolute angle measurement provides instant indication of the magnet’s angular position with a resolution of 0.35° = 1024 positions per revolution. This digital data is available as a serial bit stream and as a PWM signal. Furthermore, a user-programmable incremental output is available, making the chip suitable for replacement of various optical encoders. An internal voltage regulator allows the AS5040 to operate at either 3.3 V or 5 V supplies. OrderingInformation and ContentGuide appear at end of datasheet. Figure 1: Typical Arrangement of AS5040 and Magnet ams Datasheet Page 1 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − General Description Key Benefits & Features The benefits and features of AS5040, 10-Bit 360º Programmable Magnetic Rotary Encoder are listed below: Figure 2: Added Value of Using AS5040 Benefits Features • Contactless high resolution rotational position encoding • Highest reliability and durability over a full turn of 360 degrees • Simple user-programmable resolution, pole pairs and zero • Simple programming position • Serial communication interface (SSI) • 10-bit pulse width modulated (PWM) output • Multiple interfaces • Quadrature A/B and Index output signal • Step/Direction and Index output signal • 3-Phase commutation for brushless DC motors • Ideal for motor applications • Rational speeds up to 30000 rpm • Failure detection mode for magnet placement monitoring • Failure diagnostics and loss of power supply • Serial read-out of multiple interconnected devices using • Easy setup daisy chain mode • Great flexibility at a huge application • Push button functionality detects movement of magnet in area Z-axis • Fully automotive qualified • AEC-Q100, grade 1 • Small form factor • SSOP 16 (5.3mm x 6.2mm) • Robust environmental tolerance • Wide temperature range: -40°C to 125°C Applications AS5040 is ideal for: • Industrial applications: • Contactless rotary position sensing • Robotics • Brushless DC motor commutation • Power tools • Automotive applications: • Steering wheel position sensing • Gas pedal position sensing • Transmission gearbox encoder • Headlight position control • Power seat position indicator Page 2 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − General Description • Office equipment: printers, scanners, copiers • Replacement of optical encoders • Front panel rotary switches • Replacement of potentiometers Block Diagram The functional blocks of this device are shown below: Figure 3: AS5040 Block Diagram VDDV3V MagINCn VDD5V LDO 3.3V MagDECn PWM PWM_LSB Interface Ang DSP Absolute DO Hall Array Cos Mag Interface CSn & (SSI) Frontend Amplifier CLK OTP Register A_LSB_U Incremental Interface B_Dir_V Programming Parameters Index_W Prog ams Datasheet Page 3 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Pin Assignment Pin Assignment Figure 4: Pin Configuration SSOP16 MagINCn 1 16 VDD5V MagDECn 2 15 VDD3V3 A_LSB_U 3 A 14 NC S B_Dir_V 4 5 13 NC 0 NC 5 12 PWM_LSB 4 0 Index_W 6 11 CSn VSS 7 10 CLK Prog 8 9 DO Pin Description Figure6 shows the description of each pin of the standard SSOP16 package (Shrink Small Outline Package, 16 leads, body size: 5.3mm x 6.2mmm; see Figure4). Pins 7, 15 and 16 are supply pins, pins 5, 13 and 14 are for internal use and must not be connected. Pins 1 and 2 are the magnetic field change indicators, MagINCn and MagDECn (magnetic field strength increase or decrease through variation of the distance between the magnet and the device). These outputs can be used to detect the valid magnetic field range. Furthermore those indicators can also be used for contact-less push-button functionality. Pins 3, 4 and 6 are the incremental pulse output pins. The functionality of these pins can be configured through programming the one-time programmable (OTP) register. Figure 5: Pin Assignment for the Different Incremental Output Modes Output Mode Pin 3 Pin 4 Pin 6 Pin 12 1.x: quadrature A B Index PWM 2.x:step/direction LSB Direction Index PWM 3.x: commutation U V W LSB Page 4 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Pin Assignment Mode 1.x: Quadrature A/B Output Represents the default quadrature A/B signal mode. Mode 2.x: Step / Direction Output Configures pin 3 to deliver up to 512 pulses (up to 1024 state changes) per revolution. It is equivalent to the LSB (least significant bit) of the absolute position value. Pin 4 provides the information of the rotational direction. Both modes (mode 1.x and mode 2.x) provide an index signal (1 pulse/revolution) with an adjustable width of one LSB or three LSB’s. Mode 3.x: Brushless DC Motor Commutation Mode In addition to the absolute encoder output over the SSI interface, this mode provides commutation signals for brushless DC motors with either one pole pair or two pole pair rotors. The commutation signals are usually provided by 3 discrete Hall switches, which are no longer required, as the AS5040 can fulfill two tasks in parallel: absolute encoder + BLDC motor commutation. In this mode, pin 12 provides the LSB output instead of the PWM (Pulse-Width-Modulation) signal. Pin 8 (Prog) is also used to program the different incremental interface modes, the incremental resolution and the zero position into the OTP. This pin is also used as digital input to shift serial data through the device in Daisy Chain configuration. Pin 11 Chip Select (CSn; active low) selects a device within a network of AS5040 encoders and initiates serial data transfer. A logic high at CSn puts the data output pin (DO) to tri-state and terminates serial data transfer. This pin is also used for Alignment Mode and Programming the AS5040. Pin 12 allows a single wire output of the 10-bit absolute position value. The value is encoded into a pulse width modulated signal with 1μs pulse width per step (1μs to 1024μs over a full turn). By using an external low pass filter, the digital PWM signal is converted into an analog voltage, allowing a direct replacement of potentiometers. Figure 6: Pin Description SSOP16 Pin Symbol Type Description Magnet Field Magnitude INCrease; active low, indicates a 1 MagINCn DO_OD distance reduction between the magnet and the device surface. Magnet Field Magnitude DECrease; active low, indicates a 2 MagDECn DO_OD distance increase between the device and the magnet. ams Datasheet Page 5 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Pin Assignment Pin Symbol Type Description Mode1.x: Quadrature A channel 3 A_LSB_U DO Mode2.x: Least Significant Bit Mode3.x: U signal (phase1) Mode1.x: Quadrature B channel quarter period shift to channel A. 4 B_Dir_V DO Mode2.x: Direction of Rotation Mode3.x: V signal (phase2) 5 NC - Must be left unconnected Mode1.x and Mode2.x: Index signal indicates the absolute zero 6 Index_W DO position Mode3.x: W signal (phase3) 7 VSS S Negative Supply Voltage (GND) OTP Programming Input and Data Input for Daisy Chain mode. 8 Prog DI_PD Internal pull-down resistor (~74kΩ). May be connected to VSS if programming is not used 9 DO DO_T Data Output of Synchronous Serial Interface 10 CLK DI, ST Clock Input of Synchronous Serial Interface; Schmitt-Trigger input Chip Select, active low; Schmitt-Trigger input, internal pull-up 11 CSn DI_PU, ST resistor (~50kΩ) connect to VSS in incremental mode (see 0) 12 PWM_LSB DO Pulse Width Modulation of approx. 1kHz; LSB in Mode3.x 13 NC - Must be left unconnected 14 NC - Must be left unconnected 15 VDD3V3 S 3V-Regulator Output (see Figure39) 16 VDD5V S Positive Supply Voltage 5 V Abbreviations for Pin Types in Figure6: DO_OD : Digital output open drain DO : Digital output DI_PD : Digital input pull-down DI_PU : Digital input pull-up S : Supply pin DI : Digital input DO_T : Digital output /tri-state ST : Schmitt-Trigger input Page 6 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Absolute Maximum Ratings Absolute Maximum Ratings Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated in Operating Conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 7: Absolute Maximum Ratings Symbol Parameter Min Max Units Note DC supply voltage at pin VDD5V -0.3 7 V VDD5V DC supply voltage at pin VDD3V3 -0.3 5 V VDD3V3 Pins MagINCn, MagDECn, CLK, -0.3 VDD5V +0.3 CSn Vin Input pin voltage V -0.3 7.5 Pin Prog Input current I -100 100 mA JEDEC 78 scr (latchup immunity) ESD Electrostatic discharge ±2 kV MIL 883 E method 3015 T Storage temperature -55 125 ºC Min – 67°F, Max 257°F strg t=20s to 40s, Body temperature T 260 ºC IPC/JEDEC J-Std-020C Body (Lead free package) Lead finish 100% Sn “matte tin” Relative humidity (non RH 5 85 % NC condensing) MSL Moisture sensitivity level 3 Maximum floor life time of 168h ams Datasheet Page 7 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Electrical Characteristics Electrical Characteristics Operating Conditions Figure 8: Operating Conditions Symbol Parameter Min Typ Max Unit Note T Ambient temperature -40 125 °C -40°F to 257°F amb I Supply current 16 21 mA supp External supply voltage at pin VDD5V VDD5V 4.5 5.0 5.5 V 5V operation VDD3V3 Internal regulator output 3.0 3.3 3.6 V voltage at pin VDD3V3 VDD5V External supply voltage at pin 3.0 3.3 3.6 V 3.3V operation (pins VDD5V VDD3V3 VDD5V, VDD3V3 3.0 3.3 3.6 V and VDD3V3 connected) DC Characteristics for Digital Inputs and Outputs CMOS Schmitt-Trigger Inputs: CLK, CSn (CSn = Internal Pull-Up) Operating conditions: T = -40°C to 125°C, amb VDD5V = 3.0V to 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 9: CMOS Schmitt-Trigger Inputs: CLK, CSn (CSn = Internal Pull-Up) Symbol Parameter Min Max Unit Note V High level input voltage 0.7 * VDD5V V Normal operation IH V Low level input voltage 0.3 * VDD5V V IL V -V Schmitt trigger hysteresis 1 V Ion Ioff I -1 1 CLK only LEAK Input leakage current μA Pull-up low level input current I -30 -100 CSn only, VDD5V: 5.0V iL Page 8 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Electrical Characteristics CMOS / Program Input: Prog Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 10: CMOS / Program Input: Prog Symbol Parameter Min Max Unit Note V High level input voltage 0.7 * VDD5V 5 V IH See Programming During V High level input voltage V PROG Conditions programming V Low level input voltage 0.3 * VDD5V V IL Pull-down high level input I 100 μA VDD5V: 5.5V iL current CMOS Output Open Drain: MagINCn, MagDECn Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 11: CMOS Output Open Drain: MagINCn, MagDECn Symbol Parameter Min Max Unit Note V Low level output voltage VSS+0.4 V OL 4 VDD5V: 4.5V I Output current mA O 2 VDD5V: 3V I Open drain leakage current 1 μA OZ ams Datasheet Page 9 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Electrical Characteristics CMOS Output: A, B, Index, PWM Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 12: CMOS Output: A, B, Index, PWM Symbol Parameter Min Max Unit Note V High level output voltage VDD5V-0.5 V OH V Low level output voltage VSS+0.4 V OL 4 VDD5V: 4.5V I Output current mA O 2 VDD5V: 3V Tristate CMOS Output: DO Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 13: Tristate CMOS Output: DO Symbol Parameter Min Max Unit Note V High level output voltage VDD5V-0.5 V OH V Low level output voltage VSS+0.4 V OL 4 VDD5V: 4.5V I Output current mA O 2 VDD5V: 3V I Tri-state leakage current 1 μA OZ Page 10 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Electrical Characteristics Magnetic Input Specification Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Two-pole cylindrical diametrically magnetized source: Figure 14: Magnetic Input Specification Symbol Parameter Min Typ Max Unit Note d Diameter 4 6 mm mag Recommended magnet: Ø 6mm x 2.5mm for cylindrical magnets t Thickness 2.5 mm mag Required vertical component of the Magnetic input magnetic field strength on the die’s B 45 75 mT pk field amplitude surface, measured along a concentric circle with a radius of 1.1mm B Magnetic offset ± 10 mT Constant magnetic stray field off Field non-linearity 5 % Including offset gradient Absolute mode: 600 rpm @ readout of f 10 Hz mag_abs 1024 positions (see Figure36) Input frequency (rotational speed Incremental mode: no missing pulses of magnet) f 500 Hz at rotational speeds of up to 30000 mag_inc rpm (see Figure36) Max. X-Y offset between defined IC 0.25 package center and magnet axis (see Displacement Figure41) Disp mm radius Max. X-Y offset between chip center 0.485 and magnet axis. Chip placement Placement tolerance of chip within IC ±0.23 5 mm tolerance package (see Figure43) Recommended -0.12 NdFeB (Neodymium Iron Boron) magnet material %/K and temperature -0.035 SmCo (Samarium Cobalt) drift ams Datasheet Page 11 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Electrical Characteristics Electrical System Specifications Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 15: Electrical System Specifications Symbol Parameter Min Typ Max Unit Note RES Resolution 10 bit 0.352 deg Adjustable resolution only 7 bit 2.813 available for incremental output 8 bit 1.406 LSB deg modes; 9 bit 0.703 Least significant bit, minimum 10 bit 0.352 step Maximum error with respect to Integral non-linearity the best line fit. INL ± 0.5 deg opt (optimum) Verified at optimum magnet placement, T =25 °C. amb Maximum error with respect to the best line fit. Integral non-linearity INL ± 0.9 deg Verified at optimum magnet temp (optimum) placement, T = -40°C to 125°C amb Best line fit = (Err – Err ) / 2 max min Over displacement tolerance INL Integral non-linearity ± 1.4 deg with 6mm diameter magnet, T = -40°C to 125°C amb DNL Differential non-linearity ± 0.176 deg 10bit, no missing codes Deg TN Transition noise 0.12 RMS equivalent to 1 sigma RMS Hyst Hysteresis 0.704 deg Incremental modes only Power-on-reset threshold DC supply voltage 3.3V V ON voltage; 300mV typ. 1.37 2.2 2.9 V on (VDD3V3) hysteresis Power-on-reset threshold DC supply voltage 3.3V V OFF voltage; 300mV typ. 1.08 1.9 2.6 V off (VDD3V3) hysteresis Until offset compensation t Power-up time 50 ms PwrUp finished System propagation delay t 48 μs Includes delay of ADC and DSP delay absolute output System propagation delay 192 μs Calculation over two samples incremental output Page 12 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Electrical Characteristics Symbol Parameter Min Typ Max Unit Note Internal sampling rate, 9.90 10.42 10.94 T = 25°C Sampling rate for absolute amb f kHz S output Internal sampling rate, 9.38 10.42 11.46 T = -40°C to 125°C amb Max. clock frequency to read CLK Read-out frequency 1 MHz out serial data Figure 16: Integral and Differential Non-Linearity Example (Exaggerated Curve) (cid:6) 1023 10bit code 1023 Actual curve 2 TN Ideal curve 1 DNL+1LSB INL 0 0.35° 512 512 0 0(cid:5) (cid:2)(cid:3)(cid:4)(cid:5) 360(cid:5) (cid:6)[degrees] Integral Non-Linearity (INL) is the maximum deviation between actual position and indicated position. Differential Non-Linearity (DNL) is the maximum deviation of the step length from one position to the next. Transition Noise (TN) is the repeatability of an indicated position. ams Datasheet Page 13 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Electrical Characteristics Timing Characteristics Synchronous Serial Interface (SSI) Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 17: Synchronous Serial Interface (SSI) Symbol Parameter Min Typ Max Unit Note Data output activated Time between falling edge of CSn t 100 ns DO active (logic high) and data output activated First data shifted to Time between falling edge of CSn t 500 ns CLK FE output register and first falling edge of CLK Rising edge of CLK shifts out one bit T Start of data output 500 ns CLK / 2 at a time Time between rising edge of CLK t Data output valid 357 413 ns DO valid and data output valid After the last bit DO changes back to t Data output tristate 100 ns DO tristate “tristate” CSn = high; To initiate read-out of t Pulse width of CSn 500 ns CSn next angular position Clock frequency to read out serial f Read-out frequency >0 1 MHz CLK data Page 14 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Electrical Characteristics Pulse Width Modulation Output Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 18: Pulse Width Modulation Output Symbol Parameter Min Typ Max Unit Note Signal period = 1025μs ±5% at 0.927 0.976 1.024 T = 25°C amb f PWM frequency kHz PWM =1025μs ±10% at 0.878 0.976 1.074 T = -40°C to 125°C amb PW Minimum pulse width 0.90 1 1.10 μs Position 0d; angle 0 degree MIN Position 1023d; angle 359.65 PW Maximum pulse width 922 1024 1126 μs MAX degree Incremental Outputs Operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted. Figure 19: Incremental Outputs Symbol Parameter Min Typ Max Unit Note Time between first falling edge of t Incremental outputs Incremental 500 ns CSn after power-up and valid outputs valid valid after power-up incremental outputs Time between rising or falling edge Directional indication t 500 ns of LSB output and valid directional Dir valid valid indication ams Datasheet Page 15 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Electrical Characteristics Programming Conditions (operating conditions: T = -40°C to 125°C, VDD5V = 3.0V to amb 3.6V (3V operation) VDD5V = 4.5V to 5.5V (5V operation) unless otherwise noted). Figure 20: Programming Conditions Symbol Parameter Min Typ Max Unit Note Programming enable Time between rising edge at t 2 μs Prog enable time Prog pin and rising edge of CSn t Write data start 2 μs Data in Write data at the rising edge of t Write data valid 250 ns Data in valid CLK PROG Load programming t 3 μs Load PROG data Rise time of V t PROG 0 μs PrgR before CLK PROG Hold time of V t PROG 0 5 μs PrgH after CLK PROG Write data – CLK 250 kHz PROG programming CLK PROG During programming; 16 clock t CLK pulse width 1.8 2 2.2 μs PROG cycles Hold time of Vprog Programmed data is available t 2 μs PROG finished after programming after next power-on Must be switched OFF after V Programming voltage 7.3 7.4 7.5 V PROG zapping Programming voltage Line must be discharged to this V 0 1 V ProgOff OFF level level I Programming current 130 mA During programming PROG CLK Analog read CLK 100 kHz Analog readback mode Aread Programmed zener V 100 mV programmed voltage (log.1) VRef-VPROG during analog readback mode (see Analog Unprogrammed zener Readback Mode) V 1 V unprogrammed voltage (log. 0) Page 16 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Functional Description Functional Description The AS5040 is manufactured in a CMOS standard process and uses a spinning current Hall technology for sensing the magnetic field distribution across the surface of the chip. The integrated Hall elements are placed around the center of the device and deliver a voltage representation of the magnetic field at the surface of the IC. Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algorithms, the AS5040 provides accurate high-resolution absolute angular position information. For this purpose a Coordinate Rotation Digital Computer (CORDIC) calculates the angle and the magnitude of the Hall array signals. The DSP is also used to provide digital information at the outputs MagINCn and MagDECn that indicate movements of the used magnet towards or away from the device’s surface. A small low cost diametrically magnetized (two-pole) standard magnet provides the angular position information (see Figure40). The AS5040 senses the orientation of the magnetic field and calculates a 10-bit binary code. This code can be accessed via a Synchronous Serial Interface (SSI). In addition, an absolute angular representation is given by a Pulse Width Modulated signal at pin 12 (PWM). Besides the absolute angular position information the device simultaneously provides incremental output signals. The various incremental output modes can be selected by programming the OTP mode register bits (see Figure36). As long as no programming voltage is applied to pin Prog, the new setting may be overwritten at any time and will be reset to default when power is turned OFF. To make the setting permanent, the OTP register must be programmed (see Figure34). The default setting is a quadrature A/B mode including the Index signal with a pulse width of 1 LSB. The Index signal is logic high at the user programmable zero position. The AS5040 is tolerant to magnet misalignment and magnetic stray fields due to differential measurement technique and Hall sensor conditioning circuitry. ams Datasheet Page 17 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − 10-Bit Absolute Angular Position Output 10-Bit Absolute Angular Position Output Synchronous Serial Interface (SSI) Figure 21: Synchronous Serial Interface with Absolute Angular Position Data CSn t CLK FE T CLK / 2 t CSn t CLK FE 1 8 16 1 CLK Mag Mag Even DO D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OCF COF LIN INC DEC PAR D9 t DO active t DO valid Angular Position Data Status Bits tDO Tristate If CSn changes to logic low, Data Out (DO) will change from high impedance (tri-state) to logic high and the read-out will be initiated. • After a minimum time t , data is latched into the CLK FE output shift register with the first falling edge of CLK. • Each subsequent rising CLK edge shifts out one bit of data. • The serial word contains 16 bits, the first 10 bits are the angular information D[9:0], the subsequent 6 bits contain system information, about the validity of data such as OCF, COF, LIN, Parity and Magnetic Field status (increase/decrease). • A subsequent measurement is initiated by a log. “high” pulse at CSn with a minimum duration of t . CSn Data Content D9:D0 absolute angular position data (MSB is clocked out first) OCF (Offset Compensation Finished), logic high indicates the finished Offset Compensation Algorithm. For fast startup, this bit may be polled by the external microcontroller. As soon as this bit is set, the AS5040 has completed the startup and the data is valid (see Figure23) COF (CORDIC Overflow), logic high indicates an out of range error in the CORDIC part. When this bit is set, the data at D9:D0 is invalid. The absolute output maintains the last valid angular value. Page 18 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

This alarm may be resolved by bringing the magnet within the X-Y-Z tolerance limits. LIN (Linearity Alarm), logic high indicates that the input field generates a critical output linearity. When this bit is set, the data at D9:D0 may still be used, but can contain invalid data. This warning may be resolved by bringing the magnet within the X-Y-Z tolerance limits. MagINCn, (Magnitude Increase) becomes HIGH, when the magnet is pushed towards the IC, thus the magnetic field strength is increasing. MagDECn, (Magnitude Decrease) becomes HIGH, when the magnet is pulled away from the IC, thus the magnetic field strength is decreasing. Both signals HIGH indicate a magnetic field that is out of the allowed range (see Figure22). Figure 22: Magnetic Magnitude Variation Indicator Mag Mag Description INCn DECn 0 0 No distance change; Magnetic input field OK (in range, 45mT to 75mT) Distance increase: Pull-function. This state is dynamic, it is only active while the 0 1 magnet is moving away from the chip in Z-axis Distance decrease: Push- function. This state is dynamic, it is only active while the 1 0 magnet is moving towards the chip in Z.-axis. 1 1 Magnetic Input Field invalid – out of range: <45mT or >75mT (or missing magnet) Note(s): 1. Pins 1 and 2 (MagINCn, MagDECn) are open drain outputs and require external pull-up resistors. If the magnetic field is in range, both outputs are turned OFF. ams Datasheet Page 19 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − 10-Bit Absolute Angular Position Output The two pins may also be combined with a single pull-up resistor. In this case, the signal is high when the magnetic field is in range. It is low in all other cases (see Figure22). Even Parity bit for transmission error detection of bits 1 to 15 (D9 to D0, OCF, COF, LIN, MagINCn, MagDECn). The absolute angular output is always set to a resolution of 10 bit. Placing the magnet above the chip, angular values increase in clockwise direction by default. Data D9:D0 is valid, when the status bits have the following configurations: Figure 23: Status Bit Outputs OCF COF LIN Mag INCn Mag DECn Parity 0 0 1 0 0 0 1 Even checksum of bits 1:15 1 0 The absolute angular position is sampled at a rate of 10kHz (0.1ms). This allows reading of all 1024 positions per 360 degrees within 0.1 seconds = 9.76Hz (~10Hz) without skipping any position. Multiplying 10Hz by 60, results the corresponding maximum rotational speed of 600 rpm. Readout of every second angular position allows for rotational speeds of up to 1200rpm. Consequently, increasing the rotational speed reduces the number of absolute angular positions per revolution (see Figure46). Regardless of the rotational speed or the number of positions to be read out, the absolute angular value is always given at the highest resolution of 10 bit. The incremental outputs are not affected by rotational speed restrictions due to the implemented interpolator. The incremental output signals may be used for high-speed applications with rotational speeds of up to 30000 rpm without missing pulses. Page 20 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − 10-Bit Absolute Angular Position Output Daisy Chain Mode The Daisy Chain mode allows connection of several AS5040’s in series, while still keeping just one digital input for data transfer (see “Data IN” in Figure24 below). This mode is accomplished by connecting the data output (DO; pin 9) to the data input (Prog; pin 8) of the subsequent device. An RC filter must be implemented between each PROG pin of device n and DO pin of device n+1, to prevent the encoders to enter the alignment mode, in case of ESD discharge, long cables, or not conform signal levels or shape. Using the values R=100R and C=1nF allow a max. CLK frequency of 1MHz on the whole chain. The serial data of all connected devices is read from the DO pin of the first device in the chain. The Prog pin of the last device in the chain should be connected to VSS. The length of the serial bit stream increases with every connected device, it is n * (16+1) bits: e.g. 34 bit for two devices, 51 bit for three devices, etc… The last data bit of the first device (Parity) is followed by a logic low bit and the first data bit of the second device (D9), etc… (see Figure25). Programming Daisy Chained Devices In Daisy Chain mode, the Prog pin is connected directly to the DO pin of the subsequent device in the chain (see Figure24). During programming (see Programming the AS5040), a programming voltage of 7.5V must be applied to pin Prog. This voltage level exceeds the limits for pin DO, so one of the following precautions must be made during programming: • Open the connection DO -> Prog during programming or • Add a Schottky diode between DO and Prog (Anode = DO, Cathode = Prog) ams Datasheet Page 21 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − 10-Bit Absolute Angular Position Output Due to the parallel connection of CLK and CSn, all connected devices may be programmed simultaneously. Figure 24: Daisy Chain Hardware Configuration CSn CSn CSn CSn CLK CLK CLK CLK 100R 100R DI DO PROG DO PROG DO PROG 1nF 1nF GND GND GND MCU AS5040 AS5040 AS5040 Figure 25: Daisy Chain Mode Data Transfer CSn t T CLK FE CLK/2 1 8 16 D 1 2 3 CLK Mag Mag Even DO D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OCF COF LIN D9 D8 D7 INC DEC PAR t t DO active DO valid Angular Position Data Status Bits Angular Position Data 1st Device 2nd Device Page 22 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Incremental Outputs Incremental Outputs Three different incremental output modes are possible with quadrature A/B being the default mode. Figure26 shows the two-channel quadrature as well as the step/direction incremental signal (LSB) and the direction bit in clockwise (CW) and counter-clockwise (CCW) direction. Quadrature A/B Output (Quad A/B Mode) The phase shift between channel A and B indicates the direction of the magnet movement. Channel A leads channel B at a clockwise rotation of the magnet (top view) by 90 electrical degrees. Channel B leads channel A at a counter-clockwise rotation. LSB Output (Step/Direction Mode) Output LSB reflects the LSB (least significant bit) of the programmed incremental resolution (OTP Register Bit Div0, Div1). Output Dir provides information about the rotational direction of the magnet, which may be placed above or below the device (1=clockwise; 0=counter clockwise; top view). Dir is updated with every LSB change. In both modes (quad A/B, step/direction) the resolution and the index output are user programmable. The index pulse indicates the zero position and is by default one angular step (1LSB) wide. However, it can be set to three LSBs by programming the Index-bit of the OTP register accordingly (see Figure36). Figure 26: Incremental Output Modes Mechanical Mechanical Quad A/B-Mode Zero Position Rotation Direction Zero Position Change A B Index=0 1LSB Hyst = 2 LSB Index Step / Dir-Mode Index=1 3 LSB LSB Dir Clockwise cw Counterclockwise ccw CSn t Dir valid t Incremental outputs valid ams Datasheet Page 23 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Incremental Outputs Incremental Power-Up Lock Option After power-up, the incremental outputs can optionally be locked or unlocked, depending on the status of the CSn pin: CSn = low at power-up: CSn has an internal pull-up resistor and must be externally pulled low (R ≤ 5kΩ). If Csn is low at power-up, the ext incremental outputs (A, B, Index) will be high until the internal offset compensation is finished. This unique state (A=B=Index = high) may be used as an indicator for the external controller to shorten the waiting time at power-up. Instead of waiting for the specified maximum power up-time (0), the controller can start requesting data from the AS5040 as soon as the state (A=B=Index = high) is cleared. CSn = high or open at power-up: In this mode, the incremental outputs (A, B, Index) will remain at logic high state, until CSn goes low or a low pulse is applied at CSn. This mode allows intentional disabling of the incremental outputs until for example the system microcontroller is ready to receive data. Page 24 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Incremental Outputs Incremental Output Hysteresis To avoid flickering incremental outputs at a stationary magnet position, a hysteresis is introduced. In case of a rotational direction change, the incremental outputs have a hysteresis of 2 LSB. Regardless of the programmed incremental resolution, the hysteresis of 2 LSB always corresponds to the highest resolution of 10 bit. In absolute terms, the hysteresis is set to 0.704 degrees for all resolutions. For constant rotational directions, every magnet position change is indicated at the incremental outputs (see Figure27). If for example the magnet turns clockwise from position “x+3“ to “x+4“, the incremental output would also indicate this position accordingly. A change of the magnet’s rotational direction back to position “x+3“ means, that the incremental output still remains unchanged for the duration of 2 LSB, until position “x+2“ is reached. Following this direction, the incremental outputs will again be updated with every change of the magnet position. Figure 27: Hysteresis Window for Incremental Outputs (cid:20)(cid:5)(cid:21)(cid:15)(cid:6)(cid:22)(cid:6)(cid:5)(cid:7)(cid:3)(cid:23)(cid:8) (cid:24)(cid:25)(cid:7)(cid:26)(cid:25)(cid:7)(cid:8) (cid:13)(cid:14)(cid:11)(cid:7)(cid:6)(cid:15)(cid:6)(cid:11)(cid:12)(cid:11)(cid:16) (cid:20)(cid:5)(cid:27)(cid:12)(cid:21)(cid:3)(cid:7)(cid:12)(cid:10)(cid:5) 0.35° (cid:17)(cid:8)(cid:18)! (cid:17)(cid:8)(cid:18)(cid:29) (cid:17)(cid:8)(cid:18)(cid:28) (cid:17)(cid:8)(cid:18)(cid:30) (cid:17)(cid:8)(cid:18)(cid:19) (cid:17)(cid:8)(cid:18)(cid:31) (cid:17) (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:7)(cid:12)(cid:10)(cid:5) (cid:17) (cid:17)(cid:8)(cid:18)(cid:31) (cid:17)(cid:8)(cid:18)(cid:19) (cid:17)(cid:8)(cid:18)(cid:30) (cid:17)(cid:8)(cid:18)(cid:28) (cid:17)(cid:8)(cid:18)(cid:29) (cid:17)(cid:8)(cid:18)! Clockwise Direction Counterclockwise Direction ams Datasheet Page 25 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Pulse Width Modulation (PWM) Output Pulse Width Modulation (PWM) The AS5040 provides a pulse width modulated output (PWM), Output whose duty cycle is proportional to the measured angle. t ×1025 (EQ1) Position = --o---n--------------------–1 t +t on off The PWM frequency is internally trimmed to an accuracy of ±5% (±10% over full temperature range). This tolerance can be canceled by measuring the complete duty cycle as shown above. Figure 28: PWM Output Signal Angle PW MIN 0 deg (Pos 0) 1μs 1025μs PW MAX 359.65 deg (Pos 1023) 1024μs 1/f PWM Figure 29: PWM Signal Parameters Parameter Symbol Typ Unit Note PWM frequency f 0.9756 kHz Signal period: 1025μs PWM • Position 0d MIN pulse width PW 1 μs MIN • Angle 0 deg • Position 1023d MAX pulse width PW 1024 μs MAX • Angle 359,65 deg Page 26 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Analog Output Analog Output An analog output can be generated by averaging the PWM signal, using an external active or passive low pass filter. The analog output voltage is proportional to the angle: 0º= 0V; 360º = VDD5V. Using this method, the AS5040 can be used as direct replacement of potentiometers. Figure 30: Simple Passive 2nd Order RC Low Pass Filter R1 R2 analog out Pin12 PWM VDD2 C1 C2 0V2 Pin7 0° 360° VSS (EQ2) R1, R2 ≥ 4K7 C1, C2 ≥ 1μF/6V R1 should be ≥ 4k7 to avoid loading of the PWM output. Larger values of Rx and Cx will provide better filtering and less ripple, but will also slow down the response time. ams Datasheet Page 27 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Brushless DC Motor Commutation Mode Brushless DC Motor Brushless DC motors require angular information for stator commutation. The AS5040 provides U-V-W commutation Commutation Mode signals for one and two pole pair motors. In addition to the three-phase output signals, the step (LSB) output at pin 12 allows high accuracy speed measurement. Two resolutions (9 or 10 bit) can be selected by programming Div0 according to Figure36. Mode 3.0 (3.1) is used for brush-less DC motors with one-pole pair rotors. The three phases (U, V, W) are 120 degrees apart, each phase is 180 degrees ON and 180 degrees OFF. Mode 3.2 (3.3) is used for motors with two pole pairs requiring a higher pulse count to ensure a proper current commutation. In this case the pulse width is 256 positions, equal to 90 degrees. The precise physical angle at which the U, V and W signals change state (“Angle” in Figure31 and Figure32) is calculated by multiplying each transition position by the angular value of 1 count: (EQ3) Angle [deg] = Position x (360 degree / 1024) Figure 31: U, V and V-Signals for BLDC Motor Commutation (Div1=0, Div0=0) Commutation - Mode 3.0 (One-pole-pair) Width: 512 Steps Width: 512 Steps U V W CW Direction Position: 0 171 341 512 683 853 0 Angle: 0.0 60.12 119.88 180.0 240.12 299.88 360.0 Figure 32: U, V and W-Signals for 2-Pole BLDC Motor Commutation (Div1=1; Div0=0) Commutation - Mode 3.2 (Two-pole-pairs) Width: 256 Steps Width: 256 Steps U V W CW Direction Position: 0 85 171 256 341 427 512 597 683 768 853 939 0 Angle: 0.0 29.88 60.12 90.0 119.88 150.12 180.0 209.88 240.12 270.00 299.88 330.12 360.0 Page 28 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Programming the AS5040 Programming the AS5040 After power-on, programming the AS5040 is enabled with the rising edge of CSn with Prog = high and CLK = low. 16 bit configuration data must be serially shifted into the OTP register via the Prog-pin. The first “CCW” bit is followed by the zero position data (MSB first) and the incremental mode setting as shown in Table 6. Data must be valid at the rising edge of CLK (see Figure33). After writing data into the OTP register it can be permanently programmed by rising the Prog pin to the programming voltage V . 16 CLK pulses (t ) must be applied to program the PROG PROG fuses (Figure34). To exit the programming mode, the chip must be reset by a power-on-reset. The programmed data is available after the next power-up. Note(s): During the programming process, the transitions in the programming current may cause high voltage spikes generated by the inductance of the connection cable. To avoid these spikes and possible damage to the IC, the connection wires, especially the signals Prog and VSS must be kept as short as possible. The maximum wire length between the V PROG switching transistor and pin Prog (see Figure35) should not exceed 50mm (2 inches). To suppress eventual voltage spikes, a 10nF ceramic capacitor should be connected close to pins Prog and VSS. This capacitor is only required for programming, it is not required for normal operation. The clock timing t must be selected at a proper rate to ensure clk that the signal Prog is stable at the rising edge of CLK (see Figure33). Additionally, the programming supply voltage should be buffered with a 10μF capacitor mounted close to the switching transistor. This capacitor aids in providing peak currents during programming. The specified programming voltage at pin Prog is 7.3 – 7.5V (see section 0). To compensate for the voltage drop across the V PROG switching transistor, the applied programming voltage may be set slightly higher (7.5 - 8.0V, see Figure35). OTP Register Contents: CCW Counter Clockwise Bit • ccw=0 – angular value increases in clockwise direction • ccw=1 – angular value increases in counterclockwise direction Z [9:0] Programmable Zero / Index Position Indx Index Pulse Width Selection: 1LSB / 3LSB Div1, Div0 Divider Setting of Incremental Output Md1, Md0 Incremental Output Mode Selection ams Datasheet Page 29 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Programming the AS5040 OTP Default Setting The AS5040 can also be operated without programming. The default, un-programmed setting is shown in Figure36 (Mode 0.0): CCW:0 = Clockwise operation Z9 to Z0: 00 = No programmed zero position Indx: 0 = Index bit width = 1LSB Div0,Div1: 00 = Incremental resolution = 10bit Md0, MD1: 00 = Incremental mode = quadrature Figure 33: Programming Access – Write Data (section of Figure34) Figure 34: Complete Programming Sequence Write Data Programming Mode Power Off CSn 7.5V VDD Prog Data VProgOff 0V 1 16 CLK PROG tLoad PROG tPrgH tPROG finished t PrgR t PROG Page 30 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Programming the AS5040 Figure 35: OTP Programming Connection of AS5040 (shown with AS5040 demoboard) B S U ams Datasheet Page 31 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Programming the AS5040 Incremental Mode Programming Three different incremental output modes are available. Mode: Md1=0 / Md0=1 sets the AS5040 in quadrature mode. Mode: Md1=1 / Md0=0 sets the AS5040 in step / direction mode (see Figure5). In both modes, the incremental resolution may be reduced from 10 bit down to 9, 8 or 7 bit using the divider OTP bits Div1 and Div0. (see Figure36 below). Mode: Md1=1 / Md0=1 sets the AS5040 in brushless DC motor commutation mode with an additional LSB incremental signal at pin 12 (PWM_LSB). To allow programming of all bits, the default factory setting is all bits = 0. This mode is equal to mode 0:0 (quadrature A/B, 1LSB index width, 256ppr). The absolute angular output value, by default, increases with clockwise rotation of the magnet (top view). Setting the CCW-bit (see Figure33) allows reversing the indicated direction, e.g. when the magnet is placed underneath the IC: CCW = 0 – angular value increases clockwise; CCW = 1 – angular value increases counterclockwise. By default, the zero / index position pulse is one LSB wide. It can be increased to a three LSB wide pulse by setting the Index-bit of the OTP register. Further programming options (commutation modes) are available for brushless DC motor-control. Md1 = Md0 = 1 changes the incremental output pins 3, 4 and 6 to a 3-phase commutation signal. Div1 defines the number of pulses per revolution for either a two-pole (Div1=0) or four-pole (Div1=1) rotor. In addition, the LSB is available at pin 12 (the LSB signal replaces the PWM signal), which allows for high rotational speed measurement of up to 30000 rpm. Page 32 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Programming the AS5040 Figure 36: One Time Programmable (OTP) Register Options Pulses per Incremental OTP-Mode-Register-Bit Pin # Revolution Resolution Mode Md1 Md0 Div1 Div0 Index 3 4 6 12 ppr bit Default (Mode0.0) 0 0 0(1) 0(1) 0(1) 1LSB quadAB-Mode1.0 0 1 0 0 0 1LSB 2x256 10 quadAB-Mode1.1 0 1 0 0 1 3LSBs quadAB-Mode1.2 0 1 0 1 0 1LSB 2x128 9 PWM 10 quadAB-Mode1.3 0 1 0 1 1 A B 3LSBs bit quadAB-Mode1.4 0 1 1 0 0 1LSB 2x64 8 quadAB-Mode1.5 0 1 1 0 1 3LSBs quadAB-Mode1.6 0 1 1 1 0 1LSB 2x32 7 quadAB-Mode1.7 0 1 1 1 1 3LSBs ams Datasheet Page 33 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Programming the AS5040 Pulses per Incremental OTP-Mode-Register-Bit Pin # Revolution Resolution Mode Md1 Md0 Div1 Div0 Index 3 4 6 12 ppr bit Step/Dir-Mode2.0 1 0 0 0 0 1LSB 512 10 Step/Dir-Mode2.1 1 0 0 0 1 3LSBs Step/Dir -Mode2.2 1 0 0 1 0 1LSB 256 9 Step/Dir -Mode2.3 1 0 0 1 1 3LSBs PWM 10 LSB Dir bit Step/Dir -Mode2.4 1 0 1 0 0 1LSB 128 8 Step/Dir -Mode2.5 1 0 1 0 1 3LSBs Step/Dir -Mode2.6 1 0 1 1 0 1LSB 64 7 Step/Dir -Mode2.7 1 0 1 1 1 3LSBs Commutation- 1 1 0 0 0 10 Mode3.0 U(0º) V(120º) W(240º) LSB 3 x 1 Commutation- 1 1 0 1 0 9 Mode3.1 Commutation- 1 1 1 0 0 10 Mode3.2 U’ (0º, V’ (60º, W’ (120º, LSB 2 x 3 180º) 240º) 300º) Commutation- 1 1 1 1 0 9 Mode3.3 Note(s): 1. Div1, Div0 and Index cannot be programmed in Mode 0:0 Page 34 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Programming the AS5040 Zero Position Programming Zero position programming is an OTP option that simplifies assembly of a system, as the magnet does not need to be manually adjusted to the mechanical zero position. Once the assembly is completed, the mechanical and electrical zero positions can be matched by software. Any position within a full turn can be defined as the permanent new zero/index position. For zero position programming, the magnet is turned to the mechanical zero position (e.g. the “OFF”-position of a rotary switch) and the actual angular value is read. This value is written into the OTP register bits Z9:Z0 (see Figure33) and programmed as described in Programming the AS5040. This new absolute zero position is also the new Index pulse position for incremental output modes. Note(s): The zero position value may also be modified before programming, e.g. to program an electrical zero position that is 180° (half turn) from the mechanical zero position, just add 512 to the value read at the mechanical zero position and program the new value into the OTP register. Repeated OTP Programming Although a single AS5040 OTP register bit can be programmed only once (from 0 to 1), it is possible to program other, unprogrammed bits in subsequent programming cycles. However, a bit that has already been programmed should not be programmed twice. Therefore it is recommended that bits that are already programmed are set to “0” during a programming cycle. Non-Permanent Programming It is also possible to re-configure the AS5040 in a non-permanent way by overwriting the OTP register. This procedure is essentially a “Write Data” sequence (see Figure33) without a subsequent OTP programming cycle. The “Write Data” sequence may be applied at any time during normal operation. This configuration remains set while the power supply voltage is above the power-on reset level (see 0). See Application Note AN5000-20 for further information. Analog Readback Mode Non-volatile programming (OTP) uses on-chip zener diodes, which become permanently low resistive when subjected to a specified reverse current. The quality of the programming process depends on the amount of current that is applied during the programming process (up to 130mA). ams Datasheet Page 35 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Programming the AS5040 This current must be provided by an external voltage source. If this voltage source cannot provide adequate power, the zener diodes may not be programmed properly. In order to verify the quality of the programmed bits, an analog level can be read for each zener diode, giving an indication whether this particular bit was properly programmed or not. To put the AS5040 in analog readback mode, a digital sequence must be applied to pins CSn, Prog and CLK as shown in Figure37. The digital level for this pin depends on the supply configuration (3.3V or 5V; see 3.3V / 5V Operation). The second rising edge on CSn (OutpEN) changes pin Prog to a digital output and the log. high signal at pin Prog must be removed to avoid collision of outputs (grey area in Figure37). The following falling slope of CSn changes pin Prog to an analog output, providing a reference voltage Vref, that must be saved as a reference for the calculation of the subsequent programmed and unprogrammed OTP bits. Following this step, each rising slope of CLK outputs one bit of data in the reverse order as during programming (see Figure37): Md0-MD1-Div0,Div1-Indx-Z0…Z9, ccw) During analog readback, the capacitor at pin Prog (see Figure35) should be removed to allow a fast readout rate. If the capacitor is not removed the analog voltage will take longer to stabilize due to the additional capacitance. The measured analog voltage for each bit must be subtracted from the previously measured V , and the resulting value gives ref an indication on the quality of the programmed bit: a reading of <100mV indicates a properly programmed bit and a reading of >1V indicates a properly unprogrammed bit. A reading between 100mV and 1V indicates a faulty bit, which may result in an undefined digital value, when the OTP is read at power-up. Following the 16th clock (after reading bit “ccw”), the chip must be reset by disconnecting the power supply. Figure 37: OTP Register Analog Read ProgEN OutpEN Analog Readback Data at Prog Power-on- Reset; CSn turn off supply Vref Vprogrammed Internal Prog tdeisgti tbailt Md0 Md1 Div0 Div1 Vunprogrammed Z5 Z6 Z7 Z8 Z9 ccw Prog changes to Output 1 16 CLK tLoadProg CLKAread Page 36 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Alignment Mode Alignment Mode The alignment mode simplifies centering the magnet over the chip to gain maximum accuracy and XY-alignment tolerance. This electrical centering method allows a wider XY-alignment tolerance (0.485mm radius) than mechanical centering(0.25mm radius) as it eliminates the placement tolerance of the die within the IC package (+/- 0.235mm). Alignment mode can be enabled with the falling edge of CSn while Prog = logic high (Figure38). The Data bits D9-D0 of the SSI change to a 10-bit displacement amplitude output. A high value indicates large X or Y displacement, but also higher absolute magnetic field strength. The magnet is properly aligned, when the difference between highest and lowest value over one full turn is at a minimum. Under normal conditions, a properly aligned magnet will result in a reading of less than 32 over a full turn.The MagINCn and MagDECn indicators will be = 1 when the alignment mode reading is < 32. At the same time, both hardware pins MagINCn (#1) and MagDECn (#2) will be pulled to VSS. A properly aligned magnet will therefore produce a MagINCn = MagDECn = 1 signal throughout a full 360° turn of the magnet. Stronger magnets or short gaps between magnet and IC may show values larger than 32. These magnets are still properly aligned as long as the difference between highest and lowest value over one full turn is at a minimum. The alignment mode can be reset to normal operation mode by a power-on-reset (disconnect / re-connect power supply). Figure 38: Enabling the Alignment Mode Prog Read-out AlignMode enable CSn via SSI 2μs 2μs min.min. ams Datasheet Page 37 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − 3.3V / 5V Operation 3.3V / 5V Operation The AS5040 operates either at 3.3V ±10% or at 5V ±10%. This is made possible by an internal 3.3V Low-Dropout (LDO) voltage regulator. The internal supply voltage is always taken from the output of the LDO, meaning that the internal blocks are always operating at 3.3V. For 3.3V operation, the LDO must be bypassed by connecting VDD3V3 with VDD5V (see Figure39). For 5V operation, the 5V supply is connected to pin VDD5V, while VDD3V3 (LDO output) must be buffered by a 2.2...10μF capacitor, which is supposed to be placed close to the supply pin (see Figure39). The VDD3V3 output is intended for internal use only It must not be loaded with an external load. The output voltage of the digital interface I/O’s corresponds to the voltage at pin VDD5V, as the I/O buffers are supplied from this pin (see Figure39). Figure 39: Connections for 5V / 3.3V Supply Voltages 5V Operation 3.3V Operation 2.2...10μF VDD3V3 VDD3V3 100n 100n VDD5V LDO Internal VDD5V LDO Internal VDD VDD DO DO I PWM_LSB I PWM_LSB N N 4.5 -5.5V T CLK 3.0 -3.6V T CLK E CSn E CSn R R F A_LSB_U F A_LSB_U A B_Dir_V A B_Dir_V C C E Index_W E Index_W Prog Prog VSS VSS A buffer capacitor of 100nF is recommended in both cases close to pin VDD5V. Note that pin VDD3V3 must always be buffered by a capacitor. It must not be left floating, as this may cause an instable internal 3.3V supply voltage which may lead to larger than normal jitter of the measured angle. Page 38 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Choosing the Proper Magnet Choosing the Proper Magnet Typically the magnet should be 6mm in diameter and ≥2.5mm in height. Magnetic materials such as rare earth AlNiCo, SmCo5 or NdFeB are recommended. The magnet’s field strength perpendicular to the die surface should be verified using a gauss-meter. The magnetic field Bv at a given distance, along a concentric circle with a radius of 1.1mm (R1), should be in the range of ±45mT to ±75mT. (see Figure40). Figure 40: Typical Magnet and Magnetic Field Distribution typ. 6mm diameter N S Vertical field Magnet axis component Magnet axis R1 Bv (45…75mT) Vertical field component 0 360 N S R1 concentric circle; radius 1.1mm ams Datasheet Page 39 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Choosing the Proper Magnet Physical Placement of the Magnet The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the IC package as shown in Figure41: Figure 41: Defined IC Center and Magnet Displacement Radius 3.9 mm 3.9 mm 1 2.433 mm Defined center R d 2.433 mm Area of recommended maximum magnet misalignment Page 40 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Choosing the Proper Magnet Magnet Placement The magnet’s center axis should be aligned within a displacement radius R of 0.25mm from the defined center of d the IC with reference to the edge of pin #1 (see Figure41). This radius includes the placement tolerance of the chip within the SSOP-16 package (± 0.235mm). The displacement radius R is d 0.485mm with reference to the center of the chip (see Alignment Mode) The vertical distance should be chosen such that the magnetic field on the die surface is within the specified limits (see Figure40). The typical distance “z” between the magnet and the package surface is 0.5mm to 1.8mm with the recommended magnet (6mm x 2.5mm). Larger gaps are possible, as long as the required magnetic field strength stays within the defined limits. A magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be indicated by MagINCn (pin 1) and MagDECn (pin 2), see Figure22. Figure 42: Vertical Placement of the Magnet N S z Die surface Package surface 0.576mm ± 0.1mm 1.282mm ± 0.15mm ams Datasheet Page 41 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Simulation Modelling Simulation Modelling Figure 43: Arrangement of Hall Sensor Array on Chip (principle) With reference to Figure43, a diametrically magnetized permanent magnet is placed above or below the surface of the AS5040. The chip uses an array of Hall sensors to sample the vertical vector of a magnetic field distributed across the device package surface. The area of magnetic sensitivity is a circular locus of 1.1mm radius with respect to the center of the die. The Hall sensors in the area of magnetic sensitivity are grouped and configured such that orthogonally related components of the magnetic fields are sampled differentially. The differential signal Y1-Y2 will give a sine vector of the magnetic field. The differential signal X1-X2 will give an orthogonally related cosine vector of the magnetic field. The angular displacement (θ) of the magnetic source with reference to the Hall sensor array may then be modelled by: (Y1–Y2) (EQ4) θ = arctan--------------------------±0.5° (X1–X2) The ±0.5° angular error assumes a magnet optimally aligned over the center of the die and is a result of gain mismatch errors of the AS5040. Placement tolerances of the die within the package are ±0.235mm in X and Y direction, using a reference point of the edge of pin #1 (Figure43). Page 42 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Simulation Modelling In order to neglect the influence of external disturbing magnetic fields, a robust differential sampling and ratiometric calculation algorithm has been implemented. The differential sampling of the sine and cosine vectors removes any common mode error due to DC components introduced by the magnetic source itself or external disturbing magnetic fields. A ratiometric division of the sine and cosine vectors removes the need for an accurate absolute magnitude of the magnetic field and thus accurate Z-axis alignment of the magnetic source. The recommended differential input range of the magnetic field strength (B ,B ) is ±75mT at the surface of the (X1-X2) (Y1-Y2) die. In addition to this range, an additional offset of ±5mT, caused by unwanted external stray fields is allowed. The chip will continue to operate, but with degraded output linearity, if the signal field strength is outside the recommended range. Too strong magnetic fields will introduce errors due to saturation effects in the internal preamplifiers. Too weak magnetic fields will introduce errors due to noise becoming more dominant. ams Datasheet Page 43 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Failure Diagnostics Failure Diagnostics The AS5040 also offers several diagnostic and failure detection features: Magnetic Field Strength Diagnosis By software: the MagINCn and MagDECn status bits will both be high when the magnetic field is out of range. By hardware: Pins #1 (MagINCn) and #2 (MagDECn) are open-drain outputs and will both be turned ON (= low with external pull-up resistor) when the magnetic field is out of range. If only one of the outputs is low, the magnet is either moving towards the chip (MagINCn) or away from the chip (MagDECn). Power Supply Failure Detection By software: If the power supply to the AS5040 is interrupted, the digital data read by the SSI will be all “0”s. Data is only valid, when bit OCF is high, hence a data stream with all “0”s is invalid. To ensure adequate low levels in the failure case, a pull-down resistor (~10kΩ) should be added between pin DO and VSS at the receiving side. By hardware: The MagINCn and MagDECn pins are open drain outputs and require external pull-up resistors. In normal operation, these pins are high ohmic and the outputs are high (see Figure22). In a failure case, either when the magnetic field is out of range or the power supply is missing, these outputs will become low. To ensure adequate low levels in case of a broken power supply to the AS5040, the pull-up resistors (>10kΩ) from each pin must be connected to the positive supply at pin 16 (VDD5V). By hardware: PWM output: The PWM output is a constant stream of pulses with 1kHz repetition frequency. In case of power loss, these pulses are missing. By hardware: Incremental outputs: In normal operation, pins A(#3), B(#4) and Index (#6) will never be high at the same time, as Index is only high when A=B=low. However, after a power-on-reset, if VDD is powered up or restarts after a power supply interruption, all three outputs will remain in high state until pin CSn is pulled low. If CSn is already tied to VSS during power-up, the incremental outputs will all be high until the internal offset compensation is finished (within t ). PwrUp Page 44 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Angular Output Tolerances Angular Output Tolerances Accuracy Accuracy is defined as the error between measured angle and actual angle. It is influenced by several factors: • The non-linearity of the analog-digital converters, • Internal gain and mismatch errors, • Non-linearity due to misalignment of the magnet As a sum of all these errors, the accuracy with centered magnet = (Err – Err )/2 is specified as better than ±0.5 max min degrees @ 25°C (see Figure45). Misalignment of the magnet further reduces the accuracy. Figure44 shows an example of a 3D-graph displaying nonlinearity over XY-misalignment. The center of the square XY-area corresponds to a centered magnet (see dot in the center of the graph). The X- and Y- axis extends to a misalignment of ±1mm in both directions. The total misalignment area of the graph covers a square of 2x2 mm (79x79mil) with a step size of 100μm. For each misalignment step, the measurement as shown in Figure45 is repeated and the accuracy (Err – Err )/2 (e.g. max min 0.25° in Figure45) is entered as the Z-axis in the 3D-graph. Figure 44: Example of Linearity Error Over XY Misalignment ams Datasheet Page 45 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Angular Output Tolerances The maximum non-linearity error on this example is better than ±1 degree (inner circle) over a misalignment radius of ~0.7mm. For volume production, the placement tolerance of the IC within the package (±0.235mm) must also be taken into account. The total nonlinearity error over process tolerances, temperature and a misalignment circle radius of 0.25mm is specified better than ±1.4 degrees. The magnet used for this measurement was a cylindrical NdFeB (Bomatec® BMN-35H) magnet with 6mm diameter and 2.5mm in height. Figure 45: Example of Linearity Error Over 360º Linearity error with centered magnet [degrees ] 0.5 0.4 0.3 0.2 transition noise 0.1 0 Errmax -0.1 1 55 109 163 217 271 325 379 433 487 541 595 649 703 757 811 865 919 973 -0.2 Errmin -0.3 -0.4 -0.5 Transition Noise Transition noise is defined as the jitter in the transition between two steps. Due to the nature of the measurement principle (Hall sensors + Preamplifier + ADC), there is always a certain degree of noise involved. This transition noise voltage results in an angular transition noise at the outputs. It is specified as 0.12 degrees rms (1 sigma)1 This is the repeatability of an indicated angle at a given mechanical position. 1. Statistically, 1 sigma represents 68.27% of readings, 3 sigma represents 99.73% of readings. Page 46 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Angular Output Tolerances The transition noise has different implications on the type of output that is used: • Absolute Output; SSI Interface: The transition noise of the absolute output can be reduced by the user by applying an averaging of readings. • PWM Interface: If the PWM interface is used as an analog output by adding a low pass filter, the transition noise can be reduced by lowering the cutoff frequency of the filter. If the PWM interface is used as a digital interface with a counter at the receiving side, the transition noise may again be reduced by averaging of readings. • Incremental Mode: In incremental mode, the transition noise influences the period, width and phase shift of the output signals A, B and Index. However, the algorithm used to generate the incremental outputs guarantees no missing or additional pulses even at high speeds (up to 30.000 rpm and higher). High Speed Operation Sampling Rate The AS5040 samples the angular value at a rate of 10.42k samples per second. Consequently, the incremental, as well as the absolute outputs are updated each 96μs. At a stationary position of the magnet, this sampling rate creates no additional error. Absolute Mode with Serial Communication With the given sampling rate of 10.4 kHz, the number of samples (n) per turn for a magnet rotating at high speed can be calculated by: 60 (EQ5) n = --------------------------- rpm⋅96μs In practice, there is no upper speed limit. The only restriction is that there will be fewer samples per revolution as the speed increases. Regardless of the rotational speed, the absolute angular value is always sampled at the highest resolution of 10 bit. Likewise, for a given number of samples per revolution (n), the maximum speed can be calculated by: 60 (EQ6) rpm = -------------------- n⋅96μs In absolute mode with serial communication, 610 rpm is the maximum speed, where 1024 readings per revolution can be obtained. In incremental mode, the maximum error caused by the sampling rate of the ADCs is 0/+96μs. It has a peak of 1LSB = 0.35° at 610 rpm. At higher speeds this error is reduced again due to interpolation and the output delay remains at 192μs as the DSP requires two sampling periods (2x96μs) to synthesize and redistribute any missing pulses. ams Datasheet Page 47 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Angular Output Tolerances Absolute Mode with PWM The principle is the same as with the serial communication. The PWM output is refreshed with a rate of 1.025ms, the number of samples (n) per turn for a magnet rotating at high speed can be calculated by: 60 (EQ7) n = ------------------------------------- rpm×1.025ms In absolute mode with PWM output, 57 rpm is the maximum speed, where 1024 readings per revolution can be obtained. Incremental Mode Incremental encoders are usually required to produce no missing pulses up to several thousand rpm’s. Therefore, the AS5040 has a built-in interpolator, which ensures that there are no missing pulses at the incremental outputs for rotational speeds of up to 30000 rpm, even at the highest resolution of 10 bits (512 pulses per revolution). Figure 46: Speed Performance Absolute Output Mode Incremental Output Mode 610rpm = 1024 samples / turn No missing pulses 1220rpm = 512 samples / turn @ 10 bit resolution (512ppr): 2441rpm = 256 samples / turn max. speed = 30000 rpm etc… Propagation Delays The propagation delay is the delay between the time that the sample is taken until it is converted and available as angular data. This delay is 48μs for the absolute interface and 192μs for the incremental interface. Using the SSI interface for absolute data transmission, an additional delay must be considered, caused by the asynchronous sampling (t = 0...1/f ) and the time it takes the s external control unit to read and process the data. Page 48 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Angular Output Tolerances Angular Error Caused by Propagation Delay A rotating magnet will therefore cause an angular error caused by the output delay. This error increases linearly with speed: (EQ8) e = rpm×6× prop⋅delay sampling Where: e = angular error [º] sampling rpm = rotating speed [rpm] prop delay = propagation delay [seconds] Note(s): Since the propagation delay is known, it can be automatically compensated by the control unit processing the data from the AS5040, thus reducing the angular error caused by speed. Internal Timing Tolerance The AS5040 does not require an external ceramic resonator or quartz. All internal clock timings for the AS5040 are generated by an on-chip RC oscillator. This oscillator is factory trimmed to ±5% accuracy at room temperature (±10% over full temperature range). This tolerance influences the ADC sampling rate and the pulse width of the PWM output: • Absolute Output; SSI Interface: A new angular value is updated every 100μs (typ) • Incremental outputs: the incremental outputs are updated every 100μs (typ.) • PWM output: A new angular value is updated every 100μs (typ.). The PWM pulse timings T and T also have the same on off tolerance as the internal oscillator. If only the PWM pulse width T is used to measure the on angle, the resulting value also has this timing tolerance. However, this tolerance can be canceled by measuring both T and T and calculating the angle from the duty on off cycle (see Incremental Outputs): t ⋅1025 (EQ9) Position = ----o--n--------------------–1 (t +t ) on off ams Datasheet Page 49 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Angular Output Tolerances Temperature Magnetic Temperature Coefficient One of the major benefits of the AS5040 compared to linear Hall sensors is that it is much less sensitive to temperature. While linear Hall sensors require a compensation of the magnet’s temperature coefficients, the AS5040 automatically compensates for the varying magnetic field strength over temperature. The magnet’s temperature drift does not need to be considered, as the AS5040 operates with magnetic field strengths from ±45mT to ±75mT. Example: A NdFeB magnet has a field strength of 75mT @ -40ºC and a temperature coefficient of -0.12% per Kelvin. The temperature change is from -40º to +125º = 165K. The magnetic field change is: 165 x -0.12% = -19.8%, which corresponds to 75mT at -40ºC and 60mT at 125ºC. The AS5040 can compensate for this temperature related field strength change automatically, no user adjustment is required. Accuracy Over Temperature The influence of temperature in the absolute accuracy is very low. While the accuracy is ≤ ±0.5º at room temperature, it may increase to ≤ ±0.9º due to increasing noise at high temperatures. Timing Tolerance Over Temperature The internal RC oscillator is factory trimmed to ±5%. Over temperature, this tolerance may increase to ±10%. Generally, the timing tolerance has no influence in the accuracy or resolution of the system, as it is used mainly for internal clock generation. The only concern to the user is the width of the PWM output pulse, which relates directly to the timing tolerance of the internal oscillator. This influence, however, can be canceled by measuring the complete PWM duty cycle (see Internal Timing Tolerance). Page 50 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Mechanical Data Mechanical Data The internal Hall elements are located in the center of the package on a circle with a radius of 1 mm. Figure 47: Hall Element Positions Note(s): 1. All dimensions in mm. 2. Die thickness 381μm nom. 3. Adhesive thickness 30 ± 15μm. 4. Leadframe downset 200 ± 38μm. 5. Leadframe thickness 152±8 μm. ams Datasheet Page 51 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Package Drawings & Markings Package Drawings & Markings Figure 48: 16-Lead Shrink Small Outline Package SSOP-16 Symbol Min Typ Max A 1.73 1.86 1.99 A1 0.05 0.13 0.21 A2 1.68 1.73 1.78 b 0.25 0.315 0.38 c 0.09 - 0.20 RoHS D 6.07 6.20 6.33 E 7.65 7.8 7.9 E1 5.2 5.3 5.38 e 0.65 Green L 0.63 0.75 0.95 L1 1.25 REF L2 0.25 BSC R 0.09 - - Θ 0º 4º 8º N 16 Note(s): 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles in degrees. 3. N is the total number of terminals. Page 52 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Package Drawings & Markings Figure 49: Package Marking Figure 50: Packaging Code YY WW M ZZ @ Last two digits of the Free choice/ Manufacturing week Plant identifier Sublot identifier manufacturing year traceability code JEDEC Package Outline Standard: MO - 150 AC Thermal Resistance R : th(j-a) typ. 151 K/W in still air, soldered on PCB IC's marked with a white dot or the letters "ES" denote Engineering Samples ams Datasheet Page 53 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Recommended PCB Footprint Recommended PCB Footprint Figure 51: Recommended PCB Footprint Figure 52: Recommended Footprint Data Recommended Footprint Data mm inch A 9.02 0.355 B 6.16 0.242 C 0.46 0.018 D 0.65 0.025 E 5.01 0.197 Page 54 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Ordering & Contact Information Ordering & Contact Information Figure 53: Ordering Information Ordering Code Package Marking Delivery Form Delivery Quantity AS5040-ASSM SSOP-16 AS5040 Tape & Reel 500 pcs/reel AS5040-ASST SSOP-16 AS5040 Tape & Reel 2000 pcs/reel Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbader Strasse 30 8141 Premstaetten Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com ams Datasheet Page 55 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − RoHS Compliant & ams Green Statement RoHS Compliant & ams Green RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor Statement products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Page 56 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Copyrights & Disclaimer Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services. ams Datasheet Page 57 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Document Status Document Status Document Status Product Status Definition Information in this datasheet is based on product ideas in the planning phase of development. All specifications are Product Preview Pre-Development design goals without any warranty and are subject to change without notice Information in this datasheet is based on products in the design, validation or qualification phase of development. Preliminary Datasheet Pre-Production The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Information in this datasheet is based on products in ramp-up to full production or full production which Datasheet Production conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Information in this datasheet is based on products which conform to specifications in accordance with the terms of Datasheet (discontinued) Discontinued ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Page 58 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Revision Information Revision Information Changes from 2-11 (2015-Nov-20) to current revision 2-12 (2017-Jun-20) Page Updated text under Incremental Mode Programming 32 Updated Figure 53 55 Note(s): 1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision. 2. Correction of typographical errors is not explicitly mentioned. ams Datasheet Page 59 [v2-12] 2017-Jun-20 DocumentFeedback

AS5040 − Content Guide Content Guide 1 General Description 2 Key Benefits & Features 2 Applications 3 Block Diagram 4 Pin Assignment 4 Pin Description 5 Mode 1.x: Quadrature A/B Output 5 Mode 2.x: Step / Direction Output 5 Mode 3.x: Brushless DC Motor Commutation Mode 7 Absolute Maximum Ratings 8 Electrical Characteristics 8 Operating Conditions 8 DC Characteristics for Digital Inputs and Outputs 8 CMOS Schmitt-Trigger Inputs: CLK, CSn (CSn = Internal Pull-Up) 9 CMOS / Program Input: Prog 9 CMOS Output Open Drain: MagINCn, MagDECn 10 CMOS Output: A, B, Index, PWM 10 Tristate CMOS Output: DO 11 Magnetic Input Specification 12 Electrical System Specifications 14 Timing Characteristics 14 Synchronous Serial Interface (SSI) 15 Pulse Width Modulation Output 15 Incremental Outputs 16 Programming Conditions 17 Functional Description 18 18 10-Bit Absolute Angular Position Output 18 Synchronous Serial Interface (SSI) 18 Data Content 21 Daisy Chain Mode 21 Programming Daisy Chained Devices 23 Incremental Outputs 23 Quadrature A/B Output (Quad A/B Mode) 23 LSB Output (Step/Direction Mode) 24 Incremental Power-Up Lock Option 25 Incremental Output Hysteresis 26 Pulse Width Modulation (PWM) Output 27 Analog Output 28 Brushless DC Motor Commutation Mode 29 Programming the AS5040 30 OTP Default Setting 32 Incremental Mode Programming 35 Zero Position Programming 35 Repeated OTP Programming 35 Non-Permanent Programming Page 60 ams Datasheet DocumentFeedback [v2-12] 2017-Jun-20

AS5040 − Content Guide 35 Analog Readback Mode 37 Alignment Mode 38 3.3V / 5V Operation 39 Choosing the Proper Magnet 40 Physical Placement of the Magnet 41 Magnet Placement 42 Simulation Modelling 44 Failure Diagnostics 44 Magnetic Field Strength Diagnosis 44 Power Supply Failure Detection 45 Angular Output Tolerances 45 Accuracy 46 Transition Noise 47 High Speed Operation 47 Sampling Rate 47 Absolute Mode with Serial Communication 48 Absolute Mode with PWM 48 Incremental Mode 48 Propagation Delays 49 Angular Error Caused by Propagation Delay 49 Internal Timing Tolerance 50 Temperature 50 Magnetic Temperature Coefficient 50 Accuracy Over Temperature 50 Timing Tolerance Over Temperature 51 Mechanical Data 52 Package Drawings & Markings 54 Recommended PCB Footprint 55 Ordering & Contact Information 56 RoHS Compliant & ams Green Statement 57 Copyrights & Disclaimer 58 Document Status 59 Revision Information ams Datasheet Page 61 [v2-12] 2017-Jun-20 DocumentFeedback

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