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DS uin ag l -l January 2016 Ce h-C ah na nn en Single-Channel: 6N137M, HCPL2601M, HCPL2611M l :e Hl: Dual-Channel: HCPL2630M, HCPL2631M C 6 PN 8-Pin DIP High-Speed 10 MBit/s Logic Gate Optocouplers L1 23 67 3M 0, Features Description M H , C • Very High Speed – 10 MBit/s The 6N137M, HCPL2601M, HCPL2611M single-channel HP • Superior CMR – 10 kV/µs and HCPL2630M, HCPL2631M dual-channel optocou- CL P2 • Fan-out of 8 Over -40°C to +85°C plers consist of a 850 nm AlGaAS LED, optically coupled L6 to a very high speed integrated photo-detector logic gate 20 • Logic Gate Output 61 with a strobable output. This output features an open col- 3M • Strobable Output lector, thereby permitting wired OR outputs. The 1M, H • Wired OR-open Collector switching parameters are guaranteed over the tempera- —C • Safety and Regulatory Approvals ture range of -40°C to +85°C. A maximum input signal of P – UL1577, 5,000 VACRMS for 1 Minute 5 mA will provide a minimum output sink current of 8-PL2 – DIN EN/IEC60747-5-5 13mA (fan out of 8). in61 Applications An internal noise shield provides superior common mode D1M rejection of typically 10 kV/µs. The HCPL2601M and IP • Ground Loop Elimination HCPL2631M has a minimum CMR of 5 kV/µs. The H • LSTTL to TTL, LSTTL or 5 V CMOS HCPL2611M has a minimum CMR of 10 kV/µs. i g • Line Receiver, Data Transmission h - S • Data Multiplexing p • Switching Power Supplies e e • Pulse Transformer Replacement d 1 • Computer-peripheral Interface 0 M B Schematics Package Outlines i t / s L o 8 8 gi c N/C 1 8 VCC + 1 8 VCC 1 1 G a t V e F1 O + 2 7 VE _ 2 7 V01 p t V 8 o F 8 c _ 3 6 VO _ 3 6 V02 1 1 oup Figure 2. Package Options l V e F2 r Truth Table (Positive Logic) s N/C4 5 GND + 4 5 GND Input Enable Output H H L 6N137M, HCPL2630M, L H H HCPL2601M, HCPL2631M H L H HCPL2611M L L H A 0.1µF bypass capacitor must be connected between pins 8 and 5(1). H NC L Figure 1. Schematics L NC H ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6

DS uin Safety and Insulation Ratings ag l -l Ce As per DIN EN/IEC 60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit h-C data. Compliance with the safety ratings shall be ensured by means of protective circuits. ah n a Parameter Characteristics nn en l < 150 VRMS I–IV : Hel: Installation Classifications per DIN VDE < 300 VRMS I–IV C 6 PN 0110/1.89 Table 1, For Rated Mains Voltage < 450 VRMS I–III L1 23 < 600 V I–III 67 RMS 3M Climatic Classification 40/100/21 0, M H Pollution Degree (DIN VDE 0110/1.89) 2 , C H P Comparative Tracking Index 175 CL P2 L6 20 61 Symbol Parameter Value Unit 3M 1, Input-to-Output Test Voltage, Method A, V x 1.6 = V , M H Type and Sample Test with t = 10 s, PartIiOaRl DMischarge <P R5 pC 1,335 Vpeak —C m P V PR 8L I1n0p0u%t-t oP-rOoduutpcutito Tne Tset sVt owltiathg et, M =e 1th so, dP Bar, tViaIlO DRiMs cxh 1a.r8g7e5 < = 5 V pPCR, 1,669 Vpeak -P26 m in1 VIORM Maximum Working Insulation Voltage 890 Vpeak D1M V Highest Allowable Over-Voltage 6,000 V IP IOTM peak External Creepage ≥ 8.0 mm H i g External Clearance ≥ 7.4 mm h - External Clearance (for Option TV, 0.4" Lead Spacing) ≥ 10.16 mm S p DTI Distance Through Insulation (Insulation Thickness) ≥ 0.5 mm e e TS Case Temperature(2) 150 °C d 1 I Input Current(2) 200 mA 0 S,INPUT M PS,OUTPUT Output Power (Duty Factor ≤ 2.7%)(2) 300 mW B R Insulation Resistance at T , V = 500 V(2) > 109 Ω it IO S IO / s Notes: L o 1. The V supply to each optoisolator must be bypassed by a 0.1 µF capacitor or larger. This can be either a ceramic g CC or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to ic the package VCC and GND pins of each device. G 2. Safety limit value - maximum values allowed in the event of a failure. a t e O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 2

DS uin Absolute Maximum Ratings ag l -l Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be Ce operable above the recommended operating conditions and stressing the parts to these levels is not recommended. h-C ah In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. n a The absolute maximum ratings are stress ratings only. T = 25°C unless otherwise specified. nn A en l :e Symbol Parameter Value Unit Hl: T Storage Temperature -40 to +125 °C C 6 STG PN T Operating Temperature -40 to +100 °C L1 OPR 23 TJ Junction Temperature -40 to +125 °C 637M TSOL Lead Solder Temperature 260 for 10 sec °C 0M, H Symbol Parameter Device Value Unit , C H P EMITTER CL P2 Single Channel 50 L6 I (avg) DC/Average Forward Input Current Per Channel mA 20 F 61 Dual Channel 30 3M V Enable Input Voltage Not to Exceed VCC Single Channel 5.5 V 1M, H E by more than 500 mV —C P V Reverse Input Voltage Per Channel All 5.0 V R 8L Single Channel 100 -P26 PI Input Power Dissipation Per Channel mW in1 Dual Channel 45 1 DM DETECTOR IP V Supply Voltage All -0.5 to 7.0 V H CC i g I (avg) Average Output Current Per Channel All 25 mA O h - I (pk) Peak Output Current Per Channel All 50 mA S O p V Output Voltage Per Channel All -0.5 to 7.0 V e O e Single Channel 85 d PO Output Power Dissipation Per Channel mW 1 Dual Channel 60 0 M B i t / s Recommended Operating Conditions L o The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended g operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not ic recommend exceeding them or designing to absolute maximum ratings. G a Symbol Parameter Min. Max. Unit t e V Supply Voltage 4.5 5.5 V O CC p IFL Input Current, Low Level 0 250 µA to IFH Input Current, High Level 6.3(3) 20.0 mA co u VEL Enable Voltage, Low Level 0 0.8 V p l V Enable Voltage, High Level 2.0 V V e EH CC r s T Ambient Operating Temperature -40 +85 °C A N Fan Out (TTL load) 8 Note: 3. 6.3 mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0 mA or less. ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 3

DS uin Electrical Characteristics ag l -l Ce Individual Component Characteristics (VCC = 5.5 V, TA = 0°C to 70°C unless otherwise specified) h-C ah Symbol Parameter Device Test Conditions Min. Typ. Max. Unit na nn EMITTER eln :e VF Input Forward Voltage All IF = 10 mA, TA = 25°C 1.45 1.70 V HCl: 6 IF = 10 mA 1.80 PN L1 B Input Reverse Breakdown All I = 10 µA 5.0 V 23 VR Voltage R 67 3M CIN Input Capacitance All VF = 0, f = 1 MHz 60 pF 0M, H ΔV / ΔT Temperature Coefficient of All I = 10 mA -1.4 mV/°C , HC F A Forward Voltage F P CL DETECTOR P2 L6 I = 10 mA, V = Open, 20 Single Channel F O 8 13 61 VE = 0.5 V 3M ICCL Logic Low Supply Current Dual Channel IF1 = IF2 = 10 mA, 14 21 mA 1M, H VO = Open —C P ICCH Logic High Supply Current Single Channel VIFE = = 0 0 m.5A V, VO = Open, 6 10 mA 8-P L26 Dual Channel I = 0 mA, V = Open, 10 15 in1 F O 1 DM IEL Low Level Enable Current Single Channel VE = 0.5 V -0.7 -1.6 mA IP IEH High Level Enable Current Single Channel VE = 2.0 V -0.5 -1.6 mA H V Low Level Enable Voltage Single Channel I = 10 mA(4) 0.8 V ig EL F h V High Level Enable Voltage Single Channel I = 10 mA 2.0 V - EH F S p Note: e e 4. Enable Input – No pull up resistor required as the device has an internal pull up resistor. d 1 0 M Transfer Characteristics (V = 5.5 V, T = -40°C to +85°C unless otherwise specified) B CC A i t Symbol Parameter Device Test Conditions Min. Typ. Max. Unit / s V = 0.6 V, V = 2.0 V, L I Input Threshold Current All O E 3 5 mA o FT IOL = 13 mA g i V = 5.5 V, I = 250 µA, c IOH HIGH Level Output Current All VO = 2.0 V F 100 µA G E a VOL LOW Level Output Voltage All IIF = =5 1m3A m, AVE = 2.0 V, 0.4 0.6 V te O OL p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 4

DS uin Electrical Characteristics (Continued) ag l -l Ce Switching Characteristics (VCC = 5 V, IF = 7.5 mA, TA = -40°C to +85°C unless otherwise specified) h-C ah Symbol Parameter Device Test Conditions Min. Typ. Max. Unit n a tPHL PTirmopea tgoa Ltioogni cD LeOlaWy All RTR(FALLi g===. 21335455°)00C ΩΩ(5,,) CC(FLLi g==. 111554 )ppFF,(5) 25 40 17050 ns nel: HCPnnel: 6N L1 R = 350 Ω, C = 15 pF, 23 Propagation Delay TAL = 25°C(6) (FLig. 14) 20 40 75 637M tPLH Time to Logic HIGH All RL = 350 Ω, CL = 15 pF(6) 100 ns 0M, H (Fig. 14) , C H P |t –t | Pulse Width Distortion All RL = 350 Ω, CL = 15 pF 1 35 ns CL PHL PLH (Fig. 14) P2 L6 Output Rise Time R = 350 Ω, C = 15 pF(7) 20 t All L L 30 ns 61 R (10% to 90%) (Fig. 14) 3M t Output Fall Time All RL = 350 Ω, CL = 15 pF(8) 10 ns 1M, H F (90% to 10%) (Fig. 14) —C P tEHL EDnealabyl eT Pimroep taog Oatuiotpnu t Single Channel CVE H= =1 53 .p5F V(9, )R (LF i=g .3 1550) Ω, 15 ns 8-P L26 LOW Level L in1 1 Enable Propagation DM t Delay Time to Output Single Channel VEH = 3.5 V, RL = 350 Ω, 15 ns IP ELH HIGH Level CL = 15 pF(10) (Fig. 15) H i g 6N137M, I = 0 mA, V = 50 V , 10,000 h HCPL2630M F CM PEAK - R = 350 Ω, T = 25°C(11) S Common Mode HCPL2601M, L A p (Fig. 16) 5000 10,000 e |CM | Transient Immunity HCPL2631M V/µs e H d at Logic High I = 0 mA, V = 400 V , F CM PEAK 1 HCPL2611M R = 350 Ω, T = 25°C(11) 10,000 15,000 0 L A (Fig. 16) M B 6N137M, i HCPL2630M VCM = 50 VPEAK, 10,000 t/s Common Mode HCPL2601M, RL = 350 Ω, TA = 25°C(11) L (Fig. 16) 5000 10,000 o |CML| Transient Immunity HCPL2631M V/µs g at Logic Low ic V = 400 V , CM PEAK HCPL2611M R = 350 Ω, T = 25°C(11) 10,000 15,000 G L A a (Fig. 16) t e O Notes: p 5. t – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current t PHL o pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. c 6. t – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current o PLH u pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. p 7. t – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. le R r 8. t – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. s F 9. t – Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input EHL voltage pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 10.t – Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input ELH voltage pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 11.Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge cm of the common mode pulse signal, V , to assure that the output will remain in a logic high state (i.e., V > 2.0 V). CM O Common mode transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge cm of the common mode pulse signal, V , to assure that the output will remain in a logic low state (i.e., V < 0.8 V). CM O ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 5

DS uin Electrical Characteristics (Continued) ag l -l Ce Isolation Characteristics (TA =25°C unless otherwise specified.) h-C ah Symbol Parameter Device Test Conditions Min. Typ. Max. Unit n a nn Relative Humidity ≤ 50%, en Withstand Insulation l VISO Test Voltage All IfI -=O 5≤0 1 H0z µ(1A2,) (t1 3=) 1 min, 5,000 VACRMS : HCel: 6 Resistance PN R All V = 500 V (12) 1011 Ω L1 I-O (Input to Output) I-O DC 23 67 Capacitance 3M CI-O (Input to Output) All f = 1 MHz, VI-O = 0 VDC(12) 1 pF 0M, H Input-Output Insulation Relative Humidity ≤ 45%, , C II-O Leakage Current All VI-I = 3000 VDC, t = 5 sec(12) 1.0 µA HCPL P2 Notes: L6 20 12.Device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted 61 together. 3M 1, 13. 5000 VACRMS for 1 minute duration is equivalent to 6000 VACRMS for 1 second duration. M H —C P 8L -P2 6 in1 1 DM IP H i g h - S p e e d 1 0 M B i t / s L o g i c G a t e O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 6

DS uin Typical Performance Curves ag l -l Ce For Single-Channel Devices: 6N137M, HCPL2601M, and HCPL2611M h-C ah n a 0.8 nn en )V( EGATLO 00..76 IVVFEC = C= 5 =2 m 5V.A5 V IOL = 12.8 mA )Am( TN 10 l: HCPel: 6N V TUP 0.5 IOL = 16 mA ERRU 1 L26137 TUO LEVEL WOL – 000...432 IOL = 9.6 mA IOL = 6.4 mA C DRAWROF – IF 00..011000 30M, HCPM, HCPL2 LO 0.1 L6 V 20 0.0 0.001 61 -40 -20 0 20 40 60 80 100 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 3M TA – AMBIENT TEMPERATURE (°C) VF – FORWARD VOLTAGE (V) 1M, H Figure 3. Low Level Output Voltage vs. Ambient Temperature Figure 4. Input Diode Forward Voltage vs. Forward Current —C P 8L 120 50 -P26 VCC = 5 V in1 )sn( Y 100 TA = 25°C )Am( TNER 45 IF = 15 mA DIP H1M ALED NOIT 6800 RL = 4 kΩ (tPLH) RL = 350 Ω (tPLH) RUC TUPT 3450 IF = 10 mA igh-S AG RL = 1 kΩ (tPLH) UO p AP LE IF = 5 mA e O 40 V 30 e RP – TP 20 RRRLLL === 413 5kk0ΩΩ Ω ((tt PP(tHHPLLH))L) EL WOL – LO 25 VVVCEO CL= = =2 0 5V. 6V V d 10 M 0 I 20 B 5 7 9 11 13 15 -40 -20 0 20 40 60 80 100 it IF – FORWARD CURRENT (mA) TA – AMBIENT TEMPERATURE (°C) /s Figure 5. Switching Time vs. Forward Current Figure 6. Low Level Output vs. Ambient Temperature L o g i c 4.0 6 G a )Am 3.5 VVCE C= =2 5V V 5 te ( T VOL = 0.6 V O NERRUC DLOHSERHT TUPNI – 3221....0505 RRRLLL === 3145 kk0ΩΩ Ω )V( EGATLOV TUPTUO – VO 1234 RL = 4 kΩ RL =R 3L5 =0 1Ω kΩ ptocouplers ITF 1.0 0 -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 TA – AMBIENT TEMPERATURE (°C) IF - FORWARD CURRENT (mA) Figure 7. Input Threshold Current vs. Ambient Temperature Figure 8. Output Voltage vs. Input Forward Current ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 7

DS uin Typical Performance Curves (Continued) ag l -l Ce For Single-Channel Devices: 6N137M, HCPL2601M, HCPL2611M h-C ah n a 60 500 nn en )sn( NOITR 5400 VIFC =C 7=. 55 mVA )sn( EM 400 IVFC =C 7=. 55 mVA RL = 4 kΩ (tR) l: HCPel: 6N OTSID HTDIW 3200 RL = 4 kΩ IT LLAF DNA E 320000 L2630M137M, H ESLUP – DWP 100 RRLL = = 1 3 k5Ω0 Ω SIR – t / tFR 1000 RRRRLLLL ==== 1341 5 kkk0ΩΩΩ Ω (((ttt RFF(t)))R) , HCPL2CPL260 -10-40 -20 0 20 40 60 80 100 -100-40 -20 0 2R0L = 350 Ω4 (0tF) 60 80 100 631M TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) 1M, H Figure 9. Pulse Width Distortion vs. Temperature Figure 10. Rise and Fall Time vs. Temperature —C P 8L )s 100 100 -P26 n( YALE VIFC =C 7=. 55 mVA 90 IVFC =C 7=. 55 mVA in D11M D NOITAGA 8600 RL = 4 kΩ (tELH) )sn( YALE 8700 RL = 4 kΩ (tPLH) IP Hig P D h ORP ELBANE – TE 4200 RRL L= =1 4k ΩkΩ (t E/ L1H k)Ω / R35L 0= Ω 3 5(t0E HΩL )(tELH) NOITAGAPORP – TP 65430000 RL = 350 ΩR (LtP =L H1) kΩ (tPLH) RRRLLL === 413 5kk0ΩΩ Ω ((tt PP(tHHPLLH))L) -Speed 10 M B 0 20 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 it TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) /s L Figure 11. Enable Propagation Delay vs. Temperature Figure 12. Switching Time vs. Temperature o g i c 1.6 G μ)A 1.4 VCC = 5 V at ( T VO = 5.5 V e NER 1.2 VIFE = = 2 25 0V μA O R p UC TU 1.0 toc PTU 0.8 ou O L p EV 0.6 le EL r HG 0.4 s IH – H 0.2 O I 0 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (°C) Figure 13. High Level Output Current vs. Temperature ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 8

DS uin Typical Performance Curves (Continued) ag l -l Ce For Dual-Channel Devices: HCPL2630M and HCPL2631M h-C ah n a )V( EGATLOV TUPTUO LEVEL WOL 0000000.......2345678 IVF C=C 5= m5.A5 V IOL I=O L1 =2 .68. 4m mAA IOL I=O L1 =6 9m.6A mA )Am( TNERRUC DRAWROF – 01.0100.01011 nel: HCPL2630M, Hnnel: 6N137M, HCP – VLO 0.1 IF CPL2 0.0 0.001 L6 -40 -20 0 20 40 60 80 100 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 20 61 TA – AMBIENT TEMPERATURE (°C) VF – FORWARD VOLTAGE (V) 3M Figure 14. Low Level Output Voltage vs. Ambient Temperature Figure 15. Input Diode Forward Voltage 1M, H vs. Forward Current —C P 120 50 8L )sn( YALED N 18000 VTAC C= = 2 55 °V C RL = 4 kΩ (TPLH) )Am( TNERRUC 4405 IIFF == 1105 mmAA -Pin DIP2611M OIT TU IF = 5 mA H AGAP 60 RL = 1 kΩ (TPLH) PTUO 35 igh ORP 40 RL = 350 Ω (TPLH) LEV 30 -S – TP 20 RRRLLL === 143 5kk0ΩΩ Ω(T PHL) EL WOL – 25 VVCOCL == 05. 6V V peed 05 7 9 11 13 15 ILO 20-40 -20 0 20 40 60 80 100 10 IF – FORWARD CURRENT (mA) TA – AMBIENT TEMPERATURE (°C) M B Figure 16. Switching Time vs. Forward Current Figure 17.Low Level Output Current i vs. Ambient Temperature t / s )Am 4 6 Lo ( TNERRUC DLOHS 3 VVCOCL == 50..06 VV RRLL = = 13 5kΩ0 Ω )V( EGATLOV T 345 RL = 4 k Ω RL = 350 Ω gic Gate O ER RL = 4 kΩ UP p HT T 2 TUO 2 to UPNI – – VO 1 RL = 1 kΩ cou ITF pl e 1 0 r -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 s TA – AMBIENT TEMPERATURE (°C) IF - FORWARD CURRENT (mA) Figure 18. Input Threshold Current Figure 19. Output Voltage vs. Input Forward Current vs. Ambient Temperature ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 9

DS uin Typical Performance Curves (Continued) ag l -l Ce For Dual-Channel Devices: HCPL2630M and HCPL2631M h-C ah n a 80 600 nn )s eln n :e ( NOIT 60 RL = 4 kΩ )sn( E 500 VIFC =C 7=. 55 mVA HCl: 6 ROTSID HT 40 IVFC =C 7=. 55 mVA MIT LLAF D 430000 RL = 4 kΩ(tr) PL263N137M DIW ESLUP – DWP 20 RL = 1 kΩ RL = 350 Ω NA ESIR – fT/rT 210000 RL = 35R0 LΩ = ( t1r )kΩ(tr) RRRLLL === 143 5kk0ΩΩ Ω( tf) 0M, HCPL, HCPL26 0 0 20 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 61 3M TA – TEMPERATURE (°C) TA – TEMPERATURE (°C) 1, M H Figure 20. Pulse Width Distortion vs. Temperature Figure 21.Rise and Fall Time vs. Temperature —C P 8L 120 )A 1.8 -P26 )sn( YALED NO 18000 RL = 4 kΩ (TPLH) IVFC =C 7=. 55 mVA μ( TNERRUC TUPT 1111....6420 VVIFCO =C = 2= 55 5.05. 5 μV AV in DIP Hig11M IT U h AGAPOR 60 RL = 1 kΩ (TPLH) O LEVEL 00..86 -Spe P – 40 RL = 350 Ω (TPLH) HG 0.4 ed TP RRLL == 14 kkΩΩ (TPHL) IH – H 0.2 10 20 RL = 350 Ω IO 0 M -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 B TA – TEMPERATURE (°C) TA – TEMPERATURE (°C) i t Figure 23. High Level Output Current / s Figure 22. Switching Time vs. Temperature vs. Temperature L o g i c G a t e O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 10

DS uin Test Circuits ag l -l Ce h-C ah Pulse na Generator nn tr = 5 ns en Z O = 50 Ω +5V l: Hel: C 6 I = 7.5 mA PN F V L1 1 CC 8 I(nI p )ut I F = 3.75 mA 2637 F 3M tPHL tPLH 0, 2 7 .1 μF R Output M H bypass L (VO ) 1.5 V , HCP Output CL IMnopnuittor 3 6 (VO ) Output 90% PL26 (I F ) CL (V ) 20 O 10% 61 47 4 5 3M GND tf tr 1M, H —C P 8L -P2 6 Figure 24. Test Circuit and Waveforms for tPLH, tPHL, trand tf in1 1 DM IP H Pulse i Generator Input g tr = 5 ns Monitor h Z O = 50 Ω (V E ) -S p +5V e e d 3.0 V 1 V Input 0 1 CC 8 (VE ) 1.5 V M B t t 7.5 mA EHL ELH i 2 7 .1 μF RL (OVuO t)put t/s bypass 1.5 V L Output o 3 6 g (VO ) i C c L G 4 5 a GND t e O p t o Figure 25. Test Circuit tEHLand tELH c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 11

DS uin Test Circuits (Continued) ag l -l Ce h-C ah n a V nn CC en 1 8 +5 V l :e Hl: C 6 A IF 2 7 .1 μF 350 Ω PLN1 bypass 23 B 67 3M Output VFF 3 6 (VO ) 0M, H , C H P 4 5 CL GND P2 L6 20 61 3M V CM 1, M H Pulse Gen —C P 8L -P2 6 Peak in1 1 DM IP VCM 0V H i g h - S 5V CMH p Switching Pos. (A), IF = 0 e VO e d VO (Min) 1 0 M V (Max) B O i t / Switching Pos. (B), I = 7.5 mA s VO F L 0.5 V CML o g i c G a t e Figure 26. Test Circuit Common Mode Transient Immunity O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 12

DS uin Reflow Profile ag l -l Ce h-C ah n a TP MMaxaixmimumum R Ramamp-pd-ouwp nR Rataet e= =3 °6C°C/S/S nelnn 260 :e 240 tP HCl: 6 220 TL PN L1 200 Tsmax 23 ) 180 Preheat Area tL 637M C 0, e (° 116400 Tsmin M, HC ur ts HP t 120 CL era 100 PL26 p 20 m 80 61 Te 60 31M, 40 M H —C 20 P 0 8L -P2 120 240 360 6 in1 Time 25°C to Peak D1M Time (seconds) IP H i g h - S p e Profile Freature Pb-Free Assembly Profile e d Temperature Min. (Tsmin) 150°C 1 0 Temperature Max. (Tsmax) 200°C M Time (tS) from (Tsmin to Tsmax) 60 to 120 s B i Ramp-up Rate (tL to tP) 3°C/second maximum t/s Liquidous Temperature (T ) 217°C L L o Time (t ) Maintained Above (T ) 60 to 150 s g L L i c Peak Body Package Temperature 260°C +0°C / –5°C G Time (t ) within 5°C of 260°C 30 s a P t e Ramp-down Rate (TP to TL) 6°C/s maximum O Time 25°C to Peak Temperature 8 minutes maximum p t o c Figure 27. Reflow Profile o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 13

DS uin Ordering Information ag l -l Ce Part Number Package Packing Method h-C ah 6N137M DIP 8-Pin Tube (50 units per tube) n a nn 6N137SM SMT 8-Pin (Lead Bend) Tube (50 units per tube) en l :e 6N137SDM SMT 8-Pin (Lead Bend) Tape and Reel (1,000 units per reel) Hl: 6N137VM DIP 8-Pin, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube) C 6 PN 6N137SVM SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option Tube (50 units per tube) L1 23 6N137SDVM SMT 8-Pin (Lead Bend), DIN EN/IEC 60747-5-5 Option Tape and Reel (1,000 units per reel) 67 3M 6N137TVM DIP 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube) 0, M H 6N137TSVM SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube) , C H P 6N137TSR2VM SMT 8-Pin, 0.4” Lead Spacing, DIN EN/IEC 60747-5-5 Option Tape and Reel (1,000 units per reel) CL P2 Note: L6 20 The product orderable part number system listed in this table also applies to the HCPL2601M, HCPL2611M, 61 3M HCPL2630M and HCPL2631M product families. 1, M H —C P 8L Marking Information -P2 6 in1 1 DM IP H 1 ig h - S 6N137 2 p e e V XX YY B 6 d 1 0 M B 3 4 5 i t / s Figure 28. Top Mark L o g i Definitions c G 1 Fairchild Logo a t e 2 Device Number O DIN EN/IEC60747-5-5 Option (only appears on component p 3 t ordered with this option) o c 4 Two Digit Year Code, e.g., ‘16’ o u 5 Two Digit Work Week Ranging from ‘01’ to ‘53’ p l e 6 Assembly Package Code r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 14

DS uin Carrier Tape Specifications (Option SD) ag l -l Ce D h-C 0 ah t P0 P2 E nnan K0 en l :e Hl: C 6 PN F L1 A0 23 W1 B0 W 637M 0, M H , C H P CL P P2 d UserDirectionofFeed D L6 1 20 61 3M 1, Symbol Description Dimension in mm M H —C W Tape Width 16.0 ± 0.3 P 8L t Tape Thickness 0.30 ± 0.05 -P2 6 P Sprocket Hole Pitch 4.0 ± 0.1 in1 0 1 DM D0 Sprocket Hole Diameter 1.55 ± 0.05 IP E Sprocket Hole Location 1.75 ± 0.10 H i F Pocket Location 7.5 ± 0.1 g h P2 2.0 ± 0.1 -S p P Pocket Pitch 12.0 ± 0.1 e e A0 Pocket Dimensions 10.30 ±0.20 d 1 B 10.30 ±0.20 0 0 K 4.90 ±0.20 M 0 B W1 Cover Tape Width 13.2 ± 0.2 it / d Cover Tape Thickness 0.1 Maximum s L Maximum Component Rotation or Tilt 10° o g R Minimum Bending Radius 30 i c G a t e O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 15

DS uin Carrier Tape Specifications (Option TSR2) ag l -l Ce D h-C 0 ah t P0 P2 E nnan K0 en l :e Hl: C 6 PN F L1 A0 23 W1 B0 W 637M 0, M H , C H P CL P P2 d UserDirectionofFeed D L6 1 20 61 3M 1, Symbol Description Dimension in mm M H —C W Tape Width 24.0 ± 0.3 P 8L t Tape Thickness 0.40 ± 0.1 -P2 6 P Sprocket Hole Pitch 4.0 ± 0.1 in1 0 1 DM D0 Sprocket Hole Diameter 1.55 ± 0.05 IP E Sprocket Hole Location 1.75 ± 0.10 H i F Pocket Location 11.5 ± 0.1 g h P2 2.0 ± 0.1 -S p P Pocket Pitch 16.0 ± 0.1 e e A0 Pocket Dimensions 12.80 ± 0.1 d 1 B 10.35 ± 0.1 0 0 K 5.7 ±0.1 M 0 B W1 Cover Tape Width 21.0 ± 0.1 it / d Cover Tape Thickness 0.1 Maximum s L Maximum Component Rotation or Tilt 10° o g R Minimum Bending Radius 30 i c G a t e O p t o c o u p l e r s ©2009 Fairchild Semiconductor Corporation www.fairchildsemi.com 6N137M, HCPL26XXM Rev. 1.6 16

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: 6N137SDM 6N137SM 6N137SVM 6N137SDVM 6N137TSR2VM 6N137TSVM 6N137M 6N137VM 6N137TVM