TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 TM 4.5V to 18V Input, 2-A Synchronous Step-Down SWIFT Converter CheckforSamples:TPS54225 FEATURES 1 DESCRIPTION • D-CAP2™ModeEnablesFastTransient 23 Response The TPS54225 is an adaptive on-time D-CAP2™ • LowOutputRippleandAllowsCeramicOutput mode synchronous buck converter. The TPS54225 Capacitor enables system designers to complete the suite of various end equipment’s power bus regulators with a • WideV InputVoltageRange:4.5Vto18V CC cost effective, low component count, low standby • WideVINInputVoltageRange:2Vto18V current solution. The main control loop for the • OutputVoltageRange:0.76Vto5.5V TPS54225 uses the D-CAP2™ mode control which provides a fast transient response with no external • HighlyEfficientIntegratedFET’sOptimized compensationcomponents. forLowerDutyCycleApplications -160mΩ(HighSide)and110mΩ (LowSide) The TPS54225 also has a proprietary circuit that enables the device to adapt to both low equivalent • HighEfficiency,lessthan10μAatshutdown series resistance (ESR) output capacitors, such as • HighInitialBandgapReferenceAccuracy POSCAP or SP-CAP, and ultra-low ESR ceramic • AdjustableSoftStart capacitors. The device operates from 4.5-V to 18-V • Pre-BiasedSoftStart VCC input , and from 2-V to 18-V VIN input power supply voltage. The output voltage can be • 700-kHzSwitchingFrequency(f ) SW programmed between 0.76 V and 5.5 V. The device • Cycle-By-CycleOvercurrentLimit also features an adjustable slow start time and a • PowerGoodOutput power good function. The TPS54225 is available in the 14 pin HTSSOP package, and designed to APPLICATIONS operatefrom–40°Cto85°C. • WideRangeofApplicationsforLowVoltage System – DigitalTVPowerSupply – HighDefinitionBlu-rayDisc™Players – NetworkingHomeTerminal – DigitalSetTopBox(STB) space VOUT(50 mV/div) IOUT(1A/div) 100ms/div 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. D-CAP2,PowerPADaretrademarksofTexasInstruments. 2 Blu-rayDiscisatrademarkofBlu-rayDiscAssociation. 3 PRODUCTIONDATAinformationiscurrentasofpublicationdate. ©2009–2011,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. ORDERINGINFORMATION(1) T PACKAGE(2) (3) ORDERABLEPARTNUMBER TRANSPORT A MEDIA PowerPAD™ TPS54225PWP Tube –40°Cto85°C (HTSSOP)–PWP(14Pins) TPS54225PWPR TapeandReel (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging. (3) AllpackageoptionshaveCuNIPDAUlead/ballfinish. ABSOLUTE MAXIMUM RATINGS overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) VALUE UNIT V ,V ,EN –0.3to20 V IN CC V –0.3to26 V BST V (vsSW1,SW2) –0.3to6.5 V BST V Inputvoltagerange I V ,V ,SS,PG –0.3to6.5 V FB O SW1,SW2 –2to20 V SW1,SW2(10nstransient) –3to20 V V –0.3to6.5 V REG5 V Outputvoltagerange O P ,P –0.3to0.3 V GND1 GND2 V VoltagefromGNDtoPOWERPAD –0.2to0.2 V diff HumanBodyModel(HBM) 2 kV ESDrating Electrostaticdischarge ChargedDeviceModel(CDM) 500 V T Operatingjunctiontemperature –40to150 °C J T Storagetemperature –55to150 °C stg (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. THERMAL INFORMATION TPS54225 THERMALMETRIC(1) PWP UNITS 14PINS θ Junction-to-ambientthermalresistance 55.6 JA θ Junction-to-case(top)thermalresistance 51.3 JCtop θ Junction-to-boardthermalresistance 26.4 JB °C/W ψ Junction-to-topcharacterizationparameter 1.8 JT ψ Junction-to-boardcharacterizationparameter 20.6 JB θ Junction-to-case(bottom)thermalresistance 4.3 JCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 2 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyinputvoltagerange 4.5 18 V CC V Powerinputvoltagerange 2 18 V IN V –0.1 24 BST V (vsSW1,SW2) –0.1 5.7 BST SS,PG –0.1 5.7 EN –0.1 18 V Inputvoltagerange V I V ,V –0.1 5.5 O FB SW1,SW2 –1.8 18 SW1,SW2(10nstransient) –3 18 P ,P –0.1 0.1 GND1 GND2 V Outputvoltagerange V –0.1 5.7 V O REG5 I Outputcurrentrange I 0 10 mA O VREG5 T Operatingfree-airtemperature –40 85 °C A T Operatingjunctiontemperature –40 125 °C J ELECTRICAL CHARACTERISTICS overoperatingfree-airtemperaturerange,V ,V =12V(unlessotherwisenoted) CC IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SUPPLYCURRENT Operating-non-switchingsupply V current,T =25°C,EN=5V, I CC A 800 1200 μA VCC current V =0.8V FB I Shutdownsupplycurrent V current,T =25°C,EN=0V 1.8 10 μA VCCSDN CC A LOGICTHRESHOLD V ENhigh-levelinputvoltage EN 2 V ENH V ENlow-levelinputvoltage EN 0.4 V ENL V VOLTAGEANDDISCHARGERESISTANCE FB T =25°C,V =1.05V 757 765 773 A O V Thresholdvoltage T =0°Cto85°C,V =1.05V(1) 753 777 mV FB A O T =-40°Cto85°C,V =1.05V(1) 751 779 A O I Inputcurrent V =0.8V,T =25°C 0 ±0.1 μA VFB FB A R V dischargeresistance EN=0V,V =0.5V,T =25°C 50 100 Ω Dischg O O A V OUTPUT REG5 T =25°C,6V<V <18V, V Outputvoltage A CC 5.3 5.5 5.7 V VREG5 0<I <5mA VREG5 V Lineregulation 6V<V <18V,I =5mA 20 mV LN5 CC VREG5 V Loadregulation 0mA<I <5mA 100 mV LD5 VREG5 I Outputcurrent V =6V,V =4V,T =25°C 70 mA VREG5 CC REG5 A MOSFET R Highsideswitchresistance 25°C,V -SW1,SW2=5.5V 160 mΩ DS(on)h BST R Lowsideswitchresistance 25°C 110 mΩ DS(on)l CURRENTLIMIT I Currentlimit L =2.2µH (1) 2.5 3.1 4.5 A ocl OUT THERMALSHUTDOWN Shutdowntemperature (1) 150 T Thermalshutdownthreshold °C SDN Hysteresis (1) 25 ON-TIMETIMERCONTROL (1) SpecifiedbyDesign(notproductiontested). ©2009–2011,TexasInstrumentsIncorporated 3 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overoperatingfree-airtemperaturerange,V ,V =12V(unlessotherwisenoted) CC IN PARAMETER TESTCONDITIONS MIN TYP MAX UNIT t Ontime V =12V,V =1.05V 145 ns ON IN O t Minimumofftime T =25°C,V =0.7V 260 310 ns OFF(MIN) A FB SOFTSTART I Chargecurrent V =0V 1.4 2 2.6 μA SSC SS I Dischargecurrent V =0.5V 0.1 0.2 mA SSD SS POWERGOOD V rising(good) 85 90 95 FB V Threshold % THPG V falling(fault) 85 FB I Sinkcurrent PG=0.5V 2.5 5 mA PG OUTPUTUNDERVOLTAGEANDOVERVOLTAGEPROTECTION V OutputOVPtripthreshold OVPdetect 115 120 125 % OVP t OutputOVPpropdelay 5 μs OVPDEL UVPdetect 65 70 75 V OutputUVPtripthreshold % UVP Hysteresis 10 t OutputUVPdelay 0.25 ms UVPDEL t OutputUVPenabledelay Relativetosoft-starttime x1.7 UVPEN UVLO WakeupV voltage 3.55 3.8 4.05 REG5 UVLO UVLOthreshold V HysteresisV voltage 0.23 0.35 0.47 REG5 DEVICE INFORMATION PWPPACKAGE (TOPVIEW) 1 VO VCC 14 2 VFB VIN 13 3 VREG5 VBST 12 4 SS POWER PAD SW2 11 5 GND SW110 6 PG PGND2 9 7 EN PGND1 8 4 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 PINFUNCTIONS PIN DESCRIPTION NAME NO. VO 1 Connecttooutputofconverter.ThispinisusedforOn-TimeAdjustment. VFB 2 Converterfeedbackinput.Connectwithfeedbackresistordivider. VREG5 3 5.5Vpowersupplyoutput.Acapacitor(typical1μF)shouldbeconnectedtoGND. SS 4 Soft-startcontrol.AexternalcapacitorshouldbeconnectedtoGND. GND 5 Signalgroundpin PG 6 Opendrainpowergoodoutput EN 7 Enablecontrolinput Groundreturnsforlow-sideMOSFET.Alsoserveasinputsofcurrentcomparators.ConnectPGNDand PGND1,PGND2 8,9 GNDstronglytogetherneartheIC. Switchnodeconnectionbetweenhigh-sideNFETandlow-sideNFET.Alsoserveasinputstocurrent SW1,SW2 10,11 comparators. Supplyinputforhigh-sideNFETgatedriver(boostterminal).Connectcapacitorfromthispinto VBST 12 respectiveSW1,SW2terminals.AninternalPNdiodeisconnectedbetweenVREG5toVBSTpin. VIN 13 PowerinputandconnectedtohighsideNFETdrain VCC 14 Supplyinputfor5Vinternallinearregulatorforthecontrolcircuitry Thermalpadofthepackage.Mustbesolderedtoachieveappropriatedissipation.Shouldbeconnected PowerPAD™ Backside toPGND. ©2009–2011,TexasInstrumentsIncorporated 5 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com FunctionalBlockDiagram -30% UV 14 VCC VIN VIN OV 13 1 VO +20% VREG5 VBST 12 Control logic Ref SS 1shot SW VO 2 11 VFB XCON 10 SGND VREG5 VREG5 Ceramic 3 Capacitor SS 1mF 4 9 8 PGND Softstart SW PGND SS ZC PGND 5 GND SW OCP SGND Ref PGND VCC 6 PG -10% UV VREG5 OV Protection UVLO UVLO Logic EN EN 7 TSD Logic REF Ref OVERVIEW The TPS54225 is a 2-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESRoutputcapacitorsincludingceramicandspecialpolymertypes. DETAILED DESCRIPTION PWMOperation The main control loop of the TPS54225 is an adaptive on-time pulse width modulation (PWM) controller that supports a proprietary D-CAP2™ mode control. D-CAP2™ mode control combines constant on-time control with an internal compensation circuit for pseudo-fixed frequency and low external component count configuration with bothlowESRandceramicoutputcapacitors.Itisstableevenwithvirtuallynorippleattheoutput. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one 6 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 shot timer expires. This one shot timer is set by the converter input voltage ,VIN, and the output voltage ,V , to O maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage. An internal ramp is added to the reference voltage to simulate output ripple, eliminating the needforESRinducedoutputripplefromD-CAP2™modecontrol. PWMFrequencyandAdaptiveOn-TimeControl TPS54225 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The TPS54225 runs with a pseudo-constant frequency of 700 kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the outputvoltage.Theactualfrequencymayvaryfrom700kHzdependingontheofftime,whichisendedwhenthe fedbackportionoftheoutputvoltagefallstotheV thresholdvoltage. FB SoftStartandPre-BiasedSoftStart The soft start function is adjustable. When the EN pin becomes high, 2-μA current begins charging the capacitor which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up. The equation for the slow start time is shown in Equation 1. VFB voltage is 0.765 V and SS pin source current is 2μA. C6(nF)•Vref C6(nF)•0.765 Tss(ms) = − = − Iss(µA) 2 (1) A unique circuit to prevent current from being pulled from the output during startup if the output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start becomes greater than feedback voltage V ), the controller slowly activates synchronous rectification by starting the first low side FET FB gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This scheme prevents the initial sinking of the pre-bias output, and ensure that the out voltage (VO) starts and ramps up smoothly into regulationandthecontrolloopisgiventimetotransitionfrompre-biasedstart-uptonormalmodeoperation. PowerGood The power good function is activated after soft start has finished. The power good function becomes active after 1.7 times soft-start time. When the output voltage is within –10% of the target value, internal comparators detect power good state and the power good signal becomes high. Rpg resister value, which is connected between PG and VREG5, is required from 20 kΩ to 150 kΩ. If the feedback voltage goes under 15% of the target value, the powergoodsignalbecomeslowaftera10msinternaldelay. OutputDischargeControl The TPS54225 discharges the output when EN is low, or the controller is turned off by the protection functions (OVP, UVP, UVLO and thermal shutdown). The output is discharged by an internal 50-Ω MOSFET which is connected from VO to PGND. The internal low-side MOSFET is not turned on during the output discharge operationtoavoidthepossibilityofcausingnegativevoltageattheoutput. CurrentProtection The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SW pin and GND. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated. During the on time of the high-side FET switch, the switch current increases at a linear rate determined by Vin, Vout, the on-time, and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current Iout. If the measured voltage is above the voltage proportional to the current limit, then the device constantly monitors the low-side FET switch voltage,whichisproportionaltotheswitchcurrent,duringthelow-sideon-time. The converter maintains the low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching cycle begins. In subsequent switchingcycles,theon-timeissettoafixedvalueandthecurrentismonitoredinthesamemanner. ©2009–2011,TexasInstrumentsIncorporated 7 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com There are some important considerations for this type of over-current protection. The load current one half of the peak-to-peak inductor current higher than the over-current threshold. Also when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. This may cause the output under-voltage protection circuit to be activated. When the over current conditionisremoved,theoutputvoltagewillreturntotheregulatedvalue.Thisprotectionisnon-latching. Over/UndervoltageProtection The TPS54225 detects over and undervoltage conditions by monitoring the feedback voltage (VFB). This function is enabled after approximately 1.7 times the soft-start time.When the feedback voltage becomes higher than 120% of the target voltage, the OVP comparator output goes high and the circuit latches the high-side MOSFET driver turns off and the low-side MOSFET turns on. When the feedback voltage becomes lower than 70% of the target voltage, the UVP comparator output goes high and an internal UVP delay counter begins. After 250μs,thedevicelatchesoffbothinternaltopandbottomMOSFET. UVLOProtection Undervoltage lock out protection (UVLO) monitors the voltage of the V pin. When the V voltage is lower REG5 REG5 thanUVLOthresholdvoltage,theTPS54225isshutoff.Thisisprotectionisnon-latching. ThermalShutdown Thermal protection is self-activating. If the junction temperature exceeds the threshold value (typically 150°C), theTPS54225shutsoff.Thisprotectionisnon-latching. 8 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 TYPICAL CHARACTERISTICS 1200 8 1000 A m Am nt - 6 nt - 800 urre e C Curr wn y 600 do 4 SupplC 400 - ShutN C D IV CS 2 C V 200 I 0 0 -50 0 50 100 150 -50 0 50 100 150 T - Junction Temperature - °C T - Junction Temperature - °C J J Figure1.V TEMPERATUREvs.JUNCTION Figure2.V SHUTDOWNCURRENTvs.JUNCTION CC CC TEMPERATURE TEMPERATURE 100 1.1 80 1.075 V V = 18 V Am e - I ent - 60 oltag Curr ut V 1.05 put 40 Outp VI= 12 V VI= 5.5 V N In - T E U O V 1.025 20 0 1 0 5 10 15 20 0 0.5 1 1.5 2 EN Input Voltage - V I - Output Current -A out Figure3.ENCURRENTvs.ENVOLTAGE Figure4.1.05-VOUTPUTVOLTAGEvs.OUTPUT CURRENT ©2009–2011,TexasInstrumentsIncorporated 9 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 1.1 V - 50 mV/div OUT 1.075 V e - IO= 0A g a olt V ut 1.05 p Out IO= 1A IOUT- 2A/div - T U O V 1.025 100ms/div 1 0 5 10 15 20 V - Input Voltage - V IN Figure5.1.05-VOUTPUTVOLTAGEvsINPUTVOLTAGE Figure6.1.05-V,0-ATO2-A-LOADTRANSIENT RESPONSE 100 V = 3.3 V O EN - 10 V/div 90 V = 2.5 V 80 O VOUT- 0.5 V/div % VO= 1.8 V y - c n 70 e ci Effi 60 PG - 5 V/div 50 400ms/div 40 0 0.5 1 1.5 2 I - Output Current -A OUT Figure7.START-UPWAVEFORM Figure8.EFFICIENCYvs.OUTPUTCURRENT 10 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 TYPICAL CHARACTERISTICS (continued) 900 900 ncy - kHz 800 ncy - kHz 800 que VO= 1.8 V que VO= 1.8 V Fre 700 Fre 700 g g n n hi hi witc witc V = 3.3 V S S O - w 600 - w 600 fs VO= 3.3 V fs 500 500 0 5 10 15 20 0 0.5 1 1.5 2 V - Input Voltage - V I - Output Current -A IN O Figure9.SWICHINGFREQUENCYvs.INPUTVOLTAGE Figure10.SWITCHINGFREQUENCYvs.OUTPUT CURRENT V = 1.05 V V = 1.05 V O O VO- 10 mV/div VIN- 50 mV/div SW - 5 V/div SW - 5 V/div Figure11.VOLTAGERIPPLEATOUTPUT Figure12.VOLTAGERIPPLEATINPUT ©2009–2011,TexasInstrumentsIncorporated 11 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com DESIGN GUIDE StepByStepDesignProcedure Tobeginthedesignprocess,thefollowingapplicationparametersmustbeknown: • Inputvoltagerange • Outputvoltage • Outputcurrent • Outputvoltageripple • Inputvoltageripple VIN 4.5 to 18V U1 VOUT TPS542225PWP 1.05V, 2A 14 10 VCC SW1 13 11 VIN SW2 1 12 VO VBST 2 6 VFB PG 4 3 SS VREG5 7 8 EN PGND1 5 9 GND PGND2 PwPd 15 Figure13. SchematicDiagram OutputVoltageResistorsSelection The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use 1%toleranceorbetterdividerresistors.StartbyusingEquation2andEquation3tocalculateV . OUT To improve efficiency at light loads consider using larger value resistors, too high of resistance is more susceptibletonoiseandvoltageerrorsfromtheVFBinputcurrentismorenoticeable. Foroutputvoltagefrom0.76Vto2.5V: ( R1) VOUT=0.765 • 1 + −R2 (2) Foroutputvoltageover2.5V: VOUT=(0.763 + 0.0017 •VOUT)•(1 + −RR21) (3) Where: V =TargetV voltage OUT_SET OUT OutputFilterSelection TheoutputfilterusedwiththeTPS54225isanLCcircuit.ThisLCfilterhasdoublepoleat: 1 F = P 2p L ´C OUT OUT (4) 12 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54225. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a -40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to -20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the valuesrecommendedinTable1. Table1.RecommendedComponentValues OUTPUTVOLTAGE R1(kΩ) R2(kΩ) C4(pF)(1) L1(µH) C8+C9(µF) (V) 1 6.81 22.1 2.2 22-68 1.05 8.25 22.1 2.2 22-68 1.2 12.7 22.1 2.2 22-68 1.8 30.1 22.1 10-47 3.3 22-68 2.5 49.9 22.1 10-47 3.3 22-68 3.3 73.2 22.1 10-47 3.3 22-68 5 121 22.1 10-47 4.7 22-68 (1) Optional For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor(C4)inparallelwithR1. The inductor peak-to-peak ripple current, peak current, and RMS current are calculated using Equation 5, Equation 6, and Equation 7. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 700 kHz for f . SW MakesurethechoseninductorisratedforthepeakcurrentofEquation6andtheRMScurrentofEquation7. V V - V Ilp - p = OUT • IN (max) OUT V L •f IN (max) O SW (5) Ilp - p I = I +  lpeak O 2 (6) − √ 1 I = I 2+ −Ilp - p2 Lo(RMS) O 12 (7) For this design example, the calculated peak current is 2.23 A and the calculated RMS current is 2.01 A. The inductor used is a TDK SPM6530-2R2M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A. The capacitor value and ESR determines the amount of output voltage ripple. The TPS54225 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22 µF to 68 µF. Use Equation 8 to determinetherequiredRMScurrentratingfortheoutputcapacitor. V • (V - V ) I =−−OUT IN OUT CO(RMS) √12 •V •L •f IN O SW (8) For this design two TDK C3216X5R0J226M 22 µF output capacitors are used. The typical ESR is 2 mΩ each. ThecalculatedRMScurrentis0.271Aandeachoutputcapacitorisratedfor4A. InputCapacitorSelection The TPS54225 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. A ceramic capacitor over 10 μF is recommended for the decoupling capacitor. An additional 0.1 µF capacitor from pin 14 to ground is recommended to improve the stability of the over-current limit function. The capacitorvoltageratingneedstobegreaterthanthemaximuminputvoltage. ©2009–2011,TexasInstrumentsIncorporated 13 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com BootstrapCapacitorSelection A 0.1 µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommendedtouseaceramiccapacitor. VREG5CapacitorSelection A 1.0 µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommendedtouseaceramiccapacitor. THERMAL INFORMATION ThisPowerPAD™packageincorporatesanexposedthermalpadthatisdesignedtobeconnectedtoanexternal heatsink. The thermal pad must be soldered directly to the printed board (PCB). After soldering, the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to the appropriate copper plane shown in the electrical schematic for the device, or alternatively, can be attached to a special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit(IC). For additional information on the PowerPAD™ package and how to use the advantage of its heat dissipating abilities, refer to Technical Breif, PowerPAD™ Thermally Enhanced Package, Texas Instruments Literature No. SLMA002andApplicationBrief,PowerPAD™MadeEasy,TexasInstrumentsLiteratureNo.SLMA004. Theexposedthermalpaddimensionsforthispackageareshowninthefollowingillustration. 14 8 Thermal Pad 2.46 ° 1 7 2.31 Figure14. ThermalPadDimensions 14 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

TPS54225 www.ti.com SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 LAYOUT CONSIDERATIONS 1. Keeptheinputswitchingcurrentloopassmallaspossible. 2. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedbackpinofthedevice. 3. Keepanalogandnon-switchingcomponentsawayfromswitchingcomponents. 4. Makeasinglepointconnectionfromthesignalgroundtopowerground. 5. Donotallowswitchingcurrenttoflowunderthedevice. 6. KeepthepatternlinesforVINandPGNDbroad. 7. ExposedpadofdevicemustbeconnectedtoPGNDwithsolder. 8. VREG5capacitorshouldbeplacednearthedevice,andconnectedPGND. 9. OutputcapacitorshouldbeconnectedtoabroadpatternofthePGND. 10. Voltagefeedbackloopshouldbeasshortaspossible,andpreferablywithgroundshield. 11. LowerresistorofthevoltagedividerwhichisconnectedtotheVFBpinshouldbetiedtoSGND. 12. ProvidingsufficientviaispreferableforVIN,SWandPGNDconnection. 13. PCBpatternforVIN,SW,andPGNDshouldbeasbroadaspossible. 14. IfVINandVCCisshorted,VINandVCCpatternsneedtobeconnectedwithbroadpatternlines. 15. VINCapacitorshouldbeplacedasnearaspossibletothedevice. VCC INPUT BYPASS CAPACITOR Additional VCC Thermal VIN Vias VIN INPUT FREEESDISBTAOCRKS VOUT VCC BCYAPPAASCSITOR VFB VIN BOOST VREG5 VBST CAPACITOR VOUT BIAS SS SW1 CAP GND SW2 OUTPUT INDUCTOR OUTPUT SLOW PG EXPOSED PGND1 FILTER SCTAAPRT EN PAOREWAERPAD PGND2 CAPACITOR Connection to POWER GROUND on internal or ANALOG Additional bottom layer GROUND Thermal TRACE Vias To Enable Control POWER GROUND VIAto Ground Plane Etch on Bottom Layer or Under Component Figure15. TPS54225Layout ©2009–2011,TexasInstrumentsIncorporated 15 ProductFolderLink(s):TPS54225

TPS54225 SLVSA15C–OCTOBER2009–REVISEDFEBRUARY2011 www.ti.com REVISION HISTORY ChangesfromOriginal(October2009)toRevisionA Page • ChangedthedevicefromProductPreviewtoProduction .................................................................................................... 1 ChangesfromRevisionA(October2009)toRevisionB Page • ChangedTPS54225PWPRtapeandreelquantityFrom:3000To:2000 ............................................................................ 2 • AddedV ,V =12VtotheconditionsstatementintheElectricalCharacteristicstable ................................................... 3 CC IN • AddedNote1toTable1..................................................................................................................................................... 13 ChangesfromRevisionB(October2010)toRevisionC Page • Changed–45°Cto85°Cto–40°Cto85°CinOrderingInformation ..................................................................................... 2 • DeletedquantityfromTransportMediacolumn .................................................................................................................... 2 • AddedThermalInformationtable ......................................................................................................................................... 2 • AddedI rowtotheROCtable ............................................................................................................................................. 3 O • ChangedFunctionalBlockDiagram ..................................................................................................................................... 6 • ChangedTPS54326toTPS54225inPWMFrequencyandAdaptiveOn-TimeControlsection ......................................... 7 • ChangedPowerGoodsectiontext ....................................................................................................................................... 7 • ChangedCurrentProtectionsectiontext .............................................................................................................................. 7 • ChangedTPS54326toTPS54225 ....................................................................................................................................... 8 • ChangedDesignGuideinformation.................................................................................................................................... 12 • ChangedC4valuesinTable1 ........................................................................................................................................... 13 16 ©2009–2011,TexasInstrumentsIncorporated ProductFolderLink(s):TPS54225

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54225PWP ACTIVE HTSSOP PWP 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54225 & no Sb/Br) TPS54225PWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 85 PS54225 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF TPS54225 : •Automotive: TPS54225-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 18-Oct-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54225PWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 18-Oct-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54225PWPR HTSSOP PWP 14 2000 350.0 350.0 43.0 PackMaterials-Page2

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