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ICGOO电子元器件商城为您提供LM95235EIMM/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LM95235EIMM/NOPB价格参考¥10.97-¥22.37。Texas InstrumentsLM95235EIMM/NOPB封装/规格:温度传感器 - 模拟和数字输出, 温度传感器 数字,本地/远程 -40°C ~ 90°C 10 b(本地),12 b(远程) 8-VSSOP。您可以下载LM95235EIMM/NOPB参考资料、Datasheet数据手册功能说明书,资料中有LM95235EIMM/NOPB 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)热管理产品

描述

IC TEMP SNSR PREC REMOTE 8VSSOP板上安装温度传感器 Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm? Technology 8-VSSOP -40 to 90

产品分类

PMIC - 热管理

品牌

Texas Instruments

产品手册

http://www.ti.com/lit/gpn/lm95235

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

板上安装温度传感器,Texas Instruments LM95235EIMM/NOPBTruTherm®

数据手册

点击此处下载产品Datasheet

产品型号

LM95235EIMM/NOPB

产品目录页面

点击此处下载产品Datasheet

产品种类

板上安装温度传感器

传感器类型

内部和外部

供应商器件封装

8-VSSOP

关闭

Shutdown

其它名称

LM95235EIMM/NOPBTR
LM95235EIMMNOPB

准确性

+/- 1 C

功能

温度监控系统(传感器)

包装

带卷 (TR)

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

8-TSSOP,8-MSOP(0.118",3.00mm 宽)

封装/箱体

VSSOP-8

工作温度

-40°C ~ 90°C

工厂包装数量

1000

感应温度

-40°C ~ 90°C

拓扑

ADC(三角积分型),比较器,寄存器库

数字输出-位数

11 bit

数字输出-总线接口

2-Wire, I2C, SMBus

最大工作温度

+ 125 C

最小工作温度

- 40 C

标准包装

1,000

电压-电源

3 V ~ 3.6 V

电源电压-最大

3.6 V

电源电压-最小

3 V

电源电流

350 uA

精度

±2°C 本地(最大), ±5°C 远程(最大)

系列

LM95235

设备功能

Temperature Sensor

输出报警

输出电流

10 uA

输出类型

Digital

输出风扇

配用

/product-detail/zh/LM95235EVAL%2FNOPB/LM95235EVAL%2FNOPB-ND/1640833

配置

Remote

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PDF Datasheet 数据手册内容提取

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm™ Technology CheckforSamples:LM95235,LM95235-Q1 FEATURES KEY SPECIFICATIONS 1 • RemoteandLocalTemperatureChannels • SupplyVoltage3.0to3.6V 2 • TruThermBJTBetaCompensationTechnology • SupplyCurrent,Conv.Rate=1Hz350µA(typ) • LM95235QisAEC-Q100Grade3Compliant • RemoteDiodeTemperatureAccuracy andisManufacturedonanAutomotiveGrade – T =25°Cto85°C;T =60°Cto100°C,±0.75 A D Flow °C(max) • DiodeModelSelectionBit-MMBT3904or – T =25°Cto90°C;T =40°Cto125°C,±1.5 A D 65/90-nmProcessorDiodes °C(max) • TwoFormats:-128°Cto127.875°Cand0°Cto • LocalTemperatureAccuracy 255.875°C – T =25°Cto100°C,±2.0°C(max) A • DigitalFilterforRemoteChannel • ConversionRate,BothChannels16to0.4Hz • ProgrammableTCRITandOSThresholds • ProgrammableSharedHysteresisRegister DESCRIPTION • DiodeFaultDetection The LM95235 is an 11-bit digital temperature sensor with a 2-wire System Management Bus (SMBus) • Mask,Offset,andStatusRegisters interface and TruTherm technology that can monitor • SMBus2.0CompatibleInterface,Supports the temperature of a remote diode as well as its own TIMEOUT temperature. The LM95235 can be used to very • ProgrammableConversionRateforBest accurately monitor the temperature of external PowerConsumption devices such as microprocessors, graphics processors, or a diode-connected MMBT3904 • Three-LevelAddressPin transistor. For automotive applications the LM95235Q • StandbyModeOne-ShotConversionControl is available that is AEC-Q100 Grade3 compliant and • Pin-for-PinCompatibleWiththeLM86and is manufactured on an Automotive Grade Flow. LM89 TruTherm BJT (transistor) beta compensation technology allows the LM95235 to precisely monitor • 8-PinVSSOPPackage thermal diodes found in 90 nm and smaller geometry processes. LM95235 reports temperature in two APPLICATIONS different formats for +127.875°C/-128°C range and • Processor/ComputerSystemThermal 0°C/255°C range. The LM95235 T_CRIT and OS Management(ForExample,Laptops, outputs are asserted when either unmasked channel exceeds its programmed limit and can be used to Desktops,Workstations,Servers) shutdown the system, to turn on the system fans, or • ElectronicTestEquipmentandOffice as a microcontroller interrupt function. The current Electronics status of the T_CRIT and OS pins can be read back from the status registers via the SMBus interface. All limits have a shared programmable hysteresis register. The remote temperature channel of the LM95235 has a programmable digital filter. The LM95235 contains a diode model selection bit to select between a typicalIntel® processorona65nmor90nmprocess or MMBT3904, as well as an offset register for maximumflexibilityandbestaccuracy. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2006–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com DESCRIPTION (CONTINUED) The LM95235 has a three-level address pin to connect up to 3 devices to the same SMBus master, that is shared with the OS output. The LM95235 has a programmable conversion rate register and a standby mode to savepower.Oneconversioncanbetriggeredinstandbymodebywritingtotheone-shotregister. Connection Diagram TopView VDD 1 8 SMBCLK D+ 2 7 SMBDAT LM95235 D- 3 6 OS/A0 T_CRIT 4 5 GND Figure1. VSSOP-8Package SeepackagenumberDGK0008A Simplified Block Diagram 3.0V-3.6V 1 LM95235 4 Local T_CRIT + Diode Selector Temperature 6(cid:3)’(cid:3)Converter - Sensor D+ 2 Remote Circuitry 6 OS/A0 3 Diode + D- Selector - General TruTherm & Status Limit & Local Remote ID Config Diode Config Registers Hyst Temp Temp Registers Control Registers Registers Registers Registers Registers Logic 7 SMBus Serial Interface SMBDAT 8 SMBCLK 5 2 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Table1.PinDescriptions Pin Name Type Description Number Devicepowersupply.Requiresbypasscapacitorof10µFinparallelwith0.1µFand100 1 V Power DD pF.Place100pFclosesttodevicepin. 2 D+ AnalogInput/Output Positiveinputfromthethermaldiode. 3 D- AnalogInput/Output Negativeinputfromthethermaldiode. 4 T_CRIT DigitalOutput Criticaltemperatureoutput.Open-drainoutputrequirespull-upresistor.Activelow. 5 GND Ground Deviceground. Over-temperatureshutdowncomparatoroutputorSMBusslaveaddressinput.Defaults asanSMBusslaveaddressinputthatselectsoneofthreeaddresses.Canbetiedto 6 OS/A0 DigitalInput/Output V ,GND,ortothemiddleofaresistordividerconnectedbetweenV andGND.When DD DD programmedasanOScomparatoroutputitisactivelowandopendrain. 7 SMBDAT DigitalInput/Output SMBusinterfacedatapin.Open-drainoutputrequirespull-upresistor. 8 SMBCLK DigitalInput SMBusinterfaceclockpin. Typical Application +3.3V Standby C4 C3 C2 10 µF 0.1 µF 100 pF R1 R2 R3 R4 1.3k 1.3k 1.3k 1.3k SMBus Place capacitor C2 Master LM95235 close to LM95235 1 8 VDD SMBCLK SMBCLK 2 7 D+ SMBDAT SMBDAT C1 Processor 100 pF 3 6 D- OS/A0 ALERT Place close to LM95235 4 5 T_CRIT GND SMI Main CPU Shutdown Control Voltage Power Supply Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings(1) SupplyVoltage,V -0.3Vto6.0V DD VoltageatSMBDAT,SMBCLK,T_CRIT,OS/A0Pins -0.5Vto6.0V VoltageatOtherPins (V +0.3V) DD InputCurrentatD-Pin (2) ±1mA InputCurrentatAllOtherPins(2) ±5mA OutputSinkCurrent,SMBDAT,T_Crit,OSPins 10mA PackageInputCurrent (2) 30mA HumanBodyModel 2500V ESDSusceptibility(3) MachineModel 250V ChargedDeviceModel 1000V JunctionTemperature(4) +125°C StorageTemperature -65°Cto+150°C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisguaranteedtobefunctional,butdonotguaranteespecificperformancelimits.Forguaranteedspecificationsandtest conditions,seetheElectricalCharacteristics.Theguaranteedspecificationsapplyonlyforthetestconditionslisted.Someperformance characteristicsmaydegradewhenthedeviceisnotoperatedunderthelistedtestconditions.Operationofthedevicebeyondthe maximumOperatingRatingsisnotrecommended. (2) Whentheinputvoltage(V)atanypinexceedsthepowersupplies(V <GNDorV >V ),thecurrentatthatpinshouldbelimitedto5 I I I DD mA.ParasiticcomponentsandorESDprotectioncircuitryareshowninthefiguresinTable2fortheLM95235'spins.Careshouldbe takennottoforwardbiastheparasiticdiodesonpins2and3.Doingsobymorethan50mVmaycorruptthetemperature measurements.SNPreferstoSnap-backdevice. (3) Humanbodymodel(HBM)isacharged100pFcapacitordischargedintoa1.5kΩresistor.Machinemodel(MM),isacharged200pF capacitordischargeddirectlyintoeachpin.ChargedDeviceModel(CDM)simulatesapinslowlyacquiringcharge(suchasfroma deviceslidingdownthefeederinanautomatedassembler)thenrapidlybeingdischarged. (4) Thermalresistancejunction-to-ambientwhenattachedtoaprintedcircuitboardwith1oz.foilandnoairflowis:θ forVSSOP-8 JA package=210°C/W Table2.ESDProtection PinNo. Label Circuit PinESDProtectionStructureCircuits 1 VDD A 2 D+ A V+ 3 D- A PIN 4 T_CRIT B D2 D1 PIN SNP 5 GND A D1 6.D5V3 CLEASMDP 6 OS/A0 B GND CircuitB 7 SMBDAT B GND CircuitA 8 SMBCLK B Operating Ratings (1) OperatingTemperatureRange -40°Cto+125°C LM95235CIMM 0°C≤T ≤+90°C A LM95235DIMM -40°C≤T ≤+90°C A ElectricalCharacteristicsTemperatureRange,T ≤T ≤T MIN A MAX LM95235EIMM -40°C≤T ≤+90°C A LM95235QEIMM -40°C≤T ≤+85°C A SupplyVoltage(V ) +3.0Vto+3.6V DD SolderingprocessmustcomplywithReflowTemperatureProfilespecifications.Refertohttp://www.ti.com/packaging.(2) (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisguaranteedtobefunctional,butdonotguaranteespecificperformancelimits.Forguaranteedspecificationsandtest conditions,seetheElectricalCharacteristics.Theguaranteedspecificationsapplyonlyforthetestconditionslisted.Someperformance characteristicsmaydegradewhenthedeviceisnotoperatedunderthelistedtestconditions.Operationofthedevicebeyondthe maximumOperatingRatingsisnotrecommended. (2) Reflowtemperatureprofilesaredifferentforpackagescontaininglead(Pb)thanforthosethatdonot. 4 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Temperature-to-Digital Converter Characteristics Unlessotherwisenoted,thesespecificationsapplyforV =+3.0Vdcto3.6Vdc.BoldfacelimitsapplyforT =T =T ≤ DD A J MIN T ≤T ;allotherlimitsT =T =+25°C,unlessotherwisenoted.T isthejunctiontemperatureoftheLM95235.T isthe A MAX A J J A ambienttemperatureoftheLM95235.T isthejunctiontemperatureoftheremotethermaldiode. D LM95235 LM95235 LM95235 EIMM Typical CIMM DIMM LM95235 Parameter TestConditions (1) Limits Limits QEIMM Unit (2) (2) Limits (2) TemperatureAccuracy T =25°Cto+100°C ±1 ±2 ±2 ±2 °C(max) A UsingLocalDiode(3) T =-40°Cto+25°C ±6.0 ±6.0 °C(max) A TemperatureAccuracy T =+25°Cto+85°C; UsingRemoteDiode(4) TA=+60°Cto+100°C 65nmIntelProcessor ±0.5 ±0.75 ±0.75 ±0.75 °C(max) D T =+25°CtoT ; MMBT3904or A MAX ±0.5 ±1.0 ±1.0 ±1.0 °C(max) T =+60°Cto+100°C 65nmIntelProcessor D T =+25°CtoT ; MMBT3904or A MAX ±0.75 ±1.5 ±1.5 ±1.5 °C(max) T =+40°Cto+120°C 65nmIntelProcessor D T =-40°Cto+25°C; MMBT3904or A ±3.0 °C(max) T =+25°Cto+125°C 65nmIntelProcessor D T =-40°Cto+25°C; A MMBT3904 ±3.0 °C(max) T =+25°Cto+125°C D T =-40°Cto+25°C; A MMBT3904 ±5.0 ±5.0 °C(max) T =-40°Cto+25°C D 11 Bits DigitalFilterOff RemoteDiode 0.125 °C MeasurementResolution 13 Bits DigitalFilterOn 0.03125 °C LocalDiodeMeasurement 11 Bits Resolution 0.125 °C ConversionTime,Fastest LocalandRemoteChannels 63 72 72 72 ms(max) Setting (5) LocalorRemoteChannels 33 ms SMBusInactive,1Hzconversionrate(6) 350 650 650 650 µA(max) QuiescentCurrent StandbyMode 300 µA D-SourceVoltage 400 mV ExternalDiodeCurrent High-level 172 225 225 225 µA(max) Source Low-level 10.75 µA DiodeSourceCurrentRatio 16 2.8 2.8 2.8 V(max) Power-OnResetVoltage 1.6 1.6 1.6 V(min) T_CRITPinTemperature Default +110 °C Threshold OSPinTemperature Default +85 °C Threshold (1) TypicalfiguresareatT =25°Candrepresentmostlikelyparametricnormsatthetimeofproductcharacterization.Thetypical A specificationsarenotguaranteed. (2) LimitsareguaranteedtoTI'sAOQL(AverageOutgoingQualityLevel). (3) Localtemperatureaccuracydoesnotincludetheeffectsofself-heating.Theriseintemperatureduetoself-heatingistheproductofthe internalpowerdissipationoftheLM95235andthethermalresistance.See()forthethermalresistancetobeusedintheself-heating calculation. (4) TheaccuracyoftheLM95235isguaranteedwhenusingatypicalthermaldiodeofanIntelprocessorona65nmprocessoran MMBT3904diode-connectedtransistor,asselectedintheRemoteDiodeModelSelectregister.Seetypicalperformancecurvefor performancewithIntelprocessorona90nmprocess. (5) Thisspecificationisprovidedonlytoindicatehowoftentemperaturedataisupdated.TheLM95235canbereadatanytimewithout regardtoconversionstate(andwillyieldlastconversionresult). (6) QuiescentcurrentwillnotincreasesubstantiallywhentheSMBusisactive. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Logic Electrical Characteristics Digital DC Characteristics Unlessotherwisenoted,thesespecificationsapplyforV =+3.0Vdcto3.6Vdc.BoldfacelimitsapplyforT =T =T to DD A J MIN T ;allotherlimitsT =T=+25°C,unlessotherwisenoted. MAX A J Symbol Parameter TestConditions Typical(1) Limits(2) Unit (Limit) SMBDAT,SMBCLKINPUTS V Logical“1”InputVoltage 2.1 V(min) IN(1) V Logical“0”InputVoltage 0.8 V(max) IN(0) SMBDATandSMBCLKDigitalInput V 400 mV IN(HYST) Hysteresis I Logical“1”InputCurrent V =V -0.005 -10 µA(max) IN(1) IN DD I Logical“0”InputCurrent V =0V 0.005 +10 µA(max) IN(0) IN C InputCapacitance 5 pF IN A0DIGITALINPUT V InputHighVoltage 0.90×V V(min) IH DD 0.57×V V(max) DD V InputMiddleVoltage IM 0.43×V V(min) DD V InputLowVoltage 0.10×V V(max) IL DD I Logical“1”InputCurrent V =V -0.005 -10 µA(max) IN(1) IN DD I Logical“0”InputCurrent V =0V 0.005 +10 µA(max) IN(0) IN C InputCapacitance 5 pF IN SMBDAT,T_CRIT,OSDIGITALOUTPUTS I HighLevelOutputLeakageCurrent V =V 10 µA(max) OH OUT DD V OL(T_CRIT, T_CRIT,OSLowLevelOutputVoltage I =6mA 0.4 V(max) OL OS) I =4mA 0.4 V(max) V SMBDATLowLevelOutputVoltage OL OL(SMBDAT) I =6mA 0.6 V(max) OL C DigitalOutputCapacitance 5 pF OUT (1) TypicalfiguresareatT =25°Candrepresentmostlikelyparametricnormsatthetimeofproductcharacterization.Thetypical A specificationsarenotguaranteed. (2) LimitsareguaranteedtoTI'sAOQL(AverageOutgoingQualityLevel). SMBus Digital Switching Characteristics Unlessotherwisenoted,thesespecificationsapplyforV =+3.0Vdcto+3.6Vdc,C (loadcapacitance)onoutputlines=80 DD L pF.BoldfacelimitsapplyforT =T =T toT ;allotherlimitsT =T =+25°C,unlessotherwisenoted. A J MIN MAX A J TheswitchingcharacteristicsoftheLM95235fullymeetorexceedthepublishedspecificationsoftheSMBusversion2.0.The followingparametersarethetimingrelationshipsbetweenSMBCLKandSMBDATsignalsrelatedtotheLM95235.They adhereto,butarenotnecessarily,theSMBusspecifications. Parameter TestConditions Typical Limits Unit (1) (2) (Limit) 100 kHz(max) f SMBusClockFrequency SMB 10 kHz(min) 4.7 µs(min) t SMBusClockLowTime fromV maxtoV max LOW IN(0) IN(0) 25 ms(max) t SMBusClockHighTime fromV mintoV min 4.0 µs(min) HIGH IN(1) IN(1) t SMBusRiseTime (3) 1 µs(max) R,SMB t SMBusFallTime (4) 0.3 µs(max) F,SMB (1) TypicalfiguresareatT =25°Candrepresentmostlikelyparametricnormsatthetimeofproductcharacterization.Thetypical A specificationsarenotguaranteed. (2) LimitsareguaranteedtoTI'sAOQL(AverageOutgoingQualityLevel). (3) Theoutputrisetimeismeasuredfrom(V max-0.15V)to(V min+0.15V). IN(0) IN(1) (4) Theoutputfalltimeismeasuredfrom(V min+0.15V)to(V max-0.15V). IN(1) IN(0) 6 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 SMBus Digital Switching Characteristics (continued) Unlessotherwisenoted,thesespecificationsapplyforV =+3.0Vdcto+3.6Vdc,C (loadcapacitance)onoutputlines=80 DD L pF.BoldfacelimitsapplyforT =T =T toT ;allotherlimitsT =T =+25°C,unlessotherwisenoted. A J MIN MAX A J TheswitchingcharacteristicsoftheLM95235fullymeetorexceedthepublishedspecificationsoftheSMBusversion2.0.The followingparametersarethetimingrelationshipsbetweenSMBCLKandSMBDATsignalsrelatedtotheLM95235.They adhereto,butarenotnecessarily,theSMBusspecifications. Parameter TestConditions Typical Limits Unit (1) (2) (Limit) C =400pF, tOF OutputFallTime I L=3mA, (4) 250 ns(max) O SMBDATandSMBCLKTimeLowfor 25 ms(min) tTIMEOUT ResetofSerialInterface (5) 35 ms(max) t DataInSetupTimetoSMBCLKHigh 250 ns(min) SU;DAT 300 ns(min) t DataOutStableafterSMBCLKLow HD;DAT 1075 ns(max) StartConditionSMBDATLowto t SMBCLKLow(Startconditionhold 100 ns(min) HD;STA beforethefirstclockfallingedge) StopConditionSMBCLKHighto t 100 ns(min) SU;STO SMBDATLow(StopConditionSetup) SMBusRepeatedStart-ConditionSetup t 0.6 µs(min) SU;STA Time,SMBCLKHightoSMBDATLow SMBusFreeTimeBetweenStopand t 1.3 µs(min) BUF StartConditions (5) HoldingtheSMBDATand/orSMBCLKlinesLowforatimeintervalgreaterthant willresettheLM95235'sSMBusstatemachine, TIMEOUT thereforesettingSMBDATandSMBCLKpinstoahighimpedancestate. tLOW tR tF SMBCLKVIH VIL tBUF tHtHDD;S;DTAAT tHIGH tSU;DAT tSU;STA tSU;STO SMBDATVIH P VIL S S P Figure2. SMBusCommunication Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics ThermalDiodeCapacitororPCBLeakageCurrentEffect RemoteTemperatureReadingSensitivitytoThermalDiode RemoteDiodeTemperatureReading FilterCapacitance,TruThermEnabled Figure3. Figure4. IntelProcessoron65nmProcessor90nmProcess ConversionRateEffectonAveragePowerSupplyCurrent ThermalDiodePerformanceComparison Figure5. Figure6.n 8 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 FUNCTIONAL DESCRIPTION The LM95235 is a temperature sensor that measures Local and Remote temperature zones. The LM95235 uses a ΔV temperature sensing method. A differential voltage, representing temperature, is digitized using a Sigma- be Delta analog to digital converter. TruTherm Technology allows the LM95235 to accurately sense the temperature of a thermal diode found on die fabricated using a sub-micron process. For more information on TruTherm Technology see Applications Hints . The LM95235 is compatible with the serial SMBus version 2.0 two-wire serialinterface. The LM95235 has OS and TCRIT open-drain digital outputs that indicate the state of the local and remote temperature readings when compared to user-programmable limits. If enabled, the local temperature is compared to the user-programmable Local Shared OS and TCRIT Limit Register (Default Value = 85°C). The comparison result can trigger the T_CRIT pin and/or the OS pin depending on the settings of the Local TCRIT Mask and OS Mask bits found in Configuration Register 1. The comparison result can also be read back from Status Register 1. If enabled, the remote temperature is compared to the user-programmable Remote TCRIT Limit Register (Default Value = 110°C), and the Remote OS Limit Register (Default Value = 85°C) values. The comparison result can trigger the T_CRIT pin and/or the OS pin depending on the settings of Configuration Register 1. The following table describes the default temperature settings for each measured temperature that triggersT_CRITand/orOSpins: OutputPin Remote,°C Local,°C T_CRIT 110 85 OS 85 85 ThefollowingtabledescribesthelimitregistermappingtotheT_CRITand/orOSpins: OutputPin Remote Local T_CRIT RemoteTCRITLimit LocalSharedOS/TCRITLimit OS RemoteOSLimit LocalSharedOS/TCRITLimit TheT_CRITandOSoutputsareopen-drain,activelow. The remote temperature readings support a programmable digital filter. Based on the settings in Configuration Register2adigitalfiltercanbeturnedontoimprovethenoiseperformanceoftheremotetemperatureaswellas to increase the resolution of the temperature reading. If the filter is enabled the filtered readings are used for TCRIT and OS comparisons. The LM95235 may be placed in low power consumption (Standby) mode by setting the STOP/RUN bit found in Configuration Register 1. In the Standby mode, the LM95235’s SMBus interface remains active while all circuitry not required is turned off. In the Standby mode the host can trigger one round of conversions by writing to the One-Shot Register. The value written into this register is not kept. Local and Remote temperatures will be converted once and the T_CRIT and OS pins will reflect the comparison results basedonthissetofconversionsresults. Allthetemperaturereadingsarein16-bitleft-justifiedwordformat.The10-bitplussignlocaltemperaturereading is contained in two 8-bit registers: Local Temp MSB and Local Temp LSB Registers. The remote temperature supports both a 13-bit unsigned and a 12-bit plus sign format. These readings are available in their corresponding registers as described in the LM95235 Register table. The lower 2-bits of the remote temperature reading will contain temperature information only if the digital filter is enabled. If the digital filter is disabled, these twobitswillreadback0. The signed and unsigned remote temperature readings are available simultaneously in separate registers, thereforeallowingbothnegativetemperaturesandtemperatures128°Candabovetobemeasured. All Limit Registers support unsigned temperature format with 1°C LSb resolution. The Local Shared TCRIT and OS Limit Register is 7 bits for limits between 0°C and 127°C. The Remote Temperature TCRIT and OS Limit Registersare8bitseachforlimitsbetween0°Cand255°C. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com CONVERSION SEQUENCE In the power-up default state the LM95235 takes a maximum of 1 second to convert the Local Temperature, RemoteTemperature,andtoupdateallofitsregisters.OnlyduringtheconversionprocessistheBusybit(D7)in Status Register 1 (02h) high. These conversions are addressed in a round-robin sequence. The conversion rate may be modified by the Conversion Rate bits found in the Conversion Rate Register (R/W: 04h/0Ah). When the conversion rate is modified a delay is inserted between conversions, the actual maximum conversion time remains at 72 ms. Different conversion rates will cause the LM95235 to draw different amounts of supply current asshowninFigure7. Figure7.ConversionRateEffectonPowerSupplyCurrent POWER-ON-DEFAULT STATES LM95235 always powers up to these known default states. The LM95235 remains in these states until after the firstconversion. 1. CommandRegistersetto00h 2. ConversionRateregisterdefaultsto02h(1second). 3. LocalTemperaturesetto0°Cuntiltheendofthefirstconversion 4. RemoteDiodeTemperaturesetto0°Cuntiltheendofthefirstconversion 5. RemoteOSlimitdefaultis55h(85°C). 6. LocalSharedandTCRITlimitdefaultis55h(85°C). 7. RemoteTCRITlimitdefaultis6Eh(110°C). 8. RemoteOffsetHighandLowbytesdefaultto00h. 9. ConfigurationRegister1defaultsto00h.ThissetstheLM95235asfollows: (a) TheSTOP/RUNdefaultstotheactive/convertingmode. (b) TheLocalandRemoteTCRITandOSMasksareresetto0. 10. ConfigurationRegister2defaultsto1Fh.ThissetstheLM95235asfollows: (a) RemoteDiodedigitalfilterdefaultson. (b) TheRemoteDiodemodedefaultstoatypicalIntelprocessoron65/90nmprocess. (c) DiodeFaultMaskbitforTCRITdefaultsto1. (d) DiodeFaultMaskbitforOSdefaultsto0. (e) Pin6FunctiondefaultstoAddressInputfunction(A0). SMBus INTERFACE The LM95235 operates as a slave on the SMBus, so the SMBCLK line is an input and the SMBDAT line is bidirectional. The LM95235 never drives the SMBCLK line and it does not support clock stretching. According to SMBus specifications, the LM95235 has a 7-bit slave address. Three SMBus addresses can be selected by connectingpin6(A0)toeitherLow,Mid-SupplyorHighvoltages.Table3showsthepossibleselections. 10 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Table3.AddressSelection SMBusDeviceAddress StateoftheA0Pin HEX Binary Low 18 0011000 Mid-Supply 29 0101001 High 4C 1001100 The OS/A0 pin, after power-up, defaults as an address select input pin (A0). After power-up, the OS/A0 pin can only be programmed as an OS output when it is in the “High” state. Therefore, 4Ch is the only valid slave address that can be used when the OS/A0 pin is programmed to function as an OS output. When the OS/A0 pin is programmed to function as an A0 input the LM95235 will immediately detect the state of this pin to determine itsSMBusslaveaddress.TheLM95235doesnotlatchthestateoftheA0pinwhenitisfunctioningasaninput. DIGITAL FILTER In order to suppress erroneous remote temperature readings due to noise, the LM95235 incorporates a digital filter for the Remote Temperature Channel. The filter is accessed in the Configuration Register 2, bits D2 (FE1) andD1(FE0).Thefiltercanbesetaccordingtothefollowingtable. FE1 FE0 FilterSetting 0 0 FilterOff 0 1 Reserved 1 0 Reserved 1 1 FilterOn Figure8throughFigure10depictthefilteroutputinresponsetoastepinputandanimpulseinput. Figure8.FilterImpulseandStepResponseCurve Figure9.FilterImpulseandStepResponseCurve SeventeenandFiftyDegreeStepResponse ImpulseResponsewithInputTransientsLess Than4°C Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Figure10.FilterImpulseandStepResponseCurve ImpulseResponsewithInputTransientsGreaterThan4°C Figure 11 shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two curveshavebeenpurposelyoffsetforclarity.Insertingthefilterdoesnotinduceanoffsetasshown. 45 LM95235 with 43 Filter Off 41 C) 39 oE ( 37 R U AT 35 LM95235 with ER 33 Filter On P EM 31 T 29 27 25 0 50 100 150 200 SAMPLE NUMBER A. Thefiltercurveswerepurposelyoffsetforclarity. Figure11. DigitalFilterResponseinaTypicalIntelProcessorona65nmor90nmProcess TEMPERATURE DATA FORMAT TemperaturedatacanonlybereadfromtheLocalandRemoteTemperatureregisters. Remote temperature data with the digital filter off is represented by an 10-bit plus sign, two's complement word and 11-bit unsigned binary word with an LSb (Least Significant Bit) equal to 0.125°C. The data format is a left justified16-bitwordavailableintwo8-bitregisters.Unusedbitsreport"0". Remote temperature data with the digital filter on is represented by a 12-bit plus sign, two's complement word and13-bitunsignedbinarywordwithanLSb(LeastSignificantBit)equalto0.03125°C(1/32°C).Thedataformat isaleftjustified16-bitwordavailableintwo8-bitregisters.Unusedbitsreport"0". Table4.11-Bit,2'sComplement(10-BitPlusSign) DigitalOutput Temperature Binary Hex +125°C 0111110100000000 7D00h +25°C 0001100100000000 1900h +1°C 0000000100000000 0100h +0.125°C 0000000000100000 0020h 0°C 0000000000000000 0000h -0.125°C 1111111111100000 FFE0h 12 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Table4.11-Bit,2'sComplement(10-BitPlus Sign)(continued) DigitalOutput Temperature Binary Hex -1°C 1111111100000000 FF00h -25°C 1110011100000000 E700h -55°C 1100100100000000 C900h Table5.11-Bit,UnsignedBinary DigitalOutput Temperature Binary Hex +255.875°C 1111111111100000 FFE0h +255°C 1111111100000000 FF00h +201°C 1100100100000000 C900h +125°C 0111110100000000 7D00h +25°C 0001100100000000 1900h +1°C 0000000100000000 0100h +0.125°C 0000000000100000 0020h 0°C 0000000000000000 0000h Table6.13-Bit,2'sComplement(12-BitPlusSign) DigitalOutput Temperature Binary Hex +125°C 0111110100000000 7D00h +25°C 0001100100000000 1900h +1°C 0000000100000000 0100h +0.03125°C 0000000000001000 0008h 0°C 0000000000000000 0000h -0.03125°C 1111111111111000 FFF8h -1°C 1111111100000000 FF00h -25°C 1110011100000000 E700h -55°C 1100100100000000 C900h Table7.13-Bit,UnsignedBinary DigitalOutput Temperature Binary Hex +255.875°C 1111111111100000 FFE0h +255°C 1111111100000000 FF00h +201°C 1100100100000000 C900h +125°C 0111110100000000 7D00h +25°C 0001100100000000 1900h +1°C 0000000100000000 0100h +0.03125°C 0000000000001000 0008h 0°C 0000000000000000 0000h Local Temperature data is represented by a 10-bit plus sign, two's complement word with an LSb (Least Significant Bit) equal to 0.125°C. The data format is a left justified 16-bit word available in two 8-bit registers. Unused bits will always report "0". Local temperature readings greater than +127.875°C are clamped to +127.875°C,theywillnotroll-overtonegativetemperaturereadings. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Table8.11-Bit,2'sComplement(10-BitPlusSign) DigitalOutput Temperature Binary Hex +125°C 0111110100000000 7D00h +25°C 0001100100000000 1900h +1°C 0000000100000000 0100h +0.125°C 0000000000100000 0020h 0°C 0000000000000000 0000h -0.125°C 1111111111100000 FFE0h -1°C 1111111100000000 FF00h -25°C 1110011100000000 E700h -55°C 1100100100000000 C900h SMBDAT OPEN-DRAIN OUTPUT The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading errors due to internal heating of the LM95235. The maximum resistance of the pull-up to provide a 2.1V high level, based on LM95235 specification for High Level Output Current with the supply voltage at 3.0V, is 82 kΩ (5%)or88.7kΩ (1%). T_CRIT OUTPUT AND TCRIT LIMIT The LM95235's T_CRIT pin is an active-low open-drain output that is triggered when the local and/or the remote temperature conversion is above the limits defined by the Remote and/or Local Limit registers. The state of the T_CRIT pin will return to the HIGH state when both the Local and Remote temperatures are below the values programmed into the Limit Registers less the value in the Common Hysteresis Register. Additionally, if the remote temperature exceeds the value in the Remote TCRIT Limit Register the Status Bit for Remote TCRIT (RTCRIT), in Status Register 1, is set to 1. In the same way if the local temperature exceeds the value in the Local Shared OS and TCRIT Limit Register the Status Bit for the Shared Local OS and TCRIT (LOC) bit in Status Register 1 is set to 1.The T_CRIT output and the Status Register flags are updated after every Local and Remotetemperatureconversion.SeeFigure12 Remote TCRIT Limit Hysteresis Remote Temperature Remote TCRIT Limit - Hysteresis T_CRIT Output Pin Status bit RCRIT Figure12. T_CRITComparatorTemperatureResponseDiagram 14 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 OS OUTPUT AND OS LIMIT The LM95235's OS/A0 pin is selected as an OS digital output as described in SMBus INTERFACE. As an OS pin, it is activated whenever the local and/or remote temperature conversion is above the limits defined by the Limit registers. If the remote temperature exceeds the value in the Remote OS Limit Register the Status Bit for Remote OS (ROS) in Status Register 1 is set to 1. In the same way if the local temperature exceeds the value in the Local Shared OS and TCRIT Limit Register the Status Bit for the Shared Local OS and TCRIT (LOC) bit in Status Register 1 is set to 1. The state of the T_CRIT pin output will return to the HIGH state when both the Local and Remote temperatures are below the values programmed into the Limit Registers less the value in the Common Hysteresis Register. The OS output and the Status Register flags are updated after every Local and Remotetemperatureconversion.SeeFigure13. Remote OS Limit Hysteresis Remote Temperature Remote OS Limit - Hysteresis OS Output Pin Status bit ROS Figure13. OSTemperatureResponseDiagram DIODE FAULT DETECTION The LM95235 is equipped with operational circuitry designed to detect fault conditions concerning the remote diodes. In the event that the D+ pin is detected as shorted to GND, D-, V or D+ is floating, the Remote DD Temperature reading is –128.000°C if signed format is selected and +255.875°C if unsigned format is selected. Inaddition,theStatusRegister1bitD2isset. COMMUNICATING WITH THE LM95235 The data registers in the LM95235 are selected by the Command Register. At power-up the Command Register is set to “00”, the location for the Read Local Temperature Register. The Command Register latches the last locationitwassetto.EachdataregisterintheLM95235fallsintooneoffourtypesofuseraccessibility: 1. Readonly 2. Writeonly 3. Write/Readsameaddress 4. Write/Readdifferentaddress A Write to the LM95235 will always include the address byte and the command byte. A write to any register requiresonedatabyte. ReadingtheLM95235cantakeplaceeitheroftwoways: 1. If the location latched in the Command Register is correct (most of the time it is expected that the Command Register will point to one of the Read Temperature Registers because that will be the data most frequently read from the LM95235), then the read can simply consist of an address byte, followed by retrieving the data byte. 2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another addressbytewillaccomplisharead. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Thedatabytehasthemostsignificantbitfirst.Attheendofaread,theLM95235canaccepteitheracknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte). When retrieving all 11 bits from a previous remote diode temperature measurement, the master must insure that all 11 bits are from the same temperature conversion. This may be achieved by reading theMSBregisterfirst.TheLSBwillbelockedaftertheMSBisread.TheLSBwillbeunlockedafterbeingread.If the user reads MSBs consecutively, each time the MSB is read, the LSB associated with that temperature will be lockedinandoverridethepreviousLSBvaluelocked-in. 1 9 1 9 SMBCLK SMBDAT A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Start by Ack Ack by Stop Master by LM95235 by LM95235 Master Frame 1 Frame 2 Serial Bus Address Byte Command Byte Figure14. SMBusTimingDiagramforAccessofData(DefaultAddressof4Chisshown) (a)SerialBusWritetotheInternalCommandRegister 1 9 1 9 SMBCLK SMBDAT A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Start by Ack Ack Master by by LM95235 LM95235 Frame 1 Frame 2 Serial Bus Address Byte Command Byte 1 9 SMBCLK (Continued) SMBDAT D7 D6 D5 D4 D3 D2 D1 D0 (Continued) Ack by Stop LM95235 by Master Frame 3 Data Byte Figure15. SMBusTimingDiagramforAccessofData(DefaultAddressof4Chisshown) (b)SerialBusWritetotheInternalCommandRegisterFollowedbyaDataByte 1 9 1 9 SMBCLK SMBDAT A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Start by Ack NoAck Stop Master by by by LM95235 MasterMaster Frame 1 Frame 2 Serial Bus Address Byte Data Byte from the LM95235 Figure16. SMBusTimingDiagramforAccessofData(DefaultAddressof4Chisshown) (c)SerialBusByteReadfromaRegisterwiththeInternalCommandRegisterPresettoDesiredValue 16 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 1 9 1 9 SMBCLK SMBDAT A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Start by Ack Ack Repeat Master by by Start by LM95235 LM95235Master Frame 1 Frame 2 Serial Bus Address Byte Command Byte 1 9 1 9 SMBCLK (Continued) SMBDAT (Continued) A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Ack No Ack Stop by by by LM95235 MasterMaster Frame 3 Frame 4 Serial Bus Address Byte Data Byte from the LM95235 Figure17. SMBusTimingDiagramforAccessofData(DefaultAddressof4Chisshown) (d)SerialBusWriteFollowedbyaRepeatStartandImmediateRead SERIAL INTERFACE RESET In the event that the SMBus Master is RESET while the LM95235 is transmitting on the SMBDAT line, the LM95235 must be returned to a known state in the communication protocol. This may be done in one of two ways: 1. When SMBDAT is LOW, the LM95235 SMBus state machine resets to the SMBus idle state if either SMBDAT or SMBCLK are held low for more than 35 ms (t ). Note that according to SMBus TIMEOUT specification 2.0 all devices are to timeout when either the SMBCLK or SMBDAT lines are held low for 25 - 35 ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held lowforatleast35ms. 2. When SMBDAT is HIGH, have the master initiate an SMBus start. The LM95235 will respond properly to an SMBus start condition at any point during the communication. After the start the LM95235 will expect an SMBusAddressaddressbyte. ONE-SHOT CONVERSION The One-Shot register is used to initiate a single conversion and comparison cycle when the device is in standby mode, after which the device returns to standby. This is not a data register and it is the write operation that causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will alwaysbereadfromthisregister. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com LM95235 REGISTERS Command register selects which registers will be read from or written to. Data for this register should be transmittedduringtheCommandByteoftheSMBuswritecommunication.PORmeansPower-OnReset. P0-P7:Command P7 P6 P5 P4 P3 P2 P1 P0 Command Table9.RegisterSummary Read Write No. POR Read/ RegisterName Address Address of Default Description Write (Hex) (Hex) bits (Hex) TEMPERATURESIGNEDVALUEREGISTERS LocalTempMSB 0x00 NA 8 - RO SupportsSMBusbyte LocalTempLSB 0x30 NA 3 - RO Allunusedbitsarereportedas"0". RemoteTempMSB–Signed 0x01 NA 8 - RO SupportsSMBusbyte RemoteTempLSB–Signed 0x10 NA 5/3 - RO Allunusedbitsarereportedas"0". TEMPERATUREUNSIGNEDVALUEREGISTERS RemoteTempMSB–Unsigned 0x31 NA 8 - RO SupportsSMBusbytereads RemoteTempLSB–Unsigned 0x32 NA 5/3 - RO Allunusedbitsarereportedas"0". DIODECONFIGURATIONREGISTERS FilterEnable,DiodeModelSelect,Diode ConfigurationRegister2 0xBF 0xBF 5 0x1F R/W FaultMask;Pin6OS/A0functionselect RemoteOffsetHighByte 0x11 0x11 8 0x00 R/W 2'sComplement RemoteOffsetLowByte 2'sComplement 0x12 0x12 3 0x00 R/W Allunusedbitsarereportedas"0". GENERALCONFIGURATIONREGISTERS 0x03/ 0x09/ STOP/RUN,RemoteTCRITmask,Remote ConfigurationRegister1 5 0x00 R/W 0x09 0x03 OSmask,LocalTCRITmask,LocalOSmask 0x04/0x0 0x04/0x0 ConversionRate 2 0x02 R/W Continuousorspecificsettings A A Awritetothisregisteractivatesone One-Shot NA 0x0F - - WO conversionifSTOP/RUNbit=1. STATUSREGISTERS StatusRegister1 0x02 NA 5 - RO Busybit,andstatusbits StatusRegister2 0x33 NA 2 - RO NotReadybit,Diodedetectbit LIMITREGISTERS 0x07/ 0x0D/ Unsigned0to255°C RemoteOSLimit 8 0x55 R/W 0x0D 0x07 Default85°C LocalSharedOSandT_CritLimit Unsigned0to127°C 0x20 0x20 7 0x55 R/W Default85°C Unsigned0to255°C RemoteT_CritLimit 0x19 0x19 8 0x6E R/W Default110°C CommonHysteresis 0x21 0x21 5 0x0A R/W upto31°C IDENTIFICATIONREGISTERS ManufacturerID 0xFE 0x01 RO Alwaysreturns0x01 RevisionID 0xFF 0xB1 RO Returnsrevisionnumber. 18 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 LOCAL and REMOTE MSB and LSB TEMPERATURE REGISTERS Table10.LocalTemperatureMSB (ReadOnlyAddress00h) 10-bitplussignformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 TemperatureData:LSb=1°C. Table11.LocalTemperatureLSB (ReadOnlyAddress30h) 10-bitplussignformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 TemperatureData:LSb=0.125°C. Table12.SignedRemoteTemperatureMSB (ReadOnlyAddress01h) 12-bitplussignformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 TemperatureData:LSb=1°C. Table13.SignedRemoteTemperatureLSB,FilterOn (ReadOnlyAddress10h) 12-bitplussignbinaryformatswithfilteron: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0.0625 0.03125 0 0 0 Table14.SignedRemoteTemperatureLSB,FilterOff (ReadOnlyAddress10h) 12-bitplussignbinaryformatswithfilteroff: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 TemperatureData:LSb=0.125°Cfilteroffor0.03125°Cfilteron. Table15.UnsignedRemoteTemperatureMSB (ReadOnlyAddress31h) 13-bitunsignedformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 128 64 32 16 8 4 2 1 TemperatureData:LSb=1°C. Table16.UnsignedRemoteTemperatureLSB,FilterOn (ReadOnlyAddress32h) 13-bitunsignedbinaryformatswithfilteron: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0.0625 0.03125 0 0 0 Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com Table17.UnsignedRemoteTemperatureLSB,FilterOff (ReadOnlyAddress32h) 13-bitunsignedbinaryformatswithfilteroff: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 TemperatureData:LSb=0.125°Cfilteroffor0.03125°Cfilteron. Fordatasynchronizationpurposes,theMSBregistershouldbereadfirstiftheuserwantstoreadbothMSBandLSBregisters.TheLSB willbelockedaftertheMSBisread.TheLSBwillbeunlockedafterbeingread.IftheuserreadsMSBsconsecutively,eachtimetheMSB isread,theLSBassociatedwiththattemperaturewillbelockedinandoverridethepreviousLSBvaluelocked-in. DIODE CONFIGURATION REGISTERS Table18.ConfigurationRegister2 (Read/writeAddressBFh) D7 D6 D5 D4 D3 D2 D1 D0 0 OS/A0FunctionSelect OSFaultMask T_CRITMask TruThermSelect RFE1 RFE0 1 Bits Name Description 7 Reserved Reports"0"whenread. 0:Address(A0)functionisenabled 6 OS/A0FunctionSelect 1:Over-temperatureShutdown(OS)isenabled 0:Off 5 DiodeFaultMaskforOS 1:On 0:Off 4 DiodeFaultMaskforT_CRIT 1:On 0:SelectsDiodeModel2,MMBT3904,withTruThermtechnologydisabled. RemoteDiodeTruTherm 3 1:SelectsDiodeModel1,AtypicalIntelProcessor,with65nmor90nm ModeSelect technology,andTruThermtechnologyenabled. 00:FilterDisable 01:Reserved 2-1 RemoteFilterEnable 10:Reserved 11:FilterEnable 0 Reserved Reports"1"whenread. Powerupdefaultis1Fh. Table19.RemoteOffsetHighByte(2'sComplement) (R/WAddress11h) 10-bitplussignformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 Powerupdefaultis00h. Table20.RemoteOffsetLowByte(2'sComplement) 10-bitplussignformat:(R/WAddress12h) BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.50 0.25 0.125 0 0 0 0 0 Powerupdefaultis00h.LSb=0.125°C. 20 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 GENERAL CONFIGURATION REGISTERS Table21.ConfigurationRegister1 (Read/writeAddress03h/09hor09h/03h): D7 D6 D5 D4 D3 D2 D1 D0 0 STOP/RUN 0 RemoteT_CRITMask RemoteOSMask LocalT_CRITMask LocalOSMask 0 Bits Name Description 7 Reserved Reports"0"whenread. 0:Active/Converting 6 STOP/RUN 1:Standby 5 Reserved Reports"0"whenread. 0:Off 4 RemoteT_CRITMask 1:On 0:Off 3 RemoteOSMask 1:On 0:Off 2 LocalT_CRITMask 1:On 0:Off 1 LocalOSMask 1:On 0 Reserved Reports"0"whenread. Powerupdefaultis00h. Table22.ConversionRateRegister (Read/writeAddress04h/0Ahor0Ah/04h): 2-bitformat: BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0 0 0 0 0 0 MSb LSb Bits Name Description 7:2 Reserved Reports"0"whenread. 00:Continuous(33mstypicalwhenremotediodeismissingorfaultor63mstypical withremotediodeconnected) 1:0 ConversionRate 01:0.364seconds 10:1second 11:2.5seconds Powerupdefaultis02h(1second). Table23.OneShotRegister (WriteOnlyAddress0Fh): Writingtothisregisterwillstartoneconversionifthedeviceisinstandbymode(i.e.STOP/RUNbit=1). Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com STATUS REGISTERS Table24.StatusRegister1 (ReadOnlyAddress02h): D7 D6 D5 D4 D3 D2 D1 D0 Busy 0 0 ROS 0 DiodeFault RTCRIT LOC Bits Name Description 7 Busy Whensetto"1"thepartisconverting. 6-5 Reserved Report"0"whenread. 4 ROS StatusBitforRemoteOS 3 Reserved Reports"0"whenread. 2 Statusbitformissingdiode(EitherD+isshortedtoGND,and/orV ,and/orD-;orD+isfloating.) DD DiodeFault Note:Theunsignedregisterswillreport0°Cifread;thesignedvalueregisterswillreport- 128.000°C. 1 RTCRIT StatusbitforRemoteTCRIT. 0 LOC StatusbitforthesharedLocalOSandTCRIT. Table25.StatusRegister2 (ReadOnlyAddress33h): D7 D6 D5 D4 D3 D2 D1 D0 NotReady TruTherm3904Detect 0 0 0 0 0 0 Bits Name Description 7 NotReady Waitingfor30mspower-upsequencetoend. 1:MMBT3904isconnectedandTruThermtechnologyisenabled. 6 TruTherm3904Detect 0:MMBT3904isconnectedandTruThermtechnologyisdisabled. 5-0 Reserved Reports"0"whenread. LIMIT REGISTERS Table26.UnsignedRemoteOSLimit-0°Cto255°C (Read/WriteAddress07h/0Dhor0Dh/07h): D7 D6 D5 D4 D3 D2 D1 D0 128 64 32 16 8 4 2 1 PoweronResetdefaultis55h(85°C). Table27.UnsignedLocalSharedOSandT_CRITLimit-0°Cto127°C (Read/WriteAddress20h): D7 D6 D5 D4 D3 D2 D1 D0 128 64 32 16 8 4 2 1 PoweronResetdefaultis55h(85°C). Table28.UnsignedRemoteT_CRITLimit-0°Cto255°C (Read/WriteAddress19h): D7 D6 D5 D4 D3 D2 D1 D0 128 64 32 16 8 4 2 1 PoweronResetdefaultis6Eh(110°C). 22 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Table29.CommonHysteresisRegister (Read/WriteAddress21h): D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 16 8 4 2 1 PoweronResetdefaultis0Ah(10°C). IDENTIFICATION REGISTERS Table30.ManufacturersIDRegister (ReadOnlyAddressFEh):Alwaysreturns01h. D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 1 Table31.RevisionIDRegister (ReadOnlyAddressFFh):DefaultisB1h.Thisregisterwillincrementby1everytimethereisarevisiontothediebyTexasInstruments. TheinitialrevisionbitsforB1hareshownbelow. D7 D6 D5 D4 D3 D2 D1 D0 1 0 1 1 0 0 0 1 Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com APPLICATIONS HINTS The LM95235 can be applied easily in the same way as other integrated-circuit temperature sensors, and its remote diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit board, and because the path of best thermal conductivity is between the die and the pins, its temperature will effectively be that of the printed circuit board lands and traces soldered to the LM95235's pins. This presumes that the ambient air temperature is almost the same as the surface temperature of the printed circuit board; if the airtemperatureismuchhigherorlowerthanthesurfacetemperature,theactualtemperatureoftheLM95235die will be at an intermediate temperature between the surface and air temperatures. Again, the primary thermal conductionpathisthroughtheleads,sothecircuitboardtemperature will contribute to the die temperature much morestronglythanwilltheairtemperature. To measure temperature external to the LM95235's die, use a remote diode. This diode can be located on the die of a target IC, allowing measurement of the IC's temperature, independent of the LM95235's temperature. A discrete diode can also be used to sense the temperature of external objects or ambient air. Remember that a discrete diode's temperature will be affected, and often dominated, by the temperature of its leads. Most silicon diodes do not lend themselves well to this application. It is recommended that an MMBT3904 transistor base- emitterjunctionbeusedwiththecollectortiedtothebase. The LM95235's TruTherm technology allows accurate sensing of integrated thermal diodes, such as those found on most processors. With TruTherm technology turned off, the LM95235 can measure a diode-connected transistorsuchastheMMBT3904orthethermaldiodefoundinanAMDprocessor. The LM95235 has been optimized to measure the remote thermal diode integrated in a typical Intel processor on 65 nm or 90 nm process or an MMBT3904 transistor. Using the Remote Diode Model Select register either pair of remote inputs can be assigned to be either a typical Intel processor on 65 nm or 90 nm process or an MMBT3904. DIODE NON-IDEALITY DiodeNon-IdealityFactorEffectonAccuracy Whenatransistorisconnectedasadiode,thefollowingrelationshipholdsforvariablesV ,TandI : BE F “§VBE• ” I =I x «e'KxVt„-1» F S « » ‹ … where kT Vt= q • • q=1.6×10-19Coulombs(theelectroncharge), • T=AbsoluteTemperatureinKelvin • k=1.38×10-23joules/K(Boltzmann'sconstant), • ηisthenon-idealityfactoroftheprocessthediodeismanufacturedon, • I =SaturationCurrentandisprocessdependent, S • I =ForwardCurrentthroughthebase-emitterjunction f • V =Base-EmitterVoltagedrop (1) BE Intheactiveregion,the-1termisnegligibleandmaybeeliminated,yieldingthefollowingequation “§VBE•” I = I x «e'KxVt„» F S « » ‹ … (2) In Equation 2, η and I are dependant upon the process that was used in the fabrication of the particular diode. S By forcing two currents with a very controlled ratio(I / I ) and measuring the resulting voltage difference, it is F2 F1 possibletoeliminatetheI term.Solvingfortheforwardvoltagedifferenceyieldstherelationship: S 24 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 §kT• §IF2• ’V =K x xln BE ' q „ 'IF1„ (3) SolvingEquation3fortemperatureyields: q x ’V BE T = §IF2• K x k x ln¤¤I ‚‚ ' F1„ (4) Equation 4 holds true when a diode connected transistor such as the MMBT3904 is used. When this “diode” equation is applied to an integrated diode such as a processor transistor with its collector tied to GND as shown in Figure 18 it will yield a wide non-ideality spread. This wide non-ideality spread is not due to true process variationbutduetothefactthatEquation4isanapproximation. TruTherm technology uses the transistor equation, Equation 5, which is a more accurate representation of the topologyofthethermaldiodefoundinanFPGAorprocessor. qx’V T = BE §I • C2 Kxkxln¤¤ ‚‚ I ' C1„ (5) 2 D+ IE = IF 100 pF PROCESSOR 3 D- IC IR LM95235 IF 2 D+ MMBT3904 100 pF 3 D- IR LM95235 Figure18. ThermalDiodeCurrentPaths TruTherm should only be enabled when measuring the temperature of a transistor integrated as shown in the processorofFigure18,becauseEquation5onlyappliestothistopology. CalculatingTotalSystemAccuracy The voltage seen by the LM95235 also includes the I R voltage drop of the series resistance. The non-ideality F S factor, η, is the only other parameter not accounted for and depends on the diode that is used for measurement. Since ΔV is proportional to both η and T, the variations in η cannot be distinguished from variations in BE temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the inaccuracyofthesensor.FortheforIntelprocessoron65nmprocess,Intelspecifiesa+4.06%/-0.897%variation in η from part to part when the processor diode is measured by a circuit that assumes diode equation, Equation 4, as true. As an example, assume a temperature sensor has an accuracy specification of ±1.0°C at a temperature of 80°C (353 Kelvin) and the processor diode has a non-ideality variation of +1.19%/-0.27%. The resultingsystemaccuracyoftheprocessortemperaturebeingsensedwillbe: T =+1.0°C+(+4.06%of353K)=+15.3°C (6) ACC and T =-1.0°C+(-0.89%of353K)=-4.1°C (7) ACC Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com TrueTherm technology uses the transistor equation, Equation 5, resulting in a non-ideality spread that truly reflects the process variation which is very small. The transistor equation non-ideality spread is ±0.39% for the Pentium4processoron90nmprocess.TheresultingaccuracywhenusingTruThermtechnologyimprovesto: T =±0.75°C+(±0.39%of353K)=±2.16°C (8) ACC The next error term to be discussed is that due to the series resistance of the thermal diode and printed circuit board traces. The thermal diode series resistance is specified on most processor data sheets. For Intel processors in 65 nm process, this is specified at 4.52Ω typical. The LM95235 accommodates the typical series resistance of Intel Processor on 65 nm process. The error that is not accounted for is the spread of the processor's series resistance, that is 2.79Ω to 6.24Ω or ±1.73Ω. The equation to calculate the temperature error duetoseriesresistance(T )fortheLM95235issimply: ER § ºC• T =¤0.62 ‚xR ER : PCB ' „ (9) Solving Equation 9 for R equal to ±1.73Ω results in the additional error due to the spread in the series PCB resistance of ±1.07°C. The spread in error cannot be canceled out, as it would require measuring each individual thermaldiodedevice.Thisisquitedifficultandimpracticalinalargevolumeproductionenvironment. Equation 9 can also be used to calculate the additional error caused by series resistance on the printed circuit board. Since the variation of the PCB series resistance is minimal, the bulk of the error term is always positive andcansimplybecancelledoutbysubtractingitfromtheoutputreadingsoftheLM95235. TransistorEquationη ,Non-ideality SeriesR,Ω T ProcessorFamily Min Typ Max IntelProcessoron65nmprocess 0.997 1.001 1.005 4.52 DiodeEquationη ,Non-ideality SeriesR,Ω D ProcessorFamily Min Typ Max PentiumIIICPUID67h 1 1.0065 1.0125 PentiumIIICPUID68h, 1.0057 1.008 1.0125 PGA370Socket,Celeron Pentium4,423pin 0.9933 1.0045 1.0368 Pentium4,478pin 0.9933 1.0045 1.0368 Pentium4on0.13micronprocess, 1.0011 1.0021 1.0030 3.64 2to3.06GHz Pentium4on90nmprocess 1.0083 1.011 1.023 3.33 IntelProcessoron65nmprocess 1.000 1.009 1.050 4.52 PentiumM(Centrino) 1.00151 1.00220 1.00289 3.06 MMBT3904 1.003 AMDAthlonMPmodel6 1.002 1.008 1.016 AMDAthlon64 1.008 1.008 1.096 AMDOpteron 1.008 1.008 1.096 AMDSempron 1.00261 0.93 CompensatingforDifferentNon-Ideality In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a particular processor. Texas Instruments temperature sensors are always calibrated to the typical non-ideality and series resistance of a given processor type. The LM95235 is calibrated for two non-ideality factors and series resistance values thus supporting the MMBT3904 transistor and Intel processors on 65nm process without the requirement for additional trims. For most accurate measurements TruTherm mode should be turned on when measuring the Intel processor on 65nm process to minimize the error introduced by the false non-ideality spread (see Diode Non-Ideality Factor Effect on Accuracy). When a temperature sensor calibrated for a particular processortypeisusedwithadifferentprocessortype,additionalerrorsareintroduced. 26 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 Temperature errors associated with non-ideality of different processor types may be reduced in a specific temperature range of concern through use of software calibration. Typical Non-ideality specification differences cause a gain variation of the transfer function, therefore the center of the temperature range of interest should be the target temperature for calibration purposes. The following equation can be used to calculate the temperature correction factor (T ) required to compensate for a target non-ideality differing from that supported by the CF LM95235. §KS - KPROCESSOR• T = x(T + 273K) CF ' K „ CR S where • η =LM95235non-idealityforaccuracyspecification S • η =Processorthermaldiodetypicalnon-ideality PROCESSOR • T =centerofthetemperaturerangeofinterestin°C (10) CR The correction factor should be directly added to the temperature reading produced by the LM95235. For example when using the LM95235, with the 3904 mode selected, to measure a AMD Athlon processor, with a typicalnon-idealityof1.008,foratemperaturerangeof60°Cto100°Cthecorrectionfactorwouldcalculateto: §1.003 - 1.008•(cid:152) TCF = ' 1.003 „ (80 + 273) = -1.75oC (11) Therefore, 1.75°C should be subtracted from the temperature readings of the LM95235 to compensate for the differingtypicalnon-idealitytarget. PCB LAYOUT FOR MINIMIZING NOISE Figure19. IdealDiodeTraceLayout In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced on traces running between the remote temperature diode sensor and the LM95235 can cause temperature conversion errors. Keep in mind that the signal level the LM95235 is trying to measure is in microvolts. The followingguidelinesshouldbefollowed: 1. V should be bypassed with a 0.1 µF capacitor in parallel with 100 pF. The 100 pF capacitor should be DD placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 µF needs to be inthenearvicinityoftheLM95235. 2. A 100 pF diode bypass capacitor is recommended to filter high frequency noise but may not be necessary. Make sure the traces to the 100 pF capacitor are matched. Place the filter capacitors close to the LM95235 pins. 3. Ideally, the LM95235 should be placed within 10 cm of the Processor diode pins with the traces being as straight, short and identical as possible. Trace resistance of 1Ω can cause as much as 0.62°C of error. This errorcanbecompensatedbyusingsimplesoftwareoffsetcompensation. 4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This GND guard should not be between the D+ and D- lines. In the event that noise does couple to the diode linesitwouldbeidealifitiscoupledcommonmode.ThatisequallytotheD+andD-lines. 5. Avoidroutingdiodetracesincloseproximitytopowersupplyswitchingorfilteringinductors. 6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be keptatleast2cmapartfromthehighspeeddigitaltraces. Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 SNIS142F–APRIL2006–REVISEDMARCH2013 www.ti.com 7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should crossata90degreeangle. 8. The ideal place to connect the LM95235's GND pin is as close as possible to the Processors GND associatedwiththesensediode. 9. Leakage current between D+ and GND and between D+ and D- should be kept to a minimum. Thirteen nano-amperes of leakage can cause as much as 0.2°C of error in the diode temperature reading. Keeping theprintedcircuitboardascleanaspossiblewillminimizeleakagecurrent. Noisecouplingintothedigitallinesgreaterthan400mVp-p(typicalhysteresis)andundershootlessthan500mV below GND, may prevent successful SMBus communication with the LM95235. SMBus no acknowledge is the most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB corner frequency of about 40 MHz is included on the LM95235's SMBCLK input. Additional resistance can be added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines containinghighspeeddatacommunicationscrossatrightanglestotheSMBDATandSMBCLKlines. 28 SubmitDocumentationFeedback Copyright©2006–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM95235LM95235-Q1

LM95235 LM95235-Q1 www.ti.com SNIS142F–APRIL2006–REVISEDMARCH2013 REVISION HISTORY ChangesfromRevisionE(March2013)toRevisionF Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 28 Copyright©2006–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:LM95235LM95235-Q1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM95235CIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM 0 to 90 T36C & no Sb/Br) LM95235CIMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM 0 to 90 T36C & no Sb/Br) LM95235DIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 90 T36D & no Sb/Br) LM95235DIMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 90 T36D & no Sb/Br) LM95235EIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 90 T36E & no Sb/Br) LM95235QEIMM NRND VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 36QE LM95235QEIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 36QE & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM95235, LM95235-Q1 : •Catalog: LM95235 •Automotive: LM95235-Q1 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM95235CIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235CIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235DIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235DIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235EIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235QEIMM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM95235QEIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM95235CIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM95235CIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM95235DIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM95235DIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM95235EIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM95235QEIMM VSSOP DGK 8 1000 210.0 185.0 35.0 LM95235QEIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 PackMaterials-Page2

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