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Datasheet AS3643 1300mA High Current LED Flash Driver 1 General Description 2 Key Features d The AS3643 is an inductive high efficient DCDC step up High efficiency 4MHz fixed frequency DCDC Boost converter with two current sinks. The DCDC step up converter with soft start allows small coils i converter operates at a fixed frequency of 4MHz and - Stable even in coil current limit l includes soft startup to allow easy integration into noise LED current adjustable up to 1300mA a sensitive RF systems. The two current sinks can oper- ate in flash / torch / assist (=video) light modes. v The AS3643 includes flash timeout, overvoltage, over- Automatic current adjustment for low battery voltage temperature, undervoltage and LED short circuit protec- PWM operation for lower output curren t for reliable tion functions. A TXMASK/TORCH function reduces the light output of the LED; running at 31l.25kHz to avoid flash current in case of parallel operation to the RF audible noise l power amplifier and avoids a system shutdown. Alterna- i tively this pin can be used to directly operate the torch ProtGection functions: t light directly. Automatic Flash Timeouts timer to protect the LED(s) Overvoltage and undervoltage Protection The AS3643 is controlled by an I2C interface and has a A Overtemperature P rotection hardware automatic shutdown if SCL=0 for 100ms. LED short/open tcircuit protection Therefore no additional enable input is required for shu t- I2C Interface nwith automatic shutdown ting down of the device once the system shuts down. s 5V constant voltage mode operation e m Available in tiny WL-CSP Package, 13 balls 0.5mm pittch 2.25x1.5x0.6mm, package size The AS3643 is available in a space-saving WL-CSP n package measuring only 2.25x1.5x0.6mm and operates 3 Applications a over the -30ºC to +85ºC temperature range. o Flash/torch/videolight for smartphones, feature-phones, Figure 1. Typical Operating Circuit tablets, DSCs, DVCs c l &(cid:2)(cid:3)(cid:2)(cid:3)(cid:31)(cid:16))(cid:18)*+ (cid:12)(cid:13)(cid:14)(cid:15) a (cid:3)(cid:12) ! (cid:12) ! (cid:20)"(cid:16)#$ c(cid:16)(cid:18)*(cid:24) (cid:12)(cid:22)%(cid:15)(cid:16) 1(cid:16)3(cid:17)0(cid:18)(cid:18)0(cid:19)m(cid:14)A i (cid:12)(cid:22)%(cid:15)$ (cid:3)(cid:12)(cid:22)%(cid:15) (cid:16)(cid:18)*(cid:24) n (cid:15).-(cid:14)(cid:20)/# (cid:21)(cid:24),((cid:20)- &(cid:23)(cid:2)’(cid:22)%(cid:15)(cid:16) (cid:15)(cid:22)(cid:21)(cid:3)+ h (cid:4)(cid:8) (cid:24)(cid:8)(cid:25)(cid:26)(cid:27)(cid:20)(cid:6)(cid:7)(cid:4)(cid:28)(cid:29) (cid:20)(cid:15)(cid:21)(cid:22)(cid:13)(cid:23) (cid:4)(cid:5)(cid:6)(cid:7) (cid:2)(cid:3)(cid:2)(cid:3) &(cid:23)(cid:2)’(cid:22)%(cid:15)$ (cid:3) (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:4)(cid:8) c (cid:25)(cid:8)(cid:31) (cid:3)(cid:9)(cid:7)(cid:10)(cid:11)(cid:9)(cid:6) (cid:30)(cid:9)(cid:6) e (cid:20)(cid:2)(cid:14) (cid:2)(cid:9) $(cid:3)(cid:31) (cid:5)(cid:6)(cid:29)(cid:7)0(cid:25)(cid:10)(cid:29) (cid:20)(cid:3)& T AS3643 (((((!!!!!(cid:2)(cid:2)(cid:2)(cid:2)(cid:2) www.austriamicrosystems.com/AS3643 1.5-4 1 - 33 (ptr)

AS3643 Datasheet, Confidential - Pinout 4 Pinout Pin Assignment Figure 2. Pin Assignments (Top View) (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7) d (cid:8)(cid:4)(cid:9)(cid:3)(cid:10)(cid:10)(cid:11)(cid:12)(cid:13) (cid:6)(cid:7) (cid:6)(cid:24) (cid:6)(cid:18) i (cid:14)(cid:15)(cid:16)(cid:17)(cid:7) (cid:28)(cid:29)(cid:21) (cid:19)(cid:20)(cid:21)(cid:22)(cid:15)(cid:16)(cid:17)(cid:7) l a (cid:27)(cid:7) (cid:27)(cid:24) (cid:23)(cid:12)(cid:4)(cid:4)(cid:30)(cid:10)(cid:11)(cid:5)(cid:31)(cid:12)(cid:11) (cid:5)(cid:28)(cid:29)(cid:21)! (cid:25)(cid:26)(cid:7) (cid:28)(cid:29)(cid:21) (cid:10)(cid:4)(cid:9)(cid:5)(cid:25)(cid:26)(cid:7)#(cid:25)(cid:26)(cid:24)(cid:5)(cid:9)(cid:3)(cid:13)(cid:30)(cid:10)(cid:11)"# v (cid:31)(cid:30)"(cid:12)$(cid:5)(cid:11) (cid:30)(cid:5)(cid:26)(cid:19)%(cid:23)(cid:25)(cid:2) (cid:23)(cid:7) (cid:23)(cid:24) (cid:23)(cid:18) l (cid:14)(cid:15)(cid:16)(cid:17)(cid:24) (cid:25)(cid:26)(cid:24) (cid:19)(cid:20)(cid:21)(cid:22)(cid:15)(cid:16)(cid:17)(cid:24) l i G t (cid:21)(cid:7) (cid:21)(cid:24) (cid:25)(cid:23)(cid:19) (cid:14)(cid:8)(cid:29) s A (cid:20)(cid:7) (cid:20)(cid:24) (cid:20)(cid:18) ASt3643 (cid:25)(cid:21)(cid:6) (cid:25)(cid:17)&(cid:15)(cid:27)(cid:20) (cid:17)’((cid:6)(cid:25))# (cid:17)(cid:15)&(cid:23)* n s e m t Pin Description n a Table 1. Pin Description for AS3643 o Pin Number Pin Name Description A1 VOUT1 DCDC convercter output capacitor - make a short connection to CVOUT / VOUT2 A2 GND Power and analog ground; make a short connection between both balls A3 LED_OUT1 Flashl LED current sink a B1 SW1 DCDC converter switching node - make a short connection to SW2 / coil LDCDC B2 GND cPower and analog ground; make a short connection between both balls C1 VOUT2 DCDC converter output capacitor - make a short connection to CVOUT / VOUT1 i C2 SnW2 DCDC converter switching node - make a short connection to SW1 /coil LDCDC C3 LED_OUT2 Flash LED current sink h D1 SCL serial clock input for I2C interface c Positive supply voltage input - connect to supply and make a short connection D2 VIN to input capacitor CVIN and to coil LDCDC e E1 SDA serial data input/output for I2C interface (needs external pullup resistor) TE2 STROBE Digital input with pulldown to control strobe time for flash function Function 1: Connect to RF power amplifier enable signal - reduces currents during flash to avoid a system shutdown due to parallel operation of the RF PA and the flash driver TXMASK/ E3 TORCH Function 2: Operate torch current level without using the I2C interface to operate the torch without need to start a camera processor (if the I2C is connected to the camera processor www.austriamicrosystems.com/AS3643 1.5-4 2 - 33

AS3643 Datasheet, Confidential - Absolute Maximum Ratings 5 Absolute Maximum Ratings Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Table4, “Electrical Characteristics,” on page4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. d Table 3. Absolute Maximum Ratings Parameter Min Max Units Comments i VIN to GND -0.3 +7.0 V l a STROBE, TXMASK/TORCH, SCL, SDA to VIN + -0.3 V max. +7V GND 0.3 v SW1/2, VOUT1/2, LED_OUT1/2 to GND -0.3 +7.0 V Note: Diode between VO UT1/2 and VOUT1/2 to SW1/2 -0.3 V SW1/2 l l voltage between GND pins 0.0 0.0 V short connection recommended i Input Pin Current without causing latchup -100 +100 GmA Norm:t EIA/JESD78 +IIN s Continuous Power Dissipation (TA = +70ºC) A Continuous power dissipation 1230 mW t PT at 70ºC1 Continuous power dissipation derating factor 16.7 mW/ºC n PDERATE2 s Electrostatic Discharge e ESD HBM 3 m ±8000 V pins LED_OUT1/2 t Norm: JEDEC JESD22-A114F ESD HBM ±200n0 V a ESD CDM ±500 V Norm: JEDEC JESD 22-C101E o ESD MM ±100 V Norm: JEDEC JESD 22-A115-B Temperature Ranges and Storage Conditions c For more information about thermal Junction to ambient thermal resistance 604 ºC/W metrics, see application note AN01 l Thermal Characteristics a Internally limited (overtemperature Junction Temperature +150 ºC protection), max. 20000s c Storage Temperature Range -55 +125 ºC Humidity i 5 85 % Non condensing Body Temperature dunring Soldering +260 ºC according to IPC/JEDEC J-STD-020 Represents a max. floor life time of Moisture Sensitivity Level (MSL) MSL 1 h unlimited 1.Depending onc actual PCB layout and PCB used measured on demoboard; for peak power dissipation during flashing see document 'AS3643 Thermal Measurements' e 2.PDERATE derating factor changes the total continuous power dissipation (PT) if the ambient temperature is not 70ºC. Therefore for e.g. TAMB=85ºC calculate PT at 85ºC = PT - PDERATE * (85ºC - 70ºC) T 3.Pins LED_OUT1 connected to LED_OUT2 and capacitor CVOUT connected to VOUT1/2 and GND; both GND pins connected together 4.Measured on AS3643 Demoboard. www.austriamicrosystems.com/AS3643 1.5-4 3 - 33

AS3643 Datasheet, Confidential - Electrical Characteristics 6 Electrical Characteristics VVIN = +2.7V to +4.4V, TAMB = -30ºC to +85ºC, unless otherwise specified. Typical values are at VVIN = +3.7V, TAMB = +25ºC, unless otherwise specified. Table 4. Electrical Characteristics Symbol Parameter Condition Min Typ Max Unit d General Operating Conditions VVIN Supply Voltage pin VIN 2.7 3.7 4.4 V i l 2.5 2.7 VVINREDUCE Supply Voltage AS3643 functionally working, but not all Va D_FUNC parameters fulfilled 4.4 5.5 v TXMASK/TORCH=L, SCL=SDA=0V, ISHUTDOWN Shutdown Current VVIN<3.7V 0.6 2.0 µA interface active, TXMASK/TORCH=L, l ISTANBY Standby Current 1 1.0 10 µA VVIN<3.7V l i Operating TAMB Temperature G -30 t25 85 ºC s Application Efficiency LCOIL=0.6µH@3A, LESR=60m, Eta (DCDC sainnkd) current LED_OUT1,2=1300mAA2, tFLASH<300ms 84 % t DCDC Step Up Converter n DCDC Boost output s VVOUT Voltage 2.8 5.5 V (pin VOUT1/2) e m DCDC Boost output constant voltage modet operation VVOUT5V (pinV VoOltaUgTe1 /2) const_v_mode (sene page 23)=1 5.0 V a RPMOS On-resistance DCDC internal PMOS switch 70 m o RNMOS On-resistance DCDC internal NMOS switch 70 m All internalc timings are derived from this fCLK Operating Frequency oscillator -7.5% 4.0 +7.5% MHz Current Sinks l VLED LED forward voltage a single LED at 1300mA 2.8 3.4 4.2 V LED_OUT1/2 current ILED_OUT sinks output combinedc single LED 0 1300 mA ILED_OUT LEDs_inOkU aTc1c/u2nr accuiyrrent ILED_OUT>605ºC0m <A T Jo r< I L1E0D0_ºOCUT<500mA -7 +7 % 500mA<ILED_OUT<650mA, 0ºC < TJ < 100ºC -5 +5 % ILED_OUT LED_OhUT1/2 ramp Ramp-up During startup 250 1000 µs RAMP time Ramp-down 500 1000 µs c ILREIDP_POLEUT LED_OriUppTl ecurrent ILED_OUT = 1000mA, BW=20MHz 20 mAPP e LED_OUT current Minimum voltage between pin LED_OUT1/2 VILETD_COMP sink voltage and GND for operation of the current sink 286 mV compliance VHIGH_VDS Comparator High VDS low vds and high vds comparator - see 4MHz/ 870 mV 1MHz Operating Mode Switching on page 11 VLOW_VDS Comparator Low VDS 280 ILEAK_ LED_OUT1/2 Pins LED_OUT1 and LED_OUT2 -1.0 0.0 +1.0 µA LED_OUT Leakage Current Protection and Fault Detection Functions (see page 11) www.austriamicrosystems.com/AS3643 1.5-4 4 - 33

AS3643 Datasheet, Confidential - Electrical Characteristics Table 4. Electrical Characteristics (Continued) Symbol Parameter Condition Min Typ Max Unit VVOUTMAX VVOUpTro otevecrtivoonltage DCDC Converter Overvoltage Protection 5.0 5.3 5.6 V Current Limit for coil coil_peak=00b 1.0 LDCDC (Pin SW) d measured at 40% coil_peak=01b 1.5 ILIMIT PWM duty cycle3 default value coil_peak=10b 1.8 2.0 2.23 A i maximum 40000s l lifetime operation in coil_peak=11b 2.5 overcurrent limit a Flash LED short Voltage measured between pins VOUT1,2 and v VLEDSHORT circuit detection LED_OUT1,2 1.0 V voltage Overtemperature TOVTEMP Protection 144 l ºC Junction temperature l TOVTEMPHY Overtemperature i5 ºC ST Hysteresis G t Can be adjusted with register s 2 1280 ms tFLASHTIMEO Flash Timeout Timer flash_timeout(page 24) UT accuAracy -7.5 +7.5 % t Falling VVIN 2.25 2.4 2.5 V n VUVLO Undervoltage Lockout sRising VVIN V+U0V.0L5O V+U0V.L1O V+U0V.1L5O V e Digital Interface m t High Level Input VIH Voltage Pins SCL, nSDA. 1.26 VVIN V aPin TXMASK/TORCH in external torch mode VIL Low VLoelvtaegl eInput (ext_toorch_on=10) 0.0 0.54 V High Level Input VIHFLASH Voltage cPin STROBE. 0.7 VVIN V Pin TXMASK/TORCH for TxMask mode Low Level Input 4 VILFLASH Voltage (ext_torch_on=01) 0.0 0.54 V l VOL Low LVeovltealg Oeutput a pin SDA, IOL=3mA 0.3 V ILEAK Leakage current c Pins SCL, SDA -1.0 0.0 +1.0 µA Pulldown current to IPD 5 i Pins TORCH, STROBE and TXMASK/TORCH 36 µA GNDn TORCH debounce tDEBTORCH htime 6.3 9 11.7 ms In indicator, assist or flash mode, if SCL is low tTIMEOUT cSCL timeout longer than this timeout, the AS3643 35 100 ms automatically enters shutdown mode I2C modee timings - see Figure3 on page7 T 1/ fSCLK SCL Clock Frequency tTIMEO 400 kHz UT Bus Free Time tBUF Between a STOP and 1.3 µs START Condition Hold Time (Repeated) tHD:STA 6 0.6 µs START Condition www.austriamicrosystems.com/AS3643 1.5-4 5 - 33

AS3643 Datasheet, Confidential - Electrical Characteristics Table 4. Electrical Characteristics (Continued) Symbol Parameter Condition Min Typ Max Unit LOW Period of SCL tLOW Clock 1.3 µs HIGH Period of SCL tHIGH Clock 0.6 µs d Setup Time for a tSU:STA Repeated START 0.6 µs i Condition l tHD:DAT Data Hold Time7 0 0.9 µsa tSU:DAT Data Setup Time8 100 vns tR SDRAis aen Tdi mSeC Lo fS Bigontha ls 02.10C +B l3 00 ns Fall Time of Both SDA 20 + l tF and SCL Signals 0.1CB i 300 ns Setup Time for STOP G t tSU:STO Condition 0.s6 µs CB CaEpaacchit ivBeu sL oLainde for CB — total capacitanceA of one bus line in pF 400 pF t I/O Capacitance CI/O (SDA, SCL) n 10 pF s e 1.For VBAT=4.5V, SCL=1.8V, SDA=1.8V maximum ISTANBY is <16µA. m 2.To improve efficiency at low output currents, the active part of the internal switching transistor PMOS is reduced t in size to 1/5 its original size. This reduces the current required to drive the PMOS transistor and therefore n improves overall efficiency at low output currents. a 3.Due to slope compensation of the current limit, ILIMIT changes with duty cycle. o 4.The logic input levels VIH and VIL allow for 1.2V or 1.8V supplied driving circuit 5.A pulldown current of 36µA is equal to a pulldown resistor of 42k at 1.5V c 6.After this period, the first clock pulse is generated. 7.A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL signal) to bridge the undefined regionl of the falling edge of SCL. a 8.A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT = to 250ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a c device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tR max + tSU:DAT = 1000 + 250 = 1250ins before the SCL line is released. n h c e T www.austriamicrosystems.com/AS3643 1.5-4 6 - 33

AS3643 Datasheet, Confidential - Electrical Characteristics Timing Diagrams Figure 3. I2C mode Timing Diagram d i SDA l a tBUF v tLOW tR tF tHD:STA l l SCL i G t s tHD:STA tSU:STO A tSU:STA tHD:DAT tHIGH tSU:DAT t STOP START REPEATED n START s e m t n a o c l a c i n h c e T www.austriamicrosystems.com/AS3643 1.5-4 7 - 33

AS3643 Datasheet, Confidential - Typical Operating Characteristics 7 Typical Operating Characteristics VVIN = 3.7V, TA = +25ºC (unless otherwise specified), LED: Osram Phaser 2 (VFLED=3.8V at 1A) Figure 4. DCDC Efficiency vs. VVIN Figure 5. Application Efficiency (PLED/PVIN) vs. VVIN d 100 90 95 i 85 l 90 a 80 85 v %80 %75 75 70 l l 70 IOUT = 1300mA/1 LED IOUT = 1300imA/1 LED 65 65 IOUT = 1300mA/1 LED/ 1/4MHz on G IOUT =t 1300mA/1 LED/ 1/4MHz on IOUT = 1000mA/1 LED IOsUT = 1000mA/1 LED 60 60 2,8 3,2 3,6 4 4,4 4,8 5,2 2,8 3,2 3,6 4 4,4 4,8 5,2 A Input Voltage (V) Input Voltage (V) t Figure 6. Battery Current vs. VVIN Figure 7. Efficiencyn at low currents (300mA) s 3 100 e IOUT = 1300mA/1 LED m IOUT = 1300mA/1 LED/ 1/4MHz on 95 2,5 t IOUT = 1000mA/1 LED 9n0 2 a 85 o A1,5 %80 c 75 1 70 0,5 l IOUT = 300mA/1 LEDs a 65 DCDC Efficiency IOUT = 300mA/1 LEDs 0 60 Application Efficiency c 2,8 3,2 3,6 4 4,4 4,8 5,2 2,8 3,0 3,2 3,4 3,6 3,8 4,0 4,2 4,4 Input Voltage (V) Input Voltage (V) i n Figure 8. ILED Startup (ILED_OUT=1.0A) Figure 9. IVIN, ILED Startup (ILED_OUT=800mA) h c e T www.austriamicrosystems.com/AS3643 1.5-4 8 - 33

AS3643 Datasheet, Confidential - Typical Operating Characteristics Figure 10. ILED Startup (ILED_OUT=60mA) Figure 11. VOUT / ILED_OUT ripple, ILED_OUT = 1.0A d i l a v l l i G t s Figure 12. ILED Rampdown (ILED_OUT=1.0A) Figure 13. ILED_OUT vs. TAMB A 63 t n s 62 e m 61t mAn a 60 o c 59 58 l -30 -10 10 30 50 70 a Ambient Temperature (C) c i Figure 14. Oscillator frequency fCLK vs. TAMB Figure 15. Flash Timeout n 4.2 h 4.1 c MHz e 4.0 T 3.9 3.8 -30 -10 10 30 50 70 Ambient Temperature (C) www.austriamicrosystems.com/AS3643 1.5-4 9 - 33

AS3643 Datasheet, Confidential - Detailed Description 8 Detailed Description The AS3643 is a high performance DCDC step up converter with internal PMOS and NMOS switches. Its output is connected to one flash LED with an internal current sink. The device is controlled by the pins SDA and SCL in I2C mode. The actual operating mode like standby, assist light, indicator or flash mode, can then be chosen by the interface. If not d 1 in standby mode, the device automatically enters shutdown mode by keeping SCL low for more than tTIMEOUT . The AS3643 includes a fixed frequency DCDC step-up with accurate startup control. Together with the current sink (on i LED_OUT1/2) it includes several protection and safety functions. l a Internal Circuit Diagram v Figure 16. Internal circuit Diagram (cid:2)(cid:3)(cid:4)(cid:5) (cid:8)(cid:9)(cid:7)(cid:9)(cid:7) l l (cid:7)(cid:2)(cid:24)(cid:30) i (cid:2)(cid:24)(cid:30) AS3643 G (cid:6)(cid:31) (cid:16)! t s (cid:2)(cid:24)(cid:30) (cid:7)(cid:17) (cid:2)%"(cid:11)(cid:2)(cid:8)(cid:10)(cid:11) (cid:10)(cid:26)’(cid:26)(cid:20) (cid:9)(cid:7)(cid:9)(cid:7)(cid:23)(cid:4)(cid:25)(cid:21)(cid:22)((cid:19)A (cid:2)(cid:11)"(cid:5) (cid:16)! (cid:10) (cid:11) (cid:9)(cid:27)(cid:18)&(cid:26)(cid:27) t (cid:5)(cid:13)(cid:14)(cid:4)(cid:6)(cid:15)(cid:16)(cid:5) (cid:10)(cid:21),- (cid:24)(cid:8)(cid:24)(cid:14)(cid:24)(cid:5) 2 (s&(cid:24)(cid:26)(cid:6) (cid:27)(cid:12)(cid:29)(cid:30)+(cid:6)(cid:27)(cid:12)(cid:27) n(cid:9)(cid:27)(cid:18)&(cid:26)(cid:27) )(cid:29)*((cid:26),(cid:27)(-(cid:23)(cid:21)(cid:29)+(cid:27)(cid:21)(cid:27)(cid:27)(cid:20)((cid:26)(cid:27)(cid:25)(cid:20)) (cid:7)(cid:2)(cid:11)"(cid:5) 0 (cid:29)(,- e -+(cid:22)’(cid:26)’.(cid:18)- (cid:12) 2 (&(cid:26)(cid:27) (cid:6)(cid:5)(cid:10)(cid:11)(cid:3) (cid:25)(cid:20)(cid:26)(cid:27)(cid:28)(cid:21)(cid:29)(cid:26) (cid:29)(cid:22). (cid:14) (cid:16)(cid:17)/*(cid:23) (cid:2)2(cid:24)(cid:8)(cid:12)(cid:9)#(cid:7)(cid:11)(cid:14)% -m1,(cid:23)(cid:29)(,- (cid:29)-+n1(cid:27),(cid:27)(cid:26)t(cid:25)(cid:20) (cid:2)(cid:2)(cid:8)(cid:2)(cid:12)(cid:11)(cid:9)"(cid:6)(cid:5)(cid:17)(cid:14)(cid:11)(cid:4)(cid:10)(cid:13)(cid:5) (cid:2) (cid:8) (cid:21)(cid:22)(cid:23)(cid:24) (cid:2)(cid:11)"(cid:5) (cid:16)! (cid:2)a (cid:8)(cid:12)(cid:9)0’5((cid:27)(cid:20) (cid:6)(cid:7) (cid:9)(cid:18)(cid:19)(cid:18)(cid:20) (cid:2)(cid:17)(cid:24)$(cid:17)#(cid:2)(cid:9)(cid:6) o (cid:8)(cid:12)(cid:9)# ,(cid:18)(cid:25)6 (cid:2) (cid:11)"(cid:5) (cid:6)(cid:9)(cid:4) (cid:9)#(cid:5) (cid:9)#(cid:5)! (cid:2)(cid:8)(cid:11)(cid:31)(cid:2)#(cid:2)(cid:9)(cid:6) 5(cid:22)(cid:18)((cid:19)15c(cid:23)(cid:23)&&44’’ (cid:9)(cid:18)(cid:19)(cid:18)(cid:20)(cid:21)(cid:22)(cid:23)(cid:7)((cid:25)(cid:20)(cid:27)((cid:22) (cid:8)(cid:11)(cid:12)"(cid:9)(cid:5)#! (cid:12)"(cid:12)" ((cid:25) (cid:8)(cid:11)(cid:8)(cid:11) (cid:29)(cid:22). l (cid:10)(cid:26)(cid:28)’ ((cid:25) /(cid:14)(cid:17)* a (cid:11)&(cid:26)(cid:27)0 (cid:29)(cid:22). (cid:2)3(cid:23)(cid:24) (cid:5)(cid:26),-(cid:26)(cid:27)(cid:21)(cid:20)+(cid:27)(cid:26) c i $(cid:30)(cid:9) n Softstart / Soft rhamp down During startup and ramp down the LED current is smoothly ramped up and ramped down. If the DCDC converter goes out of regulationc (measured by monitoring the voltage across the current sinks), the ramp up is temporarily stopped in 2 order for the DCDC to return to regulation . e T 1. Following registers are reset to their default value if the timeout expires: out_on=0, ext_torch_on=00, mode_setting=00, const_v_mode=0. 2. The actual value of the LED current setting can be readout by the register led_current_actual (see page 26) to allow the camera processor to adopt to the actual operating conditions. www.austriamicrosystems.com/AS3643 1.5-4 10 - 33

AS3643 Datasheet, Confidential - Detailed Description 4MHz/1MHz Operating Mode Switching If freq_switch_on (see page 26)=1 and in flash and assist light mode (indicator mode or low current mode using PWM mode -see mode_setting(page 24) - always will use pulseskip) if led_current>=40h , the DCDC converter always oper- ates in PWM mode (exception: PFM mode is allowed during startup) to reduce EMI in EMI sensitive systems. For flash and assist light mode and high duty cycles close to 100% on-time (maximum duty cycle) of the PMOS, the DCDC con- 3 verter can switch into a 1MHz operating mode and maximum duty cycle to improve efficiency for this load condition . d The DCDC converter returns back to its normal 4MHz operating frequency when load or supply conditions change. Due to this switching between two fixed frequencies the noise spectrum of the system is exactly defined and predict- i able. If improved efficiency is required, the fixed switching between 1MHz / 4MHz can be disabled by freq_switch_on l (see page 26)=0. In this case pulseskip will be used. a The internal circuit for switching between these two frequencies is shown in Figure17: v Figure 17. Internal circuit of 4MHz/1Mhz selection (cid:5)(cid:6)(cid:7)(cid:8) l (cid:13)&"(0 AS3643 l i (cid:5)%/(cid:8)"(0 G t (cid:26)(cid:21)(cid:27)(cid:31)(cid:28) (cid:2)(cid:2)(cid:2)(cid:2)(cid:2)(cid:2)(cid:3)(cid:4)(cid:3)(cid:4) s ’&(cid:15) (cid:5)(cid:5)%/(cid:8)(cid:15)(cid:7)2 (cid:17)(cid:18)(cid:19)(cid:2)(cid:14) " (cid:18)(cid:31)(cid:20)# A %3(cid:28) (cid:2)$1(cid:3)(cid:2) (cid:17)(cid:28)(cid:30)(cid:28)(cid:31)(cid:30)(cid:2)4(cid:26)56(cid:20)(cid:30)(cid:12)(cid:21)(cid:19)37 t ! (cid:31)(cid:20)# (cid:20)(cid:21)(cid:22)(cid:12)(cid:19)(cid:17)(cid:23) n$1(cid:3)(cid:12)%/(cid:8)"(cid:2)(cid:21)(cid:27)(cid:2)$1(cid:3)(cid:12)%/(cid:8)0 (cid:14)(cid:15)(cid:9)(cid:16) (cid:27)(cid:28)(cid:23)(cid:28)(cid:30)s (cid:13)(cid:28)(cid:30)()(cid:28)(cid:23)(cid:2)** (cid:5) e +!m,(cid:23)(cid:2)(cid:17)(cid:28)-. (cid:2) %$& (cid:23)(cid:28)(cid:30) t(cid:12)(cid:5)(cid:3) (cid:13) (cid:26)(cid:27)(cid:28)(cid:29)(cid:12)(cid:23)(cid:22)(cid:18)(cid:30)(cid:31)(cid:24)(cid:12)(cid:21) (cid:24)(cid:18)(cid:25)(cid:24)(cid:12)(cid:19)(cid:17)(cid:23) (cid:2)n a (cid:5)(cid:9)(cid:10)(cid:11)(cid:9)(cid:12)(cid:5)(cid:3)(cid:13) o Note: For simplicity Figure17 shows only a single ccurrent sink. Protection and Fault Detection Fu nctions l The protection functions protect the AS36a43 and the LED(s) against physical damage. In most cases a Fault register bit is set, which can be readout by the I2C interface. The fault bits are automatically cleared by a I2C readout of the fault c 4 register. Additionally the DCDC is stopped and the current sinks are disabled by resetting out_on=0, mode_setting=00 and ext_torch_on=00. i n Overvoltage Protection In case of no or a broken LED(s) at the pin LED_OUT1/2 and an enabled DCDC converter, the voltage on VOUT1/2 h 5 rises until it reaches VVOUTMAX (overvoltage condition) and the voltage across the current source is below low_vds ., the DCDC convcerter is stopped, the current sources are disabled and the bit fault_ovp (see page 25) is set6. e T 3. Efficiency compared to a 4MHz only DCDC converter forced to operate with minimum duty cycle. 4. Applies for all faults except TXMASK event occurred 5. If overvoltage is reached, but none of the low_vds comparator(s) triggers, VOUT1/2 is still regulated below VVOUTMAX. 6. In constant voltage mode (5V generation, register bit const_v_mode=1) this fault is disabled. www.austriamicrosystems.com/AS3643 1.5-4 11 - 33

AS3643 Datasheet, Confidential - Detailed Description Short Circuit Protection After the startup of the DCDC converter, the voltage on LED_OUT1/2 is continuously monitored and compared against 7 VLEDSHORT if the LED current is above 20mA (see Figure18). If the voltage across the LED (VFLED = VOUT1/2- LED_OUT1/2) stays below VLEDSHORT, the DCDC is stopped (as a shorted LED is assumed), the current sinks are dis- abled and the bit fault_led_short (see page 25) is set. Figure 18. Short LED detection d i (cid:23)(cid:24)(cid:5)(cid:25)(cid:2)(cid:3)(cid:13)(cid:14)(cid:15)(cid:3)(cid:26)(cid:10)(cid:2)(cid:10)(cid:7)(cid:2) (cid:5)(cid:5)(cid:3)(cid:8)(cid:7)(cid:2) #(cid:10) (cid:13)(cid:14)(cid:15)(cid:3)(cid:5)$ l (cid:4)(cid:27)(cid:28)(cid:13)(cid:14)(cid:15)(cid:3)%(cid:3)(cid:27)(cid:13)(cid:14)(cid:15)(cid:23)(cid:30)(cid:17)(cid:31)(cid:19)(cid:11) a (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:17)(cid:18)(cid:19)(cid:20)(cid:21)(cid:22) v (cid:26)(cid:10)(cid:2)(cid:10)(cid:7)(cid:2) (cid:5)(cid:5)(cid:3)(cid:2)(cid:24)(cid:25)(cid:10)(cid:6)(cid:24)(cid:5)(cid:9)(cid:26)(cid:3)(cid:4)(cid:6)(cid:10)(cid:10)(cid:3)(cid:2)(cid:10)&(cid:2)(cid:11) l l (cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:2)(cid:3)(cid:2)(cid:5)(cid:3)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:23)(cid:24)(cid:5)(cid:25)(cid:2)(cid:10)(cid:26)(cid:3)(cid:13)(cid:14)(cid:15)(cid:3)(cid:24)(cid:8)(cid:6)(cid:3)(cid:28)(cid:10)(cid:10)(cid:5)(cid:3)(cid:26)(cid:10)(cid:2)(cid:10)(cid:7)(cid:2)(cid:10)(cid:26) i (cid:4)(cid:27)(cid:28)(cid:13)(cid:14)(cid:15)(cid:3)(cid:29)(cid:3)(cid:27)(cid:13)(cid:14)(cid:15)(cid:23)(cid:30)(cid:17)(cid:31)(cid:19)(cid:11)(cid:3)(cid:8)(cid:5)(cid:26)(cid:3) (cid:6)(cid:3)(cid:6)! (cid:2)(cid:7)(cid:24)(cid:10)(cid:26)(cid:3)(cid:5)"" G t s Overtemperature Protection A t The junction temperature of the AS3643 is continuously monitored. If the temperature exceeds TOVTEMP, the DCDC is stopped, the current sinks are disabled (instantaneous) and the bit fault_overtenmp (see page 25) is set. The driver is 8 s automatically re-enabled once the junction temperature drops below TOVTEMP-TOVTEMPHYST. e m TXMASK event occurred t If during flash, TXMASK current reduction is enabled (see TXMASK on page 15, configured by ext_torch_on=01) and n a TXMASK event happened (pin TXMASK/TORCH=1), the fault register bit fault_txmask (see page 25) is set. a Flash Timeout o If the flash is started a timeout timer is started in parallel. If the flash duration defined by the STROBE input (strobe_on c = 1 and strobe_type = 1, see Figure25 on page17) exceeds tFLASHTIMEOUT (adjustable by register flash_timeout (see page 24)), the DCDC is stopped and the flash current sinks (on pin LED_OUT1/2) are disabled and fault_timeout is set. l If the flash duration is defined by the timeaout timer itself (strobe_on = 0, see Figure23 on page17), the register fault_timeout is set after the flash has been finished. c Supply undervoltage Protection If the voltage on the pin VIN (=ibattery voltage) is or falls below VUVLO, the AS3643 is kept in shutdown state and all registers are set to their defnault state. Wakeup Circuit - Phower off detection In flash, assist light and indicator mode (register mode_setting(page 24)=01, 10 or 11) and out_on(page 24)=1, if SCL is L for more thacn tTIMEOUT, shutdown mode is automatically entered. This feature automatically detects a power-off of the controlling circuit driving SCL and SDA (VDD_I/F goes to 0V e.g. due to a low power condition of the driving circuit) - the interneal circuit is shown in Figure19: T 7. To avoid errors in short LED detection for LEDs with a high leakage current 8. In constant voltage mode (const_v_mode=1) the DCDC will not be automatically re-enabled. www.austriamicrosystems.com/AS3643 1.5-4 12 - 33

AS3643 Datasheet, Confidential - Detailed Description Figure 19. Device Shutdown and Wakeup (cid:17)(cid:18)(cid:19)(cid:8)(cid:20)(cid:21)(cid:8)(cid:22)(cid:18)(cid:19)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20) (cid:2)(cid:18)(cid:23)(cid:3)(cid:10)(cid:18)(cid:20)(cid:24)(cid:5)(cid:25)(cid:18)(cid:26)(cid:27)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20)(cid:20) (cid:8)(cid:29) d (cid:15)(cid:8)(cid:26)(cid:29)(cid:4)(cid:18)(cid:19) !(cid:3)%(cid:18)(cid:8)(cid:26)(cid:4) (cid:4)!(cid:11)" #$! i (cid:9)(cid:2)(cid:2)(cid:10)(cid:11)(cid:12)(cid:13) (cid:31) (cid:14) ! l a (cid:14)(cid:2)(cid:16) v (cid:14)(cid:2)(cid:16) &(cid:3)(cid:2)’(cid:20)(cid:30)(cid:8)(cid:19)(cid:20)(cid:30)(cid:6)(cid:5)(’) (cid:11)(cid:28)(cid:15)(cid:20)(cid:11)(cid:29)(cid:4)(cid:18)(cid:19)(cid:30)(cid:5)(cid:10)(cid:18) (cid:2)(cid:3)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6) (cid:31) (cid:14) ! (cid:5)(((cid:3) ((cid:4)(cid:20)(cid:6)(cid:3)(cid:2)’(cid:4)(cid:20)(cid:8)(cid:19) (cid:7)(cid:8)(cid:2)(cid:3)(cid:10) (cid:3)(cid:29)l*(cid:3)(cid:10)(cid:5)(cid:4)(cid:8)(cid:19)(cid:20)%(cid:8)*(cid:18)(cid:20) (cid:14)(cid:15)(cid:7) (cid:14)(cid:15)(cid:7) l (cid:21)#(cid:31) i AS3643 G t s In shutdown mode once pin SCL goes high for the first time, thAe internal counter show n in Figure19 is immediately reset thus releasing the internal RESET (assuming VIN is above VUVLO) signal andt allows instant communication on the I2C bus. Therefore no additional action is required t o leave the shutdown mnode and start I2C communication. s Purpose of this circuit e The purpose of this circuit is an additional secumrity mechanism. t Assume the user programmed torch or indicator operation (there is no timeout for these operating modes) and the bat- tery slowly drops below the undervoltage limit of the system. Then processor would get an reset by the PMIC and the LDO operating VDD_I/F is switched ofaf, but the processor might not have been able to switch-off the torch/indicator operation of the AS3643. Due to the implemented security omechanism the AS3643 detects a power off of VDD_I/F and automatically enters shutdown. c Current consumption in standby/shutdown mode The AS3643 is designed to draw minimum curr ent in standby and shutdown mode. There is a small difference in cur- rent consumption between these two operatling modes (typ. 300nA) only due to the internal level shifters (see the schmitt trigger input buffers connected to aSCL and SDA in Figure19) for shifting up the voltage on SCL/SDA (VDD_I/F e.g. 1.8V) to the supply voltage on VIN (e.g. 3.7V). If the AS3643 is driven with digital levels close to 0V/VIN, the cur- rent consumption for standby mode cis identical to shutdown mode. i n h c e T www.austriamicrosystems.com/AS3643 1.5-4 13 - 33

AS3643 Datasheet, Confidential - Detailed Description Operating Mode and Currents The output currents and operating mode are selected according to the following table: Table 5. Operating Mode and current settings AS3643 configuration operating mode and currents LED_OUT1/2 d output current d H E mode_ out_on SCL an SDA TORC STROB spe(2satt4egi)nee g p(2sa4eg)ee Condition Mode Acreolnwntat eSynestt 1wto r( lireteedg _sicasumtererr e Cnuta)r -li and Current Set2 v SCL shutdown low if previous operating for X X X X mode was indicator, l0 tTIME assist light or flash mode all registers are reset to 1 their default values l OUT i 10, 01 G t X X 0 or 11 s ext_torch_on (see page standby 0 X X 22) not 10 A t 0 X ext_torch_on =10 00 X n LED current is defined s 2 1 X ext_torch_on =10 exteernal torch mode by the 7LSB bits of m led_current and led_current2 t d n LED current is defined pte a by the 6LSB bits (bits e 5...0) of led_current and cc o indicator mode or led_current2 pwm e a X X 01 1 low current pwm mode3 modulated with r 31.25kHz defined by a c s register inct_pwm (1/ nd 16...4/16) a m m l LED current is defined co X X 10 1 a assist light mode by the 7LSB2 bits (6...0) C of led_current and 2I c led_current2 X X strobe_on (see page 25) flash mode; i = 0 n flash duration defined by LED current is defined strobe_on = 1 and flash_timeout (see page by led_current and X 0->1 strobe_type (see page 24) led_current2 - the h 25) = 0 11 1 current can be reduced flash mode; during flash, see Flash c Current Reductions X 1 strobe_on = 1 and flash duration defined by below strobe_type = 1 e STROBE input; timeout defined by flash_timeout T 1.SCL low for tTIMEOUT and operating mode is indicator, assist or flash mode then shutdown mode is entered. 2.The MSB bit of this register not used to protect the LED; therefore the maximum assist / torch light current = half the maximum flash current 3.The low current mode is a general purpose PWM mode to drive less current through the LED in average, but keep the actual pulsed current in a range where the light output from the LED is still specified. As only the 6 LSBs of led_current are used the maximum current is limited to 1/4 of the maximum flash current. www.austriamicrosystems.com/AS3643 1.5-4 14 - 33

AS3643 Datasheet, Confidential - Detailed Description Flash Current Reductions TXMASK Usually the flash current is defined by the register led_current . If the TXMASK/TORCH input is used and (configured by ext_torch_on=01), the flash current is reduced to flash_txmask_current if TXMASK/TORCH=1. Current Reduction by VIN measurements in Flash Mode d Due to the high load of the flash driver and the ESR of the battery (especially critical at low temperatures), the voltage on the battery drops. If the voltage drops below the reset threshold of the system would reset. To prevent this condition i the AS3643 monitors the battery voltage and keeps it above vin_low_v_run as follows: l Before a flash is started the voltage on VIN is measured. If the voltage is below the setting of vin_low_v the fault_uvalo (see page 25) is set and the flash is disabled (driver stays in shutdown) if vin_low_v_shutdown=1. The flash current is reduced to flash_txmask_current if vin_low_v_shutdown=0. v During flash, if the voltage on VIN drops below the threshold defined by vin_low_v_run, the flash current is reduced (or ramping of the current is stopped during flash current startup) and fault_uvlo is set. The timing for the reduction of the l current is 8µs/LSB current change. l During the flash pulse the actual used current can be readout by the regi ster led_current_actual.i After the flash pulse the minimum current can be readout by the registGer led_current_min - thist allows to adjust the camera sensitivity (gain or iso-settings) for the subsequent flash pulse (e.g. when using a psre-flash and a main flash pulse). A The internal circuit for low voltage current reductions are shown in Figure20: t Figure 20. Low Voltage current Reduction Internal Circ uit n s(cid:8) (cid:2)(cid:3)(cid:2)(cid:3) (cid:12)(cid:13)(cid:14)(cid:15) e (cid:3)(cid:12)(cid:2)(cid:3) m(cid:12)(cid:2)(cid:3) (cid:4)(cid:5) t (cid:9)"(cid:13)(cid:6)(cid:6)(cid:7) (cid:27)(cid:4)! a n (cid:12)(cid:6)(cid:7)(cid:15) (cid:3)(cid:12)(cid:6)(cid:7)(cid:15) o c (cid:2)(cid:3)(cid:2)(cid:3) (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:4)(cid:8) (cid:17)(cid:9)(cid:5)(cid:18)(cid:8)(cid:4)(cid:19)(cid:18)(cid:17) (cid:18)(cid:7)(cid:11)(cid:5) (cid:3)(cid:9)(cid:7)(cid:10)(cid:11)(cid:9)(cid:6) (cid:20)(cid:16)(cid:21)(cid:12)(cid:16)(cid:16)(cid:16)(cid:20)l(cid:16)(cid:22)(cid:23)(cid:12) (cid:8)(cid:27)(cid:2)(cid:18)(cid:6)(cid:7)(cid:15)(cid:29) (cid:24)(cid:21)(cid:25)(cid:12)(cid:14)(cid:13)(cid:6)(cid:9)(cid:26)(cid:13) a (cid:2)(cid:9)(cid:10)(cid:4)(cid:11)(cid:5)(cid:10)(cid:9)(cid:11) (cid:8)(cid:27)(cid:2)(cid:18)(cid:6)(cid:7)(cid:15)(cid:30) (cid:2)(cid:14)(cid:3) (cid:12)(cid:11)(cid:8)(cid:13)(cid:9)(cid:14)(cid:15)(cid:9)(cid:5)(cid:16) (cid:7)(cid:9)(cid:28)(cid:11)(cid:10)(cid:9)(cid:18)(cid:10)(cid:11)(cid:7)(cid:7)(cid:9)(cid:5)(cid:6) c i (cid:2)(cid:4)(cid:27)(cid:15) (cid:3)(cid:2)(cid:4)(cid:4)(cid:11)(cid:19)(cid:5)(cid:5)(cid:6) n (cid:8)(cid:9)(cid:28)(cid:18)(cid:10)(cid:11)(cid:7)(cid:7)(cid:9)(cid:5)(cid:6) (cid:4)(cid:2)(cid:14) (cid:18) (cid:10)(cid:6)(cid:11) (cid:8) h (cid:4)(cid:3)(cid:8) (cid:2)(cid:5)(cid:6)(cid:9)(cid:7)(cid:31) (cid:10)(cid:9) (cid:8)(cid:9)(cid:28)(cid:18)(cid:10)(cid:11)(cid:7)(cid:7)(cid:9)(cid:5)(cid:6) AS3643 c (cid:18)(cid:25)(cid:9)(cid:5) e A mobile phone camera flash system can trigger a diagnostic flash and a main-flash: T The diagnostic flash is initiated by the processor. After this diagnostic flash, the determined maximum flash current can be read back through the I2C interface from register led_current_min (see page 26) and used for the setting for the main flash. Therefore the current in the main-flash is constant and additionally the camera system can use this current for picture quality adjustments - the waveforms for this concept are shown in Figure21: www.austriamicrosystems.com/AS3643 1.5-4 15 - 33

AS3643 Datasheet, Confidential - Detailed Description Figure 21. Low Voltage current Reduction Waveform with diagnostic-Flash and Main-Flash Phase #(cid:2)(cid:18)(cid:14)(cid:11)(cid:12)(cid:21)(cid:20)(cid:6)(cid:21)(cid:9)(cid:7)(cid:15)(cid:14)(cid:10)(cid:2)(cid:8)(cid:20)(cid:9)(cid:7)(cid:21) #(cid:2)(cid:18)(cid:14)(cid:11)(cid:12)(cid:21)(cid:20)(cid:6)(cid:21)(cid:9)(cid:7)(cid:15)(cid:14)(cid:10)(cid:2)(cid:8)(cid:20)(cid:9)(cid:7)(cid:21) (cid:14)(cid:2)(cid:20)$(cid:28)%(cid:20)(cid:11)(cid:8)(cid:9)(cid:20)(cid:17)(cid:18)(cid:11)(cid:13)(cid:27) (cid:14)(cid:2)(cid:20)(cid:11)(cid:9)(cid:9)(cid:10)(cid:14)(cid:10)(cid:2)(cid:8)(cid:11)(cid:18)(cid:20)(cid:18)(cid:2)(cid:11)(cid:9) &(cid:6)(cid:10)(cid:5)(cid:21)(cid:6)(cid:20)(cid:26)(cid:2)(cid:11)(cid:9) (cid:31)(cid:21)(cid:24)(cid:12)(cid:24)(cid:20)(cid:15)(cid:11)(cid:23)(cid:21)(cid:6)(cid:11)(cid:20)(cid:13)(cid:21)(cid:8)(cid:13)(cid:2)(cid:6) #$%& #$%& d ’()%*+ ,-./0(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6)(cid:7)(cid:8) i (cid:7)(cid:13)(cid:21)(cid:20)(cid:13)(cid:11)(cid:23)(cid:21) l ’()%*+ (cid:15)(cid:7)(cid:6)(cid:6)(cid:21)(cid:8)(cid:14) a v (cid:9)(cid:10)(cid:11)(cid:12)(cid:8)(cid:2)(cid:13)(cid:14)(cid:10)(cid:15)(cid:16) (cid:19)(cid:11)(cid:10)(cid:8)(cid:20)(cid:17)(cid:18)(cid:11)(cid:13)(cid:27) (cid:17)(cid:18)(cid:11)(cid:13)(cid:27) (cid:6)(cid:21)(cid:22)(cid:2)(cid:6)(cid:14)(cid:20)(cid:23)(cid:10)(cid:8)(cid:24)(cid:20)(cid:25)(cid:17)(cid:26)(cid:27)(cid:28)(cid:29) (cid:30)(cid:6)(cid:2)(cid:15)(cid:21)(cid:13)(cid:13)(cid:2)(cid:6)(cid:20) (cid:28)(cid:27)(cid:2)(cid:2)(cid:14)(cid:20)(cid:25)(cid:23)(cid:11)(cid:12)(cid:21) (cid:14)(cid:2)(cid:20)(cid:30)(cid:6)(cid:2)(cid:15)(cid:21)(cid:13)(cid:13)(cid:2)(cid:6) (cid:11)(cid:9)!(cid:7)(cid:13)(cid:14)(cid:13)(cid:20)(cid:12)(cid:11)(cid:10)(cid:8)(cid:20) (cid:3)(cid:10)(cid:14)(cid:27)(cid:20)(cid:15)(cid:2)(cid:8)(cid:13)(cid:14)(cid:11)(cid:8)(cid:14)(cid:20)(cid:11)(cid:8)(cid:9)(cid:20)(cid:3)(cid:21)(cid:18)(cid:18) l (cid:31)(cid:18)(cid:21)(cid:9)(cid:4)(cid:15)(cid:7)(cid:6)(cid:6)(cid:21)(cid:8)(cid:14)(cid:4)(cid:23)(cid:10)(cid:8) (cid:2)"(cid:20)(cid:25)(cid:23)(cid:11)(cid:12)(cid:21)(cid:20)(cid:28)(cid:21)(cid:8)(cid:13)(cid:2)(cid:6) (cid:9)(cid:21)"(cid:10)(cid:8)(cid:21)(cid:9)(cid:20)"(cid:18)(cid:11)(cid:13)(cid:27)(cid:20)(cid:15)(cid:7)(cid:6)(cid:6)(cid:21)(cid:8)(cid:14) l i G t s If the diagnostic flash should be short (e.g. 10ms) it is recommended to operate this diagnostic flash at slightly higher vin_low_v_run setting compared to the main flash as shown in Figure22: A Figure 22. Low Voltage current Reduction Waveform with short diagnostic-Flash atnd Main-Flash Phase n s #(cid:2)(cid:18)(cid:14)(cid:11)(cid:12)(cid:21)(cid:20)(cid:6)(cid:21)(cid:9)(cid:7)(cid:15)(cid:14)(cid:10)(cid:2)(cid:8)(cid:20)(cid:9)(cid:7)(cid:21) (cid:14)(cid:2)(cid:20)$(cid:28)%(cid:20)(cid:11)(cid:8)(cid:9)(cid:20)(cid:17)(cid:18)(cid:11)(cid:13)(cid:27) (cid:7)(cid:14)(cid:27)(cid:13)(cid:11)(cid:21)(cid:8)(cid:20)(cid:27)(cid:20)"(cid:10)(cid:2)(cid:12)(cid:6)(cid:27)(cid:20)(cid:11)(cid:21)(cid:15)(cid:6)(cid:20)(cid:14)(cid:5)(cid:7)(cid:10)(cid:11)(cid:8)(cid:18)(cid:4)(cid:20)(cid:23)(cid:18)(cid:2)(cid:11)(cid:3)(cid:10)(cid:8)(cid:4)(cid:20)(cid:5)"(cid:18)(cid:4)(cid:11)(cid:6)(cid:13)(cid:7)(cid:27)(cid:8)(cid:20)"(cid:2)(cid:6)(cid:20)e(cid:9)(cid:10)(cid:11)(cid:12)(cid:8)(cid:2)(cid:13)(cid:14)(cid:10)(cid:15)(cid:20)"(cid:18)(cid:11)(cid:13)(cid:27) &(cid:6)(cid:10)(cid:5)(cid:21)(cid:6)(cid:20)(cid:26)(cid:2)(cid:11)(cid:9) m t #’(cid:27)( #’(cid:27)( n (cid:25)(cid:17)(cid:26)(cid:27)(cid:28)(cid:29) a (cid:5)(cid:10)(cid:8)(cid:4)(cid:18)(cid:2)(cid:3)(cid:4)(cid:5)(cid:4)(cid:6)(cid:7)(cid:8) o (cid:7)(cid:13)(cid:21)(cid:20)(cid:13)(cid:11)(cid:23)(cid:21) (cid:25)(cid:17)(cid:26)(cid:27)(cid:28)(cid:29) (cid:15)(cid:7)(cid:6)c(cid:6)(cid:21)(cid:8)(cid:14) (cid:9)(cid:10)(cid:11)(cid:12)(cid:8)(cid:2)(cid:13)(cid:14)(cid:10)(cid:15)(cid:16) (cid:19)(cid:11)(cid:10)(cid:8)(cid:20)(cid:17)(cid:18)(cid:11)(cid:13)(cid:27) (cid:17)(cid:18)(cid:11)(cid:13)(cid:27) l (cid:6)(cid:21)(cid:22)(cid:2)(cid:6)(cid:14)(cid:20)(cid:23)(cid:10)(cid:8)(cid:24)(cid:20)(cid:25)(cid:17)(cid:26)(cid:27)a(cid:28)(cid:29) (cid:30)(cid:6)(cid:2)(cid:15)(cid:21)(cid:13)(cid:13)(cid:2)(cid:6)(cid:20) (cid:28)(cid:27)(cid:2)(cid:2)(cid:14)(cid:20)(cid:25)(cid:23)(cid:11)(cid:12)(cid:21) (cid:14)(cid:2)(cid:20)(cid:30)(cid:6)(cid:2)(cid:15)(cid:21)(cid:13)(cid:13)(cid:2)(cid:6) (cid:11)(cid:9)!(cid:7)(cid:13)(cid:14)(cid:13)(cid:20)(cid:12)(cid:11)(cid:10)(cid:8)(cid:20) (cid:3)(cid:10)(cid:14)(cid:27)(cid:20)(cid:15)(cid:2)(cid:8)(cid:13)(cid:14)(cid:11)(cid:8)(cid:14)(cid:20)(cid:11)(cid:8)(cid:9)(cid:20)(cid:3)(cid:21)(cid:18)(cid:18) (cid:31)(cid:18)(cid:21)(cid:9)(cid:4)(cid:15)(cid:7)(cid:6)c(cid:6)(cid:21)(cid:8)(cid:14)(cid:4)(cid:23)(cid:10)(cid:8) (cid:2)"(cid:20)(cid:25)(cid:23)(cid:11)(cid:12)(cid:21)(cid:20)(cid:28)(cid:21)(cid:8)(cid:13)(cid:2)(cid:6) (cid:9)(cid:21)"(cid:10)(cid:8)(cid:21)(cid:9)(cid:20)"(cid:18)(cid:11)(cid:13)(cid:27)(cid:20)(cid:15)(cid:7)(cid:6)(cid:6)(cid:21)(cid:8)(cid:14) i The different settings for vinn_low_v_run allow a constant main flash current without dropping VIN below vin_low_v_run. Flash Strobe Tihmings The flash timing are defined as follows: c 1. Flash duration defined by register flash_timeout and flash is started immediately when this mode is selected by thee I2C command (see Figure 23): set strobe_on = 0, start the flash by setting out_on = 1 T2. Flash duration defined by register flash_timeout and flash started with a rising edge on pin STROBE (see Fig- ure 24): set strobe_on = 1 and strobe_type = 0 3. Flash start and timing defined by the pin STROBE; the flash duration is limited by the timeout timer defined by flash_timeout (see Figure25 and Figure26): set strobe_on = 1 and strobe_type = 1 www.austriamicrosystems.com/AS3643 1.5-4 16 - 33

AS3643 Datasheet, Confidential - Detailed Description Figure 23. AS3643 flash duration defined by flash_timeout without using STROBE input (cid:8)(cid:5)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:10) (cid:22)(cid:9)(cid:11)(cid:23)(cid:24)(cid:10)(cid:19)(cid:23)(cid:5)(cid:25)(cid:26) (cid:23)(cid:27)(cid:9)(cid:19)(cid:23)(cid:5)(cid:25)(cid:28) (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7) (cid:29)(cid:30)(cid:31)(cid:23)(cid:5) (cid:9)(cid:30)(cid:14)(cid:13)(cid:11)(cid:10) d (cid:11)(cid:13)(cid:14)(cid:15)(cid:16)(cid:17)(cid:18)(cid:19) i (cid:9)(cid:15)(cid:16)(cid:17)(cid:2)(cid:18)(cid:19)(cid:3)(cid:8)(cid:20)(cid:7)(cid:5)(cid:21)(cid:3) l +(cid:3)(cid:4)(cid:5)(cid:5)+(cid:3)+(cid:5)(cid:3)(cid:6)(cid:7)(cid:8),(cid:10)(cid:11) a v Figure 24. AS3643 flash duration defined by flash_timeout, starting flash with STROBE rising edge l l (cid:7)(cid:5)(cid:13)(cid:17)(cid:14)(cid:30)(cid:29)(cid:28)(cid:17) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:17)(cid:5)(cid:15)(cid:5)(cid:18)(cid:19) (cid:12)(cid:13)(cid:14)(cid:15)(cid:16)(cid:17)(cid:5)(cid:13)(cid:21)(cid:22)(cid:17)(cid:18)(cid:23) (cid:15)(cid:20)(cid:13)(cid:5)(cid:15)(cid:5)(cid:18)(cid:19) i G t (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7) (cid:24)(cid:25)(cid:26)(cid:15)(cid:5)(cid:27)(cid:13)(cid:25)(cid:28)(cid:29)(cid:14)(cid:17) s (cid:8)(cid:16)(cid:7)$(cid:19)(cid:5)(cid:21)(cid:3) A t (cid:9)(cid:24)(cid:16)(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:6) n s (cid:9)(cid:30)!(cid:5)(cid:23)(cid:9)(cid:30)(cid:9)(cid:23)(cid:30)(cid:22)(cid:14)(cid:13)"(cid:10)# e m Figure 25. AS3643 flash duration and start defined by STROBE, limtited by flash_timeout; timer not expired n a (cid:21)(cid:5)(cid:7)(cid:4)(cid:3)(cid:22)(cid:18)(cid:17)(cid:4) (cid:6)(cid:7)(cid:3)(cid:8)(cid:9)(cid:4)(cid:10)(cid:8)(cid:5)(cid:11)(cid:12) (cid:6)(cid:7)(cid:3)(cid:8)(cid:9)(cid:4)(cid:10)(cid:7)(cid:19)(cid:20)(cid:4)(cid:11)(cid:12) (cid:8)(cid:13)(cid:7)(cid:10)(cid:8)o(cid:5)(cid:11)(cid:12) (cid:3)(cid:6)$(cid:10)%(cid:9) (cid:14)(cid:15)(cid:5)(cid:8)(cid:5)(cid:16)(cid:7)(cid:15)(cid:17)(cid:18)(cid:3)(cid:4) c (cid:7)"(cid:9)#(cid:5)(cid:10)(cid:11)(cid:6) l (cid:13)(cid:24)"(cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11)(cid:6) (cid:5)(cid:15)(cid:13)(cid:25)(cid:17)’(cid:27)(cid:2)(cid:3)(cid:4)(cid:5) a (cid:13)(cid:25)(cid:31)(cid:5)(cid:15)(cid:13)(cid:25)(cid:13)(cid:15)(cid:25)(cid:12)(cid:28)(cid:29) (cid:17)! c i Figure 26. AS3643 flash duration and start defined by STROBE, limited by flash_timeout; timer expired n h (cid:19)(cid:5)(cid:7)(cid:11)(cid:10)(cid:20)(cid:9)(cid:8)(cid:11) (cid:6)(cid:7)&(cid:8)(cid:16)(cid:4)(cid:10)(cid:8)(cid:5)(cid:18)(cid:19) (cid:12)(cid:7)(cid:10)(cid:5)(cid:13)(cid:11)(cid:14)(cid:7)(cid:15)(cid:16)(cid:11)(cid:17)(cid:18) (cid:8)(cid:20)(cid:7)(cid:10)(cid:8)(cid:5)(cid:18)(cid:19) c (cid:31)!(cid:29)"(cid:27) (cid:2)(cid:3)(cid:4)(cid:5)(cid:5)(cid:6)(cid:7)(cid:3)(cid:8)(cid:9)(cid:10)(cid:11) e (cid:21)(cid:26)(cid:27)(cid:28)(cid:10)(cid:29)(cid:30)(cid:31) T (cid:7)(cid:24)(cid:26)# $(cid:10)(cid:31)(cid:21)%(cid:27)(cid:29)(cid:30)(cid:31) (cid:7)(cid:15)(cid:23)(cid:5)(cid:8)(cid:7)(cid:15)(cid:7)(cid:8)(cid:15)(cid:6)(cid:17)(cid:18)(cid:24)(cid:4)(cid:25) www.austriamicrosystems.com/AS3643 1.5-4 17 - 33

AS3643 Datasheet, Confidential - Detailed Description I2C Serial Data Bus The AS3643 supports the I2C bus protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that controls the message is called a master. The devices that are controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions must control the bus. The AS3643 operates as a slave on the I2C bus. Within the bus specifications a standard mode (100kHz maximum clock rate) and a fast mode (400kHz d maximum clock rate) are defined. The AS3643 works in both modes. Connections to the bus are made through the open-drain I/O lines SDA and SCL. i The following bus protocol has been defined (Figure27): l a Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the datva line while the clock line is HIGH are interpreted as control signals. Accordingly, the following bus conditions have been defined: l Bus Not Busy l i Both data and clock lines remain HIGH. G t Start Data Transfer s A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a START condition. A Stop Data Transfer t A change in the state of the data line, from LOW to HIG H, while the clock line isn HIGH, defines the STOP condition. s Data Valid e The state of the data line represents valid data mwhen, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line must be chtanged during the LOW period of the clock signal. There is one clock pulse per bit of data. n a Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data bytes transferred between START and STOP conditions are not olimited, and are determined by the master device. The information is transferred byte-wise and each receiver acknowledges with a ninth bit. c Acknowledge Each receiving device, when addressed, is obli ged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock lpulse that is associated with this acknowledge bit. a A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold c times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to i enable the master to generate the STOP condition. n h c e T www.austriamicrosystems.com/AS3643 1.5-4 18 - 33

AS3643 Datasheet, Confidential - Detailed Description Figure 27. Data Transfer on I2C Serial Bus SDA d MSB SLAVE ADDRESS R/W i DIRECTION ACKNOWLEDGEMENT l BIT SIGNAL FROM RECEIVER a ACKNOWLEDGEMENT SIGNAL FROM v RECEIVER SCL 1 2 6 7 8 9 1 2 3-7 8 9 l ACK l START REPEATED IF iSTOP CONDITION CONDITION G MORE BYTES ARE tOR REPEATED START CONDITION TRANSFERRED s A t Depending upon the state of the R/W bit, two types of data transfer are possible: n 1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the s slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received e byte. Data is transferred with the most significant bit (MSB) first. m 2. Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave t address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data n bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the a last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer iso ended with a STOP condition or with a repeated START condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not released. Data is transferred with the most scignificant bit (MSB) first. The AS3643 can operate in the following two modes: 1. Slave Receiver Mode (Write Mode): Serial data and clock are received through SDA and SCL. After each l byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the begin- a ning and end of a serial transfer. Address recognition is performed by hardware after reception of the slave address and direction bit (see Figure 28). The slave address byte is the first byte received after the master c generates the START condition. The slave address byte contains the 7-bit AS3643 address, which is 0110000, followed by the directioin bit (R/W), which, for a write, is 0.9 After receiving and decoding the slave address byte the device outpnuts an acknowledge on the SDA line. After the AS3643 acknowledges the slave address + write bit, the master transmits a register address to the AS3643. This sets the register pointer on the AS3643. The master mhay then transmit zero or more bytes of data, with the AS3643 acknowledging each byte received. The address pointer will increment after each data byte is transferred. The master generates a STOP condition to termicnate the data write. 2. Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode. Hoewever, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmit- ted on SDA by the AS3643 while the serial clock is input on SCL. START and STOP conditions are recognized Tas the beginning and end of a serial transfer (Figure29 and Figure30). The slave address byte is the first byte received after the master generates a START condition. The slave address byte contains the 7-bit AS3643 10 address, which is 0110000, followed by the direction bit (R/W), which, for a read, is 1. After receiving and decoding the slave address byte the device outputs an acknowledge on the SDA line. The AS3643 then begins to transmit data starting with the register address pointed to by the register pointer. If the register 9. The address for writing to the AS3643 is 60h = 01100000b 10.The address for read mode from the AS3643 is 61h = 01100001b www.austriamicrosystems.com/AS3643 1.5-4 19 - 33

AS3643 Datasheet, Confidential - Detailed Description pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in the register pointer. The AS3643 must receive a “not acknowledge” to end a read. Figure 28. Data Write - Slave Receiver Mode d > W i <Slave Address><R <Word Address (n)> <Data(n)> <Data(n+1)> <Data(n+X)> l S 0110000 0 A XXXXXXXX A XXXXXXXX A XXXXXXXX A XXXXXXXX A P a v S - Start A - Acknowledge (ACK) Data Transferred P - Stop (X + 1 Bytes + Acknowledge) l l i G t s Figure 29. Data Read (from Current Pointer Location) - Slave ATransmitter Mode t n s W> e <Slave Address><R <Data(n)> m <Data(n+1)> <Data(n+2)> <Data(n+X)> t S 0110000 1 A XXXXXXXX A XXXXXXXX A XXXXXXXX A XXXXXXXX NA P n a S - Start A - Acknowledge (ACK) o Data Transferred P - Stop (X + 1 Bytes + Acknowledge) NA - Not Acknowledge (NACK) Note: Last data byte is followed by a NACK c l a Figure 30. Data Read (Write Pointecr, Then Read) - Slave Receive and Transmit i n > > W W <R <Word Address (n)> <Slave Address> <R h S 0110000 0 A XXXXXXXX A Sr 0110000 1 A c <Data(n)> <Data(n+1)> <Data(n+2)> <Data(n+X)> e XXXXXXXX A XXXXXXXX A XXXXXXXX A XXXXXXXX NA P T S - Start Sr - Repeated Start Data Transferred A - Acknowledge (ACK) (X + 1 Bytes + Acknowledge) P - Stop Note: Last data byte is followed by a NACK NA - Not Acknowledge (NACK) www.austriamicrosystems.com/AS3643 1.5-4 20 - 33

AS3643 Datasheet, Confidential - Detailed Description Register Description Table 6. ChipID Register ChipID Register Addr: 0 This register has a fixed ID Bit Bit Name Default Access Description d 2:0 version Xh R AS3643 chip version number i 7:3 fixed_id 10110b R This is a fixed identification (e.g. to verify the I2C l communication) a Table 7. Current Set1 Register v Current Set1 Register Addr: 1 This register defines design versions l l Bit Bit Name Default Access Description i Define theG current on pin LED_OUtT1/2 (combined; each current sink has identical currentss)assist mode uses bits 6:0 of this current setting (max. half of full current setting) indicator or low current pwm mode uses only 5:0 of this Acurrent setting (max. 1/4 of full current setting) t Caution: Always write same content to this register n Current Set1 (1h) and Current Set2 (2h) s 0h e 0mA m 1h 5.1mA t 2h 10.2mA n a ... ... 7:0 led_current 9Ch R/W o 321.2mA (maximum current for indicator or low 3Fh current pwm mode, mode_setting=01) c ... ... 647.5mA (maximum current for assist light mode, 7Fh l mode_setting=10) a ... ... c 9Ch 795.3mA - default setting ... ... i n FEh 1295mA FFh 1300mA h c e T www.austriamicrosystems.com/AS3643 1.5-4 21 - 33

AS3643 Datasheet, Confidential - Detailed Description Table 9. TXMask Register TXMask Register Addr: 3 This register defines the TXMask settings and coil peak current Bit Bit Name Default Access Description Defines operating mode for input pin TXMASK/TORCH d 00 pin has no effect i txmask-mode; during flash if TXMASK/TORCH=1, the l 01 LED current is set to flash_txmask_current - (see TXMASK on page 15) a 1:0 ext_torch_on 00 R/W external torch mode: if TXMASK/TORCH=1 and v mode_setting=00, the AS3643is set into external 10 1 torch mode (LED current is defined by the 7LSB bits of led_current ) l 11 don’t use l i Defines the maximum coil current (parameter ILIMIT) G t 00 ILIMIT =s 1.0A 3:2 coil_peak 10 R/W 01 ILIMIT = 1.5A A 10 tILIMIT = 2.0A 11 n ILIMIT = 2.5A s Define the current on pin LED_OUT1/2 in flash mode if ext_torech_on=01 and TXMASK/TORCH=1 m 0h 0mA t 1h n 82mA a 2h 163mA o 3h 245mA c 4h 326mA 5h 408mA l 6h 489mA - default 7:4 flash_txmask_current2 a6h R/W 7h 571mA c 8h 653mA 9h 734mA i n Ah 816mA Bh 897mA h Ch 979mA c Dh 1060mA Eh 1142mA e Fh 1224mA T 1.The MSB bit of this register not used to protect the LED; therefore the maximum current = half the maximum flash current 2. www.austriamicrosystems.com/AS3643 1.5-4 22 - 33

AS3643 Datasheet, Confidential - Detailed Description Table 10. Low Voltage Register Low Voltage Register Addr: 4 This register defines the operating mode with low battery voltages Bit Bit Name Default Access Description Voltage level on VIN where current reduction triggers during d operation (see Current Reduction by VIN measurements in Flash Mode on page 15) - only in flash mode; if VIN drops below this voltage during current ramp up, the current ramp i up is stopped; during operation the current is decreased l until the voltage on VIN rises above this threshold - a fault_uvlo is set 0h function is disabled v 1h 3.0V 2:0 vin_low_v_run 4h R/W 2h 3.07V l l 3h 3.14V i 4h G 3.22V - deftault 5h 3.3sV 6hA 3.38V 7h t3.47V n Voltage level on VIN where driver will change current before s startup (only in flash mode) if before startupe (out_on set from 0 to 1), the voltage on VIN m is below vin_low_v, the current is changed to flash_txmask_current (vin_low_v_shutdown=0) or t 0=shutdown (vin_low_v_shutdown=1) and fault_uvlo is set n a 0h function is disabled o1h 3.0V 5:3 vin_low_v 5h R/W 2h 3.07V c 3h 3.14V 4h 3.22V l a 5h 3.3V - default 6h 3.38V c 7h 3.47V i Enables Shutdown of current reduction under low voltage n conditions if before startup (out_on set from 0 to 1), the voltage h 0 on VIN is below vin_low_v, the current is changed to 6 vin_low_v_shutdown 0 R/W flash_txmask_current and fault_uvlo is set c if before startup (out_on set from 0 to 1), the voltage 1 on VIN is below vin_low_v, the operating mode stays e in shutdown (zero LED current) and fault_uvlo is set Enables Constant output voltage mode T 0 Normal operation defined by mode_setting 7 const_v_mode 0 R/W 5V constant voltage mode on VOUT1/2; 1 reset registers mode_setting, out_on and ext_torch_on before setting this bit www.austriamicrosystems.com/AS3643 1.5-4 23 - 33

AS3643 Datasheet, Confidential - Detailed Description Table 11. Flash Timer Register Flash Timer Register Addr: 5 This register identifies the flash timer and timeout settings Bit Bit Name Default Access Description Define the duration of the flash timer and timeout timer d 0h 2ms i 1h 4ms l 2h 6ms a ... ... v 23h 72ms - default ... ... l 7:0 flash_timeout 23h R/W 7F 256ms l 80 2G64 ms(now 8 ms LSB stetpsi from here on)1 81 272sms 82A 280ms ... t ... FEh n 1272ms s FFh 1280ms e m 1.Internal calculation for codes above 80h: flash timeout [ms] = (flash_timeout-127) * 8 + 256 [ms] t n Table 12. Control Register a o Control Register Addr: 6 This register identifies the operating mode and includes an all on/off bit c Bit Bit Name Default Access Description Define the AS3643 operating mode l a shutdown or external torch mode if 00 ext_torch_on(page 22)=10 c indicator mode (or low current mode using PWM) LED current is defined by the 6LSB bits of led_current 01 i pwm modulated with 31.25kHz defined by register n inct_pwm (1/16...4/16) 1:0 mode_setting 00 R/W assist light mode: h 10 LED current is defined by the 7LSB1 bits of led_current c flash mode: LED current is defined by led_current e 11 (out_on and mode_setting are automatically cleared after a flash pulse) T 2 reserved X R reserved - don’t use, always write 0 Enables the output current sinks (pin LED_OUT1/2) 0 outputs disabled 3 out_on 0 R/W outputs enabled 1 (out_on and mode_setting are automatically cleared after a flash pulse) www.austriamicrosystems.com/AS3643 1.5-4 24 - 33

AS3643 Datasheet, Confidential - Detailed Description 1.The MSB bit of this register not used to protect the LED; therefore the maximum assist light current = half the maximum flash current Table 13. Strobe Signalling Register Strobe Signalling Register d Addr: 7 This register defines the flash current reducing and mode for STROBE i Bit Bit Name Default Access Description l Defines if the STROBE input is edge or level sensitive; seae also bit strobe_on(page 25) 6 strobe_type 1 R/W v 0 STROBE input is edge sensitive 1 STROBE input is level sensitiv e Enables the STROBE inputl l 7 strobe_on 1 R/W 0 STROBE input disiabled G STROBE input tenabled 1 in flashs mode Table 14. Fault Register A t Fault Register n Addr: 8 This register identifies all the different fault conditions and provide s information about the LED detection e Bit Bit Name DefaultmAccess Description t an undervoltage event has happened - see Current Reducntion by VIN measurements in Flash Mode on page 15 0 fault_uvlo a0 R/sC1 0 No o 1 Yes 1 reserved 0 Rc reserved - don’t use 2 reserved 0 R reserved - don’t use l TXMASK/TORCH event triggered during flash - see a TXMASK event occurred on page 12 3 fault_txmask 0 R/sC1 0 No c 1 Yes i see Flash Timeout on page 12 n 4 fault_timeout 0 R/sC1 0 No fault h 1 Flash timeout exceeded see Overtemperature Protection on page 12 c 5 fault_overtemp 0 R/sC1 0 No fault e 1 Junction temperature limit has been exceeded T see Short Circuit Protection on page 12 6 fault_led_short 0 R/sC1 0 No fault 1 A shorted LED is detected (pin LED_OUT1/2) see Overvoltage Protection on page 11 7 fault_ovp 0 R/sC1 0 No fault 1 An overvoltage condition is detected (pin VOUT) www.austriamicrosystems.com/AS3643 1.5-4 25 - 33

AS3643 Datasheet, Confidential - Detailed Description 1.R/sC = Read, self clear; after readout the register is automatically cleared Table 15. PWM and Indicator Register PWM and Indicator Register Addr: 9 This register defines the PWM mode (e.g. for indicator) and 4/1MHz mode d switching i Bit Bit Name Default Access Description l Define the AS3643 PWM with 31.25kHz operation for a indicator or low current mode (mode_setting=01) 00 1/16 duty cycle v 1:0 inct_pwm 00 R/W 01 2/16 duty cycle 10 3/16 duty cycle l l 11 4/16 duty cycle i Exact frequGency switching betweent 4MHz/1MHz for assist and flash modes for operatison close to maximum pulsewidth A Pulseskip operati on is allowed for all modes - 0 2 freq_switch_on 0 R/W resultts in better efficiency In flash and asnsist light mode (indicator mode or low s current mode using PWM always will use pulseskip) if 1 led_curreent>=40h , the DCDC is running at 4MHz or 1MHz (pulseskip is disabled) - results in improved m noise performance; t n Table 17. Minimum LED Current Register a oMinimum LED Current Register Addr: Eh This register reports the minimum LED current from the last operation c cycle Bit Bit Name Default Access Description l Minimum current through the current sink (only including all 7:0 led_current_min12 0a0h R cuVrrIeNn mt reeadsuucrteiomnse natss dine sFclarisbhe dM iond Ce uerxrecnlutd Rinegd ucuctriroenn tb y reductions caused by TXMASK) c 1.As the internal change of this register is asynchronous to the readout, it is recommended to readout the register i after the flash pulse. The register will store the minimum current through the LED after e.g. a previous flash. n This current can be used for a subsequent flash pulse for a safe operating range. 2.This register is only set if an actual current reduction happens (fault_uvlo (see page 25)=1) otherwise h led_current_min=0. c Table 18. Actual LED Current Register e Actual LED Current Register Addr: Fh T This register reports the actual set LED current Bit Bit Name Default Access Description Actual set current through the current sink (including all 7:0 led_current_actual1 00h R current reductions as described in Flash Current Reductions including LED current ramp up/down) 1.As the internal change of this register is asynchronous to the readout, it is recommended to readout the register twice and compare the results. www.austriamicrosystems.com/AS3643 1.5-4 26 - 33

AS3643 Datasheet, Confidential - Detailed Description Register Map 1 Table 21. Register Map Register Addr Default Content Definition Name b7 b6 b5 b4 b3 b2 b1 b0 d ChipID 0 Bxh fixed_id version i led_current Current Set1 1 9Ch l always write same content in register Current Set1 and Current Set2 a Current Set2 2 9Ch always write same content in register Current Set1 and Current Set2 v TXMask 3 68h flash_txmask_current coil_peak ext_torch_on vin_low const_v Low Voltage 4 2Ch _mode _v_shut vin_low_v vin_lolw_v_run down l Flash Timer 5 23h f lash_timeout i G t reserve Control 6 00h out_on sd mode_setting Strobe Signalling 7 C0h strobe_ strobe_t A on ype t Fault 8 00h fault_ov fault _le fault_ov fault_ti nfault_tx reserve reserve fault_uvl p d_short ertemp meout mask d d o s PWM and 9 00h e freq_swi inct_pwm Indicator tch_on m Minimum LED t Eh 00h led_current_min Current n a Actual LED Fh 00h led_current_actual Current o 1.Always write’0’ to undefined register bits (e.g. to bcits 4..7 of register 6) l a c i n h c e T www.austriamicrosystems.com/AS3643 1.5-4 27 - 33

AS3643 Datasheet, Confidential - Application Information 9 Application Information External Components Input Capacitor CVIN Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. Ceramic d capacitors are required for input decoupling and should be located as close to the device as is practical. Table 22. Recommended Input Capacitor i l Part Number C TC Code Rated Size Manufacturer a Voltage 10µ v Murata GRM188R60J106ME47 >3µF@4.5V X5R 6V3 0603 www.murata.com >2µF@5.25V l 10µ Taiyo Yuden LMK107BBJ106MA X5R 6V3 0603 l >3µF@4.5V www.t-yuden.com i G t If a different input capacitor is chosen, ensure similar ESR value and at least 3µF capacitance at the maximum input s supply voltage. Larger capacitor values (C) may be used without limitations. Add a smaller capacitor in parallel to the input pin VIN (e.g. MuArata GRM155R61C104 , >50nF @ 3V, 0402 size). t Output Capacitor CVOUT n Low ESR capacitors should be used to minimize VOsUT ripple. Multi-layer ceramic capacitors are recommended since they have extremely low ESR and are available in small footprints. The caepacitor should be located as close to the device as is practical. m X5R dielectric material is recommended due to their ability to maintatin capacitance over wide voltage and temperature range. n a Table 23. Recommended Output Capacitor o Rated Part Number C TC Code Size Manufacturer Voltage c 10µF +/-10% GRM219R61A116U X5R 10V 0805 >4.2µF@5V l Murata 0603 GRM188R60J106ME841 1>04µ.2Fµ +Fa/@-204%V X5R 6.3V (1m.6ax0x.. 80x.09.58m5mmm www.murata.com c height) 1.Use only for VLED < 3.75Vi n If a different output capacitor is chosen, ensure similar ESR values and at least 4.2µF capacitance at 5V output volt- h age. c e T www.austriamicrosystems.com/AS3643 1.5-4 28 - 33

AS3643 Datasheet, Confidential - Application Information Inductor LDCDC The fast switching frequency (4MHz) of the AS3643 allows for the use of small SMDs for the external inductor. The 11 saturation current ISATURATION should be chosen to be above the maximum value of ILIMIT . The inductor should have 2 very low DC resistance (DCR) to reduce the I R power losses - high DCR values will reduce efficiency. Table 24. Recommended Inductor d Part Number L DCR ISATURATION Size Manufacturer 2.4A@25ºC, 3x3x1.5mm Mitsumi i C3-P1.5R 1.5µH 58m 2.0A1 (hmeiagxh.t) is www.mitsumi.com al 3.2x2.5x0.9 1.0µH mm v LQM32PN1R0MG0 60m 3.0A >0.6µH @ 3.0A max 1.0mm height Mur ata www.mlurata.com 2.5x2.0x0.9 LQM2HPN1R0MGC >0.6µ1H.0 µ@H 2.0A 100m 1.5A (2.0A )2 max 1m.0m0mm il G height t 1.0µH 3.2x2.5mm s Samsung Electro- 60m CIG32W1R0MNE >0.7µH @ 2.7A 3.0A max 1.0mm Mechancs >0.6µH @ 3.0A +/-25% A heigh t www.sem.samsung.co.kr t 2.4x2.4x1.2 1.0µH NRH2412T1R0N 77m  2.5A mnm (height >0.6µH @ 2.5A s is max.) e3.2x2.5x0.9 1.0µH m mm CKP3225N1R0M <60m 3.0A >0.6µH @ 3.0A t max 1.0mm height n 1.0µaH 2.5x2.0x1.2 Taiyo Yuden MAMK2520T1R0M >0.6µH @ 2.75A 45mo 3.0A mm www.t-yuden.com height is max c 2.0x2.0x1.2 1.0µH MDMK2020T1R0M 56m 2.55A mm >0.6µH @ 2.75A height is max l 2.0x1.6x1.0 MAKK2016T1R0M >0.6µ1H.0 @µH 2.a75A 65m 2.0A3 mm height is max c 1.Do not exceed maximum ISATURATION - can be ensured by setting coil_peak (will limit LED current) i 2.Flash cycle limit: 150ms on, 500ms off; repeat maximum 50 times.(if used with default coil_peak=0b (2A)) n 3.Set current limit to 2A ()coil_peak=10b) - can limit maximum output current. h If a different inductor is chosen, ensure similar DCR values and at least0.6µH inductance at ILIMIT. c PCB Layout Guideline e The high speed operation requires proper layout for optimum performance. Route the power traces first and try to min- imize the area and wire length of the two high frequency/high current loops: T Loop1: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin GND - CVIN/CVIN2 Loop2: CVIN/CVIN2 - LDCDC - pin SW1/2 - pin VOUT1/2 - CVOUT - pin GND - CVIN/CVIN2 11.Can be adjusted in I2C mode with register coil_peak (see page 22) www.austriamicrosystems.com/AS3643 1.5-4 29 - 33

AS3643 Datasheet, Confidential - Application Information At the pin GND a single via (or more vias, which are closely combined) connects to the common ground plane. This via(s) will isolate the DCDC high frequency currents from the common ground (as most high frequency current will flow between Loop1 and Loop2 and will not pass the ground plane) - see the ‘island’ in Figure31. Figure 31. Layout recommendation (cid:22)!(cid:27)(cid:24) d (cid:2)(cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:8)(cid:7)(cid:9)(cid:5)(cid:10)(cid:11)(cid:7)(cid:12)(cid:9)(cid:13)(cid:5)(cid:14)(cid:15)(cid:16)(cid:9)(cid:4) (cid:6)(cid:7)(cid:9)(cid:9)(cid:4)(cid:6)(cid:17)(cid:4)(cid:13)(cid:5)(cid:17)(cid:7)(cid:5)(cid:18)(cid:19)(cid:20) (cid:18)(cid:19)(cid:20) i l (cid:21)(cid:22)(cid:25)(cid:19) a (cid:21)(cid:22)(cid:23)(cid:2)(cid:24) %(cid:4)(cid:4)(cid:14)(cid:5)(cid:17)(cid:28)"(cid:3)(cid:5)(cid:16)(cid:11)(cid:4)(cid:16)(cid:5)(cid:7)(cid:9)(cid:5)(cid:17)(cid:7)(cid:14)& (cid:14)(cid:15)(cid:16)(cid:9)(cid:4)(cid:5)(cid:16)(cid:3)(cid:5)(cid:16)(cid:9)(cid:5)’"(cid:3)(cid:15)(cid:16)(cid:9)(cid:13)’(cid:5)#(cid:5)(cid:13)(cid:7)(cid:9)’(cid:17) v (cid:26)(cid:20)(cid:21)(cid:20)(cid:21) (cid:6)(cid:7)(cid:9)(cid:9)(cid:4)(cid:6)(cid:17)(cid:5)(cid:17)(cid:7)(cid:5)(cid:10)(cid:11)(cid:7)(cid:12)(cid:9)(cid:13)(cid:5)(cid:7)(cid:9)(cid:5)(cid:17)(cid:7)(cid:14)&(cid:14)(cid:15)(cid:16)(cid:9)(cid:4) (cid:24)(cid:7)(cid:14)(cid:5)(cid:26)(cid:16) (cid:4)(cid:11) l (cid:25)(cid:9)(cid:9)(cid:4)(cid:11)(cid:5)(cid:26)(cid:16) (cid:4)(cid:11) l (cid:27)( (cid:26)*(cid:20)+(cid:23)(cid:2)(cid:24)( (cid:18)(cid:11)(cid:7)(cid:12)(cid:9)(cid:13)(cid:5)(cid:31)(cid:15)(cid:16)(cid:9)(cid:4) i (cid:26)*(cid:20)+(cid:23)(cid:2)G(cid:24)) t (cid:22)(cid:25)(cid:27)(cid:5)(cid:17)(cid:7)(cid:5)(cid:17)(cid:28)(cid:4)(cid:5)(cid:10)s(cid:11)(cid:7)(cid:12)(cid:9)(cid:13)(cid:5)(cid:14)(cid:15)(cid:16)(cid:9)(cid:4) (cid:21)(cid:22)(cid:25)(cid:19)) A (cid:22)(cid:25)(cid:27)(cid:5)(cid:29) (cid:4)(cid:17)(cid:30)(cid:4)(cid:4)(cid:9) AS3643 (cid:21)(cid:7)(cid:9)(cid:17)(cid:11)(cid:7)(cid:15)(cid:5)(cid:15)"(cid:9)(cid:4)(cid:3)(cid:5)# t (cid:11)(cid:7)(cid:12)(cid:17)(cid:4)(cid:5)(cid:16)(cid:3)(cid:5)(cid:11)(cid:4)$(cid:12)"(cid:11)(cid:4)(cid:13)(cid:5)(cid:29) (cid:5)(cid:16)(cid:14)(cid:14)(cid:15)"(cid:6)(cid:16)(cid:17)"(cid:7)(cid:9) n s e Note: If component placement rules allow, momve all components close to the AS3643 to reduce the area and length of Loop1 and Loop2. t n An additional 100nF (e.g. Murata GRMa155R61C104, >50nF @ 3V, 0402 size) capacitor CVIN2 in parallel to CVIN is rec- ommended to filter high frequency noise for the power supply of AS3643. This capacitor should be as close as possi- o ble to the GND/VIN pins of AS3643. c 5V Operating Mode The AS3643 can be used to power a 5V system (e.g. audio amplifier). The operating mode is selected by setting regis- ter bit const_v_mode(page 23)=1. In this oplerating mode, the current sinks are disabled and cannot be switched on (no flash/torch operation is possible). a Note: There is always a diode betwceen VIN and VOUT1/2 due to the internal circuit. Therefore VOUT1/2 cannot be completely switched off i Figure 32. 5V Operating Mode n (cid:12)(cid:13)(cid:14)(cid:15) h (cid:12)(cid:4)(cid:5) (cid:13)(cid:14)(cid:11)(cid:15)(cid:12) c (cid:12)(cid:9)(cid:10)(cid:15)(cid:11) (cid:12)(cid:9)(cid:10)(cid:15)(cid:12) (cid:16)(cid:12)(cid:3)(cid:9)(cid:11)(cid:6)(cid:17)(cid:11)(cid:6) e T (cid:4)(cid:8) (cid:5)(cid:6)(cid:7) (cid:2)(cid:3)(cid:2)(cid:3) (cid:4) AS3(cid:3)643 (cid:3)(cid:4)(cid:5)(cid:6)(cid:7)(cid:4)(cid:8) (cid:2)(cid:3)(cid:8) (cid:3)(cid:9)(cid:7)(cid:10)(cid:11)(cid:9)(cid:6) (cid:21)(cid:9)(cid:6) (cid:6)(cid:7)(cid:2)(cid:8)(cid:9)(cid:10)(cid:15)(cid:11) (cid:2)(cid:9) (cid:6)(cid:7)(cid:2) (cid:9)(cid:10)(cid:15)(cid:12) www.austriamicrosystems.com/AS3643 1.5-4 30 - 33

AS3643 Datasheet, Confidential - Package Drawings and Markings 10 Package Drawings and Markings Figure 33. WL-CSP13 Marking (cid:20)(cid:8)(cid:21)(cid:6)(cid:22)(cid:17) (cid:18)(cid:19)(cid:20)(cid:21)(cid:22)(cid:23)(cid:24)(cid:25)(cid:21)(cid:26)(cid:27)(cid:28)(cid:29)(cid:19)(cid:30)(cid:31)(cid:28) (cid:2)(cid:3)(cid:4)(cid:4)(cid:3)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:6)(cid:11)(cid:2)(cid:12)(cid:13)(cid:13)(cid:6)(cid:14)(cid:8)(cid:15)(cid:9)(cid:16) (cid:23)(cid:21)(cid:15)(cid:8)(cid:24)(cid:12)(cid:4)(cid:3)(cid:25) (cid:17) (cid:18) (cid:19) (cid:19) (cid:18) (cid:17) d (cid:22) (cid:22) (cid:22) (cid:22) 3> (cid:2) (cid:2) i 4e (cid:2) 6d (cid:2) l (cid:26) (cid:26) 3o a (cid:26) SC (cid:26) (cid:27) (cid:27) A< v (cid:27) (cid:27) (cid:28) (cid:28) (cid:17) (cid:18) (cid:19) (cid:19) (cid:18) (cid:17) l l Note: i Line 1: austriamicrosystems logo G t Line 2: AS3643 s Line 3: <Code> Encoded Datecode (4 characters) A t Figure 34. WL-CSP13 Package Dimensions n (cid:29)(cid:18)(cid:30)(cid:4)(cid:20)(cid:21)(cid:22)(cid:23)(cid:4)(cid:24)(cid:19)(cid:31) (cid:18)!"(cid:31)(cid:28) s (cid:17)(cid:18)(cid:19)(cid:19)(cid:18)(cid:11)(cid:4)(cid:20)(cid:21)(cid:22)(cid:23)(cid:4)(cid:24)(cid:17)(cid:25)(cid:25)(cid:25)(cid:4)(cid:26)(cid:21)(cid:27)(cid:22)(cid:28) (cid:26)(cid:21)(cid:27)(cid:22)(cid:4)(cid:20)(cid:21)(cid:22)(cid:23) #(cid:21)$(cid:4)%(cid:3) &$(cid:27)(cid:21)’(cid:25)(cid:19)(cid:18) m (cid:8)(cid:2)(cid:12)(cid:13)(cid:2) (cid:8)(cid:2)(cid:9) (cid:8)(cid:2)(cid:9) (cid:8)(cid:2)e(cid:9) (cid:8)(cid:2)(cid:9) (cid:8)(cid:2)(cid:12)(cid:13)(cid:2) (cid:10)(cid:14)(cid:11)(cid:9) (cid:5)(cid:15)(cid:6)(cid:7)((cid:3)(cid:9)(cid:9) (cid:5)(cid:8)(cid:6)(cid:7)(cid:14)(cid:8)(cid:9)(cid:9) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) (cid:10)(cid:11) t n a (cid:8)(cid:2)(cid:16)(cid:10)(cid:11) %(cid:3) %(cid:8) %(cid:15) o%(cid:15) %(cid:8) %(cid:3) (cid:11) (cid:10) (cid:15) c (cid:15) (cid:14) (cid:17)(cid:3) (cid:17)(cid:8) (cid:17)(cid:8) (cid:17)(cid:3) (cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) )(cid:3) )(cid:8) )(cid:15) al (cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:4)(cid:4)(cid:15) (cid:8) (cid:2))(cid:10)(cid:15)(cid:11)(cid:4)(cid:4) )(cid:8) )(cid:3) (cid:14)(cid:15)(cid:15)(cid:10)(cid:11) (cid:8)(cid:2)(cid:9) c (cid:8)(cid:2)(cid:9)(cid:4) (cid:2)(cid:9)(cid:9)(cid:10)(cid:11) (cid:10)(cid:11) (cid:8) (cid:8) (cid:15) (cid:15) (cid:14) *(cid:3) *(cid:8) (cid:11) *(cid:8) *(cid:3) i (cid:10) (cid:9) (cid:11) n (cid:2)(cid:9) (cid:10)(cid:9)(cid:9)(cid:2) (cid:15)(cid:15)(cid:10)(cid:11) (cid:14) +(cid:3) +(cid:8) +(cid:15) +(cid:15) +(cid:8) +(cid:3) h (cid:16)(cid:11) (cid:8)(cid:2)(cid:10) c (cid:3)(cid:2)(cid:3)(cid:2)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) (cid:29)(cid:2)(cid:3)(cid:2)(cid:4)(cid:5)(cid:6)(cid:7)(cid:8)(cid:9)(cid:10)(cid:11) ((cid:9)(cid:9)(cid:4)(cid:5)(cid:6)(cid:7)(cid:15)(cid:9)(cid:10)(cid:11) e The cToplanarity of the balls is 40µm. www.austriamicrosystems.com/AS3643 1.5-4 31 - 33

AS3643 Datasheet, Confidential - Ordering Information 11 Ordering Information The devices are available as the standard products shown in Table 25. Table 25. Ordering Information Model Description Delivery Form Package d 13-pin WL-CSP (2.25x1.5x0.6mm) AS3643-ZWLT 1300mA High Current LED Flash Driver Tape & Reel 0.5mm pitch i RoHS compliant / Pb-Free / l Green a Note: All products are RoHS compliant and austriamicrosystems green. v Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect Technical support is found at http://www.austriamicrosystems.com/Technical-Support l For further information and requests, please contact us mailto:sales@austriamicrosystems.lcom or find your local distributor at http://www.austriamicrosystems.co m/distributor i G t s Note: AS3643-ZWLT A AS3643- t Z Temperature Range: -30ºC - 85ºC n WL Package: Wafer Level Chip Scale Package (WL-CSP) 2.25x1.5x0.6mm s T Delivery Form: Tape & Reel e m t n a o c l a c i n h c e T www.austriamicrosystems.com/AS3643 1.5-4 32 - 33

AS3643 Datasheet, Confidential - Ordering Information Copyrights Copyright © 1997-2012, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. d All products and companies mentioned are trademarks or registered trademarks of their respective companies. i Disclaimer l a Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description revgarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems AG reserves the right to change specifications and prices at any time and without notice. The refore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for currelnt information. This product is intended for use in normal commercial applications. Applications requiring extendedl temperature range, unusual environmental requirements, or high reliability application s, such as military, mediical life-support or life- G t sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for s each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. A The information furnished here by austriamicrosystems AG is believed to be correctt and accurate. However, austriamicrosystemsAG shall not be liable to recipient or any third party for anyn damages, including but not limited to personal injury, property damage, loss of profits, losss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of thee furnishing, performance or use of the tech- nical data herein. No obligation or liability to recmipient or any third party shall arise or flow out of austriamicrosystemsAG rendering of technical or other services. t n a o c l a c i n Contact Information h Headquarters austriamicrosystems AG c Tobelbaderstrasse 30 e Schloss Premstaetten A-8141 Austria T Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/AS3643 1.5-4 33 - 33