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  • 型号: TLV2252ID
  • 制造商: Texas Instruments
  • 库位|库存: xxxx|xxxx
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TLV2252ID产品简介:

ICGOO电子元器件商城为您提供TLV2252ID由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TLV2252ID价格参考。Texas InstrumentsTLV2252ID封装/规格:线性 - 放大器 - 仪表,运算放大器,缓冲器放大器, 通用 放大器 2 电路 满摆幅 8-SOIC。您可以下载TLV2252ID参考资料、Datasheet数据手册功能说明书,资料中有TLV2252ID 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
-3db带宽

-

产品目录

集成电路 (IC)半导体

描述

IC OPAMP GP 200KHZ RRO 8SOIC运算放大器 - 运放 LiNCMOS R/R

产品分类

Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps集成电路 - IC

品牌

Texas Instruments

产品手册

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产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

放大器 IC,运算放大器 - 运放,Texas Instruments TLV2252IDLinCMOS™

数据手册

点击此处下载产品Datasheet

产品型号

TLV2252ID

产品目录页面

点击此处下载产品Datasheet

产品种类

运算放大器 - 运放

供应商器件封装

8-SOIC

共模抑制比—最小值

60 dB

关闭

No Shutdown

其它名称

296-7434-5

包装

管件

单位重量

72.600 mg

压摆率

0.12 V/µs

双重电源电压

+/- 3 V

商标

Texas Instruments

增益带宽生成

0.2 MHz

增益带宽积

200kHz

安装类型

表面贴装

安装风格

SMD/SMT

封装

Tube

封装/外壳

8-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-8

工作温度

-40°C ~ 125°C

工作电源电压

2.7 V to 8 V

工厂包装数量

75

技术

LinCMOS

放大器类型

通用

最大双重电源电压

4 V

最大工作温度

+ 125 C

最小双重电源电压

1.35 V

最小工作温度

- 40 C

标准包装

75

电压-电源,单/双 (±)

2.7 V ~ 16 V, ±1.35 V ~ 8 V

电压-输入失调

200µV

电流-电源

70µA

电流-输入偏置

1pA

电流-输出/通道

50mA

电源电流

68 uA

电路数

2

系列

TLV2252

转换速度

0.12 V/us

输入偏压电流—最大

60 pA

输入参考电压噪声

36 nV

输入补偿电压

200 uV

输出电流

50 mA

输出类型

满摆幅

通道数量

2 Channel

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PDF Datasheet 数据手册内容提取

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 (cid:1) (cid:1) Output Swing Includes Both Supply Rails Low Input Offset Voltage (cid:1) Low Noise...19 nV/√Hz Typ at f = 1 kHz 850 µV Max at TA = 25°C (cid:1) Low Input Bias Current...1 pA Typ (cid:1) Wide Supply Voltage Range (cid:1) 2.7 V to 8 V Fully Specified for Both Single-Supply and (cid:1) Macromodel Included Split-Supply Operation (cid:1) Very Low Power...34 µA Per Channel Typ (cid:1) Available in Q-Temp Automotive (cid:1) HighRel Automotive Applications Common-Mode Input Voltage Range Configuration Control / Print Support Includes Negative Rail Qualification to Automotive Standards description HIGH-LEVEL OUTPUT VOLTAGE vs The TLV2252 and TLV2254 are dual and HIGH-LEVEL OUTPUT CURRENT quadruple low-voltage operational amplifiers from 3 Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range VDD = 3 V in single- or split-supply applications. The 2.5 TLV225x family consumes only 34 µA of supply V − TA = −40°C current per channel. This micropower operation e g makes them good choices for battery-powered a 2 applications. This family is fully characterized at Volt TA = 25°C 3 V and 5 V and is optimized for low-voltage ut p applications. The noise performance has been ut 1.5 O dramatically improved over previous generations el TA = 85°C v of CMOS amplifiers. The TLV225x has a noise Le 1 level of 19 nV/√Hz at 1kHz, four times lower than gh- TA = 125°C competitive micropower solutions. Hi Á− Á0.5 H The TLV225x, exhibiting high input impedance ÁVOÁ and low noise, are excellent for small-signal conditioning for high-impedance sources, such as 0 0 200 400 600 800 piezoelectric transducers. Because of the micro- power dissipation levels combined with 3-V | IOH | − High-Level Output Current − µA operation, these devices work well in hand-held Figure 1 monitoring and remote-sensing applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV225xA family is available and has a maximum input offset voltage of 850 µV. The TLV2252/4 also make great upgrades to the TLV2322/4 in standard designs. They offer increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV2432 and TLV2442 devices. If your design requires single amplifiers, please see the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal for high density, battery-powered equipment. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments. (cid:26)(cid:20)(cid:18)(cid:30)(cid:31)(cid:16)(cid:1)(cid:21)(cid:18)(cid:27) (cid:30)(cid:8)(cid:1)(cid:8) (cid:15)(cid:12)!"#$(cid:11)%(cid:15)"(cid:12) (cid:15)& (cid:13)’##(cid:14)(cid:12)% (cid:11)& "! (’)*(cid:15)(cid:13)(cid:11)%(cid:15)"(cid:12) (cid:9)(cid:11)%(cid:14)+ Copyright  1997−2006, Texas Instruments Incorporated (cid:26)#"(cid:9)’(cid:13)%& (cid:13)"(cid:12)!"#$ %" &((cid:14)(cid:13)(cid:15)!(cid:15)(cid:13)(cid:11)%(cid:15)"(cid:12)& ((cid:14)# %,(cid:14) %(cid:14)#$& "! (cid:1)(cid:14)(cid:6)(cid:11)& (cid:21)(cid:12)&%#’$(cid:14)(cid:12)%& (cid:18)(cid:12) (#"(cid:9)’(cid:13)%& (cid:13)"$(*(cid:15)(cid:11)(cid:12)% %" (cid:17)(cid:21)(cid:2)(cid:22)(cid:26)(cid:20)(cid:28)(cid:22)01(cid:5)0(cid:5)(cid:7) (cid:11)** ((cid:11)#(cid:11)$(cid:14)%(cid:14)#& (cid:11)#(cid:14) %(cid:14)&%(cid:14)(cid:9) &%(cid:11)(cid:12)(cid:9)(cid:11)#(cid:9) -(cid:11)##(cid:11)(cid:12)%.+ (cid:26)#"(cid:9)’(cid:13)%(cid:15)"(cid:12) (#"(cid:13)(cid:14)&&(cid:15)(cid:12)/ (cid:9)"(cid:14)& (cid:12)"% (cid:12)(cid:14)(cid:13)(cid:14)&&(cid:11)#(cid:15)*. (cid:15)(cid:12)(cid:13)*’(cid:9)(cid:14) ’(cid:12)*(cid:14)&& "%,(cid:14)#-(cid:15)&(cid:14) (cid:12)"%(cid:14)(cid:9)+ (cid:18)(cid:12) (cid:11)** "%,(cid:14)# (#"(cid:9)’(cid:13)%&(cid:7) (#"(cid:9)’(cid:13)%(cid:15)"(cid:12) %(cid:14)&%(cid:15)(cid:12)/ "! (cid:11)** ((cid:11)#(cid:11)$(cid:14)%(cid:14)#&+ (#"(cid:13)(cid:14)&&(cid:15)(cid:12)/ (cid:9)"(cid:14)& (cid:12)"% (cid:12)(cid:14)(cid:13)(cid:14)&&(cid:11)#(cid:15)*. (cid:15)(cid:12)(cid:13)*’(cid:9)(cid:14) %(cid:14)&%(cid:15)(cid:12)/ "! (cid:11)** ((cid:11)#(cid:11)$(cid:14)%(cid:14)#&+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252 AVAILABLE OPTIONS PACKAGED DEVICES TA AVTIO 2m5a°Cx OSUMTLAILNLE† CACRHRIPIER CERDAIPMIC PLADSIPTIC TSSOP‡ FCLEARTAPAMCICK (PW) (D) (FK) (JG) (P) (U) 885500 µµVV TTLLVV22225522AAIIDD —— —— TTLLVV22225522AAIIPP TTLLVV22225522AAIIPPWWLLEE —— −−4400°°CC ttoo 112255°°CC 1500 µV TLV2252ID — — TLV2252IP — — 885500 µµVV TTLLVV22225522AAQQDD —— —— —— —— —— −−4400°°CC ttoo 112255°°CC 1500 µV TLV2252QD — — — — — 850 µV — TLV2252AMFK TLV2252AMJG — — TLV2252AMU −55°C to 125°C 1500 µV — TLV2252MFK TLV2252MJG — — TLV2252MU †The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2252CDR). ‡The PW package is available only left-end taped and reeled. §Chips are tested at 25°C. TLV2254 AVAILABLE OPTIONS PACKAGED DEVICES TA AVTIO 2m5a°Cx OSUMTLAILNLE† CACRHRIPIER CERDAIPMIC PLADSIPTIC TSSOP‡ FCLEARTAPAMCICK (PW) (D) (FK) (J) (N) (W) 885500 µµVV TTLLVV22225544AAIIDD —— —— TTLLVV22225544AAIINN TTLLVV22225544AAIIPPWWLLEE —— −−4400°°CC ttoo 112255°°CC 1500 µV TLV2254ID — — TLV2254IN — — 885500 µµVV TTLLVV22225544AAQQDD —— —— —— —— —— −−4400°°CC ttoo 112255°°CC 1500 µV TLV2254QD — — — — — 850 µV — TLV2254AMFK TLV2254AMJ — — TLV2254AMW −55°C to 125°C 1500 µV — TLV2254MFK TLV2254MJ — — TLV2254MW †The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2254CDR). ‡The PW package is available only left-end taped and reeled. §Chips are tested at 25°C. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252I, TLV2252AI TLV2252Q, TLV2252AQ TLV2254I, TLV2254AI, TLV2254Q, TLV2254AQ...D OR N PACKAGE D, P, OR PW PACKAGE TLV2254M, TLV2254AM...J OR W PACKAGE (TOP VIEW) (TOP VIEW) 1OUT 1 8 VDD+ 1OUT 1 14 4OUT 1IN− 2 7 2OUT 1IN− 2 13 4IN− 1IN+ 3 6 2IN− 1IN+ 3 12 4IN+ VDD−/GND 4 5 2IN+ V 4 11 V /GND DD+ DD− 2IN+ 5 10 3IN+ TLV2252M, TLV2252AM...JG PACKAGE 2IN− 6 9 3IN− (TOP VIEW) 2OUT 7 8 3OUT 1OUT 1 8 VDD+ 1IN− 2 7 2OUT 1IN+ 3 6 2IN− VDD−/GND 4 5 2IN+ TLV2254I, TLV2254AI...PW PACKAGE (TOP VIEW) TLV2252M, TLV2252AM...U PACKAGE 1OUT 1 14 4OUT (TOP VIEW) 1IN− 4IN− 1IN+ 4IN+ NC 1 10 NC V V /GND DD+ DD− 1OUT 2 9 VCC+ 2IN+ 3IN+ 1IN− 3 8 2OUT 2IN− 3IN− 1IN+ 4 7 2IN− 2OUT 7 8 3OUT VCC−/GND 5 6 2IN+ TLV2252M, TLV2252AM...FK PACKAGE TLV2254M, TLV2254AM...FK PACKAGE (TOP VIEW) (TOP VIEW) C OUT C DD+C N − OUT C OUTN − N 1 N VN 1I 1 N 44I 3 2 1 20 19 3 2 1 20 19 NC 4 18 NC 1IN+ 4 18 4IN+ 1IN− 5 17 2OUT NC 5 17 NC NC 6 16 NC VDD+ 6 16 VDD−/GND 1IN+ 7 15 2IN− NC 7 15 NC NC 8 14 NC 2IN+ 8 14 3IN+ 9 10 11 12 13 9 10 11 12 13 CD C+ C −T CT − N/GN−N2IN N 2IN 2OU N3OU 3IN D D V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

Template Release Date: 7−11−94 (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7)2(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:4)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9)2(cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19)(cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24)2(cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20)2(cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2)2(cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 T U O Q16 Q17 D1 Q14 Q15 R2 VDD+ Q12 C1 R5 Q13 Q11 R1 VDD−/GND †OUNT TLV2254 76 56 18 6 and trim circuitry T C as, N bi Q9 NE 2 D, O 5 S R6 Q10 COMP TLV22 38 30 9 3 nd all E E a C s VI er Q8 DE plifi Q6 Q7 ACTUAL COMPONENT Transistors Resistors Diodes Capacitors Includes both am † ) er Q4 i f 3 li Q p 5 4 m Q R a h c a (e Q2 R3 c ati Q1 m e h + − c N N s I I t n e l a v i u q e 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V DD Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V ID DD Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V −0.3 V to V I DD− DD+ Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA I Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA O Total current into V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA DD+ Total current out of V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA DD− Duration of short-circuit current (at or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, T : I Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C A Q Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C M Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, and PW packages . . . . . . . 260°C J, JG, U, and W packages . . . . . . . 300°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to VDD−. 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought below VDD− − 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE TTAA ≤≤ 2255°CC DDEERRAATTIINNGG FFAACCTTOORR TTAA == 8855°CC TTAA == 112255°CC PPAACCKKAAGGEE POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING D−8 725 mW 5.8 mW/°C 377 mW 145 mW D−14 950 mW 7.6 mW/°C 494 mW 190 mW FK 1375 mW 11.0 mW/°C 715 mW 275 mW J 1375 mW 11.0 mW/°C 715 mW 275 mW JG 1050 mW 8.4 mW/°C 546 mW 210 mW N 1150 mW 9.2 mW/°C 598 mW 230 mW P 1000 mW 8.0 mW/°C 520 mW 200 mW PW−8 525 mW 4.2 mW/°C 273 mW 105 mW PW−14 700 mW 5.6 mW/°C 364 mW 140 mW U 700 mW 5.5 mW/°C 370 mW 150 mW W 700 mW 5.5 mW/°C 370 mW 150 mW recommended operating conditions TLV225xI TLV225xQ TLV225xM UUNNIITT MIN MAX MIN MAX MIN MAX Supply voltage, VDD(cid:1)(cid:2)(cid:3)(cid:3) (cid:4)(cid:5)(cid:6)(cid:3) (cid:7)(cid:8) 2.7 8 2.7 8 2.7 8 V Input voltage range, VI VDD− VDD+ −1.3 VDD− VDD+ −1.3 VDD− VDD+ −1.3 V Common-mode input voltage, VIC VDD− VDD+ −1.3 VDD− VDD+ −1.3 VDD− VDD+ −1.3 V Operating free-air temperature, TA −40 125 −40 125 −55 125 °C NOTE 1: All voltage values, except differential voltages, are with respect to VDD−. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252I electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise DD noted) TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 85°C 00..55 00..55 µµVV//°°CC Input offset voltage long-term drift (see 25°C 0.003 0.003 µV/mo Note 4) VVDDDD± == ±11..55 VV,, VVIICC == 00,, 25°C 0.5 60 0.5 60 VVOO == 00,, RRSS == 5500 ΩΩ −40°C IIO Input offset current to 85°C 150 150 pA Full range 1000 1000 25°C 1 60 1 60 −40°C IIB Input bias current to 85°C 150 150 pA Full range 1000 1000 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee iinnppuutt 2 2.2 2 2.2 VVIICCRR vvvooollltttaaagggeee rrraaannngggeee RRSS == 5500 ΩΩ, ||VVIIOO || ≤≤55 mmVV 00 00 VV FFuullll rraannggee ttoo ttoo 1.7 1.7 IOH = −20 µA 25°C 2.98 2.98 HHiigghh--lleevveell oouuttppuutt 25°C 2.9 2.9 VVOOHH vvvooollltttaaagggeee IIOOHH == −−7755 µµAA Full range 2.8 2.8 VV IOH = −150 µA 25°C 2.8 2.8 25°C 10 10 VVIICC == 11..55 VV,, IIOOLL == 5500 µµAA Full range 80 80 LLooww--lleevveell oouuttppuutt 25°C 100 100 VVOOLL vvvooollltttaaagggeee VVIICC == 11..55 VV,, IIOOLL == 550000 µµAA Full range 150 150 mmVV 25°C 200 200 VVIICC == 11..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 300 300 25°C 100 250 100 250 AAVVDD LLvvooaallrrttggaaeegg--eess iiaaggmmnnaappllll iiddffiiiiccffffaaeettrriiooeennnnttiiaall VVVVIIOOCC ==== 1111 ..VV55 ttVVoo,, 22 VV RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV RL = 1 MΩ‡ 25°C 800 800 Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode input ri(c) resistance 25°C 1012 1012 Ω Common-mode input ci(c) capacitance f = 10 kHz, P package 25°C 8 8 pF Closed-loop output zo impedance f = 25 kHz, AV = 10 25°C 220 220 Ω CCMMRRRR CrCreeoojjeemmccmmttiioooonnnn rr--aammttiiooooddee VVVIIOCC === 100. 5ttoo V 11, ..77 VV,, RS = 50Ω Fu2ll 5r°aCnge 6650 75 6650 77 ddBB †Full range is − 40°C to 125°C. ‡Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252I electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise DD noted) (continued) TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX Supply voltage VVDDDD == 22..77 VV ttoo 88 VV,, 25°C 80 95 80 100 kkSSVVRR rr(ee∆jjVeeDccttDiioo nn/∆ rrVaattIiiOoo ) VVIC == VVDD//22,, NNoo llooaadd Full range 80 80 ddBB 25°C 68 125 68 125 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 11..55 VV,, NNoo llooaadd µµAA Full range 150 150 †Full range is − 40°C to 125°C. TLV2252I operating characteristics at specified free-air temperature, V = 3 V DD TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX VVVOO === 111...111 VVV tttooo 111...999 VVV,,, 2255°CC 00..0077 00..11 00..0077 00..11 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRRLL === 111000000 kkkΩ‡‡,,, FFuullll VV//µµss CCLL == 110000 ppFF‡‡ range 00..0055 00..0055 EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 10 Hz 25°C 35 35 VVnn voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.6 0.6 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt nnooiissee µVV voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input noise In current 25°C 0.6 0.6 fA/√Hz GGaaiinn--bbaannddwwiiddtthh pprroodduucctt ffC ==L 11= 1kk0HH0zz ,,pF‡‡ RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..118877 00..118877 MMHHzz BBOOMM MMbaaanxxdiimmwuuidmmth oouuttppuutt--sswwiinngg VVROOL ((=PP 5PP0)) ==kΩ 11‡‡ VV,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 6600 6600 kkHHzz Phase margin at unity φm gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ 25°C 63° 63° Gain margin 25°C 15 15 dB †Full range is −40°C to 125°C. ‡Referenced to 1.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252I electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise DD noted) TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 85°C 00..55 00..55 µµVV//°°CC Input offset voltage long- 25°C 0.003 0.003 µV/mo term drift (see Note 4) VVDDDD±± == ±±22..55 VV,, VVIICC == 00,, 25°C 0.5 60 0.5 60 VO = 0, RS = 50 Ω −40°C IIO Input offset current to 85°C 150 150 pA Full range 1000 1000 25°C 1 60 1 60 −40°C IIB Input bias current to 85°C 150 150 pA Full range 1000 1000 0 −0.3 0 −0.3 25°C to to to to CCoommmmoonn--mmooddee iinnppuutt 4 4.2 4 4.2 VVIICCRR ||VVIIOO || ≤≤55 mmVV,, RRSS == 5500 ΩΩ VV voltage range 0 0 Full range to to 3.5 3.5 IOH = −20 µA 25°C 4.98 4.98 25°C 4.9 4.94 4.9 4.94 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee IIOOHH == −−7755 µµAA VV Full range 4.8 4.8 IOH = −150 µA 25°C 4.8 4.88 4.8 4.88 25°C 0.01 0.01 VVIICC == 22..55 VV,, IIOOLL == 5500 µµAA Full range 0.06 0.06 25°C 0.09 0.15 0.09 0.15 VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee VVIICC == 22..55 VV,, IIOOLL == 550000 µµAA VV Full range 0.15 0.15 25°C 0.2 0.3 0.2 0.3 VVIICC == 22..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 0.3 0.3 25°C 100 350 100 350 AAVVDD LLvvooaallrrttggaaeegg--eess iiaaggmmnnaappllll iiddffiiiiccffffaaeettrriiooeennnnttiiaall VVVVIIOOCC ==== 1122 ..VV55 ttVVoo,, 44 VV RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV RL = 1 MΩ‡ 25°C 1700 1700 Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode input ri(c) resistance 25°C 1012 1012 Ω Common-mode input ci(c) capacitance f = 10 kHz, P package 25°C 8 8 pF Closed-loop output zo impedance f = 25 kHz, AV = 10 25°C 200 200 Ω CCMMRRRR CrCraaoottiimmoommoonn--mmooddee rreejjeeccttiioonn VVRIISCC = == 5 000 ttooΩ 22..77 VV,, VVOO == 22..55 VV,, Fu2ll 5r°aCnge 7700 83 7700 83 ddBB †Full range is − 40°C to 125°C. ‡Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252I electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise DD noted) (continued) TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX kkSSVVRR SSrauutippopp (ll∆yy VvvDoollDttaa/gg∆eeV rrIeeOjjee)ccttiioonn VVVDDICDD = == V 44D..44D VV/2 tt,oo 88 VV,,No load Fu2ll 5r°aCnge 8800 95 8800 95 ddBB 25°C 70 125 70 125 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 22..55 VV,, NNoo llooaadd µµAA Full range 150 150 †Full range is − 40°C to 125°C. TLV2252I operating characteristics at specified free-air temperature, V = 5 V DD TLV2252I TLV2252AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 2255°°CC 00..0077 00..1122 00..0077 00..1122 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn VVCCOOLL ==== 111100..5500 VVppFF ttoo‡‡ 33..55 VV,, RRLL == 110000 kkΩΩ‡‡,, FFuullll 00..0055 00..0055 VV//µµss range EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 10 Hz 25°C 36 36 VVnn voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.7 0.7 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt µVV noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input noise In 25°C 0.6 0.6 fA/√Hz current TToottaall hhaarrmmoonniicc VOO = 0.5 V to 2.5 V, AV = 1 0.2% 0.2% TTHHDD ++ NN ff == 2200 kkHHzz,, 2255°°CC distortion plus noise RL = 50 kΩ‡ AV = 10 1% 1% GGaaiinn--bbaannddwwiiddtthh ff == 5500 kkHHzz,, RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..22 00..22 MMHHzz product CL = 100 pF‡ BBOOMM MMbaaanxxdiimmwuuidmmth oouuttppuutt--sswwiinngg VVROOL ((=PP 5PP0)) ==kΩ 22‡‡ VV,,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 3300 3300 kkHHzz Phase margin at unity φm gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ 25°C 63° 63° Gain margin 25°C 15 15 dB †Full range is − 40°C to 125°C. ‡Referenced to 2.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254I electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise DD noted) TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 Temperature 2255°CC ααVVIIOO ccooeeffffiicciieenntt ooff iinnppuutt to 85°C 00..55 00..55 µµVV//°°CC offset voltage Input offset voltage long-term drift 25°C 0.003 0.003 µV/mo (see Note 4) VVDDDD±± == ±±11..55 VV,, VVIICC == 00,, VVOO == 00,, RRSS == 5500 ΩΩ 25°C 0.5 60 0.5 60 −40°C IIO Input offset current to 85°C 150 150 pA Full range 1000 1000 25°C 1 60 1 60 −40°C IIB Input bias current to 85°C 150 150 pA Full range 1000 1000 00 −−00..33 00 −−00..33 2255°°CC VVIICCRR CCoommmmoonn--mmooddee iinnppuutt RRSS == 5500 ΩΩ,, ||VVIIOO || ≤≤55 mmVV to 2 to 2.2 to 2 to 2.2 VV vvoollttaaggee rraannggee 00 00 FFuullll rraannggee to 1.7 to 1.7 IOH = −20 µA 25°C 2.98 2.98 HHiigghh--lleevveell oouuttppuutt 25°C 2.9 2.9 VVOOHH IIOOHH == −−7755 µµAA VV vvoollttaaggee Full range 2.8 2.8 IOH = −150 µA 25°C 2.8 2.8 25°C 10 10 VVIICC == 11..55 VV,, IIOOLL == 5500 µµAA Full range 80 80 LLooww--lleevveell oouuttppuutt 25°C 100 100 VVOOLL VVIICC == 11..55 VV,, IIOOLL == 550000 µµAA mmVV vvoollttaaggee Full range 150 150 25°C 200 200 VVIICC == 11..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 300 300 AAVVDD LLddaiiaamffffrreepggrrleeieef--inncssttaiiiiggaatnnillo aavvnlloollttaaggee VVVVIIOOCC ==== 1111 ..VV55 ttVVoo,, 22 VV RRRLLL === 111 00M00Ω kk‡ΩΩ‡‡ Fu22ll 55r°°aCCnge 11000 282050 11000 282050 VV//mmVV Differential input ri(d) 25°C 1012 1012 Ω resistance Common-mode input ri(c) 25°C 1012 1012 Ω resistance Common-mode input ci(c) f = 10 kHz, N package 25°C 8 8 pF capacitance Closed-loop output zo f = 25 kHz, AV = 10 25°C 220 220 Ω impedance CCMMRRRR CCreoojemmcmmtiooonnn r--ammtioooddee VVRIISCC = == 5 000 ttooΩ 11..77 VV,, VVOO == 11..55 VV,, Fu2ll 5r°aCnge 6650 75 6650 77 ddBB †Full range is − 40°C to 125°C. ‡Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254I electrical characteristics at specified free-air temperature, V = 3 V (unless otherwise DD noted) (continued) TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX Supply voltage 25°C 80 95 80 100 kkSSVVRR rreejjeeccttiioonn rraattiioo VVDDDD == 22..77 VV ttoo 88 VV,, ddBB (∆VDD/∆VIO) VIC = VDD/2, No load Full range 80 80 SSuuppppllyy ccuurrrreenntt 25°C 135 250 135 250 IIDDDD (four amplifiers) VVOO == 11..55 VV,, NNoo llooaadd Full range 300 300 µµAA †Full range is − 40°C to 125°C. TLV2254I operating characteristics at specified free-air temperature, V = 3 V DD TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX VVOOO == 00..77 VV ttoo 11..77 VV,, 2255°CC 00..0077 00..11 00..0077 00..11 SSSRRR SSSllleeewww rrraaattteee aaattt uuunnniiitttyyy gggaaaiiinnn RRRLLL === 111000000 kkkΩΩ‡‡,,, VVV///µµsss CCL == 110000 ppFF‡‡ FFuullll rraannggee 00..0055 00..0055 f = 10 Hz 25°C 35 35 VVnn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee f = 1 kHz 25°C 19 19 nnVV//√√HHzz PPeeaakk--ttoo--ppeeaakk eeqquuiivvaalleenntt iinnppuutt f = 0.1 Hz to 1 Hz 25°C 0.6 0.6 VVNN((PPPP)) noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 µVV In Equivalent input noise current 25°C 0.6 0.6 fA/√Hz f = 1 kHz, GGaaiinn--bbaannddwwiiddtthh pprroodduucctt RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..118877 00..118877 MMHHzz CL = 100 pF‡ VO(PP) = 1 V, BBOOMM MMbaaanxxdiimmwuuidmmth oouuttppuutt--sswwiinngg AARVVL === 115,,0 kΩ‡‡, 2255°°CC 6600 6600 kkHHzz CL = 100 pF‡ φm Phase margin at unity gain RRLL == 5500 kkΩΩ‡‡,, 25°C 63° 63° Gain margin CL = 100 pF‡‡ 25°C 15 15 dB †Full range is − 40°C to 85°C. ‡Referenced to 1.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254I electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise DD noted) TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 Temperature 2255°CC ααVVIIOO ccooeeffffiicciieenntt ooff iinnppuutt to 85°C 00..55 00..55 µµVV//°°CC offset voltage Input offset voltage long-term drift 25°C 0.003 0.003 µV/mo (see Note 4) VVDDDD±± == ±±22..55 VV,, VVIICC == 00,, VVOO == 00,, RRSS == 5500 ΩΩ 25°C 0.5 60 0.5 60 −40°C IIO Input offset current to 85°C 150 150 pA Full range 1000 1000 25°C 1 60 1 60 −40°C IIB Input bias current to 85°C 150 150 pA Full range 1000 1000 00 −−00..33 00 −−00..33 2255°°CC CCoommmmoonn--mmooddee iinnppuutt to 4 to 4.2 to 4 to 4.2 VVIICCRR ||VVIIOO || ≤≤55 mmVV,, RRSS == 5500 ΩΩ VV vvoollttaaggee rraannggee 00 00 FFuullll rraannggee to 3.5 to 3.5 IOH = −20 µA 25°C 4.98 4.98 HHiigghh--lleevveell oouuttppuutt 25°C 4.9 4.94 4.9 4.94 VVOOHH IIOOHH == −−7755 µµAA VV vvoollttaaggee Full range 4.8 4.8 IOH = −150 µA 25°C 4.8 4.88 4.8 4.88 25°C 0.01 0.01 VVIICC == 22..55 VV,, IIOOLL == 5500 µµAA Full range 0.06 0.06 LLooww--lleevveell oouuttppuutt 25°C 0.09 0.15 0.09 0.15 VVOOLL VVIICC == 22..55 VV,, IIOOLL == 550000 µµAA VV vvoollttaaggee Full range 0.15 0.15 25°C 0.2 0.3 0.2 0.3 VVIICC == 22..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 0.3 0.3 AAVVDD LLddiiaaffffrreeggrreeee--nnssttiiiiggaannll aavvlloollttaaggee VVIICC == 22..55 VV,, RRLL == 110000 kkΩΩ‡‡ Fu2ll 5r°aCnge 11000 350 11000 350 VV//mmVV amplification VVOO == 11 VV ttoo 44 VV RL = 1 MΩ‡ 25°C 1700 1700 Differential input ri(d) 25°C 1012 1012 Ω resistance Common-mode input ri(c) 25°C 1012 1012 Ω resistance Common-mode input ci(c) f = 10 kHz, N package 25°C 8 8 pF capacitance Closed-loop output zo f = 25 kHz, AV = 10 25°C 200 200 Ω impedance CCoommmmoonn--mmooddee VVIICC == 00 ttoo 22..77 VV,, VVOO == 22..55 VV,, 25°C 70 83 70 83 CCMMRRRR rejection ratio RS = 50Ω Full range 70 70 ddBB †Full range is − 40°C to 125°C. ‡Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254I electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise DD noted) (continued) TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX Supply voltage 25°C 80 95 80 95 kkSSVVRR rreejjeeccttiioonn rraattiioo VVDDDD == 44..44 VV ttoo 88 VV,, ddBB (∆VDD/∆VIO) VIC = VDD/2, No load Full range 80 80 SSuuppppllyy ccuurrrreenntt 25°C 140 250 140 250 IIDDDD (four amplifiers) VVOO == 22..55 VV,, NNoo llooaadd Full range 300 300 µAA †Full range is − 40°C to 125°C. TLV2254I operating characteristics at specified free-air temperature, V = 5 V DD TLV2254I TLV2254AI PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 0.07 0.12 0.07 0.12 SR SSgalleeinww rraattee aatt uunniittyy CVVOOL === 1110..440 VVpF ttoo‡ 22..66 VV,, RRLL == 110000 kkΩΩ‡‡,, Full 0.05 0.05 V/µs range EEqquuiivvaalleenntt iinnppuutt f = 10 Hz 25°C 36 36 VVnn noise voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.7 0.7 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt µVV noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input In 25°C 0.6 0.6 fA/√Hz noise current Total harmonic VOO = 0.5 V to 2.5 V, AV = 1 0.2% 0.2% TTHHDD ++ NN ddiissttoorrttiioonn pplluuss ff == 2200 kkHHzz,, 2255°°CC noise RL = 50 kΩ‡ AV = 10 1% 1% GGaaiinn--bbaannddwwiiddtthh ff == 5500 kkHHzz,, RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..22 00..22 MMHHzz product CL = 100 pF‡ BBOOMM MMswaaixxniigmm buuammn doowuuttippduuthtt-- VVROOL ((=PP 5PP0)) ==kΩ 22 ‡‡VV,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 3300 3300 kkHHzz Phase margin at φm 25°C 63° 63° unity gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ Gain margin 25°C 15 15 dB †Full range is − 40°C to 125°C. ‡Referenced to 2.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252Q, and TLV2252M electrical characteristics at specified free-air temperature, V = 3 V DD (unless otherwise noted) TLV2252Q, TLV2252AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2252M TLV2252AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 85°C 00..55 00..55 µµVV//°°CC Input offset voltage long-term drift VDD± = ±1.5 V, VIC = 0, 25°C 0.003 0.003 µV/mo (see Note 4) VO = 0, RS = 50 Ω 25°C 0.5 60 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt 125°C 1000 1000 ppAA 25°C 1 60 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt 125°C 1000 1000 ppAA 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee iinnppuutt 2 2.2 2 2.2 VVIICCRR vvvooollltttaaagggeee rrraaannngggeee RRSS == 5500 ΩΩ, ||VVIIOO || ≤≤55 mmVV 00 00 VV FFuullll rraannggee ttoo ttoo 1.7 1.7 IOH = −20 µA 25°C 2.98 2.98 HHiigghh--lleevveell oouuttppuutt 25°C 2.9 2.9 VVOOHH vvvooollltttaaagggeee IIOOHH == −−7755 µµAA Full range 2.8 2.8 VV IOH = −150 µA 25°C 2.8 2.8 VIC = 1.5 V, IOL = 50 µA 25°C 10 10 25°C 100 150 100 150 LLooww--lleevveell oouuttppuutt VVIICC == 11..55 VV,, IIOOLL == 550000 µµAA VVOOLL Full range 165 165 mmVV vvoollttaaggee 25°C 200 300 200 300 VVIICC == 11..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 300 300 25°C 100 250 100 250 AAVVDD LLvvooaallrrttggaaeegg--eess iiaaggmmnnaappllll iiddffiiiiccffffaaeettrriiooeennnnttiiaall VVVVIIOOCC ==== 1111 ..VV55 ttVVoo,, 22 VV RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV RL = 1 MΩ‡ 25°C 800 800 Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode input ri(c) resistance 25°C 1012 1012 Ω Common-mode input ci(c) capacitance f = 10 kHz, P package 25°C 8 8 pF Closed-loop output zo impedance f = 25 kHz, AV = 10 25°C 220 220 Ω CCMMRRRR CrCraaoottiimmoommoonn--mmooddee rreejjeeccttiioonn VVRIISCC = == 5 000 ttooΩ 11..77 VV,, VVOO == 11..55 VV,, Fu2ll 5r°aCnge 6650 75 6650 77 ddBB SSuuppppllyy vvoollttaaggee rreejjeeccttiioonn VVDDDD == 22..77 VV ttoo 88 VV,, 25°C 80 95 80 100 kkSSVVRR rraattiioo ((∆VVDD //∆VVIO)) VVIC == VVDD//22,, NNoo llooaadd Full range 80 80 ddBB 25°C 68 125 68 125 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 11..55 VV,, NNoo llooaadd µµAA Full range 150 150 †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252Q, and TLV2252M operating characteristics at specified free-air temperature, V = 3 V DD TLV2252Q, TLV2252AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2252M TLV2252AM UUNNIITT MIN TYP MAX MIN TYP MAX 2255°°CC 00..0077 00..11 00..0077 00..11 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn VVCCOOLL ==== 110000..8800 VVppFF ttoo‡‡ 11..44 VV,, RRLL == 110000 kkΩΩ‡‡,, FFuullll 00..0055 00..0055 VV//µµss range EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 10 Hz 25°C 35 35 VVnn voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.6 0.6 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt µVV noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input noise In current 25°C 0.6 0.6 fA/√Hz GGpraaoiidnnu--bbcaatnnddwwiiddtthh ffC ==L 11= 1kk0HH0zz ,,p F‡‡ RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..118877 00..118877 MMHHzz Maximum BBOOMM oouuttppuutt--sswwiinngg VVROOL ((=PP 5PP0)) ==kΩ 11‡‡ VV,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 6600 6600 kkHHzz bandwidth Phase margin at unity φm gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ 25°C 63° 63° Gain margin 25°C 15 15 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 1.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252Q, and TLV2252M electrical characteristics at specified free-air temperature, V = 5 V DD (unless otherwise noted) TLV2252Q, TLV2252AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2252M TLV2252AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 85°C 00..55 00..55 µµVV//°°CC Input offset voltage long- VDD± = ±2.5 V, VIC = 0, 25°C 0.003 0.003 µV/mo term drift (see Note 4) VVOO == 00,, RRSS == 5500 ΩΩ 25°C 0.5 60 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt 125°C 1000 1000 ppAA 25°C 1 60 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt 125°C 1000 1000 ppAA 0 −0.3 0 −0.3 25°C to to to to CCoommmmoonn--mmooddee iinnppuutt 4 4.2 4 4.2 VVIICCRR ||VVIIOO || ≤≤55 mmVV,, RRSS == 5500 ΩΩ VV voltage range 0 0 Full range to to 3.5 3.5 IOH = −20 µA 25°C 4.98 4.98 25°C 4.9 4.94 4.9 4.94 VVOOHH HHiigghh--lleevveell oouuttppuutt vvoollttaaggee IIOOHH == −−7755 µµAA VV Full range 4.8 4.8 IOH = −150 µA 25°C 4.8 4.88 4.8 4.88 VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01 25°C 0.09 0.15 0.09 0.15 VVIICC == 22..55 VV,, IIOOLL == 550000 µµAA VVOOLL LLooww--lleevveell oouuttppuutt vvoollttaaggee Full range 0.15 0.15 VV 25°C 0.2 0.3 0.2 0.3 VVIICC == 22..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 0.3 0.3 25°C 100 350 100 350 AAVVDD LLvvooaallrrttggaaeegg--eess iiaaggmmnnaappllll iiddffiiiiccffffaaeettrriiooeennnnttiiaall VVVVIIOOCC ==== 1122 ..VV55 ttVVoo,, 44 VV RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV RL = 1 MΩ‡ 25°C 1700 1700 Differential input ri(d) resistance 25°C 1012 1012 Ω Common-mode input ri(c) resistance 25°C 1012 1012 Ω Common-mode input ci(c) capacitance f = 10 kHz, P package 25°C 8 8 pF Closed-loop output zo impedance f = 25 kHz, AV = 10 25°C 200 200 Ω CCMMRRRR CCraootimmommoonn--mmooddee rreejjeeccttiioonn VVVIIOCC === 200. 5ttoo V 22, ..77 VV,, RS = 50Ω Fu2ll 5r°aCnge 7700 83 7700 83 ddBB kkSSVVRR SSrauutippopp (ll∆yy VvvDoollDttaa/gg∆eeV rrIeeOjjee)ccttiioonn VVVDDICDD = == V 44D..44D VV/2 tt,oo 88 VVN,,o load Fu2ll 5r°aCnge 8800 95 8800 95 ddBB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2252Q, and TLV2252M electrical characteristics at specified free-air temperature, V = 5 V DD (unless otherwise noted) (continued) TLV2252Q, TLV2252AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2252M TLV2252AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 70 125 70 125 IIDDDD SSuuppppllyy ccuurrrreenntt VVOO == 22..55 VV,, NNoo llooaadd µµAA Full range 150 150 †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. TLV2252Q, and TLV2252M operating characteristics at specified free-air temperature, V = 5 V DD TLV2252Q, TLV2252AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2252M TLV2252AM UUNNIITT MIN TYP MAX MIN TYP MAX VVVOO === 111...222555 VVV tttooo 222...777555 VVV,,, 2255°CC 00..0077 00..1122 00..0077 00..1122 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRLL == 110000 kkΩ‡‡,, FFuullll VV//µµss CCL == 110000 ppFF‡‡ range 00..0055 00..0055 EEqquuiivvaalleenntt iinnppuutt nnooiissee f = 10 Hz 25°C 36 36 VVnn voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.7 0.7 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt µVV noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input noise In 25°C 0.6 0.6 fA/√Hz current TToottaall hhaarrmmoonniicc VOO = 0.5 V to 2.5 V, AV = 1 0.2% 0.2% TTHHDD ++ NN ff == 2200 kkHHzz,, 2255°°CC distortion plus noise RL = 50 kΩ‡ AV = 10 1% 1% GGaaiinn--bbaannddwwiiddtthh pprroodduucctt ff == 5500 kkHHzz,, RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..22 00..22 MMHHzz CL = 100 pF‡ BBOOMM MMbaaanxxdiimmwuuidmmth oouuttppuutt--sswwiinngg VVROOL ((=PP 5PP0)) ==kΩ 22‡‡ VV,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 3300 3300 kkHHzz Phase margin at unity φm gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ 25°C 63° 63° Gain margin 25°C 15 15 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 2.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254Q, and TLV2254M electrical characteristics at specified free-air temperature, V = 3 V DD (unless otherwise noted) TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 125°C 00..55 00..55 µµVV//°°CC Input offset voltage long- VDD± = ±1.5 V, VIC = 0, 25°C 0.003 0.003 µV/mo term drift (see Note 4) VO = 0, RS = 50 Ω 25°C 0.5 60 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt 125°C 1000 1000 ppAA 25°C 1 60 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt 125°C 1000 1000 ppAA 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee iinnppuutt 2 2.2 2 2.2 VVIICCRR RRSS == 5500 ΩΩ, ||VVIIOO || ≤≤55 mmVV VV vvoollttaaggee rraannggee 00 00 FFuullll rraannggee ttoo ttoo 1.7 1.7 IOH = −20 µA 25°C 2.98 2.98 HHiigghh--lleevveell oouuttppuutt 25°C 2.9 2.9 VVOOHH IIOOHH == −−7755 µµAA VV vvoollttaaggee Full range 2.8 2.8 IOH = −150 µA 25°C 2.8 2.8 VIC = 1.5 V, IOL = 50 µA 25°C 10 10 25°C 100 150 100 150 LLooww--lleevveell oouuttppuutt VVIICC == 11..55 VV,, IIOOLL == 550000 µµAA VVOOLL vvoollttaaggee Full range 165 165 mmVV 25°C 200 300 200 300 VVIICC == 11..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 300 300 25°C 100 225 100 225 AAVVDD LLaarrggee--ssiiggnnaall ddiiffffeerreennttiiaall VVIICC == 11..55 VV,, RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV vvoollttaaggee aammpplliiffiiccaattiioonn VVOO == 11 VV ttoo 22 VV RL = 1 MΩ‡ 25°C 800 800 Differential input ri(d) 25°C 1012 1012 Ω resistance Common-mode input ri(c) 25°C 1012 1012 Ω resistance Common-mode input ci(c) f = 10 kHz, N package 25°C 8 8 pF capacitance Closed-loop output zo f = 25 kHz, AV = 10 25°C 220 220 Ω impedance CCMMRRRR CCoommmmoonn--mmooddee VVIICC == 00 ttoo 11..77 VV,, VVOO == 11..55 VV,, 25°C 65 75 65 77 ddBB rejection ratio RS = 50Ω Full range 60 60 Supply voltage 25°C 80 95 80 100 VVDDDD == 22..77 VV ttoo 88 VV,, kkSSVVRR rr(ee∆jjVeeDccttDiioo/nn∆ rrVaaIttOiioo) VIC = VDD/2, No load Full range 80 80 ddBB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 1.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254Q, and TLV2254M electrical characteristics at specified free-air temperature, V = 3 V DD (unless otherwise noted) (continued) TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX SSuuppppllyy ccuurrrreenntt 25°C 135 250 135 250 IIDDDD (four amplifiers) VVOO == 11..55 VV,, NNoo llooaadd Full range 300 300 µµAA †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. TLV2254Q, and TLV2254M operating characteristics at specified free-air temperature, V = 3 V DD TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX VO = 0.5 V to 1.7 V, 25°C 0.07 0.1 0.07 0.1 SSRR SSlleeww rraattee aatt uunniittyy ggaaiinn RRLLL == 110000 kkΩΩ‡‡,, VV//µµss CCLL == 110000 ppFF‡‡ FFuullll rraannggee 00..0055 00..0055 f = 10 Hz 25°C 35 35 VVnn EEqquuiivvaalleenntt iinnppuutt nnooiissee vvoollttaaggee f = 1 kHz 25°C 19 19 nnVV//√√HHzz PPeeaakk--ttoo--ppeeaakk eeqquuiivvaalleenntt iinnppuutt f = 0.1 Hz to 1 Hz 25°C 0.6 0.6 VVNN((PPPP)) noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 µVV In Equivalent input noise current 25°C 0.6 0.6 fA/√Hz f = 1 kHz, GGaaiinn--bbaannddwwiiddtthh pprroodduucctt RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..118877 00..118877 MMHHzz CL = 100 pF‡ VO(PP) = 1 V, BBOOMM MMbaaanxxdiimmwuuidmmth oouuttppuutt--sswwiinngg AARVVL === 115,,0 kΩ‡‡, 2255°°CC 6600 6600 kkHHzz CL = 100 pF‡ φm Phase margin at unity gain RRLL == 5500 kkΩΩ‡‡,, 25°C 63° 63° Gain margin CL = 100 pF‡‡ 25°C 15 15 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 1.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254Q, and TLV2254M electrical characteristics at specified free-air temperature, V = 5 V DD (unless otherwise noted) TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 200 1500 200 850 VVIIOO IInnppuutt ooffffsseett vvoollttaaggee µµVV Full range 1750 1000 TTeemmppeerraattuurree ccooeeffffiicciieenntt 2255°CC ααVVIIOO of input offset voltage to 125°C 00..55 00..55 µµVV//°°CC Input offset voltage long-term drift VDD± = ±2.5 V, VIC = 0, 25°C 0.003 0.003 µV/mo (see Note 4) VO = 0, RS = 50 Ω 25°C 0.5 60 0.5 60 IIIIOO IInnppuutt ooffffsseett ccuurrrreenntt 125°C 1000 1000 ppAA 25°C 1 60 1 60 IIIIBB IInnppuutt bbiiaass ccuurrrreenntt 125°C 1000 1000 ppAA 00 −−00..33 00 −−00..33 2255°CC ttoo ttoo ttoo ttoo CCoommmmoonn--mmooddee iinnppuutt 4 4.2 4 4.2 VVIICCRR ||VVIIOO || ≤≤55 mmVV,, RRSS == 5500 ΩΩ VV vvoollttaaggee rraannggee 00 00 FFuullll rraannggee ttoo ttoo 3.5 3.5 IOH = −20 µA 25°C 4.98 4.98 HHiigghh--lleevveell oouuttppuutt 25°C 4.9 4.94 4.9 4.94 VVOOHH IIOOHH == −−7755 µµAA VV vvoollttaaggee Full range 4.8 4.8 IOH = −150 µA 25°C 4.8 4.88 4.8 4.88 VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01 25°C 0.09 0.15 0.09 0.15 LLooww--lleevveell oouuttppuutt VVIICC == 22..55 VV,, IIOOLL == 550000 µµAA VVOOLL vvoollttaaggee Full range 0.15 0.15 VV 25°C 0.2 0.3 0.2 0.3 VVIICC == 22..55 VV,, IIOOLL == 11 (cid:9)(cid:9)AA Full range 0.3 0.3 25°C 100 350 100 350 AAVVDD LLaarrggee--ssiiggnnaall ddiiffffeerreennttiiaall VVIICC == 22..55 VV,, RRLL == 110000 kkΩΩ‡‡ Full range 10 10 VV//mmVV vvoollttaaggee aammpplliiffiiccaattiioonn VVOO == 11 VV ttoo 44 VV RL = 1 MΩ‡ 25°C 1700 1700 Differential input ri(d) 25°C 1012 1012 Ω resistance Common-mode input ri(c) 25°C 1012 1012 Ω resistance Common-mode input ci(c) f = 10 kHz, N package 25°C 8 8 pF capacitance Closed-loop output zo f = 25 kHz, AV = 10 25°C 200 200 Ω impedance CCMMRRRR CCoommmmoonn--mmooddee VVIICC == 00 ttoo 22..77 VV,, VVOO == 22..55 VV,, 25°C 70 83 70 83 ddBB rejection ratio RS = 50Ω Full range 70 70 Supply voltage 25°C 80 95 80 95 VVDDDD == 44..44 VV ttoo 88 VV,, kkSSVVRR rr(ee∆jjVeeDccttDiioo/nn∆ rrVaaIttOiioo) VIC = VDD/2, No load Full range 80 80 ddBB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TLV2254Q, and TLV2254M electrical characteristics at specified free-air temperature, V = 5 V DD (unless otherwise noted) (continued) TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX SSuuppppllyy ccuurrrreenntt 25°C 140 250 140 250 IIDDDD (four amplifiers) VVOO == 22..55 VV,, NNoo llooaadd Full range 300 300 µAA †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. TLV2254Q, and TLV2254M operating characteristics at specified free-air temperature, V = 5 V DD TLV2254Q, TLV2254AQ, PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS TTAA†† TLV2254M TLV2254AM UUNNIITT MIN TYP MAX MIN TYP MAX 25°C 0.07 0.12 0.07 0.12 SSRR SSggaalleeiinnww rraattee aatt uunniittyy CVVCOOLL ==== 110000..5500 VVppFF ttoo‡‡ 33..55 VV,, RRLL == 110000 kkΩΩ‡‡,, FFuullll 00..0055 00..0055 VV//µµss range EEqquuiivvaalleenntt iinnppuutt f = 10 Hz 25°C 36 36 VVnn noise voltage f = 1 kHz 25°C 19 19 nnVV//√√HHzz Peak-to-peak f = 0.1 Hz to 1 Hz 25°C 0.7 0.7 VVNN((PPPP)) eeqquuiivvaalleenntt iinnppuutt µVV noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 1.1 Equivalent input In 25°C 0.6 0.6 fA/√Hz noise current Total harmonic VOO = 0.5 V to 2.5 V, AV = 1 0.2% 0.2% TTHHDD ++ NN ddiissttoorrttiioonn pplluuss ff == 2200 kkHHzz,, 2255°°CC noise RL = 50 kΩ‡ AV = 10 1% 1% GGaaiinn--bbaannddwwiiddtthh ff == 5500 kkHHzz,, RRLL == 5500 kkΩΩ‡‡,, 2255°°CC 00..22 00..22 MMHHzz product CL = 100 pF‡ BBOOMM MMswaaixxniigmm buuammn doowuuttippduuthtt-- VVROOL ((=PP 5PP0)) ==kΩ 22 ‡‡VV,,, AACVVL === 111,,00 pF‡‡ 2255°°CC 3300 3300 kkHHzz Phase margin at φm 25°C 63° 63° unity gain RRLL == 5500 kkΩΩ‡‡,, CCLL == 110000 ppFF‡‡ Gain margin 25°C 15 15 dB †Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡Referenced to 2.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Distribution 2 − 5 VIO Input offset voltage vs Common-mode voltage 6, 7 αVIO Input offset voltage temperature coefficient Distribution 8 − 11 IIB/IIO Input bias and input offset currents vs Free-air temperature 12 vs Supply voltage 13 VI Input voltage vs Free-air temperature 14 VOH High-level output voltage vs High-level output current 15, 18 VOL Low-level output voltage vs Low-level output current 16, 17, 19 VO(PP) Maximum peak-to-peak output voltage vs Frequency 20 vs Supply voltage 21 IOS Short-circuit output current vs Free-air temperature 22 VID Differential input voltage vs Output voltage 23, 24 AVD Differential voltage amplification vs Load resistance 25 vs Frequency 26, 27 AVD Large-signal differential voltage amplification vs Free-air temperature 28, 29 zo Output impedance vs Frequency 30, 31 vs Frequency 32 CMRR Common-mode rejection ratio vs Free-air temperature 33 vs Frequency 34, 35 kSVR Supply-voltage rejection ratio vs Free-air temperature 36 IDD Supply current vs Supply voltage 37, 38 vs Load capacitance 39 SR Slew rate vs Free-air temperature 40 VO Inverting large-signal pulse response 41, 42 VO Voltage-follower large-signal pulse response 43, 44 VO Inverting small-signal pulse response 45, 46 VO Voltage-follower small-signal pulse response 47, 48 Vn Equivalent input noise voltage vs Frequency 49, 50 Input noise voltage Over a 10-second period 51 Integrated noise voltage vs Frequency 52 THD + N Total harmonic distortion plus noise vs Frequency 53 vs Supply voltage 54 Gain-bandwidth product vs Free-air temperature 55 vs Frequency 26, 27 φm Phase margin vs Load capacitance 56 Gain margin vs Load capacitance 57 B1 Unity-gain bandwidth vs Load capacitance 58 Overestimation of phase margin vs Load capacitance 59 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2252 DISTRIBUTION OF TLV2252 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 20 20 1020 Amplifiers From 1 Wafer Lot 1020 Amplifiers From 1 Wafer Lot VDD = ±1.5 V VDD = ±2.5 V TA = 25°C TA = 25°C % % − 15 − 15 s s r r e e plifi plifi m m A 10 A 10 of of e e g g a a nt nt e e c c re 5 re 5 P P 0 0 −1.6 −0.8 0 0.8 1.6 −1.6 −0.8 0 0.8 1.6 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV Figure 2 Figure 3 DISTRIBUTION OF TLV2254 DISTRIBUTION OF TLV2254 INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE 35 35 682 Amplifiers From 1 Wafer Lot 682 Amplifiers From 1 Wafer Lot VDD±= ±1.5 V VDD±= ±2.5 V 30 TA = 25°C 30 TA = 25°C % % mplifiers − 2205 mplifiers − 2205 A A Percentage of 1150 Percentage of 1105 5 5 0 0 −1.6 −0.8 0 0.8 1.6 −1.6 −0.8 0 0.8 1.6 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV Figure 4 Figure 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE† INPUT OFFSET VOLTAGE† vs vs COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE 1 1 VDD = 3 V VDD = 5 V 0.8 RS = 50 Ω 0.8 RS = 50 Ω TA = 25°C TA = 25°C 0.6 0.6 V m V m 0.4 − 0.4 age − 0.2 oltage 0.2 Volt 0 et V 0 Offset −0.2 ut Offs −0.2 ut −0.4 np −0.4 np Á− IÁ Á− IOÁ−0.6 ÁVIOÁ−0.6 ÁVIÁ−0.8 −0.8 −1 −1 −1 0 1 2 3 −1 0 1 2 3 4 5 VIC − Common-Mode Input Voltage − V VIC − Common-Mode Input Voltage − V Figure 6 Figure 7 DISTRIBUTION OF TLV2252 INPUT OFFSET DISTRIBUTION OF TLV2252 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT† VOLTAGE TEMPERATURE COEFFICIENT† 25 25 62 Amplifiers From 1 Wafer Lot 62 Amplifiers From 1 Wafer Lot VDD± = ±1.5 V VDD± = ±2.5 V P Package P Package % 20 TA = 25°C to 85°C % 20 TA = 25°C to 85°C − − s s r r e e plifi 15 plifi 15 m m A A of of ge 10 ge 10 a a nt nt e e c c r r e e P 5 P 5 0 0 −2 −1 0 1 2 −2 −1 0 1 2 αVIO − Temperature Coefficient − µV/°C αVIO − Temperature Coefficient − µV/°C Figure 8 Figure 9 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2254 INPUT OFFSET DISTRIBUTION OF TLV2254 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT VOLTAGE TEMPERATURE COEFFICIENT 25 62 Amplifiers From 1 Wafer Lot 25 62 Amplifiers From 1 Wafer Lot VDD± = ±1.5 V VDD± = ±2.5 V P Package P Package % 20 TA = 25°C to 85°C % 20 TA = 25°C to 85°C − − s s er er plifi 15 plifi 15 m m A A of of ge 10 ge 10 a a nt nt e e c c er er P 5 P 5 0 0 −2 −1 0 1 2 −2 −1 0 1 2 αVIO − Temperature Coefficient αVIO − Temperature Coefficient of Input Offset Voltage − µV/°C of Input Offset Voltage − µV/°C Figure 10 Figure 11 INPUT BIAS AND INPUT OFFSET CURRENTS† INPUT VOLTAGE vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE A 2.5 p 35 − VDD± = ±2.5 V RS = 50 Ω nts VIC = 0 2 TA = 25°C urre 30 RVOS == 500 Ω 1.5 C et 25 1 s V Off − put 20 age 0.5 s and In 15 put Volt −0.05 | VIO | ≤5 mV a n put Bi 10 ÁÁ− IVIÁÁ −1 − In IIB IIO −1.5 O O 5 d IIII −2 n IIB aIIB 025 45 65 85 105 125 −2.51 1.5 2 2.5 3 3.5 4 TA − Free-Air Temperature − °C | VDD± | − Supply Voltage − V Figure 12 Figure 13 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS INPUT VOLTAGE†‡ HIGH-LEVEL OUTPUT VOLTAGE†‡ vs vs FREE-AIR TEMPERATURE HIGH-LEVEL OUTPUT CURRENT 5 3 VDD = 5 V VDD = 3 V 4 2.5 V − TA = −40°C e V 3 ag 2 e − Volt TA = 25°C ag ut Volt 2 | VIO | ≤5 mV utp 1.5 put el O TA = 85°C n v − I 1 Le 1 ÁÁVI gh- TA = 125°C ÁHiÁ 0 − 0.5 ÁHÁ O V ÁÁ −1 0 −55 −35 −15 5 25 45 65 85 105 125 0 200 400 600 800 TA − Free-Air Temperature − °C | IOH | − High-Level Output Current − µA Figure 14 Figure 15 LOW-LEVEL OUTPUT VOLTAGE‡ LOW-LEVEL OUTPUT VOLTAGE†‡ vs vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 1.2 1.4 VDD = 3 V VDD = 3 V TA = 25°C VIC = 1.5 V 1.2 1 V e − V VIC = 0 age − 1 TA = 125°C Voltag 0.8 ut Volt TA = 85°C Output 0.6 VIC = 0.75 V el Outp 00..86 TA = 25°C el ev Lev 0.4 VIC = 1.5 V w-L w- ÁLoÁ 0.4 ÁÁ− Lo 0.2 Á− OLÁ TA = −40°C L V 0.2 ÁÁO ÁÁ V 0 0 0 1 2 3 4 5 0 1 2 3 4 5 IOL − Low-Level Output Current − mA IOL − Low-Level Output Current − mA Figure 16 Figure 17 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE†‡ LOW-LEVEL OUTPUT VOLTAGE†‡ vs vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT 5 1.4 VDD = 5 V VVDICD = = 2 5.5 V V TA = 125°C 1.2 V − 4 V age e − 1 utput Volt 3 TA = −40°C put Voltag 0.8 TA = 25°CTA = 85°C el O TA = 25°C Out 0.6 ev 2 el L v High- TA = 85°C ow-Le 0.4 − L ÁOHÁ 1 Á− ÁL 0.2 TA = −40°C ÁVÁ TA = 125°C ÁVÁO 0 0 0 200 400 600 800 0 1 2 3 4 5 6 | IOH | − High-Level Output Current − µA IOL − Low-Level Output Current − mA Figure 18 Figure 19 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE‡ SHORT-CIRCUIT OUTPUT CURRENT vs vs FREQUENCY SUPPLY VOLTAGE V 5 10 − ge VDD = 5 V RI = 50 kΩ 9 put Volta 4 TA = 25°C ent − mA 78 VID = −100 mV Out Curr 6 ak 3 ut o-Pe VDD = 3 V Outp 5 eak-t 2 cuit 4 VTAO == 2V5D°CD/2 m P Cir 3 VIC = VDD/2 mu ort- 2 xi Sh Ma 1 − 1 − OS ÁP)Á I 0 VID = 100 mV P ÁO(Á 0 −1 ÁVÁ 102 103 104 105 2 3 4 5 6 7 8 f − Frequency − Hz VDD − Supply Voltage − V Figure 20 Figure 21 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT† DIFFERENTIAL INPUT VOLTAGE‡ vs vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE 11 1000 VO = 2.5 V VDD = 3 V A 10 VDD = ±5 V 800 RI = 50 kΩ nt − m 98 µ− V 600 TVAIC = = 2 15.°5C V e VID = −100 mV e utput Curr 76 put Voltag 420000 O 5 n 0 hort-Circuit 432 Differential I −−240000 − S 1 − D −600 IOS 0 VID = 100 mV VI −800 −1 −1000 −75 −50 −25 0 25 50 75 100 125 0 0.5 1 1.5 2 2.5 3 TA − Free-Air Temperature − °C VO − Output Voltage − V Figure 22 Figure 23 DIFFERENTIAL INPUT VOLTAGE‡ DIFFERENTIAL VOLTAGE AMPLIFICATION†‡ vs vs OUTPUT VOLTAGE LOAD RESISTANCE 1000 104 VDD = 5 V V VO(PP) = 2 V m 800 VIC = 2.5 V V/ TA = 25°C V RL = 50 kΩ − µe − 600 TA = 25°C ation 103 oltag 400 plific VDD = 5 V V 200 m put e A n 0 g 102 VDD = 3 V − Differential ID −−−246000000 Differential Volta 101 VI − −800 ÁÁ D V ÁAÁ −1000 1 0 1 2 3 4 5 1 101 102 103 VO − Output Voltage − V RL − Load Resistance − kΩ Figure 24 Figure 25 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE† AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 180° VDD = 5 V RL = 50 kΩ al 60 TCAL == 12050° CpF 135° nti dB al Differe cation − 40 Phase Margin 90° Margin e-Sign Amplifi 20 45° Phase rg e Gain − ÁLaÁag 0 0° m m ÁVD − VDÁVolt φo AA ÁÁ −20 −45° −40 −90° 103 104 105 106 107 f − Frequency − Hz Figure 26 LARGE-SIGNAL DIFFERENTIAL VOLTAGE† AMPLIFICATION AND PHASE MARGIN vs FREQUENCY 80 180° VDD = 3 V RL= 50 kΩ al 60 CTAL == 12050° CpF 135° nti dB al Differe cation − 40 Phase Margin 90° Margin e-Sign Amplifi 20 45° Phase ÁÁVD − LargVDÁÁVoltage 0 Gain 0° φom − m AA ÁÁ −20 −45° −40 −90° 103 104 105 106 107 f − Frequency − Hz Figure 27 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL†‡ LARGE-SIGNAL DIFFERENTIAL†‡ VOLTAGE AMPLIFICATION VOLTAGE AMPLIFICATION vs vs FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE 104 104 VDD = 3 V VDD = 5 V VIC = 1.5 V VIC = 2.5 V − Large-Signal Differential Voltage Amplification − V/mV 110032 VO = 0.5 V to 2.5 RRVLL == 510 M kΩΩ − Large-Signal Differential Voltage Amplification − V/mV 110032 RL = 5R0 Lk VΩ=O 1 =M 1Ω V to 4 V AVD AVD 101 101 −75 −50 −25 0 25 50 75 100 125 −75 −50 −25 0 25 50 75 100 125 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 28 Figure 29 OUTPUT IMPEDANCE‡ OUTPUT IMPEDANCE‡ vs vs FREQUENCY FREQUENCY 1000 1000 VDD = 3 V VDD = 5 V TA = 25°C TA = 25°C 100 100 Ω− AV = 100 Ω− ce ce AV = 100 n n a a d d e e p 10 p 10 m m ut I ut I utp AV = 10 utp AV = 10 O O − − o 1 o 1 z z AV = 1 AV = 1 0.1 0.1 102 103 104 105 106 102 103 104 105 106 f− Frequency − Hz f− Frequency − Hz Figure 30 Figure 31 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO† COMMON-MODE REJECTION RATIO†‡ vs vs FREQUENCY FREE-AIR TEMPERATURE 100 94 B B o − d VVDICD = = 2 5.5 V V TA = 25°C o − d 92 ati 80 ati R R on VDD = 3 V on 90 VDD = 5 V cti VIC = 1.5 V cti e e ej 60 ej 88 R R e e d d o o M M 86 VDD = 3 V n- 40 n- o o m m m m 84 o o C C − 20 − R R 82 R M M M C C 0 80 101 102 103 104 105 106 − 75 − 50 − 25 0 25 50 75 100 125 f − Frequency − Hz TA − Free-Air Temperature − °C Figure 32 Figure 33 SUPPLY-VOLTAGE REJECTION RATIO† SUPPLY-VOLTAGE REJECTION RATIO† vs vs FREQUENCY FREQUENCY 100 100 VDD = 3 V VDD = 5 V dB TA = 25°C dB kSVR+ TA = 25°C − 80 − 80 o o ati ati R R on 60 on 60 cti kSVR+ cti e e ej ej kSVR− R R e 40 e 40 g g a a olt kSVR− olt V V y- 20 y- 20 pl pl p p u u Á− SÁ 0 Á− SÁ 0 R R ÁVÁ ÁÁV S S ÁkÁ ÁkÁ −20 −20 101 102 103 104 105 106 101 102 103 104 105 106 f − Frequency − Hz f − Frequency − Hz Figure 34 Figure 35 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. ‡Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 31

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS TLV2252 SUPPLY-VOLTAGE REJECTION RATIO† SUPPLY CURRENT† vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE 110 120 dB VVDICD = = V 2O.7 = V V tDoD 8 /V2 NVOo L=o 0a d − o 100 Rati 105 A Rejection µCurrent − 80 TA = −40°C age 100 ply 60 TA = 85°C olt up TA = 25°C V S y- Á− Á 40 pl D Sup 95 ÁIDÁ Á− 20 R V ÁS k 90 0 −75 −50 −25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 TA − Free-Air Temperature − °C VDD − Supply Voltage − V Figure 36 Figure 37 TLV2254 SUPPLY CURRENT† SLEW RATE‡ vs vs SUPPLY VOLTAGE LOAD CAPACITANCE 240 0.2 VO = 0 VDD = 5 V No Load 0.18 AV = −1 200 TA = 25°C 0.16 A µ− TA = −40°C µs 0.14 nt 160 V/ SR− Curre Rate − 0.12 ply 120 TA = 85°C ew 0.1 SR+ ÁSupÁ TA = 25°C − Sl 0.08 − 80 R ÁDÁ S 0.06 D ÁIÁ 0.04 40 0.02 0 0 0 1 2 3 4 5 6 7 8 101 102 103 104 | VDD± | − Supply Voltage − V CL − Load Capacitance − pF Figure 38 Figure 39 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS SLEW RATE†‡ vs INVERTING LARGE-SIGNAL PULSE FREE-AIR TEMPERATURE RESPONSE† 0.2 3 VDD = 5 V VDD = 3 V RL = 50 kΩ RL = 50 kΩ CL = 100 pF 2.5 CL = 100 pF 0.16 AV = 1 AV = −1 TA = 25°C s SR− V µV/− 0.12 ge − 2 Rate Volta 1.5 w SR+ ut Sle 0.08 utp − O 1 R − S O V 0.04 0.5 0 0 −75 −50 −25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 90 100 TA − Free-Air Temperature − °C t − Time − µs Figure 40 Figure 41 INVERTING LARGE-SIGNAL PULSE VOLTAGE-FOLLOWER LARGE-SIGNAL RESPONSE† PULSE RESPONSE† 5 3 VDD = 5 V VDD = 3 V RL = 50 kΩ RL = 50 kΩ CL = 100 pF 2.5 CL = 100 pF 4 AV = −1 AV = 1 V TA = 25°C − V TA = 25°C age − 3 oltage 2 Volt ut V 1.5 − Output 2 − OutpO 1 V O V 1 0.5 0 0 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 t − Time − µs t − Time − µs Figure 42 Figure 43 †Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. ‡For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 33

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER LARGE-SIGNAL INVERTING SMALL-SIGNAL PULSE RESPONSE† PULSE RESPONSE† 5 0.95 VDD = 5 V VDD = 3 V RL = 50 kΩ 0.9 RL = 50 kΩ CL = 100 pF CL = 100 pF 4 AV = 1 AV = −1 e − V TA = 25°C ge − V 0.85 TA = 25°C g a olta 3 Volt 0.8 ut V put − Outp 2 − Out 0.75 O O V 0.7 V 1 0.65 0 0.6 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 t − Time − µs t − Time − µs Figure 44 Figure 45 INVERTING SMALL-SIGNAL VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE† PULSE RESPONSE† 2.65 0.95 VDD = 5 V VDD = 3 V RL = 50 kΩ RL = 50 kΩ CL = 100 pF 0.9 CL = 100 pF 2.6 AV = −1 AV = 1 V TA = 25°C V 0.85 TA = 25°C − − Voltage 2.55 Voltage 0.8 ut ut utp 2.5 utp 0.75 O O − − O O O O 0.7 VV VV 2.45 0.65 2.4 0.6 0 10 20 30 40 50 0 10 20 30 40 50 t − Time − µs t − Time − µs Figure 46 Figure 47 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE† VOLTAGE-FOLLOWER SMALL-SIGNAL vs PULSE RESPONSE† FREQUENCY 2.65 60 VDD = 5 V 2.6 ACRVLL === 15100 0k ΩpF nV/Hz 50 VRTADS D == =225 03° CΩV TA = 25°C e − V g e − olta 40 g 2.55 V Volta oise 30 put ut N − Out 2.5 nt Inp 20 O O e VV al v 2.45 ui q 10 E − n V 2.4 0 0 10 20 30 40 50 101 102 103 104 t − Time − µs f − Frequency − Hz Figure 48 Figure 49 EQUIVALENT INPUT NOISE VOLTAGE† vs INPUT NOISE VOLTAGE OVER FREQUENCY A 10-SECOND PERIOD† 60 1000 z VDD = 5 V VDD = 5 V H RS = 20 Ω 750 f = 0.1 Hz to 10 Hz V/ 50 TA = 25°C TA = 25°C n e − 500 g Volta 40 − nV 250 e e s g put Noi 30 e Volta 0 nt In 20 Nois −250 e val −500 ui q 10 E − −750 n V 0 −1000 101 102 103 104 0 2 4 6 8 10 f − Frequency − Hz t − Time − s Figure 50 Figure 51 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 35

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS INTEGRATED NOISE VOLTAGE† TOTAL HARMONIC DISTORTION PLUS NOISE† vs vs FREQUENCY FREQUENCY 100 % 1 − Calculated Using Ideal Pass-Band Filter e LTAow = F2r5e°qCuency = 1 Hz Nois AV = 100 V us µ Pl Voltage − 10 stortion 0.1 AV = 10 e Di Nois onic d m e r egrat 1 al Ha 0.01 Int Tot AV = 1 N − VDD = 5 V + RL = 50 kΩ D TA = 25°C H 0.1 T 0.001 1 101 102 103 104 105 101 102 103 104 105 f − Frequency − Hz f − Frequency − Hz Figure 52 Figure 53 GAIN-BANDWIDTH PRODUCT†‡ GAIN-BANDWIDTH PRODUCT vs vs FREE-AIR TEMPERATURE SUPPLY VOLTAGE 300 220 VDD = 5 V f = 10 kHz RL = 50 kHz z 260 CL = 100 pF H kHz 210 − k − ct uct odu 220 d 200 r o P Pr h h dt dwidt 190 andwi 180 n B Ba n- n- ai ai G 140 G 180 100 170 −75 −50 −25 0 25 50 75 100 125 0 1 2 3 4 5 6 7 8 TA − Free-Air Temperature − °C VDD − Supply Voltage − V Figure 54 Figure 55 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. 36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 TYPICAL CHARACTERISTICS PHASE MARGIN GAIN MARGIN vs vs LOAD CAPACITANCE LOAD CAPACITANCE 75° 20 TA = 25°C Rnull = 200 Ω Rnull = 500 Ω Rnull = 500 Ω 60° 15 n Margi 45° − dB Rnull = 200 Ω ase Rnull = 100 Ω rgin 10 Rnull = 100 Ω − Ph 30° Rnull = 50 Ω n Ma Rnull = 50 Ω φmom Rnull = 10 Ω Gai 50 kΩ Rnull = 10 Ω 5 15° VI 50 kΩ V−DD+ Rnull Rnull = 0 Rnull = 0 + CL TA = 25°C 0° VDD− 0 101 102 103 104 101 102 103 104 105 CL − Load Capacitance − pF CL − Load Capacitance − pF Figure 56 Figure 57 OVERESTIMATION OF PHASE MARGIN† UNITY-GAIN BANDWIDTH vs vs LOAD CAPACITANCE LOAD CAPACITANCE 25 200 TA = 25°C TA = 25°C Rnull = 500 Ω 175 n 20 z gi h − kH 150 se Mar widt 125 Pha 15 nd of Ba 100 on Rnull = 100 Ω Gain mati 10 Rnull = 50 Ω Rnull = 200 Ω y- 75 sti ÁÁ− Unit 50 Overe 5 Rnull = 10 Ω 1 B ÁÁ 25 0 0 101 102 103 104 105 101 102 103 104 105 CL − Load Capacitance − pF CL − Load Capacitance − pF †See application information Figure 58 Figure 59 †For all curves where VDD = 5 V, all loads are referenced to 2.5 V. For all curves where VDD = 3 V, all loads are referenced to 1.5 V. ‡Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 37

(cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:29) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 APPLICATION INFORMATION driving large capacitive loads The TLV2252 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 56 and Figure 57 illustrate its ability to drive loads up to 1000 pF while maintaining good gain and phase margins (R = 0). null A smaller series resistor (R ) at the output of the device (see Figure 60) improves the gain and phase margins null when driving large capacitive loads. Figure 55 and Figure 56 show the effects of adding series resistances of 10 Ω, 50 Ω, 100 Ω, 200 Ω, and 500 Ω. The addition of this series resistor has two effects: the first adds a zero to the transfer function and the second reduces the frequency of the pole associated with the output load in the transfer function. The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To calculate the improvement in phase margin, equation 1 can be used. (cid:2) (cid:3) ∆φ (cid:1)tan–1 2×π×UGBW× R × C (1) m1 null L Where: ∆φ (cid:1)improvementinphasemargin m1 UGBW (cid:1) unity-gainbandwidthfrequency R (cid:1) outputseriesresistance null C (cid:1) loadcapacitance L The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 58). To use equation 1, UGBW must be approximated from Figure 58. Using equation 1 alone overestimates the improvement in phase margin as illustrated in Figure 59. The overestimation is caused by the decrease in the frequency of the pole associated with the load, providing additional phase shift and reducing the overall improvement in phase margin. Using Figure 60, with equation 1 enables the designer to choose the appropriate output series resistance to optimize the design of circuits driving large capacitance loads. 50 kΩ VDD+ VI 50 kΩ − Rnull + CL VDD−/GND Figure 60. Series-Resistance Circuit 38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(cid:29) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:7) (cid:1)(cid:2)(cid:3)(cid:4)(cid:4)(cid:5)(cid:6)(cid:8) (cid:8)(cid:9)(cid:10)(cid:11)(cid:12)(cid:13)(cid:14)(cid:9) (cid:2)(cid:15)(cid:12)(cid:16)(cid:17)(cid:18)(cid:19) (cid:20)(cid:8)(cid:21)(cid:2)(cid:22)(cid:1)(cid:18)(cid:22)(cid:20)(cid:8)(cid:21)(cid:2) (cid:3)(cid:23)(cid:20)(cid:24) (cid:2)(cid:18)(cid:25)(cid:22)(cid:26)(cid:18)(cid:25)(cid:23)(cid:20) (cid:18)(cid:26)(cid:23)(cid:20)(cid:8)(cid:1)(cid:21)(cid:18)(cid:27)(cid:8)(cid:2) (cid:8)(cid:17)(cid:26)(cid:2)(cid:21)(cid:28)(cid:21)(cid:23)(cid:20)(cid:19) SLOS185D − FEBRUARY 1997 − REVISED AUGUST 2006 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using MicrosimParts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 61 are generated using the TLV2252 typical electrical and operating characteristics at T = 25°C. Using this information, output A simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): (cid:1) (cid:1) Maximum positive output voltage swing Unity-gain frequency (cid:1) (cid:1) Maximum negative output voltage swing Common-mode rejection ratio (cid:1) (cid:1) Slew rate Phase margin (cid:1) (cid:1) Quiescent power dissipation DC output resistance (cid:1) (cid:1) Input bias current AC output resistance (cid:1) (cid:1) Open-loop voltage amplification Short-circuit output current limit NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 DLN 3 EGND + VCC+ 92 9 FB RSS ISS + − 90 91 VB RO2 + DLP + − RP + − HLIM VLP VLN IN− 2 10 VC R2 − − + DP J1 J2 − 6 C2 7 IN+ 53 + 1 VLIM 11 12 DC GCM GA − 8 C1 RD1 RD2 60 RO1 VAD + DE − 54 5 VCC− 4 − + VE OUT .SUBCKT TLV225x 1 2 3 4 5 RD1 60 11 37.23E3 C1 11 12 6.369E−12 RD2 60 12 37.23E3 C2 6 7 25.00E−12 R01 8 5 84 DC 5 53 DX R02 7 99 84 DE 54 5 DX RP 3 4 71.43E3 DLP 90 91 DX RSS 10 99 64.52E6 DLN 92 90 DX VAD 60 4 −.5 DP 4 3 DX VB 9 0 DC 0 EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 VC 3 53 DC .605 FB 7 99 POLY (5) VB VC VE VLP VE 54 4 DC .605 + VLN 0 57.62E6 −60E6 60E6 60E6 −60E6 VLIM 7 8 DC 0 GA 6 0 11 12 26.86E−6 VLP 91 0 DC −0.235 GCM 0 6 10 99 2.686E−9 VLN 0 92 DC 7.5 ISS 3 10 DC 3.1E−6 .MODEL DX D (IS=800.0E−18) HLIM 90 0 VLIM 1K .MODEL JX PJF (IS=500.0E−15 BETA=139E−6 J1 11 2 10 JX + VTO=−.05) J2 12 1 10 JX .ENDS R2 6 9 100.0E3 Figure 61. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 39

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 5962-9550401QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9550401QPA TLV2262M 5962-9550403QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9550403QHA TLV2262AM 5962-9550403QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9550403QPA TLV2262AM 5962-9566601QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9566601QPA TLV2252M 5962-9566603QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9566603QPA TLV2252AM TLV2252AID ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252A & no Sb/Br) TLV2252AIDG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252A & no Sb/Br) TLV2252AIDR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252A & no Sb/Br) TLV2252AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252A & no Sb/Br) TLV2252AIP ACTIVE PDIP P 8 50 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 125 TLV2252AI & no Sb/Br) TLV2252AIPW ACTIVE TSSOP PW 8 150 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY252A & no Sb/Br) TLV2252AIPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY252A & no Sb/Br) TLV2252AIPWR ACTIVE TSSOP PW 8 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY252A & no Sb/Br) TLV2252AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9566603QPA TLV2252AM TLV2252AQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM V2252A & no Sb/Br) TLV2252ID ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252I & no Sb/Br) TLV2252IDR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252I & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TLV2252IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2252I & no Sb/Br) TLV2252IP ACTIVE PDIP P 8 50 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 125 TLV2252IP & no Sb/Br) TLV2252MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9566601QPA TLV2252M TLV2254AID ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2254AI & no Sb/Br) TLV2254AIDR ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 V2254AI & no Sb/Br) TLV2254AIN ACTIVE PDIP N 14 25 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 125 TLV2254AIN & no Sb/Br) TLV2254AIPW ACTIVE TSSOP PW 14 90 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2254A & no Sb/Br) TLV2254AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2254A & no Sb/Br) TLV2254AIPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2254A & no Sb/Br) TLV2254AQD ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2254A & no Sb/Br) TLV2254ID ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2254I & no Sb/Br) TLV2254IDG4 ACTIVE SOIC D 14 50 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2254I & no Sb/Br) TLV2254IDR ACTIVE SOIC D 14 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2254I & no Sb/Br) TLV2254IN ACTIVE PDIP N 14 25 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 125 TLV2254IN & no Sb/Br) TLV2262AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9550403QPA TLV2262AM TLV2262AMUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9550403QHA TLV2262AM TLV2262MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9550401QPA TLV2262M (1) The marketing status values are defined as follows: Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV2252, TLV2252A, TLV2252AM, TLV2252M, TLV2254A, TLV2262AM, TLV2262M : •Catalog: TLV2252A, TLV2252, TLV2262A, TLV2262 •Automotive: TLV2252-Q1, TLV2252A-Q1, TLV2252A-Q1, TLV2252-Q1, TLV2254A-Q1, TLV2262A-Q1 •Enhanced Product: TLV2252A-EP, TLV2252A-EP, TLV2254A-EP •Military: TLV2252M, TLV2252AM Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications •Military - QML certified for Military and Defense Applications Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TLV2252AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2252AIPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TLV2252IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2254AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2254AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2254IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TLV2252AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2252AIPWR TSSOP PW 8 2000 367.0 367.0 35.0 TLV2252IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2254AIDR SOIC D 14 2500 350.0 350.0 43.0 TLV2254AIPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2254IDR SOIC D 14 2500 350.0 350.0 43.0 PackMaterials-Page2

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MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 4 0.065 (1,65) 0.045 (1,14) 0.063 (1,60) 0.020 (0,51) MIN 0.310 (7,87) 0.015 (0,38) 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0°–15° 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP SEATING PLANE 6.2 PIN 1 ID A 0.1 C AREA 6X 0.65 8 1 3.1 2X 2.9 NOTE 3 1.95 4 5 0.30 8X 0.19 4.5 1.2 MAX B 0.1 C A B 4.3 NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.75 0 - 8 0.05 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) 1 TYP 8 SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOOPLEDNEINRG MASK METAL MSOELTDAEL RU NMDAESRK SOOPLEDNEINRG MASK 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) SYMM (R0.05) TYP 8X (0.45) 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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