ST1CC40 3 A monolithic step-down current source with synchronous rectification Datasheet - production data Applications  Battery charger  Signage  Emergency lighting VFQFPN8 4x4  High brightness LED driving  General lighting Features Description  3.0 V to 18 V operating input voltage range The ST1CC40 device is an 850 kHz fixed  850 kHz fixed switching frequency switching frequency monolithic step-down DC-DC  100 mV typ. current sense voltage drop converter designed to operate as precise constant current source with an adjustable current  6 A standby current in inhibit mode capability up to 3 A DC. The regulated output  7% output current accuracy current is set connecting a sensing resistor to the  Synchronous rectification feedback pin. The embedded synchronous rectification and the 100 mV typical R  95 mHS / 69 m LS typical R SENSE DS(on) voltage drop enhance the efficiency performance.  Peak current mode architecture The size of the overall application is minimized  Embedded compensation network thanks to the high switching frequency and ceramic output capacitor compatibility. The device  Internal current limiting is fully protected against thermal overheating,  Ceramic output capacitor compliant overcurrent and output short-circuit. Inhibit mode  Thermal shutdown minimizes the current consumption in standby. The ST1CC40 is available in VFQFPN8 4 mm x 4 mm 8-lead, and standard SO8 package. Figure 1. Typical application circuit (cid:51)(cid:52)(cid:17)(cid:35)(cid:35)(cid:20)(cid:16) (cid:44)(cid:44) (cid:22) (cid:23) (cid:54)(cid:41)(cid:46) (cid:54)(cid:41)(cid:46)(cid:63)(cid:51)(cid:55) (cid:51)(cid:55) (cid:17) (cid:54)(cid:41)(cid:46)(cid:63)(cid:33) (cid:18) (cid:19) (cid:41)(cid:46)(cid:40) (cid:41)(cid:46)(cid:40) (cid:38)(cid:34) (cid:48)(cid:39)(cid:46)(cid:36) (cid:37)(cid:48) (cid:33)(cid:39)(cid:46)(cid:36) (cid:35)(cid:41)(cid:46) (cid:35)(cid:38)(cid:44)(cid:52) (cid:50)(cid:51) (cid:35)(cid:47)(cid:53)(cid:52) (cid:24) (cid:25) (cid:20) (cid:39)(cid:46)(cid:36) (cid:33)(cid:45)(cid:17)(cid:17)(cid:24)(cid:17)(cid:17)(cid:86)(cid:17) June 2013 DocID18279 Rev 5 1/37 This is information on a product in full production. www.st.com

Table of contents ST1CC40 Table of contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.1 Power supply and voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 Voltage monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.3 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.4 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.5 Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5.6 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 6 Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 Closing the loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.2 G (s) control to output transfer function . . . . . . . . . . . . . . . . . . . . . . . . 12 CO 6.3 Error amplifier compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.4 LED small signal model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.5 Total loop gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.6 eDesign studio software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.1 Component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.1.1 Sensing resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.1.2 Inductor and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.1.3 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/37 DocID18279 Rev 5

ST1CC40 Table of contents 7.2 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.3 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.4 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.5 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 DocID18279 Rev 5 3/37 37

List of tables ST1CC40 List of tables Table 1. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. Uncompensated error amplifier characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 6. Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. List of ceramic capacitors for the ST1CC40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 8. Component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 9. VFQFPN8 (4 x 4 x 1.08 mm) package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 10. SO8-BW package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 11. Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4/37 DocID18279 Rev 5

ST1CC40 List of figures List of figures Figure 1. Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. ST1CC40 block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. Internal circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. Block diagram of the loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Transconductance embedded error amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7. Equivalent series resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8. Load equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. Module plot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 10. Phase plot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 11. eDesign studio screenshot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 12. Equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 13. Layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 14. Switching losses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 15. Constant current protection triggering hiccup mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 16. Demonstration board application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 17. PCB layout (component side) VFQFPN8 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 18. PCB layout (bottom side) VFQFPN8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 19. PCB layout (component side) SO8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 20. PCB layout (bottom side) SO8 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 21. Soft-start. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 22. Inhibit operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 23. Thermal shutdown protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 24. Hiccup current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 25. OCP blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 26. Current regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 27. VFQFPN8 (4 x 4 x 1.08 mm) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 28. SO8-BW package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 DocID18279 Rev 5 5/37 37

Pin settings ST1CC40 1 Pin settings 1.1 Pin connection Figure 2. Pin connection (top view) (cid:54)(cid:58) (cid:20) (cid:27) (cid:57)(cid:44)(cid:49)(cid:54)(cid:58) (cid:44)(cid:49)(cid:43) (cid:51)(cid:42)(cid:49)(cid:39) (cid:42)(cid:49)(cid:39) (cid:57)(cid:44)(cid:49)(cid:36) (cid:36)(cid:42)(cid:49)(cid:39) (cid:49)(cid:38) (cid:44)(cid:49)(cid:43) (cid:23) (cid:24) (cid:41)(cid:37) (cid:54)(cid:50)(cid:27)(cid:16)(cid:37)(cid:58) (cid:57)(cid:41)(cid:52)(cid:41)(cid:51)(cid:49) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:20)(cid:89)(cid:20) 1.2 Pin description Table 1. Pin description No. Type Description VFQFPN8 S08-BW 1 3 VIN Analog circuitry power supply connection A Inhibit input pin. Low signal level disables the device. Leave 2 4 INH this pin floating if not used Feedback input. Connect a proper sensing resistor to set the 3 5 FB LED current 4 6 AGND Analog circuitry ground connection 5 - NC Not connected 6 8 V Power input voltage INSW 7 1 SW Regulator switching pin 8 2 PGND Power ground - 7 GND Connect to AGND 6/37 DocID18279 Rev 5

ST1CC40 Maximum ratings 2 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V Power input voltage -0.3 to 20 INSW V Input voltage -0.3 to 20 INA V Inhibit voltage -0.3 to V INH INA V V Output switching voltage -1 to V SW IN V Power Good -0.3 to V PG IN V Feedback voltage -0.3 to 2.5 FB I FB current -1 to +1 mA FB P Power dissipation at T < 60 °C 2 W TOT A T Operating junction temperature range -40 to 150 °C OP T Storage temperature range -55 to 150 °C stg 3 Thermal data Table 3. Thermal data Symbol Parameter Value Unit Maximum thermal resistance VFQFPN8 40 R °C/W thJA junction-ambient(1) SO8-BW 65 1. Package mounted on demonstration board. DocID18279 Rev 5 7/37 37

Electrical characteristics ST1CC40 4 Electrical characteristics T = 25 °C, V = 12 V, unless otherwise specified. J CC Table 4. Electrical characteristics Value Symbol Parameter Test conditions Unit Min. Typ. Max. Operating input voltage range See(1) 3 18 V Device ON level 2.6 2.75 2.9 V IN Device OFF level 2.4 2.55 2.7 T = 25 °C 90 97 104 J V Feedback voltage mV FB T = 125 °C 90 100 110 J I V pin bias current 600 nA FB FB R -P High-side switch on-resistance I = 750 mA 95 m DSON SW R -N Low-side switch on-resistance I = 750 mA 69 m DSON SW I Maximum limiting current See(2) 5 A LIM Oscillator F Switching frequency 0.7 0.85 1 MHz SW D Duty cycle See(2) 0 100 % DC characteristics I Quiescent current Duty cycle = 0 V > 100 mV 1.5 2.5 mA q fb OFF 2.4 4.5 I Total standby quiescent current A QST-BY See(1) 6 Inhibit Device ON level 1.2 V INH threshold voltage V INH Device OFF level 0.4 I INH current 2 A INH Soft-start T Soft-start duration 1 ms SS Protection Thermal shutdown 150 T °C SHDN Hystereris 15 1. Specifications referred to T from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are assured by J design, characterization and statistical correlation. 2. Guaranteed by design. 8/37 DocID18279 Rev 5

ST1CC40 Functional description 5 Functional description The ST1CC40 device is based on a “peak current mode” architecture with fixed frequency control. As a consequence, the intersection between the error amplifier output and the sensed inductor current generates the control signal to drive the power switch. The main internal blocks shown in the block diagram in Figure3 are:  High-side and low-side embedded power element for synchronous rectification  A fully integrated sawtooth oscillator with a typical frequency of 850 kHz  A transconductance error amplifier  A high-side current sense amplifier to track the inductor current  A pulse width modulator (PWM) comparator and the circuitry necessary to drive the internal power element  The soft-start circuitry to decrease the inrush current at power-up  The current limitation circuit based on the pulse-by-pulse current protection with frequency divider  The inhibit circuitry  The thermal protection function circuitry Figure 3. ST1CC40 block diagram (cid:57)(cid:44)(cid:49)(cid:36) (cid:57)(cid:44)(cid:49)(cid:54)(cid:58) (cid:50)(cid:54)(cid:38) (cid:50)(cid:38)(cid:51) (cid:53)(cid:40)(cid:41) (cid:44)(cid:21)(cid:57) (cid:54)(cid:40)(cid:49)(cid:54)(cid:40) (cid:53)(cid:54)(cid:40)(cid:49)(cid:54)(cid:40) (cid:38)(cid:50)(cid:48)(cid:51) (cid:53)(cid:40)(cid:42)(cid:56)(cid:47)(cid:36)(cid:55)(cid:50)(cid:53) (cid:56)(cid:57)(cid:47)(cid:50) (cid:50)(cid:38)(cid:51) (cid:57)(cid:71)(cid:85)(cid:89)(cid:66)(cid:83) (cid:39)(cid:53)(cid:44)(cid:57)(cid:40)(cid:53) (cid:48)(cid:50)(cid:54)(cid:41)(cid:40)(cid:55) (cid:57)(cid:86)(cid:88)(cid:80) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:47)(cid:50)(cid:42)(cid:44)(cid:38) (cid:38)(cid:50)(cid:48)(cid:51) (cid:57)(cid:71)(cid:85)(cid:89)(cid:66)(cid:81) (cid:57)(cid:70) (cid:54)(cid:58) (cid:50)(cid:55)(cid:51) (cid:39)(cid:48)(cid:39) (cid:40)(cid:18)(cid:36) (cid:44)(cid:49)(cid:43)(cid:44)(cid:37)(cid:44)(cid:55) (cid:39)(cid:53)(cid:44)(cid:57)(cid:40)(cid:53) (cid:54)(cid:50)(cid:41)(cid:55)(cid:16)(cid:54)(cid:55)(cid:36)(cid:53)(cid:55) (cid:19)(cid:17)(cid:20)(cid:57) (cid:41)(cid:37) (cid:44)(cid:49)(cid:43) (cid:42)(cid:49)(cid:39)(cid:36) (cid:42)(cid:49)(cid:39)(cid:51) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:21)(cid:89)(cid:20) DocID18279 Rev 5 9/37 37

Functional description ST1CC40 5.1 Power supply and voltage reference The internal regulator circuit consists of a startup circuit, an internal voltage pre-regulator, the BandGap voltage reference and the bias block that provides current to all the blocks. The starter supplies the startup current to the entire device when the input voltage goes high and the device is enabled (INHIBIT pin connected to ground). The pre-regulator block supplies the bandgap cell with a pre-regulated voltage that has a very low supply voltage noise sensitivity. 5.2 Voltage monitor An internal block continuously senses the V , V and V . If the monitored voltages are cc ref bg good, the regulator begins operating. There is also a hysteresis on the V (UVLO). CC Figure 4. Internal circuit Vcc STARTER PREREGULATOR VREG BANDGAP IC BIAS AM12803v1 D00IN126 VREF 5.3 Soft-start The startup phase is implemented ramping the reference of the embedded error amplifier in 1 msec typ. time. It minimizes the inrush current and decreases the stress of the power components at power-up. During normal operation a new soft-start cycle takes place in case of:  Thermal shutdown event  UVLO event. 5.4 Error amplifier The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non-inverting input is connected to the internal voltage reference (100 mV), while the inverting input (FB) is connected to the output current sensing resistor. The error amplifier is internally compensated to minimize the size of the final application. 10/37 DocID18279 Rev 5

ST1CC40 Functional description Table 5. Uncompensated error amplifier characteristics Description Value Transconductance 250 µS Low frequency gain 96 dB C 195 pF C R 70 K C The error amplifier output is compared with the inductor current sense information to perform PWM control. 5.5 Inhibit The inhibit block disables most of the circuitry when the INH input signal is low. The current drawn from the input voltage is 6 µA typical in inhibit mode. 5.6 Thermal shutdown The shutdown block generates a signal that disables the power stage if the temperature of the chip goes higher than a fixed internal threshold (150 ± 10 °C typical). The sensing element of the chip is close to the PDMOS area, ensuring fast and accurate temperature detection. A 15 °C typical hysteresis prevents the device from turning ON and OFF continuously during the protection operation. DocID18279 Rev 5 11/37 37

Application notes ST1CC40 6 Application notes 6.1 Closing the loop Figure 5. Block diagram of the loop (cid:51)(cid:58)(cid:48)(cid:3)(cid:70)(cid:82)(cid:81)(cid:87)(cid:85)(cid:82)(cid:79) (cid:57)(cid:44)(cid:49) (cid:42)(cid:38)(cid:50)(cid:11)(cid:86)(cid:12) (cid:38)(cid:88)(cid:85)(cid:85)(cid:72)(cid:81)(cid:87)(cid:3)(cid:86)(cid:72)(cid:81)(cid:86)(cid:72) (cid:43)(cid:54)(cid:3) (cid:86)(cid:90)(cid:76)(cid:87)(cid:70)(cid:75) (cid:47) (cid:57)(cid:50)(cid:56)(cid:55) (cid:47)(cid:38)(cid:3)(cid:73)(cid:76)(cid:79)(cid:87)(cid:72)(cid:85) (cid:47)(cid:54)(cid:3) (cid:86)(cid:90)(cid:76)(cid:87)(cid:70)(cid:75) (cid:38)(cid:50)(cid:56)(cid:55) (cid:16) (cid:72)(cid:85)(cid:85)(cid:82)(cid:85)(cid:3) (cid:68)(cid:80)(cid:83)(cid:79)(cid:76)(cid:73)(cid:76)(cid:72)(cid:85) (cid:16) (cid:41)(cid:37) (cid:57) (cid:51)(cid:58)(cid:48)(cid:3) (cid:14) (cid:38)(cid:50)(cid:49)(cid:55)(cid:53)(cid:50)(cid:47) (cid:57) (cid:53)(cid:40)(cid:41) (cid:70)(cid:82)(cid:80)(cid:83)(cid:68)(cid:85)(cid:68)(cid:87)(cid:82)(cid:85) (cid:14) (cid:53)(cid:38) (cid:70)(cid:82)(cid:80)(cid:83)(cid:72)(cid:81)(cid:86)(cid:68)(cid:87)(cid:76)(cid:82)(cid:81)(cid:3) (cid:53)(cid:54) (cid:81)(cid:72)(cid:87)(cid:90)(cid:82)(cid:85)(cid:78) (cid:38)(cid:38) (cid:302)(cid:47)(cid:40)(cid:39) (cid:36) (cid:11)(cid:86)(cid:12) (cid:50) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:23)(cid:89)(cid:20) 6.2 G (s) control to output transfer function CO The accurate control to output transfer function for a buck peak current mode converter can be written as: Equation 1  s 1+------ R0 1  z G s = ---------------------------------------------------------------------------------------------------------------------F s CO Ri 1+R-----0------L-T----S----W---mC1–D–0,5 1+--s---p- H where R represents the load resistance, R the equivalent sensing resistor of the current 0 i sense circuitry,  the single pole introduced by the LC filter and  the zero given by the p z ESR of the output capacitor. F (s) accounts for the sampling effect performed by the PWM comparator on the output of H the error amplifier that introduces a double pole at one half of the switching frequency. 12/37 DocID18279 Rev 5

ST1CC40 Application notes Equation 2 1  = ------------------------------- Z ESRC OUT Equation 3 1 mC1–D–0,5  = --------------------------------------+--------------------------------------------- P R C LC f LOAD OUT OUT SW where: Equation 4  Se mC = 1+S------  n  S = V f  e pp SW  V –V  IN OUT S = ------------------------------R  n L i S represents the slope of the sensed inductor current, S the slope of the external ramp n e (V peak-to-peak amplitude) that implements the slope compensation to avoid sub- PP harmonic oscillations at duty cycle over 50%. The sampling effect contribution F (s) is: H Equation 5 1 F s = ------------------------------------------- H 2 s s 1+-------------------+------  Q 2 n P  n where: Equation 6  = f n SW and Equation 7 1 Q = ---------------------------------------------------------- P m 1–D–0,5 C 6.3 Error amplifier compensation network The ST1CC40 device embeds the error amplifier (see Figure6) and a pre-defined compensation network which is effective in stabilizing the system in most of the application conditions. DocID18279 Rev 5 13/37 37

Application notes ST1CC40 Figure 6. Transconductance embedded error amplifier (cid:40)(cid:18)(cid:36) (cid:14) (cid:38)(cid:50)(cid:48)(cid:51) (cid:41)(cid:37) (cid:16) (cid:53) (cid:38) (cid:38) (cid:51) (cid:38) (cid:38) (cid:57)(cid:14) (cid:71)(cid:57) (cid:53)(cid:19) (cid:38)(cid:19) (cid:53)(cid:38) (cid:38) (cid:51) (cid:42)(cid:80) (cid:71)(cid:57) (cid:38)(cid:38) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:24)(cid:89)(cid:20) R and C introduce a pole and a zero in the open loop gain. C does not significantly affect C C P system stability but it is useful to reduce the noise at the output of the error amplifier. The transfer function of the error amplifier and its compensation network is: Equation 8 A 1+sR C  V0 c c A s = ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 0 2 s R C +C R C +sR C +R C +C +R C +1 0 0 p c c 0 c 0 0 p c c where A = G · R . vo m o The poles of this transfer function are (if C >> C + C ): c 0 P Equation 9 1 f = ---------------------------------- P LF 2R C 0 c Equation 10 1 f = ---------------------------------------------------- P HF 2R C +C  c 0 p whereas the zero is defined as: Equation 11 1 F = --------------------------------- Z 2R C c c 14/37 DocID18279 Rev 5

ST1CC40 Application notes The embedded compensation network is R = 70 K, C = 195 pF while C and C can be C C P O considered as negligible. The error amplifier output resistance is 240 Mso the relevant singularities are: Equation 12 f = 116 kHz f = 34 Hz Z P LF 6.4 LED small signal model Once the system reaches the working condition the LEDs composing the row are biased and their equivalent circuit can be considered as a resistor for frequencies << 1 MHz. The LED manufacturer typically provides the equivalent dynamic resistance of the LED biased at different DC current. This parameter is required to study the behavior of the system in the small signal analysis. For instance, the equivalent dynamic resistance of Luxeon III Star from Lumiled measured with a different biasing current level is reported below: 1,3 ILED= 350mA rLED 0,9 ILED= 700mA In case the LED datasheet doesn’t report the equivalent resistor value, it can be simply derived as the tangent to the diode I-V characteristic in the present working point (see Figure7). Figure 7. Equivalent series resistor (cid:62)(cid:36)(cid:64) (cid:20) (cid:90)(cid:82)(cid:85)(cid:78)(cid:76)(cid:81)(cid:74)(cid:3)(cid:83)(cid:82)(cid:76)(cid:81)(cid:87) (cid:19)(cid:17)(cid:20) (cid:20) (cid:21) (cid:22) (cid:23) (cid:62)(cid:57)(cid:64) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:25)(cid:89)(cid:20) DocID18279 Rev 5 15/37 37

Application notes ST1CC40 Figure8 shows the equivalent circuit of the LED constant current generator. Figure 8. Load equivalent circuit (cid:47)(cid:47) (cid:39)(cid:79)(cid:72)(cid:71)(cid:20) (cid:57)(cid:44)(cid:49) (cid:39) (cid:39)(cid:79)(cid:72)(cid:71)(cid:21) (cid:38)(cid:50)(cid:56)(cid:55) (cid:53)(cid:86) (cid:47)(cid:47) (cid:53)(cid:71)(cid:20) (cid:57)(cid:44)(cid:49) (cid:39)(cid:20) (cid:53)(cid:71)(cid:21) (cid:38)(cid:50)(cid:56)(cid:55) (cid:53)(cid:86) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:26)(cid:89)(cid:20) As a consequence, the LED equivalent circuit gives the  (s) term correlating the output LED voltage with the high impedance FB input: Equation 13 R SENSE  n = ---------------------------------------------------------- LED LED n r +R LED LED SENSE 6.5 Total loop gain In summary, the open loop gain can be expressed as: Equation 14 Gs = G sA s n  CO 0 LED LED Example Design specifications: V = 12 V, V = 3.5 V, n = 2, r = 1.1 , I = 700 mA, I = 2% IN FW_LED LED LED LED LED RIPPLE The inductor and capacitor value are dimensioned in order to meet the I LED RIPPLE specifications (see Section7.1.2 for output capacitor and inductor selection guidelines): L = 10 H, C = 2.2 F MLCC (negligible ESR) OUT 16/37 DocID18279 Rev 5

ST1CC40 Application notes Accordingly, with Section7.1.1 the sensing resistor value is: Equation 15 100 mV R = ---------------------140 m S 700 mA Equation 16 RSENSE 140 m  n = ---------------------------------------------------------- = ------------------------------------------------- = 0,06 LED LED n r +R 21,1+140 m LED LED SENSE The gain and phase margin Bode diagrams are plotted respectively in Figure9 and Figure10. Figure 9. Module plot (cid:40)(cid:59)(cid:55)(cid:40)(cid:53)(cid:49)(cid:36)(cid:47)(cid:3)(cid:47)(cid:50)(cid:50)(cid:51)(cid:3)(cid:48)(cid:50)(cid:39)(cid:56)(cid:47)(cid:40) (cid:20)(cid:19)(cid:19) (cid:27)(cid:26) (cid:26)(cid:23) (cid:25)(cid:20) (cid:37)(cid:64) (cid:71) (cid:23)(cid:27) (cid:72)(cid:3)(cid:62) (cid:88)(cid:79) (cid:22)(cid:24) (cid:71) (cid:82) (cid:48) (cid:21)(cid:21) (cid:28) (cid:23) (cid:20)(cid:26) (cid:22)(cid:19) (cid:17)(cid:15)(cid:18)(cid:1)(cid:1)(cid:1)(cid:1)(cid:1)(cid:1)(cid:1)(cid:1)(cid:1) (cid:18) (cid:18)(cid:17) (cid:18)(cid:18)(cid:17) (cid:15)(cid:18)(cid:17)(cid:22) (cid:18)(cid:15)(cid:18)(cid:23)(cid:17) (cid:18)(cid:15)(cid:18)(cid:17)(cid:24) (cid:18)(cid:15)(cid:18)(cid:17)(cid:25) (cid:18)(cid:15)(cid:18)(cid:17)(cid:26) (cid:42)(cid:11)(cid:86)(cid:12) (cid:41)(cid:85)(cid:72)(cid:84)(cid:88)(cid:72)(cid:81)(cid:70)(cid:92)(cid:3)(cid:62)(cid:43)(cid:93)(cid:64) (cid:19)(cid:3)(cid:71)(cid:37) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:27)(cid:89)(cid:20) DocID18279 Rev 5 17/37 37

Application notes ST1CC40 Figure 10. Phase plot (cid:40)(cid:59)(cid:55)(cid:40)(cid:53)(cid:49)(cid:36)(cid:47)(cid:3)(cid:47)(cid:50)(cid:50)(cid:51)(cid:3)(cid:42)(cid:36)(cid:44)(cid:49)(cid:3)(cid:51)(cid:43)(cid:36)(cid:54)(cid:40) (cid:20)(cid:27)(cid:19) (cid:20)(cid:24)(cid:26)(cid:17)(cid:24) (cid:20)(cid:22)(cid:24) (cid:72)(cid:3) (cid:20)(cid:20)(cid:21)(cid:17)(cid:24) (cid:86) (cid:68) (cid:75) (cid:51) (cid:28)(cid:19) (cid:25)(cid:26)(cid:17)(cid:24) (cid:23)(cid:24) (cid:21)(cid:21)(cid:17)(cid:24) (cid:19) (cid:17)(cid:15)(cid:18) (cid:18) (cid:18)(cid:17) (cid:18)(cid:17)(cid:17) (cid:18)(cid:18)(cid:17)(cid:22) (cid:18)(cid:15)(cid:18)(cid:17)(cid:23) (cid:18)(cid:15)(cid:18)(cid:17)(cid:24) (cid:18)(cid:15)(cid:18)(cid:17)(cid:25) (cid:18)(cid:15)(cid:18)(cid:17)(cid:26) (cid:42)(cid:11)(cid:86)(cid:12) (cid:41)(cid:85)(cid:72)(cid:84)(cid:88)(cid:72)(cid:81)(cid:70)(cid:92)(cid:3)(cid:62)(cid:43)(cid:93)(cid:64) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:19)(cid:28)(cid:89)(cid:20) The cutoff frequency and the phase margin are: Equation 17 f = 100 kHz pm = 47 C 6.6 eDesign studio software The ST1CC40 device is supported by the eDesign software which can be seen online on the STMicroelectronics® home page (www.st.com). 18/37 DocID18279 Rev 5

ST1CC40 Application notes Figure 11. eDesign studio screenshot The software easily supports the component sizing according to the technical information given in this datasheet (see Section6). The final user is requested to fill in the requested information such as the input voltage range, the selected LED parameters and the number of LEDs composing the row. The software calculates external components according to the internal database. It is also possible to define new components and ask the software to have them used. Bode plots, estimated efficiency and thermal performance are provided. Finally, the user can save the design and print all the information including the bill of material of the board. DocID18279 Rev 5 19/37 37

Application information ST1CC40 7 Application information 7.1 Component selection 7.1.1 Sensing resistor In closed loop operation the ST1CC40 feedback pin voltage is 100 mV so the sensing resistor calculation is expressed as: Equation 18 100 mV R = -------------------- S I LED Since the main loop (see Section6.1) regulates the sensing resistor voltage drop, the average current is regulated into the LEDs. The integration period is at minimum 5 * T SW since the system bandwidth can be dimensioned up to F /5 at maximum. SW The system performs the output current regulation over a period which is at least five times longer than the switching frequency. The output current regulation neglects the ripple current contribution and its reliance on external parameters like input voltage and output voltage variations (line transient and LED forward voltage spread). This performance can not be achieved with simpler regulation loops like a hysteretic control. For the same reason the switching frequency is constant over the application conditions, that helps to tune the EMI filtering and to guarantee the maximum LED current ripple specifications in the application range. This performance cannot be achieved using constant on/off-time architecture. 7.1.2 Inductor and output capacitor selection The output capacitor filters the inductor current ripple that, given the application conditions, depends on the inductor value. As a consequence, the LED current ripple, that is the main specification for a switching current source, depends on the inductor and output capacitor selection. Figure 12. Equivalent circuit (cid:39)(cid:38)(cid:53) (cid:47) (cid:39)(cid:38)(cid:53) (cid:47) (cid:39)(cid:79)(cid:72)(cid:71)(cid:20) (cid:53)(cid:71)(cid:20) (cid:40)(cid:54)(cid:53) (cid:40)(cid:54)(cid:53) (cid:21) (cid:21) (cid:57)(cid:44)(cid:49) (cid:39) (cid:39)(cid:79)(cid:72)(cid:71)(cid:81) (cid:57)(cid:44)(cid:49) (cid:39) (cid:53)(cid:71)(cid:81) (cid:20) (cid:20) (cid:38)(cid:50)(cid:56)(cid:55) (cid:38)(cid:50)(cid:56)(cid:55) (cid:53)(cid:86) (cid:53)(cid:86) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:20)(cid:20)(cid:89)(cid:20) 20/37 DocID18279 Rev 5

ST1CC40 Application information The LED ripple current can be calculated as the inductor ripple current ratio flowing into the output impedance using the Laplace transform (see Figure11): Equation 19 8 ------I 1+sESRC  2 L OUT  I s = ----------------------------------------------------------------------------------------------------------- RIPPLE 1+sR +ESR+n R C S LED LED OUT 2 where the term 8/ represents the main harmonic of the inductor current ripple (which has a triangular shape) and I is the inductor current ripple. L Equation 20 V n V +100mV OUT LED FW_LED I = --------------T = ------------------------------------------------------------------T L L OFF L OFF so L value can be calculated as: Equation 21 n V +100mV n V +100mV n V +100mV LED FW_LED LED FW_LED  LED FW_LED  L = ------------------------------------------------------------------T = ------------------------------------------------------------------ 1–------------------------------------------------------------------ I OFF I  V  L L IN where T is the off-time of the embedded high switch, given by 1-D. OFF As a consequence, the lower the inductor value (so the higher the current ripple), the higher the C value would be to meet the specifications. OUT A general rule to dimension L value is: Equation 22 I L ----------- 0,5 I LED Finally the required output capacitor value can be calculated equalizing the LED current ripple specification with the module of the Fourier transformer (see Equation19) calculated at F frequency. SW Equation 23 I s=j = I RIPPLE RIPPLE_SPEC Example (see Section: Example): V = 12 V, I = 700 mA,  /I = 2%, V = 3.5 V, n = 2 IN LED ILED LED FW_LED LED The output capacitor value must be dimensioned according to Equation23. Finally, given the selected inductor value, a 2.2 µF ceramic capacitor value keeps the LED current ripple ratio lower than 2% of the nominal current. An output ceramic capacitor type (negligible ESR) is suggested to minimize the ripple contribution given a fixed capacitor value. DocID18279 Rev 5 21/37 37

Application information ST1CC40 Table 6. Inductor selection Manufacturer Series Inductor value (µH) Saturation current (A) WE-HCI 7040 1 to 4.7 20 to 7 Würth Elektronik WE-HCI 7050 4.9 to 10 20 to 4.0 Coilcraft XPL 7030 2.2 to 10 29 to 7.2 7.1.3 Input capacitor The input capacitor must be able to support the maximum input operating voltage and the maximum RMS input current. Since step-down converters draw current from the input in pulses, the input current is squared and the height of each pulse is equal to the output current. The input capacitor must absorb all this switching current, whose RMS value can be up to the load current divided by two (worst case, with duty cycle of 50%). For this reason, the quality of these capacitors must be very high to minimize the power dissipation generated by the internal ESR, thereby improving system reliability and efficiency. The critical parameter is usually the RMS current rating, which must be higher than the RMS current flowing through the capacitor. The maximum RMS input current (flowing through the input capacitor) is: Equation 24 2 2 2D D I = I  D–---------------+------- RMS O  2  where  is the expected system efficiency, D is the duty cycle and I is the output DC O current. Considering  = 1, this function reaches its maximum value at D = 0.5 and the equivalent RMS current is equal to I divided by 2. The maximum and minimum duty cycles O are: Equation 25 V +V OUT F D = ------------------------------------- MAX V –V INMIN SW and Equation 26 V +V OUT F D = -------------------------------------- MIN V –V INMAX SW 22/37 DocID18279 Rev 5

ST1CC40 Application information where V is the freewheeling diode forward voltage and V the voltage drop across the F SW internal PDMOS. Considering the range D to D , it is possible to determine the max. MIN MAX I going through the input capacitor. Capacitors that can be considered are: RMS Electrolytic capacitors: These are widely used due to their low price and their availability in a wide range of RMS current ratings. The only drawback is that, considering ripple current rating requirements, they are physically larger than other capacitors. Ceramic capacitors: If available for the required value and voltage rating, these capacitors usually have a higher RMS current rating for a given physical dimension (due to very low ESR). The drawback is the considerably high cost. Tantalum capacitors: Small tantalum capacitors with very low ESR are becoming more available. However, they can occasionally burn if subjected to very high current during charge. Therefore, it is recommended to avoid this type of capacitor for the input filter of the device as they may be stressed by a high surge current when connected to the power supply. Table 7. List of ceramic capacitors for the ST1CC40 Manufacturer Series Capacitor value (µF) Rated voltage (V) TAIYO YUDEN UMK325BJ106MM-T 10 50 MURATA GRM42-2 X7R 475K 50 4.7 50 In case the selected capacitor is ceramic (so neglecting the ESR contribution), the input voltage ripple can be calculated as: Equation 27 IO  D D V = ----------------------- 1–---- D+----1–D IN PP C f    IN SW 7.2 Layout considerations The layout of switching DC-DC converters is very important to minimize noise and interference. Power-generating portions of the layout are the main cause of noise and so high switching current loop areas should be kept as small as possible and lead lengths as short as possible. High impedance paths (in particular the feedback connections) are susceptible to interference, so they should be as far as possible from the high current paths. A layout example is provided in Figure13. The input and output loops are minimized to avoid radiation and high frequency resonance problems. The feedback pin to the sensing resistor path must be designed as short as possible to avoid pick-up noise. Another important issue is the ground plane of the board. Since the package has an exposed pad, it is very important to connect it to an extended ground plane in order to reduce the thermal resistance junction-to-ambient. DocID18279 Rev 5 23/37 37

Application information ST1CC40 To increase the design noise immunity, different signal and power ground should be implemented in the layout (see Section7.5: Application circuit). The signal ground serves the small signal components, the device analog ground pin, the exposed pad and a small filtering capacitor connected to the V pin. The power ground serves the device ground INA pin and the input filter. The different grounds are connected underneath the output capacitor. Neglecting the current ripple contribution, the current flowing through this component is constant during the switching activity and so this is the cleanest ground point of the buck application circuit. Figure 13. Layout example 7.3 Thermal considerations The dissipated power of the device is tied to three different sources:  Conduction losses due to the R , which are equal to: DS(on) Equation 28 2 P = R I  D ON RDSON_HS OUT 2 P = R I  1–D OFF RDSON_LS OUT where D is the duty cycle of the application. Note that the duty cycle is theoretically given by the ratio between V (n V + 100 mV) and V , but in practice it is substantially OUT LED LED IN higher than this value to compensate for the losses in the overall application. For this reason, the conduction losses related to the R increase compared to an ideal case. DS(on) 24/37 DocID18279 Rev 5

ST1CC40 Application information  Switching losses due to turning ON and OFF. These are derived using Equation29: Equation 29 T +T  RISE FALL P = V I -----------------------------------------F = V I T F SW IN OUT 2 SW IN OUT SW_EQ SW where T and T represent the switching times of the power element that causes the RISE FALL switching losses when driving an inductive load (see Figure14). T is the equivalent SW switching time. Figure 14. Switching losses AM14826v1 Quiescent current losses. Equation 30 P = V I Q IN Q Example (see Section: Example): V = 12 V, V = 3.5 V, n = 2, I = 700 mA IN FW_LED LED LED The typical output voltage is: Equation 31 V = n V +V = 7,1V OUT LED FW_LED FB R has a typical value of 95 m and R is 69 m at 25 °C. DSON_HS DS(on)_LS For the calculation we can estimate R = 140 m and R = 100 mas DS(on)_HS DS(on)_LS a consequence of T increase during the operation. J T is approximately 12 ns. SW_EQ I has a typical value of 1.5 mA at V = 12 V. Q IN DocID18279 Rev 5 25/37 37

Application information ST1CC40 The overall losses are: Equation 32 2 2 P = R I  D+R I  1–D+V I f T +V I TOT DS(on)_HS OUT DS(on)_LS OUT IN OUT SW SW IN Q Equation 33 2 2 –9 3 –3 P = 0,140,7 0,6+0,10,7 0,4+120,71210 85010 +121,510 205mW TOT The junction temperature of the device is: Equation 34 T = T +Rth P J A J–A TOT where T is the ambient temperature and Rth is the thermal resistance junction-to- A J-A ambient. Thejunction-to-ambient (Rth ) thermal resistance of the device assembled in J-A HSO8 package and mounted on the board is about 40 °C/W. Assuming the ambient temperature is around 40 °C, the estimated junction temperature is: Equation 35 T = 60+0,2054068C J 7.4 Short-circuit protection In overcurrent protection mode, when the peak current reaches the current limit threshold, the device disables the power element and it is able to reduce the conduction time down to the minimum value (approximately 100 nsec typ.) to keep the inductor current limited. This is the pulse-by-pulse current limitation to implement the constant current protection feature. In overcurrent condition, the duty cycle is strongly reduced and, in most applications, this is enough to limit the switch current to the current threshold. The inductor current ripple during ON and OFF phases can be written as:  ON phase Equation 36 V –V –DCR +R I IN OUT L DS(on) HS I = -------------------------------------------------------------------------------------------------T  L TON L ON  OFF phase Equation 37 –V +DCR +R I OUT L DS(on) LS I = -----------------------------------------------------------------------------------------T  L TON L OFF where DCR is the series resistance of the inductor. L 26/37 DocID18279 Rev 5

ST1CC40 Application information The pulse-by-pulse current limitation is effective in implementing constant current protection when: Equation 38 I = I L TON L TOFF From Equation36 and Equation37 we can gather that the implementation of the constant current protection becomes more critical the lower the V is and the higher V is. OUT IN In fact, in short-circuit condition the voltage applied to the inductor during the off-time becomes equal to the voltage drop across parasitic components (typically the DCR of the inductor and the R of the low-side switch) since V is negligible, while during T DS(on) OUT ON the voltage applied at the inductor is maximized and it is approximately equal to V . IN In general, the worst case scenario is heavy short-circuit at the output with maximum input voltage. Equation36 and Equation37 in overcurrent conditions can be simplified to: Equation 39 V –DCR +R I V IN L DS(on) HS IN I = -------------------------------------------------------------------------T ---------90ns L TON L ON MIN L DCR R I V considering T that has already been reduced to its minimum. ON Equation 40 –DCR +R I –DCR +R I L DS(on) LS L DS(on) LS I = ---------------------------------------------------------------T –90ns---------------------------------------------------------------1,18s L TOFF L SW L where T = 1 /F and considering the nominal F . SW SW SW At higher input voltage, I may be higher than I and so the inductor current L TON L TOFF may escalate. As a consequence, the system typically meets Equation38 at a current level higher than the nominal value thanks to the increased voltage drop across stray components. In most of the application conditions the pulse-by-pulse current limitation is effective to limit the inductor current. Whenever the current escalates, a second level current protection called “Hiccup mode” is enabled. Hiccup protection offers an additional protection against heavy short-circuit condition at very high input voltage even considering the spread of the minimum conduction time of the power element. If the hiccup current level (6.2 A typ.) is triggered, the switching activity is prevented for 12 cycles. Figure15 shows the operation of the constant current protection when a short-circuit is applied at the output at the maximum input voltage. DocID18279 Rev 5 27/37 37

Application information ST1CC40 Figure 15. Constant current protection triggering hiccup mode AM12814v1 7.5 Application circuit Figure 16. Demonstration board application circuit (cid:54)(cid:55)(cid:20)(cid:38)(cid:38)(cid:23)(cid:19) (cid:47)(cid:47) (cid:57)(cid:44)(cid:49) (cid:25) (cid:57)(cid:44)(cid:49)(cid:66)(cid:54)(cid:58) (cid:54)(cid:58) (cid:26) (cid:57)(cid:47)(cid:40)(cid:39)(cid:14) (cid:21)(cid:17)(cid:21)(cid:88)(cid:43) (cid:20) (cid:57)(cid:44)(cid:49)(cid:66)(cid:36) (cid:39)(cid:44)(cid:48) (cid:21) (cid:39)(cid:44)(cid:48) (cid:41)(cid:37) (cid:22) (cid:57)(cid:47)(cid:40)(cid:39)(cid:16) (cid:21) (cid:22) (cid:20) (cid:51)(cid:42)(cid:49)(cid:39) (cid:40)(cid:51) (cid:36)(cid:42)(cid:49)(cid:39) (cid:53)(cid:54) (cid:38)(cid:22) (cid:53)(cid:20) (cid:23)(cid:46)(cid:26) (cid:27) (cid:28) (cid:23) (cid:19)(cid:17)(cid:20)(cid:24) (cid:21)(cid:17)(cid:21)(cid:88)(cid:15)(cid:3)(cid:21)(cid:24)(cid:57) (cid:38)(cid:21) (cid:38)(cid:20) (cid:20)(cid:19)(cid:88)(cid:15)(cid:3)(cid:21)(cid:24)(cid:57) (cid:53)(cid:21)(cid:45)(cid:51)(cid:20) (cid:20)(cid:19)(cid:19)(cid:81)(cid:41)(cid:15)(cid:3)(cid:24)(cid:19)(cid:57) (cid:49)(cid:48) (cid:86)(cid:76)(cid:74)(cid:81)(cid:68)(cid:79)(cid:3)(cid:42)(cid:49)(cid:39) (cid:83)(cid:82)(cid:90)(cid:72)(cid:85)(cid:3)(cid:42)(cid:49)(cid:39) (cid:42)(cid:49)(cid:39) (cid:36)(cid:48)(cid:20)(cid:21)(cid:27)(cid:20)(cid:24)(cid:89)(cid:20) 28/37 DocID18279 Rev 5

ST1CC40 Application information Table 8. Component list Reference Part number Description Manufacturer 100 nF 50 V C1 (size 0805) 10 µF 25 V C2 GRM31CR61E106KA12L Murata (size 1206) 2.2 µF 25 V C3 GRM21BR71E225KA73L Murata (size 0805) 4.7 K5% R1 (size 0603) R2 Not mounted 0.151% Rs ERJ14BSFR15U Panasonic (size 1206) 22 µH L1 XAL6060-223ME I = 5.6 A (30% drop) I = 6.9 A (40 C rise) Coilcraft SAT RMS (size 6.36 x 6.56 x 6.1 mm) Figure 17. PCB layout (component side) VFQFPN8 package DocID18279 Rev 5 29/37 37

Application information ST1CC40 Figure 18. PCB layout (bottom side) VFQFPN8 package Figure 19. PCB layout (component side) SO8 package It is strongly recommended that the input capacitors are to be put as close as possible to the relative pins, see C1 and C2. 30/37 DocID18279 Rev 5

ST1CC40 Application information Figure 20. PCB layout (bottom side) SO8 package DocID18279 Rev 5 31/37 37

Typical characteristics ST1CC40 8 Typical characteristics Figure 21. Soft-start Figure 22. Inhibit operation AM12818v1 AM12819v1 Figure 23. Thermal shutdown protection Figure 24. Hiccup current protection AM12820v1 AM12821v1 Figure 25. OCP blanking time Figure 26. Current regulation Vin 12V Vled 7V 130 ns typ. AM12822v1 AM12823v1 32/37 DocID18279 Rev 5

ST1CC40 Package information 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 27. VFQFPN8 (4 x 4 x 1.08 mm) package outline Table 9. VFQFPN8 (4 x 4 x 1.08 mm) package mechanical data Dimensions (mm) Symbol Min. Typ. Max. A 0.80 0.90 1.00 A1 0.02 0.05 A3 0.20 b 0.23 0.30 0.38 D 3.90 4.00 4.10 D2 2.82 3.00 3.23 E 3.90 4.00 4.10 E2 2.05 2.20 2.30 e 0.80 L 0.40 0.50 0.60 DocID18279 Rev 5 33/37 37

Package information ST1CC40 Figure 28. SO8-BW package outline Table 10. SO8-BW package mechanical data Dimensions (mm) Symbol Min. Typ. Max. A 135 1.75 A1 0.10 0.25 A2 1.10 1.65 B 0.33 0.51 C 0.19 0.25 D(1) 4.80 5.00 E 3.80 4.00 e 1.27 H 5.80 6.20 h 0.25 0.50 L 0.40 1.27 k 0° (min.), 8° (max.) ddd 0.10 1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shouldn’t exceed 0.15 mm (.006 inch) in total (both sides). 34/37 DocID18279 Rev 5

ST1CC40 Ordering information 10 Ordering information Table 11. Ordering information Order code Package Packaging ST1CC40PUR VFQFPN8 4 x 4 8L Tape and reel ST1CC40DR SO8-BW Tape and reel DocID18279 Rev 5 35/37 37

Revision history ST1CC40 11 Revision history Table 12. Document revision history Date Revision Changes 04-Mar-2011 1 Initial release. 21-Jun-2011 2 Updated coverpage Pin 2 operation has been updated: Figure1 and Table1 have been updated accordingly. 18-Oct-2012 3 Figure19 and Figure20 have been added. Minor text changes to improve the readability. Status promoted from preliminary to production data. Updated Table9: VFQFPN8 (4 x 4 x 1.08 mm) package mechanical 04-Mar-2013 4 data and Section7.1.2: Inductor and output capacitor selection. Minor text changes to improve the readability. Unified package names in the whole document. Updated Table2 (changed “operating junction temperature range” from -40 to 125 °C to -40 to 150 °C). Updated Table4 (updated data of I symbol). 18-Jun-2013 5 QST-BY Updated Section7.2 (replaced VCC by V ). INA Updated Section9 (reversed order of Figure27 and Table9, Figure28 and Table10, minor modifications). Minor corrections throughout document. 36/37 DocID18279 Rev 5

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