19-3511; Rev 3; 11/07 EVAALVUAAILTAIOBNL EKIT 32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers General Description Features M The MAX5432–MAX5435 nonvolatile, linear-taper, digi- ♦ Tiny 3mm x 3mm 8-Pin TDFN and 6-Pin Thin A tal potentiometers perform the function of a mechanical SOT23 Packages X potentiometer, but replace the mechanics with a simple 2-wire serial interface. Each device performs the same ♦ Power-On Recall of Wiper Position from 5 function as a discrete potentiometer or a variable resis- Nonvolatile Memory 4 tor and has 32 tap points. ♦ 35ppm/°C End-to-End Resistance Temperature 3 The MAX5432–MAX5435 feature an internal, nonvolatile, Coefficient 2 electrically erasable programmable read-only memory ♦ 5ppm/°C Ratiometric Temperature Coefficient – (EEPROM) that returns the wiper to its previously stored M position at power-up. The fast-mode I2C-compatible ♦ 50kΩ/100kΩResistor Values serial interface allows communication at data rates up to A ♦ Fast 400kbps I2C-Compatible Serial Interface 400kbps, minimizing board space and reducing inter- X connection complexity. Each device is available with ♦ 500nA (typ) Static Supply Current multiple factory-preset I2C addresses (see the Ordering 5 Information/Selector Guide). ♦ +2.7V to +5.25V Single-Supply Operation 4 Use the MAX5432–MAX5435 in applications requiring ♦ 32 Tap Positions 3 digitally controlled resistors. Two resistance values are ♦ ±0.15 LSB INL (typ), ±0.15 LSB DNL (typ) 5 available (50kΩand 100kΩ) in a voltage-divider or vari- able resistor configuration. The nominal resistor temper- ature coefficient is 35ppm/°C end-to-end, and only Pin Configurations 5ppm/°C ratiometric, making the devices ideal for applications requiring a low-temperature-coefficient variable resistor such as low-drift, programmable-gain TOP VIEW amplifier circuit configurations. The MAX5432/MAX5433 are available in a 3mm x 3mm + + 8-pin TDFN package and the MAX5434/MAX5435 are H 1 8 W VDD 1 6 L available in a 6-pin thin SOT23 package. The MAX5432– SDA 2 7 L GND 2 5 W MAX5435 are specified over the extended (-40°C to +85°C) temperature range. GND 3 6 A0 MAX5432 SCL 3 MAX5434 4 SDA Applications SCL 4 MAX5433 5 VDD MAX5435 Mechanical Potentiometer Replacement SOT23 TDFN Low-Drift Programmable-Gain Amplifiers Volume Control Liquid-Crystal Display (LCD) Screen Adjustment Ordering Information/Selector Guide PART PIN-PACKAGE TOP MARK I2C ADDRESS R (kΩΩΩΩ) PKG CODE MAX5432LETA+ 8 TDFN-EP* ANG 010100A0** 50 T833-1 MAX5432META+ 8 TDFN-EP* ANI 010110A0** 50 T833-1 MAX5433LETA+ 8 TDFN-EP* ANF 010100A0** 100 T833-1 MAX5433META+ 8 TDFN-EP* ANH 010110A0** 100 T833-1 MAX5434LEZT+T 6 Thin SOT23-6 AABX 0101000 50 Z6-1 *EP = Exposed pad. **A0represents the logic state of input A0 of the device in the TDFN package. +Denotes a lead-free package. T = Tape and reel. Note:All devices are specified over the -40°C to +85°C operating temperature range. Ordering Information/Selector Guide continued at end of data sheet. ________________________________________________________________Maxim Integrated Products 1 For pricing, delivery, and ordering information,please contact Maxim Directat 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 ABSOLUTE MAXIMUM RATINGS 3 VDDto GND...........................................................-0.3V to +6.0V Continuous Power Dissipation (TA= +70°C) 4 SDA, SCL to GND..................................................-0.3V to +6.0V 6-Pin Thin SOT23 (derate 9.1mW/°C above +70°C)....727mW 5 A0, H, L, and W to GND.............................-0.3V to (VDD+ 0.3V) 8-Pin TDFN (derate 18.2mW/°C above +70°C)......1454.5mW Maximum Continuous Current into H, L, and W Operating Temperature Range...........................-40°C to +85°C X MAX5432/MAX5434.....................................................±1.3mA Junction Temperature......................................................+150°C MAX5433/MAX5435.....................................................±0.6mA Storage Temperature Range.............................-60°C to +150°C A Input/Output Latchup Immunity........................................±50mA Lead Temperature (soldering, 10s).................................+300°C M Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional – operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to 2 absolute maximum rating conditions for extended periods may affect device reliability. 3 4 ELECTRICAL CHARACTERISTICS 5 (VDD= +2.7V to +5.25V, VH= VDD, VL= GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +5V, TA= X +25°C.) (Note 1) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS M DC PERFORMANCE Resolution 32 Taps MAX5432/MAX5434 37.5 50 62.5 End-to-End Resistance RH-L kΩ MAX5433/MAX5435 75 100 125 End-to-End Resistance TCR 35 ppm/°C Temperature Coefficient Ratiometric Resistance 5 ppm/°C Temperature Coefficient VDD = 5V ±0.15 ±0.5 Variable resistor (Note 2) VDD = 3V ±0.15 ±0.5 Integral Nonlinearity INL LSB Voltage-divider, VDD = 5V ±0.15 ±0.5 MAX5432/MAX5433 (Note 3) VDD = 3V ±0.15 ±0.5 VDD = 5V ±0.15 ±0.5 Variable resistor (Note 2) VDD = 3V ±0.15 ±0.5 Differential Nonlinearity DNL LSB Voltage-divider, VDD = 5V ±0.15 ±0.5 MAX5432/MAX5433 (Note 3) VDD = 3V ±0.15 ±0.5 MAX5432, 50kΩ -0.5 Full-Scale Error (Note 4) LSB MAX5433, 100kΩ -0.5 MAX5432, 50kΩ +0.5 Zero-Scale Error (Note 5) LSB MAX5433, 100kΩ +0.5 Wiper Resistance RW MAX5432/MAX5433 (Note 6) 610 1200 Ω DIGITAL INPUTS 0.7 x Input High Voltage VIH (Note 7) V VDD 0.3 x Input Low Voltage VIL (Note 7) V VDD Input Leakage Current ILEAK ±1 µA Input Capacitance 5 pF 2 _______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers ELECTRICAL CHARACTERISTICS (continued) M (VDD= +2.7V to +5.25V, VH= VDD, VL= GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +5V, TA= A +25°C.) (Note 1) X PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5 DYNAMIC CHARACTERISTICS 4 MAX5432/MAX5434 500 -3dB Bandwidth (Note 8) kHz 3 MAX5433/MAX5435 250 2 MAX5432/MAX5434 0.5 Wiper Settling Time (Note 9) µs – MAX5433/MAX5435 1.0 M NONVOLATILE MEMORY RELIABILITY A Data Retention TA = +85°C 50 Years X TA = +25°C 200,000 Endurance Stores 5 TA = +85°C 50,000 4 POWER SUPPLY 3 Power-Supply Voltage VDD 2.70 5.25 V 5 Standby Current IDD Digital inputs = VDD or GND, TA = +25°C 0.5 2 µA During nonvolatile write; digital inputs = Programming Current 200 900 µA VDD or GND (Note 10) TIMING CHARACTERISTICS (VDD= +2.7V to +5.25V, VH= VDD, VL= GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +5V, TA= +25°C.) (Figures 1 and 2) (Note 11) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL 400 kHz Setup Time for START Condition tSU-STA 0.6 µs Hold Time for START Condition tHD-STA 0.6 µs CLK High Time tHIGH 0.6 µs CLK Low Time tLOW 1.3 µs Data Setup Time tSU-DAT 100 ns Data Hold Time tHD-DAT 0 0.9 µs SDA, SCL Rise Time tR 300 ns SDA, SCL Fall Time tF 300 ns Setup Time for STOP Condition tSU-STO 0.6 µs Bus Free Time Between STOP tBUF 1.3 µs and START Condition Pulse Width of Spike Suppressed tSP 50 ns Capacitive Load for Each Bus CB (Note 12) 400 pF Line Idle time required after a nonvolatile Nonvolatile Store Time 12 ms memory write (Note 13) Note 1: All devices are production tested at TA= +25°C and are guaranteed by design and characterization for -40°C < TA< +85°C. _______________________________________________________________________________________ 3

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 TIMING CHARACTERISTICS (continued) 3 (VDD= +2.7V to +5.25V, VH= VDD, VL= GND, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VDD= +5V, TA= 4 +25°C.) (Figures 1 and 2) (Note 1) 5 Note 2: The DNL and INL are measured with the potentiometer configured as a variable resistor. For the 3-terminal potentiometers X (MAX5432/MAX5433), H is unconnected and L = GND. At VDD= 5V, W is driven with a source current of 80µA for the 50kΩ configuration, and 40µA for the 100kΩconfiguration. At VDD= 3V, W is driven with a source current of 40µA for the 50kΩ A configuration, and 20µA for the 100kΩconfiguration. M Note 3: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDDand L = GND (MAX5432/MAX5433 only). The wiper terminal is unloaded and measured with an ideal voltmeter. – 2 VW-VH. 3 Note 4: Full-scale error is defined as ⎛⎜VH⎞⎟ ⎝31⎠ 4 5 V -V W L. X Note 5: Zero-scale error is defined as ⎛V ⎞ ⎜ H⎟ A ⎝31⎠ M Note 6: The wiper resistance is the worst value measured by injecting the currents given in Note 2 into W with L = GND. RW= (VW - VH) / IW. Note 7: The device draws current in excess of the specified supply current when the digital inputs are driven with voltages between (VDD- 0.5V) and (GND + 0.5V). See the Supply Current vs. Digital Input Voltage graph in the Typical Operating Characteristics. Note 8: Wiper is at midscale with a 10pF capacitive load. Potentiometer set to midscale, L = GND, an AC source is applied to H, and the output is measured as 3dB lower than the DC W/H value in dB. Note 9: This is measured from the STOP pulse to the time it takes the output to reach 50% of the output step size (divider mode). It is measured with a maximum external capacitive load of 10pF. Note 10:The programming current exists only during NV writes (12ms typ). Note 11:Digital timing is guaranteed by design and characterization, and is not production tested. Note 12:An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the I2C-bus specifica- tion document linked to this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf Note 13:The idle time begins from the initiation of the stop pulse. Typical Operating Characteristics (VDD= +5V, TA = +25°C, unless otherwise noted.) STANDBY SUPPLY CURRENT SUPPLY CURRENT SUPPLY CURRENT vs. TEMPERATURE vs. SUPPLY VOLTAGE vs. DIGITAL INPUT VOLTAGE µSUPPLY CURRENT (A) 0011....9625 DIGIVTDADL =IN 3PVUTS = GND OR VVDDDD = 5V MAX5432–35 toc01 µSUPPLY CURRENT (A) 0001....6480 DIGITAL INPUTS = GND OR VDD MAX5432–35 toc02 µSUPPLY CURRENT (A)101010000 VVDDDD = = 3 5VV MAX5432–35 toc03 0.3 0.2 1 0 0 0.1 -40 -15 10 35 60 85 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 1 2 3 4 5 TEMPERATURE (°C) SUPPLY VOLTAGE (V) DIGITAL INPUT VOLTAGE (V) 4 _______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers Typical Operating Characteristics (continued) M (VDD= +5V, TA = +25°C, unless otherwise noted.) A X END-TO-END RESISTANCE % CHANGE END-TO-END RESISTANCE % CHANGE TAP-TO-TAP SWITCHING TRANSIENT vs. TEMPERATURE vs. TEMPERATURE (0 TO MIDSCALE, CL = 10pF) 5 HANGE ( %) 10..05 50kΩ MAX5432–35 toc04 % CHANGE 10..05 100kΩ MAX5432-35 toc05 MAX5432–35 toc06 S2VD/Adiv 432– END-TO-END RESISTANCE C -0.05 END-TO-END RESISTANCE -0.05 V1VW/div MAX54 50kΩ -1.0 -1.0 3 -40 -15 10 35 60 85 -40 -15 10 35 60 85 1µs/div 5 TEMPERATURE (°C) TEMPERATURE (°C) TAP-TO-TAP SWITCHING TRANSIENT MIDSCALE WIPER TRANSIENT (0 TO MIDSCALE, CL = 10pF) WIPER TRANSIENT AT POWER-ON AT POWER-ON MAX5432–35 toc07 MAX5432–35 toc08 MAX5432–35 toc09 SDA VDD 2V/div 2V/div VDD 2V/div VW VW VW 1V/div 1V/div 1V/div 100kΩ 50kΩ 100kΩ 1µs/div 10µs/div 10µs/div MIDSCALE WIPER RESPONSE vs. FREQUENCY MIDSCALE WIPER RESPONSE WIPER RESISTANCE vs. TAP POSITION (MAX5432) vs. FREQUENCY (MAX5433) (MAX5432) -30 CW = 10pF MAX5432 toc10 -30 CW = 10pF MAX5432–35 toc11 670000 VDD = 3V MAX5432–35 toc12 500 -6 -6 Ω) GAIN (dB) -9 CW = 33pF GAIN (dB) -9 CW = 33pF ESISTANCE (340000 -12 -12 R 200 -15 -15 100 -18 -18 0 0.1 1 10 100 1000 0.1 1 10 100 1000 0 4 8 12 16 20 24 28 31 FREQUENCY (kHz) FREQUENCY (kHz) TAP POSITION _______________________________________________________________________________________ 5

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 Typical Operating Characteristics (continued) 3 (VDD= +5V, TA = +25°C, unless otherwise noted.) 4 WIPER RESISTANCE vs. TAP POSITION WIPER RESISTANCE vs. TAP POSITION WIPER RESISTANCE vs. TAP POSITION 5 (MAX5433) (MAX5432) (MAX5433) MAX 670000 VDD = 3V MAX5432-35 toc13 670000 VDD = 5V MAX5432–35 toc14 670000 VDD = 5V MAX5432-35 toc15 500 500 500 432– ΩRESISTANCE ()340000 ΩRESISTANCE ()340000 ΩRESISTANCE ()340000 200 200 200 5 X 100 100 100 A 0 0 0 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 M TAP POSITION TAP POSITION TAP POSITION W-TO-L RESISTANCE vs. TAP POSITION RESISTANCE DNL vs. TAP POSITION RESISTANCE INL vs. TAP POSITION ΩW-TO-L RESISTANCE (k)11149328571060000000000 100kΩ MAX5432–35 toc16 RESISTANCE DNL (LSB) --0000000.......12012435 VMAARXI5A4B3L2E/-MREASXI5S4T3O4R MODE MAX5432–35 toc17 RESISTANCE INL (LSB) --0000000.......12102435 VMAARXIA54B3L2E/-MREASXI5S4T3O4R MODE MAX5432–35 toc18 50kΩ -0.3 -0.3 20 10 -0.4 -0.4 0 -0.5 -0.5 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 TAP POSITION TAP POSITION TAP POSITION 6 _______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers Typical Operating Characteristics (continued) M (VDD= +5V, TA = +25°C, unless otherwise noted.) A X RESISTANCE DNL vs. TAP POSITION RESISTANCE INL vs. TAP POSITION RESISTANCE DNL vs. TAP POSITION 5 0.5 0.5 0.5 RESISTANCE DNL (LSB) --000000......1201243 VMOALXT5A4G3E2-DIVIDER MODE MAX5432–35 toc19 RESISTANCE INL (LSB) --000000......1210243 VMOALXT5A4G3E2-DIVIDER MODE MAX5432–35 toc20 RESISTANCE DNL (LSB) --000000......1210243 VMAARXI5A4B3L3E/-MREASXI5S4T3O5R MODE MAX5432-35 toc21 432–MAX -0.3 -0.3 -0.3 5 -0.4 -0.4 -0.4 4 -0.5 -0.5 -0.5 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 3 TAP POSITION TAP POSITION TAP POSITION 5 RESISTANCE INL vs. TAP POSITION RESISTANCE DNL vs. TAP POSITION RESISTANCE INL vs. TAP POSITION 0.5 0.5 0.5 RESISTANCE INL (LSB) --000000......1201243 VMAARXIA54B3L3E/-MREASXI5S4T3O5R MODE MAX5432-35 toc22 RESISTANCE DNL (LSB) --000000......1210243 VMOALXT5A4G3E3-DIVIDER MODE MAX5432-35 toc23 RESISTANCE INL (LSB) --000000......1210243 VMOALXT5A4G3E3-DIVIDER MODE MAX5432-35 toc24 -0.3 -0.3 -0.3 -0.4 -0.4 -0.4 -0.5 -0.5 -0.5 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 0 4 8 12 16 20 24 28 31 TAP POSITION TAP POSITION TAP POSITION _______________________________________________________________________________________ 7

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 Pin Description 3 PIN 4 NAME FUNCTION 5 TDFN THIN SOT23 X 1 — H High Terminal A 2 4 SDA I2C-Compatible Interface Data Input M 3 2 GND Ground 4 3 SCL I2C-Compatible Interface Clock Input – 2 5 1 VDD Power-Supply Input. Bypass with a 0.1µF capacitor from VDD to GND. 3 6 — A0 Address Input. Sets the I2C address. Connect to VDD or GND. Do not leave A0 floating. 4 7 6 L Low Terminal 5 8 5 W Wiper Terminal X EP — EP Exposed Pad. Internally connected to GND. A M Detailed Description power-on reset circuitry and internal oscillator control the transfer of data from the nonvolatile register to the The MAX5432–MAX5435 contain a resistor array with volatile register. 31 resistive elements. The MAX5432/MAX5434 provide a total end-to-end resistance of 50kΩ, and the Serial Addressing MAX5433/MAX5435 provide an end-to-end resistance The MAX5432–MAX5435 operate as a slave that sends of 100kΩ. and receives data through an I2C- and SMBus™-com- The MAX5432/MAX5433 allow access to the high, low, patible 2-wire interface. The interface uses a serial data and wiper terminals for a standard voltage-divider con- access (SDA) line and a serial clock line (SCL) to figuration. Connect H, L, and W in any desired configu- achieve bidirectional communication between ration as long as their voltages fall between GND and master(s) and slave(s). A master, typically a microcon- VDD. The MAX5434/MAX5435 are variable resistors troller, initiates all data transfers to and from the with H internally connected to the wiper. MAX5432–MAX5435, and generates the SCL clock that synchronizes the data transfer (Figure 1). A simple 2-wire I2C-compatible serial interface moves the wiper among the 32 tap points. Eight data bits, an SDA operates as both an input and an open-drain out- address byte, and a control byte program the wiper put. SDA requires a pullup resistor, typically 4.7kΩ. position. A nonvolatile memory stores and recalls the SCL only operates as an input. SCL requires a pullup wiper position in the nonvolatile memory upon power-up. resistor (4.7kΩ typ) if there are multiple masters on the The nonvolatile memory is guaranteed for 200,000 wiper 2-wire interface, or if the master in a single-master sys- store cycles and 50 years for wiper data retention. tem has an open-drain SCL output. Each transmission consists of a START (S) condition Digital Interface (Figure 3) sent by a master, followed by the The MAX5432–MAX5435 feature an internal, nonvolatile MAX5432–MAX5435 7-bit slave address plus the 8th bit EEPROM that returns the wiper to its previously stored (Figure 4), 1 command byte (Figure 7) and 1 data byte, position at power-up. The shift register decodes the and finally a STOP (P) condition (Figure 3). control and address bits, routing the data to the proper memory registers. Write data to the volatile memory Start and Stop Conditions register to immediately update the wiper position, or Both SCL and SDA remain high when the interface is write data to the nonvolatile register for storage. Writing not busy. A master signals the beginning of a transmis- to the nonvolatile register takes a minimum of 12ms. sion with a START (S) condition by transitioning SDA The volatile register retains data as long as the device from high to low while SCL is high. When the master is enabled and powered. Removing power clears the has finished communicating with the slave, it issues a volatile register. The nonvolatile register retains data STOP (P) condition by transitioning the SDA from low to even after power is removed. Upon power-up, the SMBus is a trademark of Intel Corporation. 8 _______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers M tR tF A SDA X tSU-DAT tHD-DAT tHD-STA tBUF 5 tLOW tSU-STA tSU-STO 4 3 SCL 2 tHD-STA tHIGH – tR tF M S Sr A P S A PARAMETERS ARE MEASURED FROM 30% TO 70%. X Figure 1. I2C Serial-Interface Timing Diagram 5 4 high while SCL is high. The bus is then free for another Table 1a. Address Codes 3 transmission (Figure 3). (MAX5432/MAX5433 Only) 5 Bit Transfer ADDRESS BYTE One data bit is transferred during each clock pulse. PART The data on the SDA line must remain stable while SCL SUFFIX A6 A5 A4 A3 A2 A1 A0 NOP/W is high (Figure 5). L 0 1 0 1 0 0 0 NOP/W Acknowledge The acknowledge bit is a clocked 9th bit that the recip- L 0 1 0 1 0 0 1 NOP/W ient uses to handshake receipt of each byte of data M 0 1 0 1 1 0 0 NOP/W (Figure 6). Each byte transferred effectively requires 9 M 0 1 0 1 1 0 1 NOP/W bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge Table 1b. Address Codes clock pulse, so the SDA line is stable low during the high period of the clock pulse. When the master trans- (MAX5434/MAX5435 Only) mits to the MAX5432–MAX5435, the devices generate the acknowledge bit because the MAX5432–MAX5435 ADDRESS BYTE PART are the recipients. SUFFIX A6 A5 A4 A3 A2 A1 A0 NOP/W Slave Address The MAX5432–MAX5435 have a 7-bit-long slave L 0 1 0 1 0 0 0 NOP/W address (Figure 4). The 8th bit following the 7-bit slave M 0 1 0 1 1 0 0 NOP/W address is the NOP/W bit. Set the NOP/W bit low for a N* 0 1 0 1 0 1 0 NOP/W write command and high for a no-operation command. *MAX5434 only. Table 1a shows four possible slave addresses for the MAX5432/MAX5433 and Table 1b shows three possible slave addresses for the MAX5434/MAX5435. The first 4 Message Format for Writing bits (MSBs) of the slave addresses are always 0101. A write to the MAX5432–MAX5435 consists of the trans- Bits A2 and A1 are factory programmed for the mission of the device’s slave address with the 8th bit set MAX5432/MAX5433 (Table 1a). Connect the A0 input to zero, followed by at least 1 byte of information. The (MAX5432/MAX5433 only) to either GND or VDD to 1st byte of information is the command byte. The bytes select one of two I2C device addresses. Each device received after the command byte are the data bytes. must have a unique address to share the bus. A maxi- The 1st data byte goes into the internal register of the mum of four MAX5432/MAX5433 devices can share the MAX5432–MAX5435 as selected by the command byte same bus. Bits A2, A1, and A0 are factory programmed (Figure 8). for the MAX5434/MAX5435 (Table 1b). _______________________________________________________________________________________ 9

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 VDD 3 4 IOL = 3mA 5 SDA X A SDA VOUT SCL M 400pF S P START STOP – CONDITION CONDITION 2 IOH = 0mA 3 4 5 Figure 2. Load Circuit Figure 3. Start and Stop Conditions X A M SDA 0 1 0 1 0* 0* A0 NOP/W ACK MSB LSB SCL *SEE THE Ordering Information/Selector Guide FOR OTHER ADDRESS OPTIONS. Figure 4. Slave Address Command Byte Command Descriptions Use the command byte to select the destination of the VREG: The data byte writes to the volatile memory reg- wiper data (nonvolatile or volatile memory registers) ister and the wiper position updates with the data in the and swap data between nonvolatile and volatile memo- volatile memory register. ry registers (see Table 2). NVREG: The data byte writes to the nonvolatile memory register. The wiper position is unchanged. Data Byte The MAX5432–MAX5435 use the first 5 bits (MSBs, NVREGxVREG: Data transfers from the nonvolatile D7–D3) of the data byte to set the position of the wiper. memory register to the volatile memory register (wiper The last 3 bits (D2, D1, and D0) are don’t care bits (see position updates). Table 2). VREGxNVREG: Data transfers from the volatile memory register into the nonvolatile memory register. Table 2. Command Byte Summary REGISTER ADDRESS BYTE COMMAND BTYE DATA BYTE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 SNCUL MCBYCERLE START A6 A5 A4 A3 A2 A1 A0 PON/ CA C7 C6 C5 C4 C3 C2 C1 C0 CA D7 D6 D5 D4 D3 D2 D1 D0 CA STOP K K K W VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 0 1 D7 D6 D5 D4 D3 X X X NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 0 1 D7 D6 D5 D4 D3 X X X NVREGxVREG 0 1 0 1 A2 A1 A0 0 0 1 1 0 0 0 0 1 D7 D6 D5 D4 D3 X X X VREGxNVREG 0 1 0 1 A2 A1 A0 0 0 1 0 1 0 0 0 1 D7 D6 D5 D4 D3 X X X X= Don’t care. 10 ______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers M A CLOCK PULSE FOR ACKNOWLEDGMENT X START SDA CONDITION 5 SCL 1 2 8 9 4 3 NOT ACKNOWLEDGE SCL 2 SDA DATA STABLE, CHANGE OF – DATA VALID DATA ALLOWED M ACKNOWLEDGE A X Figure 5. Bit Transfer Figure 6. Acknowledge 5 4 3 CORMECMEAIPNTD O BFY STTEO ISP SCTOONRDEIDT IOONN ACKNOWLEDGE FROM D15 D14 D13 D12 D11 D10 D9 D8 5 MAX5432–MAX5435 SLAVE S ADDRESS 0 A COMMAND BYTE A P ACKNOWLEDGE FROM NOP/W MAX5432–MAX5435 Figure 7. Command Byte Received ACKNOWLEDGE FROM ACKNOWLEDGE FROM MAX5432–MAX5435 MAX5432–MAX5435 HOW COMMAND BYTE AND DATA BYTE MAP INTO MAX5432–MAX5435's REGISTERS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 X X X ACKNOWLEDGE FROM MAX5432–MAX5435 S SLAVE ADDRESS 0 A COMMAND BYTE A DATA BYTE A P 1 NOP/W BYTE Figure 8. Command and Single Data Byte Received Nonvolatile Memory with the data stored in the nonvolatile memory register. The internal EEPROM consists of a 5-bit nonvolatile This initialization period takes 20µs. register that retains the value written to it before the Standby device is powered down. The nonvolatile register is The MAX5432–MAX5435 feature a low-power standby programmed with the zeros at the factory. Wait a mini- mode. When the device is not being programmed, it mum of 12ms after writing to NVREG before sending goes into standby mode and current consumption is another command. typically 0.5µA. Power-Up Upon power-up, the MAX5432–MAX5435 load the data stored in the nonvolatile memory register into the volatile memory register, updating the wiper position ______________________________________________________________________________________ 11

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 5V 3 5V 4 H 30V 30V 5 MAX5432 W X MAX5433 VOUT H VOUT A L MAX5432– M MAX5435 W – L 2 3 4 5 X Figure 9. Positive LCD Bias Control Using a Voltage-Divider Figure 10. Positive LCD Bias Control Using a Variable Resistor A W +5V M L VIN VIN H R3 C VOUT OUT V0REF H MAX6160 R1 R1 ADJ W MAX5432 MAX5433 GND R2 L H MAX5432– R2 MAX5435 W 50kΩ V0 = 1.23V R2(kΩ ) FOR THE MAX5432 L 100kΩ V0 = 1.23VR2(kΩ) FOR THE MAX5433 Figure 11. Programmable Filter Figure 12. Adjustable Voltage Reference Applications Information R2, and the cutoff frequency is adjusted by R3. Use the following equations to calculate the gain (G) and the Use the MAX5432–MAX5435 in applications requiring 3dB cutoff frequency (fC). digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the dis- G = 1 + R1 play contrast), or for programmable filters with R2 adjustable gain and/or cutoff frequency. 1 f = Positive LCD Bias Control C 2π × R3 × C Figures 9 and 10 show an application where the volt- age-divider or variable resistor is used to make an Adjustable Voltage Reference adjustable, positive LCD bias voltage. The op-amp pro- Figure 12 shows the MAX5432/MAX5433 used as the vides buffering and gain to the resistor-divider network feedback resistors in an adjustable voltage reference made by the potentiometer (Figure 9) or to a fixed application. Independently adjust the output voltages of resistor and a variable resistor (Figure 10). the MAX6160 from 1.23V to (VIN - 0.2V) by changing the wiper position of the MAX5432/MAX5433. Programmable Filter Figure 11 shows the configuration for a 1st-order pro- grammable filter. The gain of the filter is adjusted by 12 ______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers MAX5432/MAX5433 Functional Diagram M A X H 5 4 VDD 5-BIT 5 5-BIT 5 32- 32 3 SHIFT LATCH POSITION W 2 REGISTER DECODER GND – M SDA I2C POR L A SCL INTERFACE 5-BIT X NV MEMORY MAX5432 5 MAX5433 A0 4 3 5 MAX5434/MAX5435 Functional Diagram VDD 5-BIT 5 5-BIT 5 32- 32 SHIFT LATCH POSITION W REGISTER DECODER GND SDA POR L I2C INTERFACE 5-BIT SCL NV MEMORY MAX5434 MAX5435 ______________________________________________________________________________________ 13

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 Ordering Information/Selector Guide (continued) 3 PART PIN-PACKAGE TOP MARK I2C ADDRESS R (kΩΩΩΩ) PKG CODE 4 MAX5434MEZT+T 6 Thin SOT23-6 AABY 0101100 50 Z6-1 5 MAX5434NEZT+T 6 Thin SOT23-6 AABS 0101010 50 Z6-1 X MAX5435LEZT+T 6 Thin SOT23-6 AABW 0101000 100 Z6-1 A MAX5435MEZT+T 6 Thin SOT23-6 AABV 0101100 100 Z6-1 M *EP = Exposed pad. – **A0represents the logic state of input A0 of the device in the TDFN package. 2 +Denotes a lead-free package. T = Tape and reel. 3 Note:All devices are specified over the -40°C to +85°C operating temperature range. 4 5 Chip Information X A TRANSISTOR COUNT: 7817 M PROCESS: BiCMOS 14 ______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers Package Information M (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, A go to www.maxim-ic.com/packages.) X S 5 P E 4 N. HI 3 T N 2 F D – L, M 0 1 8, & A 6, X 5 4 3 5 ______________________________________________________________________________________ 15

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 Package Information (continued) 3 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, 4 go to www.maxim-ic.com/packages.) 5 X A M COMMON DIMENSIONS PACKAGE VARIATIONS SYMBOL MIN. MAX. PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x e – A 0.70 0.80 T633-2 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF 2 D 2.90 3.10 T833-2 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF 3 E 2.90 3.10 T833-3 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF 4 A1 0.00 0.05 T1033-1 10 1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05 2.00 REF 5 L 0.20 0.40 T1033-2 10 1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05 2.00 REF X k 0.25 MIN. T1433-1 14 1.70±0.10 2.30±0.10 0.40 BSC - - - - 0.20±0.05 2.40 REF A A2 0.20 REF. T1433-2 14 1.70±0.10 2.30±0.10 0.40 BSC - - - - 0.20±0.05 2.40 REF M 16 ______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers Package Information (continued) M (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, A go to www.maxim-ic.com/packages.) X 5 S P E 4 3. 2 3 T O 2 S N – HI M T L 6 A X 5 4 3 5 ______________________________________________________________________________________ 17

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers 5 Package Information (continued) 3 (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, 4 go to www.maxim-ic.com/packages.) 5 X A M – 2 3 4 5 X A M 18 ______________________________________________________________________________________

32-Tap, Nonvolatile, I2C, Linear, Digital Potentiometers Revision History M A REVISION REVISION PAGES DESCRIPTION NUMBER DATE CHANGED X 3 11/07 Eliminated address options, added lead-free option, updated information in Table 1b 1, 9, 14 5 4 3 2 – M A X 5 4 3 5 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________19 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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