LTC6906 Micropower, 10kHz to 1MHz Resistor Set Oscillator in SOT-23 FEATURES DESCRIPTION n Supply Current: 12μA at 100kHz The LTC®6906 is a precision programmable oscillator that n <0.65% Frequency Accuracy (from 0°C to 70°C) is versatile, compact and easy to use. Micropower opera- n Frequency Range: 10kHz to 1MHz tion benefits portable and battery-powered equipment. At n One Resistor Sets the Oscillator Frequency 100kHz, the LTC6906 consumes 12μA on a 3.3V supply. n Single Supply: 2.25V to 5.5V A single resistor programs the oscillator frequency over n –40°C to 125°C Operating Temperature Range a 10:1 range with better than 0.5% initial accuracy. The n No Decoupling Capacitor Needed output frequency can be divided by 1, 3 or 10 to span a n Start-Up Time Under 200μs at 1MHz 100:1 total frequency range, 10kHz to 1MHz. n First Cycle After Power-Up is Accurate n 150Ω CMOS Output Driver The LTC6906 is easily programmed according to this n Low Profile (1mm) SOT-23 (ThinSOT™) Package simple formula: ⎧ 10, DIVPin=V+ APPLICATIONS ⎛ ⎞ ⎪ 1MHz 100k ƒ = •⎜ ⎟, N=⎨ 3, DIVPin=Open OUT N ⎝R ⎠ ⎪ n Low Cost Precision Programmable Oscillator SET ⎩ 1, DIVPin=GND n Rugged, Compact Micropower Replacement for Crystal and Ceramic Oscillators No decoupling capacitor is needed in most cases, yield- n High Shock and Vibration Environments ing an extremely compact solution occupying less than n Portable and Battery-Powered Equipment 20mm2. Contact LTC Marketing for a version of the part n PDAs and Cellular Phones with a shutdown feature or lower frequency operation. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property The LTC6906 is available in the 6-lead SOT-23 (ThinSOT) of their respective owners. package. TYPICAL APPLICATION Micropower Clock Generator Typical Supply Current vs Frequency 90 CL = 5pF NO DECOUPLING 80 TA = 25°C CAPACITOR NEEDED LTC6906 10kHz TO 1MHz NT (A) 70 V+ = 3.6V E 60 2.25V TO 3.6V V+ OUT RR 10 GND GRD LY CU 50 V+ = 2.25V 3 DIV SET PP 40 1 R10S0EkT TO 1M R SU 30 E W O 20 6906 TA01 P 10 0 0 200 400 600 800 1000 1200 FREQUENCY (kHz) 6906 TA01b 6906fc 1

LTC6906 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) V+ ................................................................–0.3V to 6V TOP VIEW DIV to GND .....................................–0.3V to (V+ + 0.3V) OUT 1 6 V+ SET to GND .....................................–0.3V to (V+ + 0.3V) GND 2 5 GRD GRD to GND ....................................–0.3V to (V+ + 0.3V) DIV 3 4 SET Operating Temperature Range (Note 7) S6 PACKAGE 6-LEAD PLASTIC TSOT-23 LTC6906C ............................................–40°C to 85°C TJMAX = 150°C, θJA = 230°C/W LTC6906I .............................................–40°C to 85°C LTC6906H ..........................................–40°C to 125°C Specified Temperature Range (Note 7) LTC6906C ................................................0°C to 70°C LTC6906I .............................................–40°C to 85°C LTC6906H ..........................................–40°C to 125°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec) ...................300°C ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6906CS6#PBF LTC6906CS6#TRPBF LTBJN 6-Lead Plastic TSOT-23 0°C to 70°C LTC6906IS6#PBF LTC6906IS6#TRPBF LTBJN 6-Lead Plastic TSOT-23 –40°C to 85°C LTC6906HS6#PBF LTC6906HS6#TRPBF LTBJN 6-Lead Plastic TSOT-23 –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6906CS6 LTC6906CS6#TR LTBJN 6-Lead Plastic TSOT-23 0°C to 70°C LTC6906IS6 LTC6906IS6#TR LTBJN 6-Lead Plastic TSOT-23 –40°C to 85°C LTC6906HS6 LTC6906HS6#TR LTBJN 6-Lead Plastic TSOT-23 –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Δf Frequency Accuracy (Notes 2, 3, 9) V+ = 2.7V to 3.6V 100kHz ≤ f ≤ 1MHz ±0.25 ±0.5 % 100kHz ≤ f ≤ 1MHz, LTC6906C l ±0.65 % 100kHz ≤ f ≤ 1MHz, LTC6906I l ±1.3 % f = 1MHz, LTC6906H l ±1.3 % f = 100kHz, LTC6906H l ±2.2 % V+ = 2.25V 100kHz ≤ f ≤ 1MHz ±0.25 ±0.7 % 100kHz ≤ f ≤ 1MHz, LTC6906C l ±0.85 % 100kHz ≤ f ≤ 1MHz, LTC6906I l ±1.3 % f = 1MHz, LTC6906H l ±1.3 % f = 100kHz, LTC6906H l ±2.2 % 6906fc 2

LTC6906 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS R Frequency-Setting Resistor Range l 100 1000 kΩ SET Δf/ΔT Frequency Drift Over Temp (Note 3) R = 316k l ±0.005 %/°C SET Δf/ΔV Frequency Drift Over Supply (Note 3) V+ = 2.25V to 3.6V, 100k ≤ R ≤ 1000k 0.06 %/V SET Timing Jitter (Note 4) Pin 3 = V+, 100k ≤ R ≤ 1000k 0.03 % SET Pin 3 = Open, 100k ≤ R ≤ 1000k 0.07 % SET Pin 3 = 0V, 100k ≤ R ≤ 1000k 0.15 % SET S Long-Term Stability of Output Frequency Pin 3 = V+ 300 ppm/√kHr f DC Duty Cycle l 45 50 55 % V+ Operating Supply Range (Note 8) l 2.25 3.6 V I Power Supply Current R = 1000k, Pin 3 = 0V, R = 10M V+ = 3.6V l 12.5 18 μA S SET L (DIV = 1, f = 100kHz) V+ = 2.25V l 10.0 15 μA OUT R = 100k, Pin 3 = 0V, R = 10M V+ = 3.6V l 78 100 μA SET L (DIV = 1, f = 1MHz) V+ = 2.25V l 60 80 μA OUT V High Level DIV Input Voltage V+ = 3.6V l 3.1 V IH V+ = 2.25V l 2.05 V V Low Level DIV Input Voltage V+ = 3.6V l 0.5 V IL V+ = 2.25V l 0.2 V I DIV Input Current (Note 5) Pin 3 = V+ l 1 2 μA DIV Pin 3 = 0V l –2 –1 μA V High Level Output Voltage (Note 5) V+ = 3.6V I = –100μA l 3.40 3.59 V OH OH I = –1mA l 2.80 3.30 V OH V+ = 2.25V I = –100μA l 2.15 2.2 V OH I = –1mA l 1.75 2.0 V OH V Low Level Output Voltage (Note 5) V+ = 3.6V I = 100μA l 0.02 0.2 V OL OL I = 1mA l 0.15 0.8 V OL V+ = 2.25V I = 100μA l 0.03 0.1 V OL I = 1mA l 0.30 0.5 V OL t OUT Rise Time (Note 6) V+ = 3.6V 10 ns r V+ = 2.25V 25 ns t OUT Fall Time (Note 6) V+ = 3.6V 10 ns f V+ = 2.25V 25 ns VGS GRD Pin Voltage Relative to SET Pin –10μA ≤ I ≤ 0.3μA l –10 10 mV GRD Voltage Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: Output rise and fall times are measured between the 10% and may cause permanent damage to the device. Exposure to any Absolute 90% power supply levels. Maximum Rating condition for extended periods may affect device Note 7: The LTC6906C is guaranteed to meet specified performance from reliability and lifetime. 0°C to 70°C. The LTC6906C is designed, characterized and ex pected to Note 2: Some frequencies may be generated using two different values of meet specified performance from –40°C to 85°C but is not tested or QA R . For these frequencies, the error is specified assuming that the larger sampled at these temperatures. The LTC6906I is guaranteed to meet SET value of R is used. specified performance from –40°C to 85°C. SET Note 3: Frequency accuracy is defined as the deviation from the f Note 8: Consult the Applications Information section for operation with OUT equation. supplies higher than 3.6V. Note 4: Jitter is the ratio of the peak-to-peak deviation of the period to the Note 9: Test conditions reflect the master oscillator frequency. The output mean of the period. This specification is based on characterization and is divider is functionally tested and divided frequency accuracy is guaranteed not 100% tested. by design. Note 5: Current into a pin is given as a positive value. Current out of a pin is given as a negative value. 6906fc 3

LTC6906 TYPICAL PERFORMANCE CHARACTERISTICS Typical Frequency Error Typical Frequency Error vs Power Supply vs Temperature Typical Frequency Error vs R SET 0.50 2 0.50 0.40 0.40 1 0.30 RSET = 100k 0.30 R (%) 0.20 R (%) 0 3.6V 2.25V 0.20 QUENCY ERRO–00..11000 RRSSEETT == 110M0k QUENCY ERRO ––12 RSET 3=. 61VM 2.25V ERROR (%)–00..11000 V+ = 2.25VV+ = 5V RE–0.20 RE –3 –0.20 F F –0.30 –0.30 –4 –0.40 –0.40 –0.50 –5 –0.50 2.25 3 4 5 –50–30–10 10 30 50 70 90 110 130150 0 200 400 600 800 1000 1200 SUPPLY VOLTAGE (V) TEMPERATURE (°C) RSET (kΩ) 6906 G01 6906 G02 6906 G03 Typical Supply Current Typical Supply Current V vs Temperature (V is the SET SET vs Frequency vs Load Capacitance Voltage Measured at the R Pin) SET 90 200 0.80 CL = 5pF TA = 25C RSET = 100k 80 TA = 25°C 180 0.75 1MHz, 3.6V NT (A) 70 V+ = 3.6V NT (A)114600 V)00..7605 RE 60 RE E ( CUR 50 CUR120 TAG0.60 VVS+ E=T 2A.T25V ER SUPPLY 4300 V+ = 2.25V ER SUPPLY 1680000 1MHz, 2.25V SET PIN VOL000...554055 V+V S=E 3T .A6VT W W PO 20 PO 40 100kHz, 3.6V 0.40 10 20 0.35 100kHz, 2.25V 0 0 0.30 0 200 400 600 800 1000 1200 0 10 20 30 40 –60–40–20 0 20 40 60 80 100120140 FREQUENCY (kHz) LOAD CAPACITANCE (pF) TEMPERATURE (°C) 6906 G04 6906 G05 6906 G06 Typical Supply Current Typical Supply Current vs Temperature, 1MHz vs Temperature, 100kHz 90 18 CL = 5pF CL = 5pF 85 ISUPPLY AT V+ = 3.6V 17 16 A) 80 A) 15 RENT ( 75 RENT ( 14 ISUPPLY AT V+ = 3.6V R R U U 13 C C PPLY 70 ISUPPLY AT V+ = 2.25V PPLY 12 ISUPPLY AT V+ = 2.25V SU 65 SU 11 10 60 9 55 8 –60–40–20 0 20 40 60 80 100 120140 –50–30–10 10 30 50 70 90 110130150 TEMPERATURE (°C) TEMPERATURE (°C) 6906 G07 6906 G08 6906fc 4

LTC6906 PIN FUNCTIONS OUT (Pin 1): Oscillator Output. The OUT pin swings from or better temperature coefficient. For lower accur acy ap- GND to V+ with an output resis tance of approximately plications, an inexpensive 1% thick-film resistor may be 150Ω. For micropower operation, the load re sistance must used. Limit the capacitance in parallel with R to less SET be kept as high as possible and the load capacitance as than 10pF to reduce jitter and to ensure stability. Capaci- low as possible. tance greater than 10pF could cause the LTC6906 internal feedback circuits to oscillate. The volt age on the SET pin GND (Pin 2): Ground. is approximately 650mV and decreases with temperature DIV (Pin 3): Divider Setting Input. This three-level input by about –2.2mV/°C. selects one of three internal digital divider settings, de- GRD (Pin 5): Guard Signal. This pin can be used to reduce termining the value of N in the frequency equation. Tie to PC board leakage across the frequency setting resistor, GND for ÷1, leave floating for ÷3 and tie to V+ for ÷10. R . The GRD pin is held within a few millivolts of the When left floating, the LTC6906 pulls Pin 3 to mid-supply SET SET pin and shunts leakage current away from the SET pin. with a 2.5M resistor. When Pin 3 is floating, care should To control leakage, connect a bare copper trace (a trace be taken to reduce coupling from the OUT pin and its with no solder mask) to GRD and loop it around the SET trace to Pin 3. Coupling can be reduced by increasing the pin and all PC board metal connected to SET. physical space between traces or by shielding the DIV pin with grounded metal. V+ (Pin 6): Voltage Supply (2.25V to 3.6V). This supply is internally decoupled with a 20Ω resistor in series with SET (Pin 4): Frequency Setting Resistor Input. Connect an 800pF capacitor. No external decoupling capacitor is a resistor, R , from this pin to GND to set the oscillator SET required for OUT pin loads less than 50pF. V+ should be frequency. For best perform ance use a precision metal- or kept reasonably free of noise and ripple. thin-film resistor of 0.5% or better tolerance and 50ppm/°C BLOCK DIAGRAM DECOUPLING V+ NETWORK FREQUENCY-TO-CURRENT V+ 20 CONVERTERS 5M 6 fOSC THREE-LEVEL 800pF DIV INPUT 3 GND 2 IFB IFB DETECTOR 5M DIVIDER VSET (cid:129) VGRD (cid:129) 650mV SELECT ISET = IFB VSET 4 SET VSET – VOLTAGE fOSC 150Ω DRIVER PROGRAMMABLE RSET 5 GRD BUFFER VSET +OP AMP (MASCOTOESNRCT IOLRSLOACLTILLOELRDATOR) D(IV1,I D3E, R10 ()n) OUT 1 fOSC(cid:1)(cid:30)(cid:1)(cid:18)(cid:46)(cid:41)(cid:91)(cid:1)(cid:116)(cid:1)(cid:18)(cid:17)(cid:17)(cid:76)(cid:256)(cid:16)(cid:51)SET 6906 BD 6906fc 5

LTC6906 TEST CIRCUIT EQUIVALENT CIRCUIT OF OSCILLOSCOPE OR LTC6906 CTEST FREQUENCY COUNTER PROBE SUPPLY V+ OUT VOLTAGE GND GRD CPROBE R10PMROBE DIV SET RSET 0.01% 10ppm/°C 6906 F01 CTEST = 1/(1/5pF – 1/CPROBE) = 7.5pF FOR A 15pF SCOPE PROBE Figure 1. Test Circuit with 5pF Effective Load EQUIVALENT INPUT AND OUTPUT CIRCUITS V+ V+ V+ 6 6 6 200Ω 20Ω TOTAL OUTPUT SET 1k GRD RESISTANCE 4 5 800pF GND GND GND 2 2 2 6906 F02 6906 F03 6906 F04 Figure 2. V+ Pin Figure 3. SET Pin Figure 4. GRD Pin V+ V+ 6 6 5M fOUT DIV OUT 300Ω 3 1 5M GND GND 2 2 6906 F05 6906 F06 Figure 5. DIV Pin Figure 6. OUT Pin 6906fc 6

LTC6906 THEORY OF OPERATION The LTC6906 is a precision, resistor programmable oscilla- The period and frequency are determined exclusively by tor (see the Block Diagram). It generates a square wave at R and the precision internal capacitor. Importantly, the SET the OUT pin with a period directly proportional to the value value of V is immaterial, and the LTC6906 maintains SET of an external resistor, R . A feedback circuit measures its accuracy even though V is not a precision reference SET SET and controls the oscillator frequency to achieve the high- voltage. est possible accuracy. In equilibrium, this circuit ensures The digital dividers shown in the Block Diagram further that the current in the SET pin, I , is balanced by I . SET FB divide the master oscillator frequency by 1, 3 or 10 pro- I is proportional to the master oscillator frequency, so FB ducing: we have the relationship: ƒ I = I = V • ƒ • C (1) ƒ = OSC SET FB SET OSC OSC OUT N (5) where C is a precision internal capacitor: OSC and C = 10pF for the LTC6906 OSC t = N • t (6) OUT OSC Solving for the oscillator period: Table 1 gives specific frequency and period equations for 1 V t = = SET •C the LTC6906. The Applications Information section gives OSC OSC ƒ I OSC SET (2) further detail and discusses alternative ways of setting the LTC6906 output frequency. This is the fundamental equation for the LTC6906. It holds regardless of how the SET pin is driven. When a resistor, R , is connected from the SET pin to ground, we have SET the relationship: V SET =R SET I SET (3) so 1 t = =R •C OSC SET OSC ƒ OSC (4) Table 1. Output Frequency Equations PART NUMBER FREQUENCY PERIOD DIVIDER RATIOS LTC6906 ⎛ ⎞ ⎛ ⎞ ⎧⎪ 10, DIVPin=V+ 1MHz 100k R ƒOUT= N •⎝⎜⎜R ⎠⎟⎟ tOUT =N•1μs•⎝⎜10S0ETk⎠⎟ N=⎨⎪ 3, DIVPin=Open SET ⎩ 1, DIVPin=GND 6906fc 7

LTC6906 APPLICATIONS INFORMATION Selecting R and the Divider Ratio SET 10000 The LTC6906 contains a master oscillator followed by a digital divider (see the Block Diagram). R determines SET the master oscillator frequency and the DIV pin sets the 10 3 1 1000 divider ratio, N. The range of frequencies accessible in Ω) k each divider ratio overlap, as shown in Figure 7. This figure (SET R is derived from the equations in Table 1. For any given 100 frequency, power can be minimized by minimizing the master oscillator frequency. This implies maximizing R and using the lowest possible divider ratio, N. The SET 10 relationship between R , N and the unloaded power 1 10 100 1000 10000 SET OUTPUT FREQUENCY (kHz) consumption is shown in Figure 8, where we can clearly 6906 F07 see that supply current decreases for large values of R . SET Figure 7. R vs Desired Output Frequency (LTC6906) SET For a discussion of jitter and divide ratio, refer to page 11. 80 Minimizing Power Consumption CLOAD = 0 70 V+ = 3V The supply current of the LTC6906 has four current TA = 25°C 60 components: • Constant (Independent V+, ƒOUT and CLOAD) (A)PLY 4500 P U • Proportional to ISET (which is the current in RSET) IS 30 • Proportional to V+, ƒ and C 20 OUT LOAD • Proportional to V+ and R 10 LOAD 0 An approximate expression for the total supply current is: 100 1000 + RSET (kΩ) I+ ≅5μA+6•I +V+ •ƒ •(C +5pF)+ V 6906 F08 SET OUT LOAD 2•R Figure 8. Unloaded Supply Current vs R LOAD SET + ≅5μA+6• VSET +V+ •ƒ •(C +5pF)+ V OUT LOAD 80 RSET 2•RLOAD V+ = 2.7V 70 V is approximately 650mV at 25°C, but varies with A) SET T ( 60 temperature. This behavior is shown in the Typical Per- EN 1 RR 50 formance Characteristics section. CU 3 Y 40 Power can be minimized by maximizing RSET, minimizing SUPPL 30 10 the load on the OUT pin and operating at lower frequen- R E W 20 cies. Figure 9 shows total supply current vs frequency O P under typical conditions. Below 100kHz the load current 10 is negligible for the 5pF load shown. 0 0 200 400 600 800 1000 1200 MASTER OSCILLATOR FREQUENCY (kHz) 6906 F09 Figure 9. Supply Current vs Frequency 6906fc 8

LTC6906 APPLICATIONS INFORMATION Guarding Against PC Board Leakage Bypassing the Power Supply The LTC6906 uses relatively large resistance values for The LTC6906 has on-chip power supply decoupling that R to minimize power consumption. For R = 1M, the eliminates the need for an external decoupling capacitor SET SET SET pin current is typically only 0.65μA. Thus, only 0.65nA in most cases. Figure 11 shows a simplified equivalent leaking into the SET pin causes a 0.1% frequency error. circuit of the output driver and on-chip decoupling network. Similarly, 1G of leakage resistance across R (1000 • When the output driver switches from low to high, the SET R ) causes the same 0.1% error. 800pF capacitor delivers the current needed to charge the SET off-chip capacitive load. Within nanoseconds the system Achieving the highest accuracy requires controlling poten- power supply recharges the 800pF capacitor. tial leakage paths. PC board leakage is aggravated by both dirt and moisture. Effective cleaning is a good first step to minimizing leakage, and some PC board manufacturers LTC6906-1 offer high impedance or low leakage processing options. V+ 6 V+ fOUT Another effective method for controlling leakage is to shunt 20Ω OUT 300Ω the leakage current away from the sensitive node through 1 a low impedance path. The LTC6906 provides a signal on CLOAD 800pF the GRD pin for this purpose. Figure 10 shows a PC board GND 2 layout that uses the GRD pin and a “guard ring” to absorb ESD DIODES DRIVER DECOUPLING leakage currents. The guard ring surrounds the SET pin NETWORK and the end of R to which it is connected. The guard 6906 F11 SET ring must have no solder mask covering it to be effective. Figure 11. Simplified Equivalent of the Output Driver The GRD pin voltage is held within a few millivolts of the and On-Chip Decoupling Circuit SET pin voltage, so any leakage path between the SET pin and the guard ring generates no leakage current. Figure 12 shows a test circuit for evaluating perfor- mance of the LTC6906 with a highly inductive, 330nH power supply. Figure 13 shows the effectiveness of the LTC6906 on-chip decoupling network. For C = 5pF to 50pF, the 1 OUT V+ 6 NO SOLDER MASK LOAD OVER THE GUARD RING output waveforms remain well formed. GRD 2 GND 5 The extremely low supply current of the LTC6906 allows GUARD operation with substantial resistance in the power supply. RING 3 DIV SET 4 Figure 14 shows a test circuit for evaluating performance RSET of the LTC6906 with a highly resistive, 100Ω power sup- NO LEAKAGE CURRENT ply. Figure 15 shows the effectiveness of the on-chip decoupling network. For C = 5pF to 50pF, the output LOAD LEAKAGE waveforms remain well formed. With a 50pF load, a very CURRENT 6906 F10 small (2.5%) slow tail can be seen on the rising edge. The output waveform is still well formed even in this case. Figure 10. PC Board Layout with Guard Ring The ability of the LTC6906 to operate with a resistive supply permits supplying power via a CMOS logic gate or microcontroller pin. Since the LTC6906 has a turn-on time of less than 200μs, this technique can be used to enable the device only when needed and further reduce power consumption. 6906fc 9

LTC6906 APPLICATIONS INFORMATION 33L0SnH LTC6906 1MHz 10R0SΩ LTC6906 1MHz 3.3V V+ OUT 3.3V V+ OUT GND GRD CLOAD GND GRD CLOAD DIV SET DIV SET RSET RSET 100k 100k 6906 F12 6906 F14 Figure 12. Test Circuit with an Inductive Power Supply Figure 14. Test Circuit with a Resistive Power Supply 3.5 3.5 3 3 V) 2 V) 2 (UT (UT O O V V 1 1 CLOAD = 5pF CLOAD = 5pF CLOAD = 10pF CLOAD = 10pF CLOAD = 20pF CLOAD = 20pF CLOAD = 50pF CLOAD = 50pF 0 0 4.65 4.75 4.85 4.95 5.05 5.15 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 TIME (s) TIME (s) 6906 F13 6906 F15 Figure 13. Output Waveforms with Figure 15. Output Waveforms with an Inductive Supply (See Figure 12) a Resistive Supply (See Figure 14) Start-Up Time jitter. The risk increases when the fundamental frequency or harmonics of the noise fall near the master oscillator When the LTC6906 is powered up, it holds the OUT pin frequency. It is relatively easy to filter the LTC6906 power low. After the master oscillator has settled, the OUT pin supply because of the very low supply current. For ex- is enabled and the first output cycle is guaranteed to be ample, an RC filter with R = 160Ω and C = 10μF provides within specification. The time from power-up to the first a 100Hz lowpass filter while dropping the supply voltage output transition is given approximately by: only about 10mV. t ≅ 64 • t + 100μs START OSC Operating the LTC6906 with Supplies Higher Than 3.6V The digital divider ratio, N, does not affect the start-up time. The LTC6906 may also be used with supply voltages Power Supply Rejection between 3.6V and 5.5V under very specific conditions. To ensure proper functioning above 3.6V, a filter circuit The LTC6906 has a very low supply voltage coefficient, must be attached to the power supply and located within meaning that the output frequency is nearly insensitive 1cm of the device. A simple RC filter consisting of a 100Ω to the DC power supply voltage. In most cases, this error resistor and 1μF capacitor (Figure 16) will ensure that sup- term can be neglected. ply resonance at higher supply voltages does not induce High frequency noise on the power supply (V+) pin has the unpredictable oscillator behavior. Accuracy under higher potential to interfere with the LTC6906’s master oscilla- supplies may be estimated from the typical Frequency vs tor. Periodic noise, such as that generated by a switching Supply Voltage curves in the Typical Performance Char- power supply, can shift the output frequency or increase acteristics section of this data sheet. 6906fc 10

LTC6906 APPLICATIONS INFORMATION V+ If the SET pin is driven with a current source generating 3.6V TO 5.5V DC I , the oscillator output frequency will be: SET 100Ω LTC6906 V+ OUT ISET 1μF GND GRD ƒ ≅ 10pF DIV SET OSC ⎛ I ⎞ RSET 25.9mV•(cid:67)n⎝⎜ SET–18 ⎠⎟–2.3mV/°C 82•10 A 6906 F16 Figure 16. Using the LTC6906 at Higher Supply Voltages Figure 17 and Figure 18 show a current controlled oscil- lator and a voltage controlled oscillator. These circuits are not highly accurate if used alone, but can be very useful Alternative Methods for Setting the Output Frequency if they are enclosed in an overall feedback circuit such as Any means of sinking current from the SET pin will control a phase-locked loop. the output frequency of the LTC6906. Equation 2 (repeated below) gives the fundamental relationship between fre- LTC6906 100kHz TO 1MHz quency and the SET pin voltage and current: V+ V+ OUT 1 V GND GRD t = = SET •10pF OSC DIV SET ƒOSC ISET (2) I0C.6TR5LμA TO 6.5μA 6906 F17 This equation shows that the LTC6906 converts conduc- tance (I /V ) to frequency or, equivalently, converts Figure 17. Current Controlled Oscillator SET SET resistance (R = V /I ) to period. SET SET SET VSET is the voltage across an internal diode, and as such LTC6906 1MHz TO 100kHz it is given approximately by: V+ V+ OUT GND GRD V ≅V •Log ISET DIV SET V0VCT TROL 0.585V SET T e IS 6906 F18 R10S0EkT ⎛ ⎞ I Figure 18. Voltage Controlled Oscillator ≅25.9mV•Log ⎜ SET ⎟–2.3mV/°C e⎝ –18 ⎠ 82•10 A Jitter and Divide Ratio where At a given output frequency, a higher master oscillator V = kT/q = 25.9mV at T = 300°K (27°C) T frequency and a higher divide ratio will result in lower I ≅ 82 • 10–18 Amps jitter and higher power supply dissipation. Indeterminate S jitter percentage will decrease by a factor of slightly less (I is also temperature dependent) S than the square root of the divider ratio, while determinate V varies with temperature and the SET pin current. jitter will not be similarly attenuated. Please consult the SET The response of V to temperature is shown in the specification tables for typical jitter at various divider ratios. SET Typical Performance graphs. V changes approximately SET –2.3mV/°C. At room temperature V increases 18mV/ SET octave or 60mV/decade of increase in I . SET 6906fc 11

LTC6906 TYPICAL APPLICATIONS Setting Frequency to 0.1% Resolution with Standard Resistors Trimming the Frequency Sine Wave Oscillator LTC6906 10kHz TO 1MHz 1MHz WITH 2.25V TO 3.6V V+ OUT LTC6906 2.5% RANGE 0.1μF 1MHz 2.25V TO 3.6V V+ OUT LTC6906 1k 10 GND GRD 2.25V TO 3.6V V+ OUT GND GRD 3 DIV SET 1 RR1%AA <T HRIBN/1 F0ILM DIV SET RA GDNIVD GSREDT L1100μH C2410pF RB 97.6k R10S0EkT 100k TO 1M 0.1% THIN FILM RB 6906 TA05 5k 6906 TA03 6906 TA04 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636 Rev B) 2.90 BSC 0.62 0.95 (NOTE 4) MAX REF 1.22 REF 1.50 – 1.75 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 0.95 BSC PER IPC CALCULATOR 6 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.90 BSC 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302 REV B NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 6906fc 12

LTC6906 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 12/10 Added Note 9. 2-3 Revised values in the Guarding Against PC Board Leakage section. 9 C 11/11 Reinsert symbols missing from Rev B 1, 4, 5, 6, 8, 9, 10, 11, 12 6906fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 13 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC6906 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1799 1kHz to 33MHz ThinSOT Oscillator Single Output, Greater Frequency Range LTC6900 1kHz to 20MHz ThinSOT Oscillator Single Output, Greater Frequency Range LTC6902 Multiphase Oscillator with Spread Spectrum Frequency Modulation 2-, 3- or 4-Phase Outputs LTC6903/LTC6904 1kHz to 68MHz Serial Port Programmable Oscillator Very Wide Frequency Range with Digital Programmability LTC6905 17MHz to 170MHz ThinSOT Oscillator Single Output, Higher Frequency 6906fc 14 Linear Technology Corporation LT 1111 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005