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  • 型号: LP3873ESX-3.3/NOPB
  • 制造商: Texas Instruments
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LP3873ESX-3.3/NOPB产品简介:

ICGOO电子元器件商城为您提供LP3873ESX-3.3/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 提供LP3873ESX-3.3/NOPB价格参考¥15.86-¥32.35以及Texas InstrumentsLP3873ESX-3.3/NOPB封装/规格参数等产品信息。 你可以下载LP3873ESX-3.3/NOPB参考资料、Datasheet数据手册功能说明书, 资料中有LP3873ESX-3.3/NOPB详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC REG LDO 3.3V 3A TO263-5

产品分类

PMIC - 稳压器 - 线性

品牌

Texas Instruments

数据手册

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产品图片

产品型号

LP3873ESX-3.3/NOPB

rohs

含铅 / 不受限制有害物质指令(RoHS)规范要求限制

产品系列

-

供应商器件封装

DDPAK/TO-263-5

其它名称

296-35359-1

包装

剪切带 (CT)

安装类型

表面贴装

封装/外壳

TO-263-6,D²Pak(5 引线+接片),TO-263BA

工作温度

-40°C ~ 125°C

标准包装

1

电压-跌落(典型值)

0.8V @ 3A

电压-输入

最高 7V

电压-输出

3.3V

电流-输出

3A

电流-限制(最小值)

-

稳压器拓扑

正,固定式

稳压器数

1

设计资源

http://www.digikey.com/product-highlights/cn/zh/texas-instruments-webench-design-center/3176

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PDF Datasheet 数据手册内容提取

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 LP3873/LP3876 3A Fast Ultra Low Dropout Linear Regulators CheckforSamples:LP3873,LP3876 FEATURES DESCRIPTION 1 • UltraLowDropoutVoltage The LP3873/LP3876 series of fast ultra low-dropout 2 linear regulators operate from a +2.5V to +7.0V input • LowGroundPinCurrent supply. Wide range of preset output voltage options • LoadRegulationof0.08% are available. These ultra low dropout linear • 1µAQuiescentCurrentinShutdownMode regulators respond very quickly to step changes in load, which makes them suitable for low voltage • EnsuredOutputCurrentof3ADC microprocessor applications. The LP3873/LP3876 are • AvailableinDDPAK/TO-263andTO-220 developed on a CMOS process which allows low Packages quiescent current operation independent of output • OutputVoltageAccuracy±1.5% load current. This CMOS process also allows the LP3873/LP3876 to operate under extremely low • ErrorFlagIndicatesOutputStatus dropoutconditions. • SenseOptionImprovesLoadRegulation Dropout Voltage: Ultra low dropout voltage; typically • MinimumOutputCapacitorRequirements 80mV at 300mA load current and 800mV at 3A load • Overtemperature/overcurrentProtection current. • −40°Cto+125°CJunctionTemperatureRange Ground Pin Current: Typically 6mA at 3A load current. APPLICATIONS Shutdown Mode: Typically 1µA quiescent current • MicroprocessorPowerSupplies whentheshutdownpinispulledlow. • GTL,GTL+,BTL,andSSTLBusTerminators Error Flag:Error flag goes low when the output • PowerSuppliesforDSPs voltagedrops10%belownominalvalue. • SCSITerminator SENSE: Sense pin improves regulation at remote • PostRegulators loads. • HighEfficiencyLinearRegulators Precision Output Voltage: Multiple output voltage • BatteryChargers options are available ranging from 1.8V to 5.0V with an ensured accuracy of ±1.5% at room temperature, • OtherBatteryPoweredApplications and ±3.0% over all conditions (varying line, load, and temperature). Typical Application Circuits *SDandERRORpinsmustbepulledhighthrougha10kΩpull-upresistor.ConnecttheERRORpintogroundifthis functionisnotused.SeeApplicationHintsformoreinformation. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2002–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com *SDpinsmustbepulledhighthrougha10kΩpull-upresistor.SeeApplicationHintsformoreinformation. Connection Diagrams Figure1.TopView Figure2.TopView 5-PinTO-220 5-PinDDPAK/TO-263 SeeNDH0005DPackage SeeKTT0005BPackage PINDESCRIPTIONSFORTO-220ANDDDPAK/TO-263PACKAGES LP3873 LP3876 Pin# Name Function Name Function 1 SD Shutdown SD Shutdown 2 V InputSupply V InputSupply IN IN 3 GND Ground GND Ground 4 V OutputVoltage V OutputVoltage OUT OUT 5 ERROR ERRORFlag SENSE RemoteSensePin Block Diagram LP3873 2 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 Block Diagram LP3876 Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings(1)(2) StorageTemperatureRange −65°Cto+150°C LeadTemperature Soldering,5sec. 260°C ESDRating(3) 2kV PowerDissipation(4) InternallyLimited InputSupplyVoltage(Survival) −0.3Vto+7.5V ShutdownInputVoltage(Survival) −0.3Vto7.5V OutputVoltage(Survival)(5)(6) −0.3Vto+6.0V I (Survival) ShortCircuitProtected OUT MaximumVoltageforERRORPin V IN MaximumVoltageforSENSEPin V OUT (1) Absolutemaximumratingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.Operatingratingsindicateconditionsforwhich thedeviceisintendedtobefunctional,butdoesnotensurespecificperformancelimits.Forensuredspecificationsandtestconditions, seeElectricalCharacteristics.Theensuredspecificationsapplyonlyforthetestconditionslisted.Someperformancecharacteristicsmay degradewhenthedeviceisnotoperatedunderthelistedtestconditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Thehumanbodymodelisa100pFcapacitordischargedthrougha1.5kΩresistorintoeachpin. (4) Atelevatedtemperatures,devicesmustbederatedbasedonpackagethermalresistance.ThedevicesinTO-220packagemustbe deratedatθ =50°C/W(with0.5in2,1oz.copperarea),junction-to-ambient(withnoheatsink).ThedevicesintheTO263surface- jA mountpackagemustbederatedatθ =60°C/W(with0.5in2,1oz.copperarea),junction-to-ambient.SeeApplicationHints. jA (5) Ifusedinadual-supplysystemwheretheregulatorloadisreturnedtoanegativesupply,theoutputmustbediode-clampedtoground. (6) TheoutputPMOSstructurecontainsadiodebetweentheV andV terminals.Thisdiodeisnormallyreversebiased.Thisdiodewill IN OUT getforwardbiasedifthevoltageattheoutputterminalisforcedtobehigherthanthevoltageattheinputterminal.Thisdiodecan typicallywithstand200mAofDCcurrentand1Ampofpeakcurrent. Operating Ratings InputSupplyVoltage(1) 2.5Vto7.0V ShutdownInputVoltage −0.3Vto7.0V MaximumOperatingCurrent(DC) 3A JunctionTemperature −40°Cto+125°C (1) TheminimumoperatingvalueforV isequaltoeither[V +V ]or2.5V,whicheverisgreater. IN OUT(NOM) DROPOUT Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com Electrical Characteristics LP3873/LP3876 LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1.5V,I =10mA,C =10µF,V =2V. IN O(NOM) L OUT SD Symbol Parameter Conditions Typ(1) LP3873/6(2) Units Min Max OutputVoltageTolerance(3) V +1.5V≤V ≤7.0V -1.5 +1.5 V OUT IN 0 % O 10mA≤I ≤3A -3.0 +3.0 L ΔV OutputVoltageLine V +1.5V≤V ≤7.0V 0.02 % OL OUT IN Regulation(3) 0.06 ΔV /ΔI OutputVoltageLoad 10mA≤I ≤3A 0.08 % O OUT L Regulation(3) 0.14 V -V I =300mA 80 100 IN OUT L 120 DropoutVoltage(4) mV I =3A 800 1000 L 1200 I =300mA 5 9 L GroundPinCurrentInNormal 10 I mA GND OperationMode I =3A 6 14 L 15 I GroundPinCurrentIn V ≤0.3V 1 10 µA GND SD ShutdownMode -40°C≤T ≤85°C 50 J I PeakOutputCurrent V ≥V -4% 4.5 A O(PK) O O(NOM) SHORTCIRCUITPROTECTION I ShortCircuitCurrent 6 A SC SHUTDOWNINPUT Output=High V 2 IN V ShutdownThreshold V SDT Output=Low 0 0.3 T Turn-offdelay I =3A 20 µs dOFF L T Turn-ondelay I =3A 25 µs dON L I SDInputCurrent V =V 1 nA SD SD IN ERRORFLAG V Threshold See(5) 10 5 16 % T V ThresholdHysteresis See(5) 5 2 8 % TH V ErrorFlagSaturation I =100µA 0.02 0.1 V EF(Sat) sink Td FlagResetDelay 1 µs I ErrorFlagPinLeakage 1 nA lk Current I ErrorFlagPinSinkCurrent V =0.5V 1 mA max Error (1) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. (2) Limitsarespecifiedbytesting,design,orstatisticalcorrelation. (3) Outputvoltagelineregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeintheinputlinevoltage. Outputvoltageloadregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeinloadcurrent.Theline andloadregulationspecificationcontainsonlythetypicalnumber.However,thelimitsforlineandloadregulationareincludedinthe outputvoltagetolerancespecification. (4) Dropoutvoltageisdefinedastheminimuminputtooutputdifferentialvoltageatwhichtheoutputdrops2%belowthenominalvalue. Dropoutvoltagespecificationappliesonlytooutputvoltagesof2.5Vandabove.Foroutputvoltagesbelow2.5V,thedrop-outvoltageis nothingbuttheinputtooutputdifferential,sincetheminimuminputvoltageis2.5V. (5) ErrorFlagthresholdandhysteresisarespecifiedaspercentageofregulatedoutputvoltage.SeeApplicationHints. 4 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 Electrical Characteristics LP3873/LP3876 (continued) LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1.5V,I =10mA,C =10µF,V =2V. IN O(NOM) L OUT SD Symbol Parameter Conditions Typ(1) LP3873/6(2) Units Min Max ACPARAMETERS V =V +1.0V 73 IN OUT C =10uF OUT V =3.3V OUT PSRR RippleRejection dB V =V +0.5V 57 IN OUT C =10uF OUT V =3.3V OUT ρ OutputNoiseDensity f=120Hz 0.8 µV n(l/f BW=10Hz–100kHz 150 V =2.5V OUT e OutputNoiseVoltage µV(rms) n BW=300Hz–300kHz 100 V =2.5V OUT Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com Typical Performance Characteristics Unlessotherwisespecified:T =25°C,C =10µF,C =10µF,S/DpinistiedtoV ,V =2.5V,V =V +1V,I = J OUT IN IN OUT IN O(NOM) L 10mA GroundCurrent DropoutVoltage vs Vs OutputLoadCurrent OutputLoadCurrent V =5V OUT 1200 1000 125o C 4.9 UT VOLTAGE (mV) 860000 -245o0oCC CURRENT (mA) 4444..78..7855 125oC OPO 400 PIN 4.65 25oC DR D 4.6 N 200 OU 4.55 -40oC GR 4.5 0 4.45 0 1 2 3 4.4 LOAD CURRENT (A) 0 0.5 1 1.5 2 2.5 3 OUTPUT LOAD CURRENT (A) Figure3. Figure4. GroundCurrent vs ShutdownI Q OutputVoltage vs I =3A JunctionTemperature L 6 10 5 _ A) 1 URRENT (m 34 WN I (A)PQ 0.1 OUND PIN C 2 SHUTDO 0.01 R G 1 0 0.001 1.8 2.3 2.8 3.3 3.8 4.3 5.0 -40 -20 0 20 40 60 80 100 125 TEMPERATURE (oC) OUTPUT VOLTAGE (V) Figure5. Figure6. ErrorFlagThreshold DCLoadReg. vs vs JunctionTemperature JunctionTemperature 14 3 of V)OUT 1102 mV/A) 2.5 HOLD (% 8 ULATION ( 1.52 S 6 G ROR THRE 24 DC LOAD RE 0.51 R E 0 0 -40 -20 0 20 40 60 80 100 125 -40 -20 0 20 40 60 80 100 125 JUNCTION TEMPERATURE (oC) JUNCTION TEMPERATURE (oC) Figure7. Figure8. 6 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 Typical Performance Characteristics (continued) Unlessotherwisespecified:T =25°C,C =10µF,C =10µF,S/DpinistiedtoV ,V =2.5V,V =V +1V,I = J OUT IN IN OUT IN O(NOM) L 10mA DCLineRegulation V IN vs vs Temperature V OverTemperature OUT 3 3.0 mV) 2.5 2.5 V (IN n 2 2.0 GE i V) CHAN 1.5 V (OUT 1.5 -40oC LT 1 1.0 O 25oC V ’ V/OUT 0.5 0.5 125oC 0 0.0 -40 -20 0 20 40 60 80 100 125 0.0 0.5 1.0 1.5 2.02.5 3.0 3.5 4.04.55.0 JUNCTION TEMPERATURE (oC) VIN (V) Figure9. Figure10. Noise vs LoadTransientResponse Frequency C =C =10µF,OSCON IN OUT 3.000 2.500 100VmOVU/TDIV IL = 100mA CIN = COUT = 10PF (Hz 2.000 UDE V/ NIT E (P 1.500 MAG S NOI 1.000 ILOAD 1A/DIV 0.500 0.000 100 1k 10k 100k TIME (50Ps/DIV) FREQUENCY (Hz) Figure11. Figure12. LoadTransientResponse LoadTransientResponse C =C =100µF,OSCON C =C =100µF,POSCAP IN OUT IN OUT 100VmOVU/TDIV VOUT 100mV/DIV MAGNITUDE MAGNITUDE ILOAD ILOAD 1A/DIV 1A/DIV TIME (50Ps/DIV) TIME (50Ps/DIV) Figure13. Figure14. Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisespecified:T =25°C,C =10µF,C =10µF,S/DpinistiedtoV ,V =2.5V,V =V +1V,I = J OUT IN IN OUT IN O(NOM) L 10mA LoadTransientResponse LoadTransientResponse C =C =10µF,TANTALUM C =C =100µF,TANTALUM IN OUT IN OUT 100VmOVU/TDIV VOUT 100mV/DIV MAGNITUDE MAGNITUDE 1AILO/DADIV 1AILO/DADIV TIME (50Ps/DIV) TIME (50Ps/DIV) Figure15. Figure16. LoadTransientResponse LoadTransientResponse C =C =10µF,OSCON C =C =100µF,OSCON IN OUT IN OUT 100VmOVU/TDIV 100VmOVU/TDIV MAGNITUDE MAGNITUDE ILOAD ILOAD 3A/DIV 3A/DIV TIME (50Ps/DIV) TIME (50Ps/DIV) Figure17. Figure18. LoadTransientResponse LoadTransientResponse C =C =100µF,POSCAP C =C =10µF,TANTALUM IN OUT IN OUT VOUT VOUT 100mV/DIV 100mV/DIV DE DE U U NIT NIT G G A A M M ILOAD ILOAD 3A/DIV 3A/DIV TIME (50Ps/DIV) TIME (50Ps/DIV) Figure19. Figure20. 8 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 Typical Performance Characteristics (continued) Unlessotherwisespecified:T =25°C,C =10µF,C =10µF,S/DpinistiedtoV ,V =2.5V,V =V +1V,I = J OUT IN IN OUT IN O(NOM) L 10mA LoadTransientResponse C =C =100µF,TANTALUM IN OUT VOUT 100mV/DIV DE U NIT G A M ILOAD 3A/DIV TIME (50Ps/DIV) Figure21. Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com APPLICATION HINTS EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctlyselectedforproperperformance. INPUT CAPACITOR: An input capacitor of at least 1µF is required. Ceramic or Tantalum may be used, and capacitancemaybeincreasedwithoutlimit OUTPUT CAPACITOR: An output capacitor is required for loop stability. It must be located less than 1 cm from the device and connected directly to the output and ground pins using traces which have no other currents flowingthroughthem(seePCBLAYOUTsection). The minimum value of the output capacitance that can be used for stable full-load operation is 10 µF, but it may be increased without limit. The output capacitor must have an ESR value as shown in the stable region of the curve(below). 10 1.0 STABLE REGION COUT > 10PF ): SR ( 0.1 E OUT C .01 .001 0 1 2 3 LOAD CURRENT (A) Figure22. ESRCurve SELECTING A CAPACITOR It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good Tantalum capacitor will show very little capacitance variation with temperature, but a ceramic may not be as good (depending on dielectric type). Aluminum electrolytics also typicallyhavelargetemperaturevariationofcapacitancevalue. Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severetheymaynotbefeasibleforsomeapplications(seeCAPACITORCHARACTERISTICSSection). CAPACITOR CHARACTERISTICS CERAMIC: For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a functionofvoltageandtemperature. Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5Vcapacitorcanlose60%ofitsratedcapacitancewithhalfoftheratedvoltageappliedtoit.TheZ5UandY5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of thetemperaturerange. X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course,theyaretypicallylargerandmorecostlythanZ5U/Y5Utypesforagivenvoltageandcapacitance. 10 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 TANTALUM: Solid Tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected tomeettheESRrequirementspreviouslylisted. Tantalums also have good temperature stability: a good quality Tantalum will typically show a capacitance value that varies less than 10-15% across the full temperature range of 125°C to −40°C. ESR will vary only about 2X goingfromthehightolowtemperaturelimits. The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if theESRofthecapacitorisneartheupperlimitofthestabilityrangeatroomtemperature). ALUMINUM:Thiscapacitortypeoffersthemostcapacitanceforthemoney.Thedisadvantagesarethattheyare larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higherfrequencies)duetohigherESRandESL. Compared by size, the ESR of an aluminum electrolytic is higher than either Tantalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X whengoingfrom25°Cdownto −40°C. It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120 Hz, which indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance specifiedatahigherfrequency(between20kHzand100kHz)shouldbeusedfortheLP387X.Deratingmustbe appliedtothemanufacturer'sESRspecification,sinceitistypicallyonlyvalidatroomtemperature. Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperaturewhereESRismaximum. TURN-ON CHARACTERISTICS FOR OUTPUT VOLTAGES PROGRAMMED TO 2.0V OR BELOW As Vin increases during start-up, the regulator output will track the input until Vin reaches the minimum operating voltage (typically about 2.2V). For output voltages programmed to 2.0V or below, the regulator output may momentarily exceed its programmed output voltage during start up. Outputs programmed to voltages above 2.0V arenotaffectedbythisbehavior. PCB LAYOUT GoodPClayoutpracticesmustbeusedorinstabilitycanbeinducedbecauseofgroundloopsandvoltagedrops. The input and output capacitors must be directly connected to the input, output, and ground pins of the regulator usingtraceswhichdonothaveothercurrentsflowinginthem(Kelvinconnect). The best way to do this is to lay out C and C near the device with short traces to the V , V , and ground IN OUT IN OUT pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitorshavea"singlepointground". Itshouldbenotedthatstabilityproblemshavebeenseeninapplicationswhere"vias"toaninternalgroundplane wereusedatthegroundpointsoftheICandtheinputandoutputcapacitors.Thiswascausedbyvaryingground potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground techniquefortheregulatorandit'scapacitorsfixedtheproblem. Since high current flows through the traces going into V and coming from V , Kelvin connect the capacitor IN OUT leadstothesepinssothereisnovoltagedropinserieswiththeinputandoutputcapacitors. RFI/EMI SUSCEPTIBILITY RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must betakentoensurethatthisdoesnotaffecttheICregulator. If RFI/EMI noise is present on the input side of the regulator (such as applications where the input source comes fromtheoutputofaswitchingregulator),goodceramicbypasscapacitorsmustbeusedattheinputpinoftheIC. Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com IfaloadisconnectedtotheICoutputwhichswitchesathighspeed(suchasaclock),thehigh-frequencycurrent pulses required by the load must be supplied by the capacitors on the IC output. Since the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency. The means the effective output impedance of the IC at frequencies above 100 kHz is determined only by the outputcapacitor(s). In applications where the load is switching at high speed, the output of the IC may need RF isolation from the load. It is recommended that some inductance be placed between the output capacitor and the load, and good RFbypasscapacitorsbeplaceddirectlyacrosstheload. PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the groundplane. In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not radiatedirectlyintoadjacentlayerswhichcarryanalogpowerandground. OUTPUT NOISE Noiseisspecifiedintwoways- Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a functionoffrequency. Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually severaldecadesoffrequencies. Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and totaloutputnoiseismeasuredinµV(rms). The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the internal reference increases the total supply current (ground pin current). Using an optimized trade-off of ground pin current and die size, LP3873/LP3876 achieves lownoiseperformanceandlowquiescentcurrentoperation. The total output noise specification for LP3873/LP3876 is presented in the Electrical Characteristics table. The Outputnoisedensityatdifferentfrequenciesisrepresentedbyacurveundertypicalperformancecharacteristics. SHORT-CIRCUIT PROTECTION The LP3873 and LP3876 are short circuit protected and in the event of a peak over-current condition, the short- circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the section onPOWERDISSIPATION/HEATSINKINGforpowerdissipationcalculations. ERROR FLAG OPERATION The LP3873/LP3876 produces a logic low signal at the Error Flag pin when the output drops out of regulation due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The timing diagram in Figure 23 shows the relationship between the ERROR flag and the output voltage. In this example, theinputvoltageischangedtodemonstratethefunctionalityoftheErrorFlag. The internal Error flag comparator has an open drain output stage. Hence, the ERROR pin should be pulled high through a pull up resistor. Although the ERROR flag pin can sink current of 1mA, this current is energy drain from the input supply. Hence, the value of the pull up resistor should be in the range of 10kΩ to 1MΩ. The ERROR pin must be connected to ground if this function is not used. It should also be noted that when the shutdown pin is pulled low, the ERROR pin is forced to be invalid for reasons of saving power in shutdown mode. 12 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 low clamp + - 0.45V COMPx + - SS:0.55V high clamp OP:2V Figure23. ErrorFlagOperation SENSE PIN In applications where the regulator output is not very close to the load, LP3876 can provide better remote load regulation using the SENSE pin. Figure 24 depicts the advantage of the SENSE option. LP3873 regulates the voltage at the output pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.3V output, if the trace resistance is 100mΩ, the voltage at the remote load will be 3V with 3A of load current, I . The LP3876 regulates the voltage at the LOAD sense pin. Connecting the sense pin to the remote load will provide regulation at the remote load, as shown in Figure24.Ifthesenseoptionpinisnotrequired,thesensepinmustbeconnectedtotheV pin. OUT Figure24. ImprovingremoteloadregulationusingLP3876 SHUTDOWN OPERATION A CMOS Logic level signal at the shutdown ( SD) pin will turn-off the regulator. Pin SD must be actively terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tiedtoVinifnotused. DROPOUT VOLTAGE The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the nominal output voltage. For CMOS LDOs, the dropout voltage is the product of the load current and theRds(on)oftheinternalMOSFET. Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com REVERSE CURRENT PATH The internal MOSFET in LP3873 and LP3876 has an inherent parasitic diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is pulledabovetheinputinanapplication,thencurrentflowsfromtheoutputtotheinputastheparasiticdiodegets forwardbiased.Theoutputcanbepulledabovetheinputaslongasthecurrentintheparasiticdiodeislimitedto 200mAcontinuousand1Apeak. POWER DISSIPATION/HEATSINKING LP3873 and LP3876 can deliver a continuous current of 3A over the full operating temperature range. A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operatingconditions.Thetotalpowerdissipationofthedeviceisgivenby: P =(V −V )I +(V )I D IN OUT OUT IN GND whereI istheoperatinggroundcurrentofthedevice(specifiedunderElectricalCharacteristics). GND The maximum allowable temperature rise (T ) depends on the maximum ambient temperature (T ) of the Rmax Amax application,andthemaximumallowablejunctiontemperature(T ): Jmax T =T −T Rmax Jmax Amax The maximum allowable value for junction to ambient Thermal Resistance, θ , can be calculated using the JA formula: θ =T /P JA Rmax D LP3873 and LP3876 are available in TO-220 and DDPAK/TO-263 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow. If the maximum allowable value of θ calculated above is ≥ JA 60 °C/W for TO-220 package and ≥ 60 °C/W for DDPAK/TO-263 package no heatsink is needed since the package can dissipate enough heat to satisfy these requirements. If the value for allowable θ falls below these JA limits,aheatsinkisrequired. HEATSINKING TO-220 PACKAGE The thermal resistance of a TO-220 package can be reduced by attaching it to a heat sink or a copper plane on a PC board. If a copper plane is to be used, the values of θ will be same as shown in next section for TO263 JA package. Theheatsinktobeusedintheapplicationshouldhaveaheatsinktoambientthermalresistance, θ ≤θ −θ −θ . HA JA CH JC In this equation, θ is the thermal resistance from the case to the surface of the heat sink and θ is the thermal CH JC resistance from the junction to the surface of the case. θ is about 3°C/W for a TO-220 package. The value for JC θ depends on method of attachment, insulator, etc. θ varies between 1.5°C/W to 2.5°C/W. If the exact value CH CH isunknown,2°C/Wcanbeassumed. HEATSINKING DDPAK/TO-263 PACKAGE The DDPAK/TO-263 package uses the copper plane on the PCB as a heatsink. The tab of these packages are solderedtothecopperplaneforheatsinking.Figure25showsacurvefortheθ ofDDPAK/TO-263packagefor JA different copper area sizes, using a typical PCB with 1 ounce copper and no solder mask over the copper area forheatsinking. 14 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 www.ti.com SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 Figure25. θ vsCopper(1Ounce)AreaforDDPAK/TO-263package JA As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. The minimumvalueforθ fortheDDPAK/TO-263packagemountedtoaPCBis32°C/W. JA Figure 26 shows the maximum allowable power dissipation for DDPAK/TO-263 packages for different ambient temperatures,assumingθ is35°C/Wandthemaximumjunctiontemperatureis125°C. JA Figure26. MaximumpowerdissipationvsambienttemperatureforDDPAK/TO-263package Copyright©2002–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP3873 LP3876

LP3873, LP3876 SNVS220E–NOVEMBER2002–REVISEDAPRIL2013 www.ti.com REVISION HISTORY ChangesfromRevisionD(April2013)toRevisionE Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 15 16 SubmitDocumentationFeedback Copyright©2002–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3873 LP3876

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3873ES-1.8/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -1.8 LP3873ES-2.5 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3873ES TO-263 -2.5 LP3873ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -2.5 LP3873ES-3.3 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3873ES TO-263 -3.3 LP3873ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -3.3 LP3873ES-5.0/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -5.0 LP3873ESX-1.8/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -1.8 LP3873ESX-3.3 NRND DDPAK/ KTT 5 500 TBD Call TI Call TI -40 to 125 LP3873ES TO-263 -3.3 LP3873ESX-3.3/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -3.3 LP3873ESX-5.0/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3873ES TO-263 Exempt) -5.0 LP3876ES-1.8/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -1.8 LP3876ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -2.5 LP3876ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -3.3 LP3876ES-5.0/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -5.0 LP3876ESX-1.8/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -1.8 LP3876ESX-2.5/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3876ES TO-263 Exempt) -2.5 LP3876ET-1.8/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3876ET & no Sb/Br) -1.8 Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3876ET-2.5/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3876ET & no Sb/Br) -2.5 LP3876ET-3.3/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3876ET & no Sb/Br) -3.3 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3873ESX-1.8/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3873ESX-3.3 DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3873ESX-3.3/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3873ESX-5.0/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3876ESX-1.8/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3876ESX-2.5/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP3873ESX-1.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3873ESX-3.3 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3873ESX-3.3/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3873ESX-5.0/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3876ESX-1.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3876ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 PackMaterials-Page2

MECHANICAL DATA NDH0005D www.ti.com

MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.com

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