Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

F L S 0 1 June 2013 1 6 — M O S F FLS0116 E T MOSFET Integrated Smart LED Lamp Driver IC with In t e PFC Function g r a t e d S m Features Description a r t  Built-in MOSFET(1 A / 550 V) The FLS0116 LED lamp driver is a simple IC with L  Digitally Implemented Active-PFC Function integrated MOSFET and PFC function. The special E “adopted digital” technique automatically detects input D  No Additional Circuit for Achieving High PF voltage condition and sends an internal reference signal L a  Application Input Range: 80 VAC ~ 308 VAC to achieve high power factor. When AC input is applied m to the IC, the PFC function is automatically enabled.  Built-In HV Supplying Circuit: Self Biasing When DC input is applied to the IC, the PFC function is p D  AOCP Function with Auto-Restart Mode automatically disabled. The FLS0116 does not need a r  Built-In Over-Temperature Protection (OTP) bulk (electrolytic) capacitor for supply rail stability, which iv  Cycle-by-Cycle Current Limit significantly improves LED lamp life. er  Current Sense Pin Open Protection IC  Low Operating Current: 0.85 mA (Typical) L1 w  Under-Voltage Lockout with 5 V Hysteresis D1 LED ith  PPrrooggrraammmmaabbllee OLEsDci lClautirorne nFtr equency Fuse CFSLSD0R1A1I6N L3 PFC BD  Analog Dimming Function C1 C2 VGCNCD HV F  Soft-Start Function RT ADIM u R1 C3 n  Precise Internal Reference: ±3% R2 C4 c L2 ti o n Applications Figure 1. Typical Application  LED Lamp for Decorative Lighting  LED Lamp for Low-Power Lighting Fixture Ordering Information Operating Part Number Package Packing Method Temperature Range 7-Lead, Small-Outline Integrated Circuit (SOIC), FLS0116MX -40°C to +125°C Tape & Reel JEDEC MS-012, .150-inch, Narrow Body © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2

F L Block Diagram S 0 1 1 6 — VCC 2 7 HV VCC JFET M ZCD UVLO O time S IAD ZCD 8 DRAIN FE T ADIM 5 DAC I TSD n Soft-Start t Digital Block e g RT 4 Oscillator R Q ra t - e Reference + S d S LEB 1 CS m GND 3 LeaBdlainngk-iEngdge a FLS0116 r - t + AOCP L 2.5V E D Figure 2. Block Diagram L a m Pin Configuration p D r i v e r CS DRAIN I C F w L VCC S HV ith 0 P 1 F GND 1 C 6 F RT ADIM un c t i o n Figure 3. Pin Configuration Pin Definitions Pin # Name Description Current Sense. Limits output current, depending on the sensing resistor voltage. The CS pin is 1 CS also used to set the LED current regulation. 2 VCC VCC. Supply pin for stable IC operation; ZCD signal detection used for accurate PFC function. 3 GND GROUND. Ground for the IC RT. Programmable operating frequency using an external resistor; the IC has pre-fixed 4 RT frequency when this pin is open or floating. Analog Dimming. Connect to the internal current source. Use to change the output current 5 ADIM using an external resistor. If ADIM is not used, connect a 0.1 µF bypass capacitor between the ADIM and GND. 7 HV High Voltage. Connect to the high-voltage line and supply current to the IC. 8 DRAIN DRAIN. The drain pin of internal MOSFET © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 2

F L Absolute Maximum Ratings S 0 1 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be 1 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 6 In addition, extended exposure to stresses above the recommended operating conditions may affect device — reliability. The absolute maximum ratings are stress ratings only. M O Symbol Parameter Min. Max. Unit S F VCC IC Supply Voltage 20 V E T HV High Voltage Sensing 550 V I n DRAIN Internal Drain Voltage 550 V t e V Analog Dimming 5 V g ADIM r a VRT RT Pin Voltage 5 V t e V Allowable Current Sensing Detection Voltage 5 V d CS S TA Operating Ambient Temperature Range -40 +125 C m TJ Operating Junction Temperature -40 +150 C ar t TSTG Storage Temperature Range -65 +150 C L E θJA Thermal Resistance Junction-Air(1,2) 135 C/W D P Power Dissipation 660 mW L D a m Human Body Model, JESD22-A114 2000 ESD Electrostatic Discharge Capability V p Charged Device Model, JESD22-C101 1000 D r Notes: i v 1. Thermal resistance test board. Size: 76.2 mm x 114.3 mm x 1.6 mm (1S0P); JEDEC standard: JESD51-2, JESD51- e 3. r I 2. Assume no ambient airflow. C w i t h P F C F u n c t i o n © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 3

F L Electrical Characteristics S 0 1 Typical values are at T = +25°C. Specifications to -40°C ~ 125°C are guaranteed by design based on final A 1 characterization results. 6 — Symbol Parameter Condition Min. Typ. Max. Unit M V Bias Section O CC S VCC VCC Regulator Output Voltage VHV=100 VDC 14.0 15.5 17.0 V F E VCCST+ UVLO Positive-Going Threshold VCC Increasing 12 13 14 V T VCCST- UVLO Negative-Going Threshold VCC Decreasing 7 8 9 V In t e V UVLO Hysteresis 4 5 6 V CCHYS g r IHV HV Pin Current VHV=100 VDC, RT=Open 0.85 1.20 mA a t e I Startup Current 120 150 μA ST d Switching Section S m R =5.95 kΩ 200 250 300 kHz a T r t fOSC Operating Frequency RT=87 kΩ 16 20 24 kHz LE D RT Open 40.5 45.0 49.5 kHz L a tMIN Minimum On Time(3) 400 ns m p DMAX Maximum Duty Cycle 50 % D tLEB Leading Edge Blanking Time(3) 350 ns riv e VRT Voltage Reference of RT Pin 1.5 V r I C Soft-Start Section w DC Mode 48 60 72 ms i tss Soft-Start Time(3) th AC Mode 7 Periods P F Reference Section C V DC Mode 0.354 0.365 0.376 F CS1 Internal Reference Voltage of CS Pin V u V AC Mode(3) 0.485 0.500 0.515 n CS2 c t Protection Section io n OVPVCC Over-Voltage Protection on VCC Pin 17.7 18.7 19.7 V V Abnormal OCP Level at CS Pin(3) 2.5 V AOCP t Abnormal Detection Time(3) 70 ns AOCP T Thermal Shutdown Threshold(3) 140 150 °C TSDH Thermal Shutdown Threshold TTSDHY Hysteresis(3) 50 °C Dimming Section Analog Dimming Positive Going VADIM(ST+) Threshold(3) 3.15 3.50 3.85 V Analog Dimming Negative Going VADIM(ST-) Threshold(3) 0.50 0.75 V I Internal Current Source for ADIM Pin 9 12 15 μA AD Continued on the following page… © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 4

F L Electrical Characteristics (Continued) S 0 1 Typical values are at T = +25°C. Specifications to -40°C ~ 125°C are guaranteed by design based on final A 1 characterization results. 6 — Symbol Parameter Condition Min. Typ. Max. Unit M MOSFET Section O S BVDSS Breakdown Voltage VCC=0 V, ID=250 μA 550 V F E ILKMOS Internal MOSFET Leakage Current VDS=550 VDC, VGS=0 V 250 μA T RON(ON) Drain-Source On Resistance(3) VTCG=S=2150°C V , VDGS=0 V, 7.3 10.0 Ω Inte g CISS Input Capacitance(3) VGS=0 V,VDS=25 V, f=1 MHz 135 pF ra COSS Output Capacitance(3) VGS=0 V,VDS=25 V, f=1 MHz 21 pF te d CRSS Reverse Transfer Capacitance(3) VGS=0 V,VDS=25 V, f=1 MHz 3.2 pF S t Turn-On Delay(3) V =350 V, I =1 A 10 ns m d(ON) DD D a t Rise Time(3) V =350 V, I =1 A 13.4 ns r r DD D t t Turn-Off Delay(3) V =350 V, I =1 A 14.9 ns L d(OFF) DD D E t Fall Time(3) V =350 V, I =1 A 36.8 ns D f DD D L Note: a 3. These parameters, although guaranteed, are not 100% tested in production. m p D r i v e r I C w i t h P F C F u n c t i o n © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 5

F L Functional Description S 0 1 The FLS0116 is a basic PWM controller for buck power for the IC, has voltage ripple as well as the 1 converter topology in Continuous Conduction Mode rectification voltage after bridge, changing voltage level 6 (CCM) with an intelligent PFC function that uses a according to the V capacitor value. Using this kind of — CC digital control algorithm. An internal self-biasing circuit voltage fluctuation on the VCC pin, the IC can detect M uses the high-voltage switching device. The IC does not the time reference and create the internal ZCD signal. O need an auxiliary powering path to the VCC pin typical For precise and reliable internal reference for input S in flyback control ICs or PSR product family. F voltage signal, the FLS0116 uses a digital technique E When the input voltage applied to the HV pin is within (sigma/delta modulation) and creates a new internal T operating range (25 V to 500 V), the FLS0116 signal (DAC_OUT) that has the same phase as the I n maintains a 15.5 V DC voltage at the VCC pin for stable input voltage, as shown in Figure 5. This signal enters t e operation. The UVLO block functions such that when the final comparator and is compared with current g the V voltage rises higher than V , the internal information from the sensing resistor. r CC CCST+ a UVLO block releases and starts operation. Otherwise, t e the VCC goes down to the VCCST- and IC operation stops. Vbridge Bridge Diode d Normally, the hysteresis function provides stable Output Voltage S operation even if the input voltage is operating under m very noisy or unstable circumstances. InpuPt eVaokltage JFEVTo ltOaugteput a r t The FLS0116 has a “smart” internal digital block for t L determining input condition: AC or DC. When an AC VCC VDD Charging Voltage E source with 50 Hz or 60 Hz is applied to the IC, the IC JFET Output Voltage D t automatically changes its internal reference signal, L ZCD a which is similar to input signal, for creating high power m t factor. When a DC source connects to the IC, the p internal reference immediately changes to DC. DAC_OUT D r i Soft-Start Function t v e The FLS0116 has an internal soft-start function to Figure 5. Internal PFC Function r I reduce inrush current at startup. When the IC starts C operation following an internal sequence, the internal Self-Biasing Function w reference slowly increases for a pre-determined fixed it The self-biasing function, using an HV device, can h time. After this transient period, the internal reference supply enough operating current to the IC and P goes to a steady-state level. In this time, the IC guarantee similar startup time across the whole input F continually tries to find phase information from the VCC C voltage range (80 V~308 V ). However, self-biasing pin. If the IC succeeds in getting phase information, it AC F has a weakness in high-voltage condition. Normally, automatically follows a similar shape reference made u the HV device acts as constant current source, so the n during the transient times, 7 periods. If not, the IC has a internal HV device has power loss when high input c DC reference level. t voltage connects to the HV pin. This power loss is io proportional to input voltage. To reduce this power n Vbridge loss, one of the possible solutions is an additional resistor between the input voltage source and the HV pin, as shown in Figure 6. ILED L1 LED D1 T/2 = 1/(Input Frequency * 2) 7*(T/2) Normal Operation Fuse FLS0116 L3 CS DRAIN Figure 4. Soft-Start Function in AC Input Mode BD C1 C2 VCC HV GND R3 RT ADIM Internal PFC Function: How to Achieve R1 C3 R2 C4 High Power Factor L2 The FLS0116 has a simple, “smart”, internal PFC function that does not require additional pins for Figure 6. High-Voltage Application detecting input phase information or an electrolytic capacitor for supply voltage stabilization. For achieving high PF, the FLS0116 does not use the rectification capacitor after the bridge diode. This is important because the IC instead uses fluctuation in the signal on the VCC pin. Basically, the VCC pin, which is supplies © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 6

F L Dimming Function In DCM Mode, inductance is: S 0 The FLS0116 uses the ADIM pin for analog or 0 V to nV (1D ) 1 10 V dimming by using a resistive divider. The peak Lm  ff i min [H] (2) 16 voltage of internal reference, which is DAC_OUT signal s rip — in Figure 5, is changed by the VADIM level, as shown in If the peak current is fixed at 350 mApk, the M Figure 7, and has different peak level according to the formula for the peak current is: O operating mode. I i irip [A] (3) SF LED(ave.peak) con 2 E VDAC_OUT T AC Mode I 0.5V In FL7701, the LED RMS current determines the n inductance parameter. To drive for CCM Mode, define te 0. 365 V DC Mode LED RMS current first, as: g r a I ILED(ave.peak) [A] (4) te LED(rms) 2 d S Substituting Equation (2) for Equation (4), the m 0. 5 V 3 . 5V VA DIM inductance of inductor is obtained. ar t Figure 7. VADIM vs. VDAC_OUT(peak) L E Inductor Design VIN D L The fixed internal duty ratio range is below 50%, or Π 2Π 3Π 4Πt a m around 400 ns, from a timing point of view. The range is p dependent on the input voltage and number of LEDs in Vbridge OBurtipdugte VDoilotadgee D its string. InpuPt eVaokltage VDDV Colhtaagrgeing ri v Minimum duty is calculated as: ZCD t e r t D  nVf (1) DAC IC min V w in(max) t where: VLED ith η = efficiency of system; t P VIN(max)= maximum input voltage; Vdrain InpuPt eVaokltage F V = forward drop voltage of LED; and C f n = LED number in series connection. F t u ILED InpuPt eVaokltage n c Current Limit t i o Average t n LED Current IFRD ∆irip t IMOSFET ton toff Dmin1-Dmin t (a) DCM Mode Iinput Current peak at LED current maximum point (ILED(peak)) Current peak at LED average Average t current maximum point LED Current (ILED(ave)) (ILED(ave.peak)) DCM ∆i 0.5∆i DCM T/2 = 1/(Input Frequency * 2) T = 1/Input Ferquency 0.5∆i Figure 9. Typical Performance Characteristics CCM Current min at LED current maximum point (ILED(min)) Dmin ton toff 1-Dmin (b) CCM Mode Figure 8. DCM and CCM Operation © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 7

F L S Example Application Circuits 0 1 1 6 — M L1 O LED S D1 F E Fuse FLS0116 L3 T CS DRAIN In BD t C1 C2 VCC HV e g GND r a R1 C3 RT ADIM te R2 C4 d L2 S m a r Figure 10. Application Circuit without Electrolytic Capacitor t L E D L L1 a LED m ZD C5 p D1 D Fuse FLS0116 L3 riv CS DRAIN e BD C1 C2 VCC HV r I C GND w RT ADIM R1 C3 it R2 C4 h P L2 F C Figure 11. Application Circuit with Electrolytic Capacitor F u n c t i o n L1 FLS0116 CS DRAIN Fuse VCC HV R1 BD GND C1 C2 RT ADIM L3 C4 R2 LED C5 C3 D1 ZD L2 Figure 12. Application Circuit of High-Side Operation with Electrolytic Capacitor © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 8

F L S 0 Typical Characteristics 1 1 6 — M 17.0 6.0 O S 16.5 F 5.5 E CC[V] 1156..50 CC [V]HV 5.0 T Int V V e g 15.0 r 4.5 a t 14.5 e d 14.0 4.0 S -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 m Temperature [°C] Temperature [°C] a rt L E Figure 13. V vs. Temperature Figure 14. V vs. Temperature D CC CCHYS L a m p 14.0 150 D r 140 i v 13.5 e 130 r CC[V]ST+13.0 I[A]ST 120 IC w V i 110 th 12.5 P 100 F C 12.0-40 -20 0 20 40 60 80 100 120 90-40 -20 0 20 40 60 80 100 120 F u Temperature [°C] Temperature [°C] n c t i o n Figure 15. VCCST+ vs. Temperature Figure 16. IST vs. Temperature 9.0 48 47 8.5 VCC[V]ST- 8.0 f [kHz]OSC 4456 7.5 44 7.0 43 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 17. V vs. Temperature Figure 18. f vs. Temperature (RT=Open) CCST- OSC © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 9

F L Typical Characteristics S 0 1 1 6 — 24 1.7 M O 22 1.6 S F f [kHz]OSC 20 V[V] RT1.5 ET In t e 18 1.4 g r a t e 16-40 -20 0 20 40 60 80 100 120 1.3-40 -20 0 20 40 60 80 100 120 d Temperature [°C] Temperature [°C] S m a r t Figure 19. fOSC vs. Temperature (RT=87kΩ) Figure 20. VRT vs. Temperature LE D L a m 300 0.375 p D 280 0.370 ri v e f [kHz]OSC 224600 V[V] CS1 00..336605 r IC w i t h 220 0.355 P F 200 0.350 C -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] F u n c t i o Figure 21. fOSC vs. Temperature (RT=5.95kΩ) Figure 22. VCS vs. Temperature n 52 19.5 51 19.0 D [%]MAX 50 VP [V] VCC18.5 O 49 18.0 48 17.5 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 23. D vs. Temperature Figure 24. OVP vs. Temperature MAX VCC © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 10

F L Typical Characteristics S 0 1 1 6 — 15 M 640 O 14 S 620 F I[A]AD 1123 BV [V]DSS 600 ET In t 11 e 580 g r 10 a 560 te 9 d -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 S Temperature [°C] Temperature [°C] m a r t L Figure 25. I vs. Temperature Figure 26. BV vs. Temperature E AD DSS D L a m p 0.5 D r i v 0.4 e r I A] 0.3 C  I [DSS 0.2 with P 0.1 F C F 0.0 u -40 -20 0 20 40 60 80 100 120 n Temperature [°C] c t i o n Figure 27. I vs. Temperature DSS © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 11

F L Physical Dimensions S 0 1 1 6 — 5.00 4.80 A 3.81 M 0.65TYP 3.81 O S 7 6 5 F B E 1.75TYP T 6.20 In 5.80 4.00 3.85 7.35 t 3.80 e g r a t e 1 2 3 4 d PIN #1 1.27 0.25 C B A S 1.27 m (0.33) TOP VIEW a LAND PATTERN RECOMMENDATION r t L E SEE DETAIL A D L 0.25 0.25 a 0.10 0.19 m p 1.75 MAX C D OPTION A - BEVEL EDGE r i 0.51 0.10 C v e 0.33 r FRONT VIEW I C w OPTION B - NO BEVEL EDGE i t h P F 0.50 x 45° C R0.10 0.25 GAGE PLANE NOTES: F A) THIS PACKAGE DOES NOT FULLY CONFORMS u R0.10 0.36 TO JEDEC MS-012 VARIATION AA. n c 8° B) ALL DIMENSIONS ARE IN MILLIMETERS. tio 0° C) DIMENSIONS DO NOT INCLUDE MOLD n FLASH OR BURRS. 0.90 SEATING PLANE 0.406 (1.04) D) DRAWING FILENAME : M07Brev3 DETAIL A SCALE: 2:1 Figure 28. 7-Lead, Small-Outline Integrated Circuit (SOIC), JEDEC MS-012, .150-Inch Narrow Body Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 12

F L S 0 1 1 6 — M O S F E T I n t e g r a t e d S m a r t L E D L a m p D r i v e r I C w i t h P F C F u n c t i o n © 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com FLS0116 • Rev. 1.0.2 13

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