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ICGOO电子元器件商城为您提供ADUM1200CRZ由Analog设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 ADUM1200CRZ价格参考。AnalogADUM1200CRZ封装/规格:数字隔离器, General Purpose Digital Isolator 2500Vrms 2 Channel 25Mbps 25kV/µs CMTI 8-SOIC (0.154", 3.90mm Width)。您可以下载ADUM1200CRZ参考资料、Datasheet数据手册功能说明书,资料中有ADUM1200CRZ 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

隔离器

ChannelType

单向

描述

IC DGTL ISO 2CH LOGIC 8SOIC数字隔离器 Digital Dual-CH

产品分类

数字隔离器

IsolatedPower

品牌

Analog Devices

产品手册

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产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

接口 IC,数字隔离器,Analog Devices ADUM1200CRZiCoupler®

数据手册

点击此处下载产品Datasheet

产品型号

ADUM1200CRZ

PCN组件/产地

点击此处下载产品Datasheet

PulseWidthDistortion(Max)

3ns

上升/下降时间(典型值)

2.5ns, 2.5ns

产品种类

数字隔离器

传播延迟tpLH/tpHL(最大值)

45ns, 45ns

传播延迟时间

45 ns

供应商器件封装

8-SOIC N

共模瞬态抗扰度(最小值)

25kV/µs

包装

管件

商标

Analog Devices

安装风格

SMD/SMT

封装

Tube

封装/外壳

8-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-8

工作温度

-40°C ~ 105°C

工厂包装数量

98

技术

磁耦合

数据速率

25Mbps

最大工作温度

+ 125 C

最大数据速率

25 Mb/s

最小工作温度

- 40 C

标准包装

98

电压-电源

2.7 V ~ 5.5 V

电压-隔离

2500Vrms

电源电压-最大

5.5 V

电源电压-最小

2.7 V

电源电流

0.6 mA

类型

General Purpose

系列

ADUM1200

绝缘电压

2.5 kVrms

脉宽失真(最大)

3ns

视频文件

http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=2219593469001http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=2219593470001http://www.digikey.cn/classic/video.aspx?PlayerID=1364138032001&width=640&height=505&videoID=2219614223001

输入-输入侧1/输入侧2

2/0

通道数

2

通道数量

2 Channel

通道类型

单向

隔离式电源

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PDF Datasheet 数据手册内容提取

Dual-Channel Digital Isolators Data Sheet ADuM1200/ADuM1201 FEATURES The typical optocoupler concerns regarding uncertain current transfer ratios, nonlinear transfer functions, and temperature and Narrow body, RoHS-compliant, SOIC 8-lead package lifetime effects are eliminated with the simple iCoupler digital Low power operation interfaces and stable performance characteristics. The need for 5 V operation external drivers and other discrete components is eliminated 1.1 mA per channel maximum at 0 Mbps to 2 Mbps with these iCoupler products. Furthermore, iCoupler devices 3.7 mA per channel maximum at 10 Mbps consume one-tenth to one-sixth the power of optocouplers at 8.2 mA per channel maximum at 25 Mbps comparable signal data rates. 3 V operation 0.8 mA per channel maximum at 0 Mbps to 2 Mbps The ADuM1200/ADuM1201 isolators provide two independent 2.2 mA per channel maximum at 10 Mbps isolation channels in a variety of channel configurations and 4.8 mA per channel maximum at 25 Mbps data rates (see the Ordering Guide). Both devices operate with Bidirectional communication the supply voltage on either side ranging from 2.7 V to 5.5 V, 3 V/5 V level translation providing compatibility with lower voltage systems as well as High temperature operation: 125°C enabling a voltage translation functionality across the isolation High data rate: dc to 25 Mbps (NRZ) barrier. In addition, the ADuM1200/ADuM1201 provide low Precise timing characteristics pulse width distortion (<3 ns for CR grade) and tight channel- 3 ns maximum pulse width distortion to-channel matching (<3 ns for CR grade). Unlike other 3 ns maximum channel-to-channel matching optocoupler alternatives, the ADuM1200/ADuM1201 isolators High common-mode transient immunity: >25 kV/μs have a patented refresh feature that ensures dc correctness in Safety and regulatory approvals the absence of input logic transitions and during power- UL recognition up/power-down conditions. 2500 V rms for 1 minute per UL 1577 The ADuM1200W and ADuM1201W are automotive grade CSA Component Acceptance Notice 5A versions qualified for 125°C operation. See the Automotive VDE Certificate of Conformity Products section for more information. DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 V = 560 V peak FUNCTIONAL BLOCK DIAGRAMS IORM Qualified for automotive applications APPLICATIONS VDD1 1 8 VDD2 Size-critical multichannel isolation VIA 2 ENCODE DECODE 7 VOA SPI interface/data converter isolation VIB 3 ENCODE DECODE 6 VOB RDSig-2it3a2l /fRieSl-d4 b2u2s/R isSo-4la8t5io tnra nsceiver isolation GND1 4 5 GND2 04642-001 Hybrid electric vehicles, battery monitor, and motor drive Figure 1. ADuM1200 Functional Block Diagram GENERAL DESCRIPTION VDD1 1 8 VDD2 The ADuM1200/ADuM12011 are dual-channel digital isolators based on the Analog Devices, Inc., iCoupler® technology. VOA 2 DECODE ENCODE 7 VIA Combining high speed CMOS and monolithic transformer VIB 3 ENCODE DECODE 6 VOB tpeecrhfonromloagniecse, cthheasrea citseorliasttiiocns scuopmerpioonr etnot as lpterronvaitdiev eosu, tssutcahn daisn g GND1 4 5 GND2 04642-002 optocouplers. Figure 2. ADuM1201 Functional Block Diagram By avoiding the use of LEDs and photodiodes, iCoupler devices remove the design difficulties commonly associated with opto- couplers. 1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Rev. K Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2004–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADuM1200/ADuM1201 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Insulation and Safety-Related Specifications .......................... 19 Applications ....................................................................................... 1 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 General Description ......................................................................... 1 Insulation Characteristics ......................................................... 20 Functional Block Diagrams ............................................................. 1 Recommended Operating Conditions .................................... 20 Revision History ............................................................................... 3 Absolute Maximum Ratings ......................................................... 21 Specifications ..................................................................................... 4 ESD Caution................................................................................ 21 Electrical Characteristics—5 V, 105°C Operation ................... 4 Pin Configurations and Function Descriptions ......................... 22 Electrical Characteristics—3 V, 105°C Operation ................... 6 Typical Performance Characteristics ........................................... 23 Applications Information .............................................................. 24 Electrical Characteristics—Mixed 5 V/3 V or 3 V/5 V, 105°C Operation ....................................................................................... 8 PCB Layout ................................................................................. 24 Electrical Characteristics—5 V, 125°C Operation ................. 11 Propagation Delay-Related Parameters ................................... 24 Electrical Characteristics—3 V, 125°C Operation ................. 13 DC Correctness and Magnetic Field Immunity........................... 24 Electrical Characteristics—Mixed 5 V/3 V, 125°C Operation Power Consumption .................................................................. 25 ....................................................................................................... 15 Insulation Lifetime ..................................................................... 25 Electrical Characteristics—Mixed 3 V/5 V, 125°C Operation Outline Dimensions ....................................................................... 27 ....................................................................................................... 17 Ordering Guide .......................................................................... 27 Package Characteristics ............................................................. 19 Automotive Products ................................................................. 28 Regulatory Information ............................................................. 19 Rev. K | Page 2 of 28

Data Sheet ADuM1200/ADuM1201 REVISION HISTORY 9/2016—Rev. J to Rev. K 8/2007—Rev. C to Rev. D Changes to Endnote 1 and Endnote 2, Table 9 ............................ 19 Updated VDE Certification Throughout ....................................... 1 Changes to Features, Note 1, Figure 1, and Figure 2 .................... 1 5/2015—Rev. I to Rev. J Changes to Table 3 ............................................................................ 7 Changes to Table 9 .......................................................................... 19 Changes to Regulatory Information Section ............................... 10 Change to Tracking Resistance (Comparative Tracking Index) Added Table 10 ................................................................................ 12 Parameter and Isolation Group Parameter, Table 10 .................. 20 Added Insulation Lifetime Section ............................................... 16 Updated Outline Dimensions........................................................ 18 3/2012—Rev. H to Rev. I Changes to Ordering Guide ........................................................... 18 Created Hyperlink for Safety and Regulatory Approvals Entry in Features Section ................................................................. 1 2/2006—Rev. B to Rev. C Change to General Description Section ......................................... 1 Updated Format ................................................................. Universal Change to PCB Layout Section ..................................................... 24 Added Note 1 ..................................................................................... 1 Moved Automotive Products Section ........................................... 28 Changes to Absolute Maximum Ratings...................................... 12 Changes to DC Correctness and Magnetic Field 1/2009—Rev. G to Rev. H Immunity Section............................................................................ 15 Changes to Table 5, Switching Specifications Parameter ........... 13 Changes to Table 6, Switching Specifications Parameter ........... 15 9/2004—Rev. A to Rev. B Changes to Table 7, Switching Specifications Parameter ........... 17 Changes to Table 5 .......................................................................... 10 9/2008—Rev. F to Rev. G 6/2004—Rev. 0 to Rev. A Changes to Table 9 .......................................................................... 19 Changes to Format ............................................................. Universal Changes to Table 13 ........................................................................ 21 Changes to General Description ..................................................... 1 Changes to Ordering Guide ........................................................... 27 Changes to Electrical Characteristics—5 V Operation ................ 3 Changes to Electrical Characteristics—3 V Operation ................ 5 3/2008—Rev. E to Rev. F Changes to Electrical Characteristics—Mixed 5 V/3 V or Changes to Features Section ............................................................ 1 3 V/5 V Operation ............................................................................ 7 Changes to Applications Section ..................................................... 1 Added Table 4 .................................................................................. 11 4/2004—Revision 0: Initial Version Added Table 5 .................................................................................. 13 Added Table 6 .................................................................................. 15 Added Table 7 .................................................................................. 17 Changes to Table 12 ........................................................................ 20 Changes to Table 13 ........................................................................ 21 Added Automotive Products Section ........................................... 26 Changes to Ordering Guide ........................................................... 27 11/2007—Rev. D to Rev. E Changes to Note 1 ............................................................................. 1 Added ADuM1200/ADuM1201AR Change vs. Temperature Parameter ........................................................................................... 3 Added ADuM1200/ADuM1201AR Change vs. Temperature Parameter ........................................................................................... 5 Added ADuM1200/ADuM1201AR Change vs. Temperature Parameter ........................................................................................... 8 Rev. K | Page 3 of 28

ADuM1200/ADuM1201 Data Sheet SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION All voltages are relative to the respective ground; 4.5 V ≤ V ≤ 5.5 V, 4.5 V ≤ V ≤ 5.5 V; all minimum/maximum specifications apply DD1 DD2 over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C, V = V = 5 V; this A DD1 DD2 does not apply to the ADuM1200W and ADuM1201W automotive grade products. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, Quiescent IDDI (Q) 0.50 0.60 mA Output Supply Current per Channel, Quiescent IDDO (Q) 0.19 0.25 mA ADuM1200 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.3 2.0 mA 5 MHz logic signal freq. 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 10 13 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq. ADuM1201 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq. 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 5.0 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 4.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 50 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Change vs. Temperature 11 ps/°C Propagation Delay Skew5 tPSK 100 ns Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 10 ns Rev. K | Page 4 of 28

Data Sheet ADuM1200/ADuM1201 Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201BR Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 20 50 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching 3 Codirectional Channels6 tPSKCD ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns ADuM1200/ADuM1201CR Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 45 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching 3 ns Codirectional Channels6 tPSKCD Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.2 Mbps Dynamic Supply Current per Channel8 Input IDDI (D) 0.19 mA/ Mbps Output IDDO (D) 0.05 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 5 of 28

ADuM1200/ADuM1201 Data Sheet ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION All voltages are relative to the respective ground; 2.7 V ≤ V ≤ 3.6 V, 2.7 V ≤ V ≤ 3.6 V; all minimum/maximum specifications apply DD1 DD2 over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C, V = V = 3.0 V; this A DD1 DD2 does not apply to ADuM1200W and ADuM1201W automotive grade products. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, Quiescent IDDI (Q) 0.26 0.35 mA Output Supply Current per Channel, Quiescent IDDO (Q) 0.11 0.20 mA ADuM1200 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 0.7 1.1 mA 5 MHz logic signal freq. 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 5.2 7.7 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq. ADuM1201 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq. 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 3.0 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 2.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 50 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Change vs. Temperature 11 ps/°C Propagation Delay Skew5 tPSK 100 ns Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 10 ns Rev. K | Page 6 of 28

Data Sheet ADuM1200/ADuM1201 Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201BR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 20 60 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 22 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 22 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns ADuM1200/ADuM1201CR Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 55 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 16 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 16 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.1 Mbps Dynamic Supply Current per Channel8 Input IDDI (D) 0.10 mA/ Mbps Output IDDO (D) 0.03 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 7 of 28

ADuM1200/ADuM1201 Data Sheet ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OR 3 V/5 V, 105°C OPERATION All voltages are relative to the respective ground; 5 V/3 V operation: 4.5 V ≤ V ≤ 5.5 V, 2.7 V ≤ V ≤ 3.6 V. 3 V/5 V operation: DD1 DD2 2.7 V ≤ V ≤ 3.6 V, 4.5 V ≤ V ≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operating range, DD1 DD2 unless otherwise noted; all typical specifications are at T = 25°C; V = 3.0 V, V = 5.0 V; or V = 5.0 V, V = 3.0 V; this does not A DD1 DD2 DD1 DD2 apply to ADuM1200W and ADuM1201W automotive grade products. Table 3. Parameter Symbol Min Typ Max Unit Test Conditions /Comments DC SPECIFICATIONS Input Supply Current per Channel, IDDI (Q) Quiescent 5 V/3 V Operation 0.50 0.6 mA 3 V/5 V Operation 0.26 0.35 mA Output Supply Current per Channel, IDDO (Q) Quiescent 5 V/3 V Operation 0.11 0.20 mA 3 V/5 V Operation 0.19 0.25 mA ADuM1200 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 5 V/3 V Operation 1.1 1.4 mA DC to 1 MHz logic signal freq. 3 V/5 V Operation 0.6 1.0 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 5 V/3 V Operation 0.2 0.6 mA DC to 1 MHz logic signal freq. 3 V/5 V Operation 0.5 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 5 V/3 V Operation 4.3 5.5 mA 5 MHz logic signal freq. 3 V/5 V Operation 2.2 3.4 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 5 V/3 V Operation 0.7 1.1 mA 5 MHz logic signal freq. 3 V/5 V Operation 1.3 2.0 mA 5 MHz logic signal freq. 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 5 V/3 V Operation 10 13 mA 12.5 MHz logic signal freq. 3 V/5 V Operation 5.2 7.7 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 5 V/3 V Operation 1.5 2.0 mA 12.5 MHz logic signal freq. 3 V/5 V Operation 2.8 3.4 mA 12.5 MHz logic signal freq. ADuM1201 Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 5 V/3 V Operation 0.8 1.1 mA DC to 1 MHz logic signal freq. 3 V/5 V Operation 0.4 0.8 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 5 V/3 V Operation 0.4 0.8 mA DC to 1 MHz logic signal freq. 3 V/5 V Operation 0.8 1.1 mA DC to 1 MHz logic signal freq. 10 Mbps (BR and CR Grades Only) VDD1 Supply Current IDD1 (10) 5 V/3 V Operation 2.8 3.5 mA 5 MHz logic signal freq. 3 V/5 V Operation 1.5 2.2 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 5 V/3 V Operation 1.5 2.2 mA 5 MHz logic signal freq. 3 V/5 V Operation 2.8 3.5 mA 5 MHz logic signal freq. Rev. K | Page 8 of 28

Data Sheet ADuM1200/ADuM1201 Parameter Symbol Min Typ Max Unit Test Conditions /Comments 25 Mbps (CR Grade Only) VDD1 Supply Current IDD1 (25) 5 V/3 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq. 3 V/5 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 5 V/3 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq. 3 V/5 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 VDD1 or VDD2 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201AR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 50 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Change vs. Temperature 11 ps/°C Propagation Delay Skew5 tPSK 50 ns Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 10 ns ADuM1200/ADuM1201BR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 15 55 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 22 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 22 ns Output Rise/Fall Time (10% to 90%) tR/tF 5 V/3 V Operation 3.0 ns 3 V/5 V Operation 2.5 ns ADuM1200/ADuM1201CR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 50 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 5 V/3 V Operation 3.0 ns 3 V/5 V Operation 2.5 ns Rev. K | Page 9 of 28

ADuM1200/ADuM1201 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions /Comments For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 5 V/3 V Operation 1.2 Mbps 3 V/5 V Operation 1.1 Mbps Input Dynamic Supply Current IDDI (D) per Channel8 5 V/3 V Operation 0.19 mA/ Mbps 3 V/5 V Operation 0.10 mA/ Mbps Output Dynamic Supply Current per IDDO (D) Channel8 5 V/3 V Operation 0.03 mA/ Mbps 3 V/5 V Operation 0.05 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 10 of 28

Data Sheet ADuM1200/ADuM1201 ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION All voltages are relative to the respective ground; 4.5 V ≤ V ≤ 5.5 V, 4.5 V ≤ V ≤ 5.5 V; all minimum/maximum specifications apply DD1 DD2 over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C, V = V = 5 V; this A DD1 DD2 applies to ADuM1200W and ADuM1201W automotive grade products. Table 4. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, IDDI (Q) 0.50 0.60 mA Quiescent Output Supply Current per Channel, IDDO (Q) 0.19 0.25 mA Quiescent ADuM1200W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.3 2.0 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 10 13 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq. ADuM1201W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 5.0 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 4.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 20 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Propagation Delay Skew5 tPSK 100 ns Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns Rev. K | Page 11 of 28

ADuM1200/ADuM1201 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 20 50 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 45 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.2 Mbps Dynamic Supply Current per Channel8 Input IDDI (D) 0.19 mA/ Mbps Output IDDO (D) 0.05 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 12 of 28

Data Sheet ADuM1200/ADuM1201 ELECTRICAL CHARACTERISTICS—3 V, 125°C OPERATION All voltages are relative to the respective ground; 3.0 V ≤ V ≤ 3.6 V, 3.0 V ≤ V ≤ 3.6 V. All minimum/maximum specifications apply DD1 DD2 over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C, V = V = 3.0 V; A DD1 DD2 this applies to ADuM1200W and ADuM1201W automotive grade products. Table 5. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, IDDI (Q) 0.26 0.35 mA Quiescent Output Supply Current per Channel, Quiescent IDDO (Q) 0.11 0.20 mA ADuM1200W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 0.7 1.1 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 5.2 7.7 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq. ADuM1201W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 3.0 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 2.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 20 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Propagation Delay Skew5 tPSK 100 ns Channel-to-Channel Matching6 tPSKCD/tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 3 ns Rev. K | Page 13 of 28

ADuM1200/ADuM1201 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 20 60 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 22 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 22 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns ADuM1200/ADuM1201WCR CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 55 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 16 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 16 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.1 Mbps Dynamic Supply Current per Channel8 Input IDDI (D) 0.10 mA/ Mbps Output IDDO (D) 0.03 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 14 of 28

Data Sheet ADuM1200/ADuM1201 ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION All voltages are relative to the respective ground; 5 V/3 V operation: 4.5 V ≤ V ≤ 5.5 V, 3.0 V ≤ V ≤ 3.6 V. 3 V/5 V operation; all DD1 DD2 minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C; V = 5.0 V, V = 3.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products. A DD1 DD2 Table 6. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, IDDI (Q) 0.50 0.6 mA Quiescent Output Supply Current per Channel, IDDO (Q) 0.11 0.20 mA Quiescent ADuM1200W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 1.1 1.4 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.2 0.6 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 4.3 5.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 0.7 1.1 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 10 13 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 1.5 2.0 mA 12.5 MHz logic signal freq. ADuM1201W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 2.8 3.5 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.5 2.2 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 VDD1 or VDD2 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 15 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Propagation Delay Skew5 tPSK 50 ns Channel-to-Channel Matching6 tPSKCD/ tPSKOD 50 ns Output Rise/Fall Time (10% to 90%) tR/tF 3 ns Rev. K | Page 15 of 28

ADuM1200/ADuM1201 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 15 55 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 22 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 22 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 50 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 3.0 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.2 Mbps Dynamic Supply Current per Channel8 Input IDDI (D) 0.19 mA/ Mbps Output IDDO (D) 0.03 mA/ Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 16 of 28

Data Sheet ADuM1200/ADuM1201 ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V, 125°C OPERATION All voltages are relative to the respective ground; 3.0 V ≤ V ≤ 3.6 V, 4.5 V ≤ V ≤ 5.5 V; all minimum/maximum specifications apply DD1 DD2 over the entire recommended operating range, unless otherwise noted; all typical specifications are at T = 25°C; V = 3.0 V, V = 5.0 V; A DD1 DD2 this applies to ADuM1200W and ADuM1201W automotive grade products. Table 7. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS Input Supply Current per Channel, IDDI (Q) 0.26 0.35 mA Quiescent Output Supply Current per Channel, IDDO (Q) 0.19 0.25 mA Quiescent ADuM1200W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.6 1.0 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.5 0.8 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 2.2 3.4 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 1.3 2.0 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 5.2 7.7 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 2.8 3.4 mA 12.5 MHz logic signal freq. ADuM1201W, Total Supply Current, Two Channels1 DC to 2 Mbps VDD1 Supply Current IDD1 (Q) 0.4 0.8 mA DC to 1 MHz logic signal freq. VDD2 Supply Current IDD2 (Q) 0.8 1.1 mA DC to 1 MHz logic signal freq. 10 Mbps (TRZ and URZ Grades Only) VDD1 Supply Current IDD1 (10) 1.5 2.2 mA 5 MHz logic signal freq. VDD2 Supply Current IDD2 (10) 2.8 3.5 mA 5 MHz logic signal freq. 25 Mbps (URZ Grade Only) VDD1 Supply Current IDD1 (25) 3.4 4.8 mA 12.5 MHz logic signal freq. VDD2 Supply Current IDD2 (25) 6.3 8.0 mA 12.5 MHz logic signal freq. For All Models Input Currents IIA, IIB −10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ (VDD1 or VDD2) Logic High Input Threshold VIH 0.7 (VDD1 or VDD2) V Logic Low Input Threshold VIL 0.3 (VDD1 or VDD2) V Logic High Output Voltages VOAH, VOBH (VDD1 or VDD2) − 0.1 VDD1 or VDD2 V IOx = −20 µA, VIx = VIxH (VDD1 or VDD2) − 0.5 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 µA, VIx = VIxL 0.04 0.1 V IOx = 400 µA, VIx = VIxL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM1200/ADuM1201WSRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 1000 ns Maximum Data Rate3 1 Mbps Propagation Delay4 tPHL, tPLH 15 150 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 40 ns Propagation Delay Skew5 tPSK 50 ns Channel-to-Channel Matching6 tPSKCD/ 50 ns tPSKOD Output Rise/Fall Time (10% to 90%) tR/tF 3 ns Rev. K | Page 17 of 28

ADuM1200/ADuM1201 Data Sheet Parameter Symbol Min Typ Max Unit Test Conditions/Comments ADuM1200/ADuM1201WTRZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 100 ns Maximum Data Rate3 10 Mbps Propagation Delay4 tPHL, tPLH 15 55 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 22 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 22 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns ADuM1200/ADuM1201WURZ CL = 15 pF, CMOS signal levels Minimum Pulse Width2 PW 20 40 ns Maximum Data Rate3 25 50 Mbps Propagation Delay4 tPHL, tPLH 20 50 ns Pulse Width Distortion, |tPLH − tPHL|4 PWD 3 ns Change vs. Temperature 5 ps/°C Propagation Delay Skew5 tPSK 15 ns Channel-to-Channel Matching Codirectional Channels6 tPSKCD 3 ns Opposing Directional Channels6 tPSKOD 15 ns Output Rise/Fall Time (10% to 90%) tR/tF 2.5 ns For All Models Common-Mode Transient Immunity Logic High Output7 |CMH| 25 35 kV/µs VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V Logic Low Output7 |CML| 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 1.1 Mbps Input Dynamic Supply Current IDDI (D) 0.10 mA/ per Channel8 Mbps Output Dynamic Supply Current IDDO (D) 0.05 mA/ per Channel8 Mbps 1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11 for total IDD1 and IDD2 supply currents as a function of data rate for ADuM1200W and ADuM1201W channel configurations. 2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed. 3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier. 7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient magnitude is the range over which the common mode is slewed. 8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply current for a given data rate. Rev. K | Page 18 of 28

Data Sheet ADuM1200/ADuM1201 PACKAGE CHARACTERISTICS Table 8. Parameter Symbol Min Typ Max Unit Test Conditions/Comments Resistance (Input-to-Output)1 R 1012 Ω I-O Capacitance (Input-to-Output)1 C 1.0 pF f = 1 MHz I-O Input Capacitance C 4.0 pF I IC Junction-to-Case Thermal Resistance, Side 1 θ 46 °C/W Thermocouple located at JCI center of package underside IC Junction-to-Case Thermal Resistance, Side 2 θ 41 °C/W JCO 1 The device is considered a 2-terminal device; Pin 1, Pin, 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together. REGULATORY INFORMATION The ADuM1200/ADuM1201 and ADuM1200W/ADuM1201W are approved by the organizations listed in Table 9; refer to Table 14 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 9. UL CSA CQC VDE Recognized Under 1577 Approved under CSA Component Approved under Certified according to Component Recognition Acceptance Notice 5A CQC11-471543-2012 DIN V VDE V 0884-10 Program1 (VDE V 0884-10): 2006-122 Single/Basic 2500 V rms Basic insulation per CSA 60950-1-03 and IEC Basic insulation per Reinforced insulation, Isolation Voltage 60950-1, 400 V rms (566 peak) maximum GB4943.1-2011 560 V peak working voltage Functional insulation per CSA 60950-1-03 and Basic insulation, 400 V rms IEC 60950-1, 800 V rms (1131 V peak) (588 V peak) maximum maximum working voltage working voltage, tropical climate, altitude ≤ 5000 m File E214100 File 205078 File CQC14001114901 File 2471900-4880-0001 1 In accordance with UL 1577, each ADuM1200, ADuM1201, ADuM1200W, and ADuM1201W is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 sec (current leakage detection limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM1200, ADuM1201, ADuM1200W, and ADuM1201W is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection limit = 5 pC). The * and/or & marking branded on the component designates DIN V VDE V 0884-10 approval. INSULATION AND SAFETY-RELATED SPECIFICATIONS Table 10. Parameter Symbol Value Unit Conditions Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration Minimum External Air Gap (Clearance) L(I01) 4.90 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage) L(I02) 4.01 min mm Measured from input terminals to output terminals, shortest distance path along body Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1) Rev. K | Page 19 of 28

ADuM1200/ADuM1201 Data Sheet DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 INSULATION CHARACTERISTICS This isolator is suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. Note that the asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage. Table 11. Description Conditions Symbol Characteristic Unit Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III For Rated Mains Voltage ≤ 400 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage V 560 V peak IORM Input-to-Output Test Voltage, Method B1 V × 1.875 = V , 100% production test, V 1050 V peak IORM PR PR t = 1 second, partial discharge < 5 pC m Input-to-Output Test Voltage, Method A V × 1.6 = V , t = 60 seconds, V IORM PR m PR partial discharge < 5 pC After Environmental Tests Subgroup 1 896 V peak After Input and/or Safety Test Subgroup 2 V × 1.2 = V , t = 60 seconds, 672 V peak IORM PR m and Subgroup 3 partial discharge < 5 pC Highest Allowable Overvoltage Transient overvoltage, t = 10 seconds V 4000 V peak TR TR Safety-Limiting Values Maximum value allowed in the event of a failure (see Figure 3) Case Temperature T 150 °C S Side 1 Current I 160 mA S1 Side 2 Current I 170 mA S2 Insulation Resistance at T V = 500 V R >109 Ω S IO S 200 RECOMMENDED OPERATING CONDITIONS 180 Table 12. A) 160 m Parameter Rating T ( 140 EN SIDE #1 SIDE #2 Operating Temperature (TA)1 −40°C to +105°C RR 120 Operating Temperature (T )2 −40°C to +125°C U A C NG 100 Supply Voltages (VDD1, VDD2)1, 3 2.7 V to 5.5 V MITI 80 Supply Voltages (VDD1, VDD2)2, 3 3.0 V to 5.5 V LI Input Signal Rise and Fall Times 1.0 ms Y- 60 ET AF 40 1 Does not apply to ADuM1200W and ADuM1201W automotive grade S products. 20 2 Applies to ADuM1200W and ADuM1201W automotive grade products. 00 50CASE TEMP1E0R0ATURE (°C)150 200 04642-003 3 AMmlaal gvgnonelettaticigc Fe fiesie ladldr Iems .r meluantiivtye steoc tthioen r efospr iencftoivrme gatroiounn odn. S imeem thuen iDtyC tCoo errxetcetrnneasls and Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting Values on Case Temperature per DIN V VDE V 0884-10 Rev. K | Page 20 of 28

Data Sheet ADuM1200/ADuM1201 ABSOLUTE MAXIMUM RATINGS Ambient temperature = 25°C, unless otherwise noted. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a Table 13. stress rating only; functional operation of the product at these Parameter Rating or any other conditions above those indicated in the operational Storage Temperature (T ) −55°C to +150°C ST section of this specification is not implied. Operation beyond Ambient Operating Temperature (T)1 −40°C to +105°C A the maximum operating conditions for extended periods may Ambient Operating Temperature (T)2 −40°C to +125°C A affect product reliability. Supply Voltages (V , V )3 −0.5 V to +7.0 V DD1 DD2 Input Voltages (V , V )3, 4 −0.5 V to V + 0.5 V ESD CAUTION IA IB DDI Output Voltages (V , V )3, 4 −0.5 V to V + 0.5 V OA OB DDO Average Output Current per Pin (I )5 −11 mA to +11 mA O Common-Mode Transients (CM, CM )6 −100 kV/µs to +100 kV/µs L H 1 Does not apply to ADuM1200W and ADuM1201W automotive grade products. 2 Applies to ADuM1200W and ADuM1201W automotive grade products. 3 All voltages are relative to the respective ground. 4 VDDI and VDDO refer to the supply voltages on the input and output sides of a given channel, respectively. 5 See Figure 3 for maximum rated current values for various temperatures. 6 Refers to common-mode transients across the insulation barrier. Common-mode transients exceeding the absolute maximum ratings can cause latch-up or permanent damage. Table 14. Maximum Continuous Working Voltage1 Parameter Max Unit Constraint AC Voltage, Bipolar Waveform 565 V peak 50-year minimum lifetime AC Voltage, Unipolar Waveform Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1 Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 DC Voltage Functional Insulation 1131 V peak Maximum approved working voltage per IEC 60950-1 Basic Insulation 560 V peak Maximum approved working voltage per IEC 60950-1 and VDE V 0884-10 1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details. Rev. K | Page 21 of 28

ADuM1200/ADuM1201 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD1 1 8 VDD2 VDD1 1 8 VDD2 VIA 2 ADuM1200 7 VOA VOA 2 ADuM1201 7 VIA GNVDIB1 34 (NToOt Pto V SIEcaWle) 65 VGONBD2 04642-004 GNVDIB1 34 (NToOt Pto V SIEcaWle) 65 VGONBD2 04642-005 Figure 4. ADuM1200 Pin Configuration Figure 5. ADuM1201 Pin Configuration Table 15. ADuM1200 Pin Function Descriptions Table 16. ADuM1201 Pin Function Descriptions Pin Pin No. Mnemonic Description No. Mnemonic Description 1 V Supply Voltage for Isolator Side 1. 1 V Supply Voltage for Isolator Side 1. DD1 DD1 2 V Logic Input A. 2 V Logic Output A. IA OA 3 V Logic Input B. 3 V Logic Input B. IB IB 4 GND Ground 1. Ground Reference for Isolator Side 1. 4 GND Ground 1. Ground Reference for Isolator Side 1. 1 1 5 GND Ground 2. Ground Reference for Isolator Side 2. 5 GND Ground 2. Ground Reference for Isolator Side 2. 2 2 6 V Logic Output B. 6 V Logic Output B. OB OB 7 V Logic Output A. 7 V Logic Input A. OA IA 8 V Supply Voltage for Isolator Side 2. 8 V Supply Voltage for Isolator Side 2. DD2 DD2 Table 17. ADuM1200 Truth Table (Positive Logic) V Input V Input V State V State V Output V Output Notes IA IB DD1 DD2 OA OB H H Powered Powered H H L L Powered Powered L L H L Powered Powered H L L H Powered Powered L H X X Unpowered Powered H H Outputs return to the input state within 1 μs of V power restoration. DDI X X Powered Unpowered Indeterminate Indeterminate Outputs return to the input state within 1 μs of V power restoration. DDO Table 18. ADuM1201 Truth Table (Positive Logic) V Input V Input V State V State V Output V Output Notes IA IB DD1 DD2 OA OB H H Powered Powered H H L L Powered Powered L L H L Powered Powered H L L H Powered Powered L H X X Unpowered Powered Indeterminate H Outputs return to the input state within 1 μs of V power restoration. DDI X X Powered Unpowered H Indeterminate Outputs return to the input state within 1 μs of V power restoration. DDO Rev. K | Page 22 of 28

Data Sheet ADuM1200/ADuM1201 TYPICAL PERFORMANCE CHARACTERISTICS 10 20 8 15 A) m NEL ( 6 mA) NT/CHAN 4 URRENT ( 10 5V RRE 5V C U 3V 5 C 2 3V 00 10DATA RATE (Mbps)20 30 04642-006 00 10DATA RATE (Mbps)20 30 04642-009 Figure 6. Typical Input Supply Current per Channel vs. Data Rate Figure 9. Typical ADuM1200 VDD1 Supply Current vs. Data Rate for 5 V and 3 V Operation for 5 V and 3 V Operation 4 4 3 3 A) m NEL ( mA) NT/CHAN 2 URRENT ( 2 RRE 5V C 5V 3V U 1 1 C 3V 00 10DATA RATE (Mbps)20 30 04642-007 00 10DATA RATE (Mbps)20 30 04642-010 Figure 7. Typical Output Supply Current per Channel vs. Data Rate Figure 10. Typical ADuM1200 VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation (No Output Load) for 5 V and 3 V Operation 4 10 8 3 A) m NEL ( 5V mA) 6 NT/CHAN 2 URRENT ( 4 5V RE C UR 1 3V 3V C 2 00 10DATA RATE (Mbps)20 30 04642-008 00 10DATA RATE (Mbps)20 30 04642-011 Figure 8. Typical Output Supply Current per Channel vs. Data Rate Figure 11. Typical ADuM1201 VDD1 or VDD2 Supply Current vs. Data Rate for 5 V and 3 V Operation (15 pF Output Load) for 5 V and 3 V Operation Rev. K | Page 23 of 28

ADuM1200/ADuM1201 Data Sheet APPLICATIONS INFORMATION PCB LAYOUT The 3 V operating condition of the ADuM1200/ADuM1201 is examined because it represents the most susceptible mode of The ADuM1200/ADuM1201 digital isolators require no external operation. interface circuitry for the logic interfaces. Power supply bypassing is strongly recommended at the input and output supply pins. The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at about 0.5 V, The capacitor value must be between 0.01 μF and 0.1 μF. therefore establishing a 0.5 V margin in which induced voltages The total lead length between both ends of the capacitor and can be tolerated. The voltage induced across the receiving coil is the input power supply pin must not exceed 20 mm. given by See the AN-1109 Application Note for board layout guidelines. V = (−dβ/dt)Σ∏r2; n = 1, 2, … , N n PROPAGATION DELAY-RELATED PARAMETERS where: Propagation delay is a parameter that describes the time it takes β is the magnetic flux density (gauss). a logic signal to propagate through a component. The propagation N is the number of turns in the receiving coil. delay to a logic low output can differ from the propagation delay r is the radius of the nth turn in the receiving coil (cm). n to a logic high output. Given the geometry of the receiving coil in the ADuM1200/ INPUT (VIx) 50% ADuM1201 and an imposed requirement that the induced voltage be 50% at most of the 0.5 V margin at the decoder, a tPLH tPHL maximum allowable magnetic field is calculated, as shown in OUTPUT (VOx) 50% 04642-012 Figure 13. Figure 12. Propagation Delay Parameters 100 X Pulse width distortion is the maximum difference between U L F these two propagation delay values and is an indication of C 10 TI how accurately the timing of the input signal is preserved. E N Channel-to-channel matching refers to the maximum amount E MAGgauss) 1 that the propagation delay differs between channels within a ABLY (k sPirnogplea gAaDtiounM d1e2la0y0 /sAkeDwu rMef1e2r0s 1to c othme pmoanxeinmt.u m amount that ALLOWDENSIT0.1 M the propagation delay differs between multiple ADuM1200/ U ADuM1201 components operating under the same conditions. AXIM 0.01 M DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY Positive and negative logic transitions at the isolator input send 0.0011k 10kMAGNETI1C0 0FkIELD FREQ1MUENCY (Hz1)0M 100M 04642-013 narrow (~1 ns) pulses to the decoder via the transformer. The Figure 13. Maximum Allowable External Magnetic Flux Density decoder is bistable and is therefore either set or reset by the pulses, For example, at a magnetic field frequency of 1 MHz, the indicating input logic transitions. In the absence of logic transitions maximum allowable magnetic field of 0.2 kgauss induces a of more than ~1 μs at the input, a periodic set of refresh pulses voltage of 0.25 V at the receiving coil. This is about 50% of the indicative of the correct input state is sent to ensure dc correctness sensing threshold and does not cause a faulty output transition. at the output. If the decoder receives no internal pulses for more Similarly, if such an event occurs during a transmitted pulse (and than about 5 μs, the input side is assumed to be unpowered or has the worst-case polarity), it reduces the received pulse from nonfunctional, in which case the isolator output is forced to a >1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of default state (see Table 17 and Table 18) by the watchdog timer the decoder. circuit. The preceding magnetic flux density values correspond to The ADuM1200/ADuM1201 are extremely immune to external specific current magnitudes at given distances away from the magnetic fields. The limitation on the magnetic field immunity ADuM1200/ADuM1201 transformers. Figure 14 expresses these of the ADuM1200/ADuM1201 is set by the condition in which allowable current magnitudes as a function of frequency for induced voltage in the receiving coil of the transformer is suf- selected distances. As seen, the ADuM1200/ADuM1201 are ficiently large enough to either falsely set or reset the decoder. extremely immune and can be affected only by extremely large The following analysis defines the conditions under which this currents operating very close to the component at a high frequency. can occur. For the 1 MHz example, place a 0.5 kA current 5 mm away from the ADuM1200/ADuM1201 to affect the operation of the component. Rev. K | Page 24 of 28

Data Sheet ADuM1200/ADuM1201 1000 INSULATION LIFETIME kA) DISTANCE = 1m All insulation structures eventually break down when subjected NT ( 100 to voltage stress over a sufficiently long period. The rate of insu- E RR lation degradation is dependent on the characteristics of the voltage U E C 10 waveform applied across the insulation. In addition to the testing L B performed by the regulatory agencies, Analog Devices carries A DISTANCE = 100mm W O out an extensive set of evaluations to determine the lifetime of L 1 AL the insulation structure within the ADuM1200/ADuM1201. M DISTANCE = 5mm U M Analog Devices performs accelerated life testing using voltage XI 0.1 MA levels higher than the rated continuous working voltage. Accel- eration factors for several operating conditions are determined. 0.011k 10MkAGNET1IC0 0FkIELD FRE1QMUENCY (H1z0)M 100M 04642-014 Twhoerksein fgac vtoorltsa aglelo. wT hcael cvuallauteios nsh oof wthne itnim Tea btole f a1i4lu srue matm thaer iazcet utahle Figure 14. Maximum Allowable Current for Various peak voltage for 50 years of service life for a bipolar ac operating Current-to-ADuM1200/ADuM1201 Spacings condition and the maximum CSA/VDE approved working volt- ages. In many cases, the approved working voltage is higher than Note that, at combinations of strong magnetic fields and high the 50-year service life voltage. Operation at these high working frequencies, any loops formed by PCB traces can induce suffi- voltages can lead to shortened insulation life in some cases. ciently large error voltages to trigger the threshold of succeeding circuitry. Take care in the layout of such traces to avoid this The insulation lifetime of the ADuM1200/ADuM1201 depends possibility. on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates POWER CONSUMPTION depending on whether the waveform is bipolar ac, unipolar ac, The supply current at a given channel of the ADuM1200/ or dc. Figure 15, Figure 16, and Figure 17 illustrate these different ADuM1201 isolator is a function of the supply voltage, the data isolation voltage waveforms, respectively. rate of the channel, and the output load of the channel. Bipolar ac voltage is the most stringent environment. The goal For each input channel, the supply current is given by of a 50-year operating lifetime under the ac bipolar condition I = I f ≤ 0.5f determines the Analog Devices recommended maximum DDI DDI (Q) r working voltage. I = I × (2f − f) + I f > 0.5f DDI DDI (D) r DDI (Q) r In the case of unipolar ac or dc voltage, the stress on the insu- For each output channel, the supply current is given by lation is significantly lower, which allows operation at higher I = I f ≤ 0.5f DDO DDO (Q) r working voltages yet still achieves a 50-year service life. The I = (I + (0.5 × 10−3) × CV ) × (2f − f) + I working voltages listed in Table 14 can be applied while main- DDO DDO (D) L DDO r DDO (Q) f > 0.5f taining the 50-year minimum lifetime provided the voltage r conforms to either the unipolar ac or dc voltage cases. Any cross- where: insulation voltage waveform that does not conform to Figure 16 I , I are the input and output dynamic supply currents DDI (D) DDO (D) or Figure 17 is to be treated as a bipolar ac waveform, and the per channel (mA/Mbps). peak voltage is to be limited to the 50-year lifetime voltage value C is the output load capacitance (pF). L listed in Table 14. V is the output supply voltage (V). DDO f is the input logic signal frequency (MHz, half of the input data Note that the voltage presented in Figure 16 is shown as sinu- rate, NRZ signaling). soidal for illustration purposes only. It is meant to represent any f is the input stage refresh rate (Mbps). voltage waveform varying between 0 V and some limiting value. r I , I are the specified input and output quiescent The limiting value can be positive or negative, but the voltage DDI (Q) DDO (Q) supply currents (mA). cannot cross 0 V. To calculate the total I and I supply currents, the supply RATED PEAK VOLTAGE DD1 DD2 cIDuDr1r eanntds IfDoDr2 eaarceh c ianlcpuulta taendd a onudt ptoutta clehda.n Fnieglu croer 6re asnpdo nFdiginugre t o7 0V 04642-021 provide per-channel supply currents as a function of data rate Figure 15. Bipolar AC Waveform for an unloaded output condition. Figure 8 provides per- channel supply current as a function of data rate for a 15 pF output condition. Figure 9 through Figure 11 provide total V and V supply current as a function of data rate for DD1 DD2 ADuM1200 and ADuM1201 channel configurations. Rev. K | Page 25 of 28

ADuM1200/ADuM1201 Data Sheet RATED PEAK VOLTAGE RATED PEAK VOLTAGE 0V 04642-022 0V 04642-023 Figure 16. Unipolar AC Waveform Figure 17. DC Waveform Rev. K | Page 26 of 28

Data Sheet ADuM1200/ADuM1201 OUTLINE DIMENSIONS 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27(0.0500) 0.50(0.0196) BSC 1.75(0.0688) 0.25(0.0099) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 18. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Number Number Maximum Maximum Maximum of Inputs, of Inputs, Data Rate Propagation Pulse Width Temperature Package Model1, 2 V Side V Side (Mbps) Delay, 5 V (ns) Distortion (ns) Range Option3 DD1 DD2 ADuM1200AR 2 0 1 150 40 −40°C to +105°C R-8 ADuM1200ARZ 2 0 1 150 40 −40°C to +105°C R-8 ADuM1200ARZ-RL7 2 0 1 150 40 −40°C to +105°C R-8 ADuM1200BR 2 0 10 50 3 −40°C to +105°C R-8 ADuM1200BRZ 2 0 10 50 3 −40°C to +105°C R-8 ADuM1200BRZ-RL7 2 0 10 50 3 −40°C to +105°C R-8 ADuM1200CR 2 0 25 45 3 −40°C to +105°C R-8 ADuM1200CRZ 2 0 25 45 3 −40°C to +105°C R-8 ADuM1200CRZ-RL7 2 0 25 45 3 −40°C to +105°C R-8 ADuM1200WSRZ 2 0 1 150 40 −40°C to +125°C R-8 ADuM1200WSRZ-RL7 2 0 1 150 40 −40°C to +125°C R-8 ADuM1200WTRZ 2 0 10 50 3 −40°C to +125°C R-8 ADuM1200WTRZ-RL7 2 0 10 50 3 −40°C to +125°C R-8 ADuM1200WURZ 2 0 25 45 3 −40°C to +125°C R-8 ADuM1200WURZ-RL7 2 0 25 45 3 −40°C to +125°C R-8 ADuM1201AR 1 1 1 150 40 −40°C to +105°C R-8 ADuM1201AR-RL7 1 1 1 150 40 −40°C to +105°C R-8 ADuM1201ARZ 1 1 1 150 40 −40°C to +105°C R-8 ADuM1201ARZ-RL7 1 1 1 150 40 −40°C to +105°C R-8 ADuM1201BR 1 1 10 50 3 −40°C to +105°C R-8 ADuM1201BR-RL7 1 1 10 50 3 −40°C to +105°C R-8 ADuM1201BRZ 1 1 10 50 3 −40°C to +105°C R-8 ADuM1201BRZ-RL7 1 1 10 50 3 −40°C to +105°C R-8 ADuM1201CR 1 1 25 45 3 −40°C to +105°C R-8 ADuM1201CRZ 1 1 25 45 3 −40°C to +105°C R-8 ADuM1201CRZ-RL7 1 1 25 45 3 −40°C to +105°C R-8 Rev. K | Page 27 of 28

ADuM1200/ADuM1201 Data Sheet Number Number Maximum Maximum Maximum of Inputs, of Inputs, Data Rate Propagation Pulse Width Temperature Package Model1, 2 V Side V Side (Mbps) Delay, 5 V (ns) Distortion (ns) Range Option3 DD1 DD2 ADuM1201WSRZ 1 1 1 150 40 −40°C to +125°C R-8 ADuM1201WSRZ-RL7 1 1 1 150 40 −40°C to +125°C R-8 ADuM1201WTRZ 1 1 10 50 3 −40°C to +125°C R-8 ADuM1201WTRZ-RL7 1 1 10 50 3 −40°C to +125°C R-8 ADuM1201WURZ 1 1 25 45 3 −40°C to +125°C R-8 ADuM1201WURZ-RL7 1 1 25 45 3 −40°C to +125°C R-8 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. 3 R-8 = 8-lead narrow-body SOIC_N. AUTOMOTIVE PRODUCTS The ADuM1200W/ADuM1201W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ©2004–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04642-0-9/16(K) Rev. K | Page 28 of 28

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADUM1200CR ADUM1201BR ADUM1200CR-RL7 ADUM1200UR-EP ADUM1200UR-EP-RL7 ADUM1201ARZ ADUM1200BRZ ADUM1200BR ADUM1200BRZ-RL7 ADUM1200AR ADUM1201BRZ-RL7 ADUM1200CRZ-RL7 ADUM1200BR-RL7 ADUM1201CRZ ADUM1200ARZ-RL7 ADUM1201BR-RL7 ADUM1201CRZ-RL7 ADUM1200CRZ ADUM1200ARZ ADUM1201ARZ-RL7 ADUM1201BRZ ADUM1201WURZ-RL7 ADUM1201WURZ ADUM1200WSRZ ADUM1201WTRZ-RL7 ADUM1201WSRZ ADUM1200WTRZ-RL7 ADUM1201WSRZ-RL7 ADUM1200WURZ-RL7 ADUM1201WTRZ ADUM1200WSRZ-RL7 ADUM1200WURZ ADUM1200WTRZ