A1388 and A1389 Linear Hall-Effect Sensor ICs with Analog Output Available in a Miniature, Low-Profile Surface-Mount Package FEATURES AND BENEFITS DESCRIPTION • 5.0 V supply operation New applications for linear output Hall-effect sensors—such • QVO temperature coefficient programmed at Allegro™ for as displacement and angular position—require higher accuracy improved accuracy and smaller package sizes. The Allegro A1388 and A1389 • Miniature package options linear Hall-effect sensor ICs have been designed specifically • High-bandwidth, low-noise analog output to meet both requirements. These temperature-stable devices • High-speed chopping scheme minimizes QVO drift across are available in both surface-mount and through-hole packages. operating temperature range The accuracy of each device is enhanced via end-of-line • Temperature-stable quiescent voltage output and sensitivity optimization. Each device features non-volatile memory to • Precise recoverability after temperature cycling optimize device sensitivity and the quiescent voltage output • Output voltage clamps provide short-circuit diagnostic (QVO: output in the absence of a magnetic field) for a given capabilities application or circuit. This A1388 and A1389 optimized • Undervoltage lockout (UVLO) performance is sustained across the full operating temperature • Wide ambient temperature range: –40°C to 150°C range by programming the temperature coefficient for both • Immune to mechanical stress sensitivity and QVO at Allegro end-of-line test. • Enhanced EMC performance for stringent automotive applications These ratiometric Hall-effect sensor ICs provide a voltage output that is proportional to the applied magnetic field. The PACKAGES 3-pin ultramini SIP quiescent voltage output is adjusted around 50% of the supply 1.5 mm × 4 mm × 3 mm 3-pin SOT23-W (suffix UA) voltage. 2 mm × 3 mm × 1 mm (suffix LH) The features of these linear devices make them ideal for use in automotive and industrial applications requiring high accuracy, and they operate across an extended temperature range, –40°C to 150°C. Each BiCMOS monolithic circuit integrates a Hall element, temperature-compensating circuitry to reduce the intrinsic Not to scale Continued on the next page… Functional Block Diagram V+ VCC et mic Offsellation ed Filter VOUT ac n nn u ya T DC CBYPASS Sensitivity and Offset and Sensitivity TC Offset TC GND A13889-DS, Rev. 6 August 13, 2019 MCO-0000178

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package DESCRIPTION (CONTINUED) sensitivity drift of the Hall element, a small-signal high-gain amplifier, a clamped low-impedance output stage, and a proprietary dynamic offset cancellation technique. The A1388 and A1389 sensor ICs are offered in two package styles. The LH is a SOT-23W style miniature low-profile package for surface-mount applications. The UA is a 3-pin ultramini single inline package (SIP) for through-hole mounting. Both packages are lead (Pb) free, with 100% matte-tin leadframe plating. SELECTION GUIDE Output Sensitivity Part Number Packing [1] Package Polarity (typ) (mV/G) A1388LLHLX-2-T Forward 2.5 10,000 pieces per reel 3-pin SOT-23W surface mount A1388LUATN-2-T Forward 2.5 4,000 pieces per reel 3-pin SIP through hole A1389LLHLX-9-T Forward 9 10,000 pieces per reel 3-pin SOT-23W surface mount A1389LUATN-9-T Forward 9 4,000 pieces per reel 3-pin SIP through hole A1389LLHLX-RP9-T Reverse –9 10,000 pieces per reel 3-pin SOT-23W surface mount [1] Contact Allegro™ for additional packing options. ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Unit Forward Supply Voltage V 8 V CC Reverse Supply Voltage V –0.1 V RCC Forward Output Voltage V 7 V OUT Reverse Output Voltage V –0.1 V ROUT Output Source Current I VOUT to GND 2 mA OUT(SOURCE) Output Sink Current I VCC to VOUT 10 mA OUT(SINK) Operating Ambient Temperature T Range L –40 to 150 °C A Maximum Junction Temperature T (max) 165 °C J Storage Temperature T –65 to 170 °C stg 2 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package PINOUT DIAGRAMS AND TERMINAL LIST TABLE Pinout Diagrams 3 Terminal List Table Number Description Name LH UA Input power supply; tie to GND VCC 1 1 1 2 with bypass capacitor VOUT 2 3 Output signal LH Package GND 3 2 Ground 1 2 3 UA Package THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information Characteristic Symbol Test Conditions Value Units Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side con- Package Thermal Resistance R 110 °C/W θJA nected by thermal vias Package UA, 1-layer PCB with copper limited to solder pads 165 °C/W 3 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package OPERATING CHARACTERISTICS: Valid through T , C = 0.1 µF, V = 5 V, unless otherwise noted A BYPASS CC Characteristics Symbol Test Conditions Min. Typ. Max. Unit [1] ELECTRICAL CHARACTERISTICS Supply Voltage V 4.5 5.0 5.5 V CC Tested at T = 25°C and T = 150°C (device V A A – – 3 V UVLOHI powers on) Undervoltage Threshold [2] Tested at T = 25°C and T = 150°C (device V A A 2.5 – – V UVLOLO powers off) Supply Current I No load on VOUT – 9 11.5 mA CC Power-On Time [3][4] t T = 25°C, C = 10 pF – 50 – µs PO A L(PROBE) V Ramp Time [3][4] t T = 25°C 0.005 – 100 ms CC VCC A V Off Level [3][4] V T = 25°C 0 – 0.55 V CC CCOFF A Delay to Clamp [3][4] t T = 25°C, C = 10 nF – 30 – µs CLP A L Supply Zener Clamp Voltage V T = 25°C, I = 14.5 mA 6 7.3 – V Z A CC Internal Bandwidth [3] BW Small signal –3 dB – 20 – kHz i Chopping Frequency [3][5] f T = 25°C – 400 – kHz C A OUTPUT CHARACTERISTICS V = 5 V, T = 25°C, C = open, Output-Referred Noise [3] V CC A BYPASS – 15 – mV N Sens = 9 mV/G, no load on VOUT (p-p) V = 5 V, T = 25°C, C = open, CC A BYPASS Input-Referred RMS Noise Density [3] V Sens = 9 mV/G, no load on VOUT, – 1.5 – mG/√Hz NRMS f << BWi measured DC Output Resistance [3] R – <1 – Ω OUT Output Load Resistance [3] R VOUT to GND 4.7 – – kΩ L Output Load Capacitance [3] C VOUT to GND – – 10 nF L V T = 25°C, B = +400 G, R = 10 kΩ (VOUT to GND) 4.35 4.5 4.65 V Output Voltage Clamp [6] CLPHIGH A L V T = 25°C, B = –400 G, R = 10 kΩ (VOUT to VCC) 0.40 0.55 0.70 V CLPLOW A L A1388LLHLX-2-T 2.4 2.5 2.6 mV/G A1388LUA-2-T 2.4 2.5 2.6 mV/G Sensitivity Sens A1389LLHLX-9-T T = 25°C 8.73 9 9.27 mV/G A A1389LUA-9-T 8.73 9 9.27 mV/G A1389LLHLX-RP9-T –9.27 –9 –8.73 mV/G A1388LLHLX-2-T 2.488 2.5 2.512 V A1388LUA-2-T 2.488 2.5 2.512 V Quiescent Voltage Output (QVO) V A1389LLHLX-9-T T = 25°C 2.488 2.5 2.512 V OUT(Q) A A1389LUA-9-T 2.488 2.5 2.512 V A1389LLHLX-RP9-T 2.488 2.5 2.512 V Programmed at T = 150°C, calculated relative Sensitivity Temperature Coefficient TC A 0.08 0.12 0.16 %/°C Sens to Sens at 25°C Continued on the next page… 4 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package OPERATING CHARACTERISTICS (continued): Valid through T , C = 0.1 µF, V = 5 V, unless otherwise noted A BYPASS CC Characteristics Symbol Test Conditions Min. Typ. Max. Unit [1] ERROR COMPONENTS Linearity Sensitivity Error Lin – ±1.5 – % ERR Symmetry Sensitivity Error Sym – ±1.5 – % ERR Ratiometry Quiescent Voltage Output Error [7] RatVOUT(Q) Across supply voltage range (relative to VCC = 5 V) – ±1.5 – % Ratiometry Sensitivity Error [7] RatSens Across supply voltage range (relative to VCC = 5 V) – ±1.5 – % T = 25°C, across supply voltage range (relative Ratiometry Clamp Error [8] Rat A – ±1.5 – % VOUTCLP to V = 5 V) CC Drift Characteristics A1388LLHLX-2-T –20 – 0 mV A1388LUA-2-T –10 0 10 mV Typical Quiescent Voltage Output Drift Across Temperature Range ∆VOUT(Q) A1389LLHLX-9-T TA = 150°C –30 – 0 mV A1389LUA-9-T –20 0 10 mV A1389LLHLX-RP9-T –30 – 0 mV A1388LLHLX-2-T – ±2 – % A1388LUA-2-T – ±2 – % Sensitivity Drift Due to T = 25°C, after Package Hysteresis [9] ∆SensPKG A1389LLHLX-9-T teAmperature cycling – ±2 – % A1389LUA-9-T – ±2 – % A1389LLHLX-RP9-T – ±2 – % [1] 1 G (gauss) = 0.1 mT (millitesla). [2] On power-up, the output of the device is held low until V exceeds V . After the device is powered, the output remains valid until V drops CC UVLOHI CC below V , when the output is pulled low. UVLOLO [3] Determined by design and characterization, not evaluated at final test. [4] See the Characteristic Definitions section. [5] f varies as much as approximately ±20% across the full operating ambient temperature range and process. C [6] V and V scale with V due to ratiometry. CLPLOW CLPHIGH CC [7] Percent change from actual value at V = 5 V, for a given temperature. CC [8] Percent change from actual value at V = 5 V, T = 25°C. CC A [9] Sensitivity drift through the life of the part, ΔSens , can have a typical error value ±3% in addition to package hysteresis effects. LIFE 5 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package CHARACTERISTIC DEFINITIONS Power-On Time. When the supply is ramped to its operating Quiescent Voltage Output. In the quiescent state (no signifi- voltage, the device output requires a finite time to react to an cant magnetic field: B = 0 G), the output, V , is at a con- OUT(Q) input magnetic field. Power-On Time, tPO , is defined as the time stant ratio to the supply voltage, VCC, across the entire operating it takes for the output voltage to begin responding to an applied ranges of VCC and Operating Ambient Temperature, TA. magnetic field after the power supply has reached its minimum Quiescent Voltage Output Drift Across Temperature specified operating voltage, VCC(min), as shown in figure 1. Range. Due to internal component tolerances and thermal considerations, the Quiescent Voltage Output, V , may Delay to Clamp. A large magnetic input step may cause the OUT(Q) drift due to temperature changes within the Operating Ambient clamp to overshoot its steady-state value. The Delay to Clamp, Temperature, T . For purposes of specification, the Quiescent t , is defined as the time it takes for the output voltage to settle A CLP Voltage Output Drift Across Temperature Range, ∆V (mV), OUT(Q) within 1% of its steady-state value, after initially passing through is defined as: its steady-state voltage, as shown in figure 2. ∆VOUT(Q) =VOUT(Q)(TA) –VOUT(Q)(25°C) (1) V V Sensitivity. The amount of the output voltage change is propor- V (typ) CC CC tional to the magnitude and polarity of the magnetic field applied. V OUT 90% V This proportionality is specified as the magnetic sensitivity, OUT Sens (mV/G), of the device and is defined as: V – V OUT(B+) OUT(B–) Sens = (2) V (min) (B+) – (B–) CC t where B+ is the magnetic flux density in a positive field (south PO t1 t2 polarity) and B– is the magnetic flux density in a negative field (north polarity). t = time at which power supply reaches 1 minimum specified operating voltage Sensitivity Temperature Coefficient. The device sensitiv- t2= time at which output voltage settles ity changes as temperature changes, with respect to its Sensitiv- within ±10% of its steady-state value under an applied magnetic field ity Temperature Coefficient, TCSENS. TCSENS is programmed at 150°C, and calculated relative to the baseline sensitivity program- 0 +t ming temperature of 25°C. TCSENS is defined as: Sens – Sens  1  Figure 1. Definition of Power-On Time, tPO TCSens= STe2n s T1× 100T2–T1 (%/°C) (3)  T1   where T1 is the baseline Sens programming temperature of 25°C, Magnetic Input Signal and T2 is the TC programming temperature of 150°C. SENS V CLPHIGH (V)T tCLP VOUT Signal Trahneg eid, eSaeln vsaIDluEeA Lo(fT SA)e,n iss adcerfoinsse dth aes :full ambient temperature utput, VOU t1=t1 time at whicth2 output voltage initially etic Input SensIDEAL(TA)= SensT1 × [100 (%) + TCSENS (TA –T1)] (4) e O reaches steady-state clamp voltage agn Sensitivity Drift Across Temperature Range. Second order vic t2= time at which output voltage settles to M sensitivity temperature coefficient effects cause the magnetic De within 1% of steady-state clamp voltage sensitivity, Sens, to drift from its ideal value across the operating ambient temperature range, T . For purposes of specification, A time (µs) the Sensitivity Drift Across Temperature Range, ∆Sens , is TC Figure 2. Definition of Delay to Clamp, t CLP 6 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package defined as: operating magnetic range of the applied field in which the device Sens – Sens provides a linear output. The maximum positive and negative TA IDEAL(TA) ∆SensTC= Sens × 100 (%) (5) applied magnetic fields in the operating range can be calculated: IDEAL(TA) V – V Sensitivity Drift Due to Package Hysteresis. Package B = CLPHIGH OUT(Q) (10) stress and relaxation can cause the device sensitivity at T = 25°C MAX(+) Sens A to change during and after temperature cycling. This change in V – V OUT(Q) CLPLOW sensitivity follows a hysteresis curve. For purposes of specifica- B = MAX(–) Sens tion, the Sensitivity Drift Due to Package Hysteresis, ∆Sens , PKG is defined as: Symmetry Sensitivity Error. The magnetic sensitivity of the Sens – Sens (25°C)(2) (25°C)(1) device is constant for any two applied magnetic fields of equal ∆SensPKG= Sens(25°C)(1) × 100 (%) (6) magnitude and opposite polarities. Symmetry error, Sym (%), ERR where Sens is the programmed value of sensitivity is measured and defined as: (25°C)(1) at T = 25°C, and Sens is the value of sensitivity at  Sens  TA =A 25°C after temper(a2t5u°Cre)( 2c)ycling TA up to 150°C, down to SymERR=1–Sens((BB+–)) × 100 (%) (11) –40°C, and back to up 25°C. where Sens is as defined in equation 10, and B+ and B– are Bx Linearity Sensitivity Error. The A1388 and A1389 are positive and negative magnetic fields such that |B+| = |B–|. designed to provide linear output in response to a ramping applied magnetic field. Consider two magnetic fields, B1 and B2. Ratiometry Error. The A1388 and A1389 provide ratiometric Ideally, the sensitivity of a device is the same for both fields, for output. This means that the Quiescent Voltage Output, V , OUT(Q) a given supply voltage and temperature. Linearity error is present magnetic sensitivity, Sens, and clamp voltages, V and CLPHIGH when there is a difference between the sensitivities measured at V , are proportional to the supply voltage, V . In other CLPLOW CC B1 and B2. words, when the supply voltage increases or decreases by a certain percentage, each characteristic also increases or decreases Linearity Sensitivity Error, LIN , is calculated separately ERR by the same percentage. Error is the difference between the for positive (Lin ) and negative (Lin ) applied magnetic ERR+ ERR– measured change in the supply voltage relative to 5 V, and the fields. LIN (%) is measured and defined as: ERR measured change in each characteristic.  Sens  LinERR+=1–Sens(B+)(2)× 100 (%) (7) The ratiometric error in quiescent voltage output, RatVOUT(Q)  (B+)(1) (%), for a given supply voltage, V , is defined as: CC  Sens  LinERR–=1– Sens((BB––))((12))× 100 (%) RatVOUT(Q)=1– VOUT(Q)(VVCCCC /) /5 V(OVU)T(Q)(5V) × 100 (%) (12) where: The ratiometric error in magnetic sensitivity, Rat (%), for a Sens |V – V | OUT(Bx) OUT(Q) given supply voltage, V , is defined as: Sens = (8) CC Bx B x  Sens / Sens  and Bx are positive and negative magnetic fields, with respect to RatSens=1– V(VCCCC /) 5 (V) (5V) × 100 (%) (13) the quiescent voltage output, such that The ratiometric error in the clamp voltages, Rat (%), for |B | > |B | and |B | > |B | VOUTCLP (+)(2) (+)(1) (–)(2) (–)(1) a given supply voltage, V , is defined as: CC The effective linearity error is:  V / V  LinERR= max(|LinERR+| , |LinERR– |) (9) RatVOUTCLP=1– CLPV(VCCCC /) 5 (CVL)P(5V) × 100 (%) (14) The output voltage clamps, V and V , limit the where V is either V or V . CLPHIGH CLPLOW CLP CLPHIGH CLPLOW 7 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package Undervoltage Lockout. The A1388 and A1389 provide an +V undervoltage lockout feature which ensures that the device out- VCC puts a VOUT signal only when VCC is above certain thresholds . VUVLOHI The undervoltage lockout feature provides a hysteresis of opera- tion to eliminate indeterminate output states. VUVLOLOW The output of the A1388 and A1389 is held low (GND) until V exceeds V . After V exceeds V , the device VOCCUT output iUs VeLnOabHlIed, providCiCng a ratiomeUtrViLcO oHuItput volt- VOUT age that is proportional to the input magnetic signal and V . If CC V should drop back down below V after the device is CC UVLOLO powered up, the output would be pulled low (see figure 3) until time V is reached again and VOUT would be re-enabled. UVLOHI V Ramp Time. The time taken for V to ramp from 0 V to Figure 3. Definition of Undervoltage Lockout CC CC V (typ). 5.0 V (see figure 4). CC VCC Off Level. For applications in which the VCC pin of the tVCC A1388 or A1389 is being power-cycled (for example using a V (typ) CC multiplexer to toggle the part on and off), the specification of V) VCC Off Level, VCCOFF , determines how high a VCC off voltage (CC can be tolerated while still ensuring proper operation and startup V e, of the device (see figure 4). g a olt V V y CCOFF pl p u 0 S time Figure 4. Definition of V Ramp Time, t CC VCC 8 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package APPLICATION INFORMATION A1388 A1389 VCC VOUT 5 V 0.1 µF GND RL 4.7 nF Figure 5. Typical Application Circuit CHOPPER STABILIZATION TECHNIQUE high-frequency signal. The magnetic-sourced signal then can pass When using Hall-effect technology, a limiting factor for through a low-pass filter, while the modulated DC offset is sup- switchpoint accuracy is the small signal voltage developed across pressed. In addition to the removal of the thermal and mechanical the Hall element. This voltage is disproportionally small relative stress related offset, this novel technique also reduces the amount to the offset that can be produced at the output of the Hall sensor of thermal noise in the Hall sensor IC while completely removing IC. This makes it difficult to process the signal while maintain- the modulated residue resulting from the chopper operation. The ing an accurate, reliable output over the specified operating chopper stabilization technique uses a high-frequency sampling temperature and voltage ranges. Chopper stabilization is a unique clock. For demodulation process, a sample-and-hold technique approach used to minimize Hall offset on the chip. Allegro is used. This high-frequency operation allows a greater sampling employs a technique to remove key sources of the output drift rate, which results in higher accuracy and faster signal-processing induced by thermal and mechanical stresses. This offset reduction capability. This approach desensitizes the chip to the effects technique is based on a signal modulation-demodulation process. of thermal and mechanical stresses, and produces devices that The undesired offset signal is separated from the magnetic field- have extremely stable quiescent Hall output voltages and precise induced signal in the frequency domain, through modulation. The recoverability after temperature cycling. This technique is made subsequent demodulation acts as a modulation process for the possible through the use of a BiCMOS process, which allows the offset, causing the magnetic field-induced signal to recover its use of low-offset, low-noise amplifiers in combination with high- original spectrum at base band, while the DC offset becomes a density logic integration and sample-and-hold circuits. Regulator Clock/Logic Hall Element Amp Anti-aliasing Tuned LP Filter Filter Figure 6. Chopper Stabilization Technique 9 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package Package LH, 3-Pin (SOT-23W) +0.12 2.98–0.08 1.49 D 4°±4° 3 A +0.020 0.180–0.053 0.96 D 2.90+–00..2100 1.91+–00..0169 2.40 0.70 D 0.25 MIN 1.00 1 2 0.55 REF 0.25 BSC 0.95 Seating Plane Gauge Plane B PCB Layout Reference View 8X 10° REF Branded Face 1.00 ±0.13 C Branding Reference View +0.10 0.05–0.05 0.95 BSC 0.40 ±0.10 For Reference Only; not for tooling use (reference DWG-2840) NNN Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 1 A Active Area Depth, 0.28 mm REF Part Number NNN B Reference land pattern layout All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary A1388LLHLX-2-T 388 to meet application process requirements and PCB layout tolerances A1389LLHLX-9-T 389 C Branding scale and appearance at supplier discretion A1389LLHLX-RP9-T 89R D Hall element, not to scale 10 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package Package UA, 3-Pin SIP For Reference Only–Not for Tooling Use (Reference DWG-0000404, Rev. 1) NOTTO SCALE Dimensions in millimeters Dimensions exclusive of moldflash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown +0.08 4.09 –0.05 45° B C E 2.04 1.52 ±0.05 10° 1.44 E E Mold Ejector 3.02+0.08 Pin Indent –0.05 Branded 45° Face 0.79 REF D Standard Branding Reference View A 1.02 MAX NNN 1 2 3 1 = Supplier emblem N= Last three digits of device part number 14.99 ±0.25 +0.03 0.41 –0.06 +0.05 0.43 –0.07 A Dambar removal protrusion (6×) B Gate and tie bar burr area C Active Area Depth, 0.50 mm ±0.08 D Branding scale and appearance at supplier discretion E Hall element, not to scale 1.27 NOM 11 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com

A1388 and Linear Hall-Effect Sensor ICs with Analog Output A1389 Available in a Miniature, Low-Profile Surface-Mount Package REVISION HISTORY Number Date Description 1 June 27, 2014 Updated product offerings 2 July 19, 2016 Corrected ΔSens and LH Package Branding Reference PKG 3 November 1, 2016 Minor editorial changes 4 June 13, 2017 Updated product offerings and Figure 3 5 June 20, 2018 Minor editorial updates 6 August 13, 2019 Minor editorial updates Copyright 2019, Allegro MicroSystems. Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents. For the latest version of this document, visit our website: www.allegromicro.com 12 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com