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  • 型号: 74HC163PW,118
  • 制造商: NXP Semiconductors
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74HC163PW,118产品简介:

ICGOO电子元器件商城为您提供74HC163PW,118由NXP Semiconductors设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74HC163PW,118价格参考。NXP Semiconductors74HC163PW,118封装/规格:逻辑 -计数器,除法器, Counter IC Binary Counter 1 Element 4 Bit Positive Edge 16-TSSOP。您可以下载74HC163PW,118参考资料、Datasheet数据手册功能说明书,资料中有74HC163PW,118 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC SYNC 4BIT BINAR COUNT 16TSSOP计数器移位寄存器 SYNC 4-BIT BINARY

产品分类

逻辑 -计数器,除法器

品牌

NXP Semiconductors

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,计数器移位寄存器,NXP Semiconductors 74HC163PW,11874HC

数据手册

点击此处下载产品Datasheet

产品型号

74HC163PW,118

PCN封装

点击此处下载产品Datasheet点击此处下载产品Datasheet

PCN组件/产地

点击此处下载产品Datasheet

产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=24983

产品种类

计数器移位寄存器

传播延迟时间

185 ns

供应商器件封装

16-TSSOP

元件数

1

其它名称

568-7629-6

功能

Counter

包装

Digi-Reel®

商标

NXP Semiconductors

复位

同步

安装类型

表面贴装

安装风格

SMD/SMT

定时

同步

封装

Reel

封装/外壳

16-TSSOP(0.173",4.40mm 宽)

封装/箱体

TSSOP-16

工作温度

-40°C ~ 125°C

工作电源电压

5 V

工厂包装数量

2500

方向

最大工作温度

+ 125 C

最小工作温度

- 40 C

标准包装

1

每元件位数

4

电压-电源

2 V ~ 6 V

电源电压-最大

6 V

电源电压-最小

2 V

电路数量

1

触发器类型

正边沿

计数器类型

Binary

计数速率

55MHz

计数顺序

Up

输入线路数量

4

输出线路数量

4

逻辑类型

CMOS

逻辑系列

HC

零件号别名

74HC163PW-T

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PDF Datasheet 数据手册内容提取

74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Rev. 5 — 12 October 2018 Product data sheet 1. General description The 74HC163; 74HCT163 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action. It causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW after the next positive-going transition on the clock input (CP). This action occurs regardless of the levels at input pins PE, CET and CEP. This synchronous reset feature enables the designer to modify the maximum count with only one external NAND gate. The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC The CP to TC propagation delay and CEP to CP set-up time determine the maximum clock frequency for the cascaded counters according to the following formula: 2. Features and benefits • Complies with JEDEC standard no. 7A • Input levels: • For 74HC163: CMOS level • For 74HCT163: TTL level • Synchronous counting and loading • 2 count enable inputs for n-bit cascading • Synchronous reset • Positive-edge triggered clock • ESD protection: • HBM JESD22-A114F exceeds 2 000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC163D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm 74HCT163D

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Type number Package Temperature range Name Description Version 74HC163DB -40 °C to +125 °C SSOP16 plastic shrink small outline package; SOT338-1 16 leads; body width 5.3 mm 74HCT163DB 74HC163PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; SOT403-1 16 leads; body width 4.4 mm 74HCT163PW 4. Functional diagram 3 4 5 6 9 3 4 5 6 D0 D1 D2 D3 9 PE PARALLEL PE D0 D1 D2 D3 1 MR LOAD CIRCUITRY 7 CEP 10 CET 10 CET TC 15 2 CP 7 CEP 1 MR D TC 15 INH BINARY Q0 Q1 Q2 Q3 2 CP COUNTER CP 14 13 12 11 Q0 Q1 Q2 Q3 aaa-012184 14 13 12 11 aaa-012186 Fig. 1. Logic symbol Fig. 2. Functional diagram 1 CTR4 2R 9 M1 7 G3 10 G4 2 C2/1,3,4+ 3 14 1,2D 4 13 5 12 6 11 15 4CT = 15 aaa-012185 Fig. 3. IEC logic symbol 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 2 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset D0 D1 D2 D3 CET CEP PE MR FF FF FF FF D 1 Q D 2 Q D 3 Q D 4 Q CP CP CP CP CP Q Q Q Q Q0 Q1 Q2 Q3 TC aaa-012189 Fig. 4. Logic diagram 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 3 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 5. Pinning information 5.1. Pinning 74HC163 74HCT163 MR 1 16 VCC 74HC163 74HCT163 CP 2 15 TC MR 1 16 VCC D0 3 14 Q0 CP 2 15 TC D1 4 13 Q1 D0 3 14 Q0 D1 4 13 Q1 D2 5 12 Q2 D2 5 12 Q2 D3 6 11 Q3 D3 6 11 Q3 CEP 7 10 CET CEP 7 10 CET GND 8 9 PE GND 8 9 PE aaa-012182 aaa-012181 Fig. 6. Pin configuration SOT338-1 (SSOP16) and Fig. 5. Pin configuration SOT109-1 (SO16) SOT403-1 (TSSOP16) 5.2. Pin description Table 2. Pin description Symbol Pin Description MR 1 synchronous master reset (active LOW) CP 2 clock input (LOW-to-HIGH, edge triggered) D0, D1, D2, D3 3, 4, 5, 6 data input CEP 7 count enable input GND 8 ground (0 V) PE 9 parallel enable input (active LOW) CET 10 count enable carry input Q0, Q1, Q2, Q3 14, 13, 12, 11 flip-flop output TC 15 terminal count output V 16 supply voltage CC 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 4 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 6. Functional description Table 3. Function table[1] Operating mode Inputs Outputs MR CP CEP CET PE Dn Qn TC Reset (clear) I ↑ X X X X L L Parallel load h ↑ X X I I L L h ↑ X X I h H L Count h ↑ h h h X count Hold (do nothing) h X I X h X qn L h X X I h X qn L [1] The TC output is HIGH when CET is HIGH and the counter is at terminal count (HHHH); H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; q = lower case letters indicate the state of the referenced output one set-up time prior to the LOW-to-HIGH CP transition; X = don’t care; ↑ = LOW-to-HIGH clock transition. 0 1 2 3 4 15 5 14 6 13 7 12 11 10 9 8 aaa-012187 Fig. 7. State diagram 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 5 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset MR PE D0 D1 D2 D3 CP CEP CET Q0 Q1 Q2 Q3 TC 12 13 14 15 0 1 2 reset preset count inhibit aaa-012188 Sequence reset outputs to zero; preset to binary 12; count to 13, 14, 15, zero, one and two; inhibit. Fig. 8. Typical timing sequence 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V supply voltage -0.5 +7.0 V CC I input clamping current V < -0.5 V or V > V + 0.5 V - ±20 mA IK I I CC I output clamping current V < -0.5 V or V > V + 0.5 V - ±20 mA OK O O CC I output current V = -0.5 V to V + 0.5 V - ±25 mA O O CC I supply current - 50 mA CC I ground current -50 - mA GND T storage temperature -65 +150 °C stg P total power dissipation SO16 package [1] - 500 mW tot (T)SSOP16 package [1] - 500 mW [1] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For (T)SSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 6 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC163 74HCT163 Unit Min Typ Max Min Typ Max V supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V CC V input voltage 0 - V 0 - V V I CC CC V output voltage 0 - V 0 - V V O CC CC T ambient temperature -40 +25 +125 -40 +25 +125 °C amb Δt/ΔV input transition rise and fall rate V = 2.0 V - - 625 - - - ns/V CC V = 4.5 V - 1.67 139 - 1.67 139 ns/V CC V = 6.0 V - - 83 - - - ns/V CC 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HC163 V HIGH-level V = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V IH CC input voltage V = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V CC V = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V CC V LOW-level V = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V IL CC input voltage V = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V CC V = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V CC V HIGH-level V = V or V OH I IH IL output voltage I = -20 μA; V = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V O CC I = -20 μA; V = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V O CC I = -20 μA; V = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V O CC I = -4.0; V = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V O CC I = -5.2; V = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V O CC V LOW-level V = V or V OL I IH IL output voltage I = 20 μA; V = 2.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 20 μA; V = 4.5 V - 0 0.1 - 0.1 - 0.1 V O CC I = 20 μA; V = 6.0 V - 0 0.1 - 0.1 - 0.1 V O CC I = 4.0 mA; V = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V O CC I = 5.2 mA; V = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V O CC I input leakage V = V or GND; V = 6.0 V - - ±0.1 - ±1.0 - ±1.0 μA I I CC CC current I supply current V = V or GND; I = 0 A; - - 8.0 - 80.0 - 160.0 μA CC I CC O V = 6.0 V CC C input - 3.5 - - - - - pF I capacitance 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 7 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HCT163 V HIGH-level V = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V IH CC input voltage V LOW-level V = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V IL CC input voltage V HIGH-level V = V or V ; V = 4.5 V OH I IH IL CC output voltage I = -20 μA 4.4 4.5 - 4.4 - 4.4 - V O I = -4.0 mA 3.98 4.32 - 3.84 - 3.7 - V O V LOW-level V = V or V ; V = 4.5 V OL I IH IL CC output voltage I = 20 μA - 0 0.1 - 0.1 - 0.1 V O I = 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V O I input leakage V = V or GND; V = 5.5 V - - ±0.1 - ±1.0 - ±1.0 μA I I CC CC current I supply current V = V or GND; I = 0 A; - - 8.0 - 80.0 - 160.0 μA CC I CC O V = 5.5 V CC ΔI additional per input pin; V = V - 2.1 V; CC I CC supply current other inputs at V or GND; CC V = 4.5 V to 5.5 V; I = 0 A CC O pin MR - 95 342 - 427.5 - 465.5 μA pin CP - 110 396 - 495 - 539 μA pin CEP and Dn - 25 90 - 112.5 - 122.5 μA pin CET - 75 270 - 337.5 - 367.5 μA pin PE - 30 108 - 135 - 147 μA C input - 3.5 - - - - - pF I capacitance 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 8 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C = 50 pF unless otherwise specified; for test circuit see Fig. 14. L Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HC163 t propagation CP to Qn; see Fig. 9 [1] pd delay V = 2.0 V - 55 185 - 230 - 280 ns CC V = 4.5 V - 20 37 - 46 - 56 ns CC V = 5.0 V; C = 15 pF - 17 - - - - - ns CC L V = 6.0 V - 16 31 - 39 - 48 ns CC CP to TC; see Fig. 9 V = 2.0 V - 69 215 - 270 - 320 ns CC V = 4.5 V - 25 43 - 54 - 65 ns CC V = 5.0 V; C = 15 pF - 21 - - - - - ns CC L V = 6.0 V - 20 37 - 46 - 55 ns CC CET to TC; see Fig. 10 V = 2.0 V - 36 120 - 150 - 180 ns CC V = 4.5 V - 13 24 - 30 - 36 ns CC V = 5.0 V; C = 15 pF - 11 - - - - - ns CC L V = 6.0 V - 10 20 - 26 - 31 ns CC t transition see Fig. 9 and Fig. 10 [2] t time V = 2.0 V - 19 75 - 95 - 110 ns CC V = 4.5 V - 7 15 - 19 - 22 ns CC V = 6.0 V - 6 13 - 16 - 19 ns CC t pulse width CP; HIGH or LOW; see Fig. 9 W V = 2.0 V 80 17 - 100 - 120 - ns CC V = 4.5 V 16 6 - 20 - 24 - ns CC V = 6.0 V 14 5 - 17 - 20 - ns CC t set-up time MR, Dn to CP; see Fig. 11 and su Fig. 12 V = 2.0 V 80 17 - 100 - 120 - ns CC V = 4.5 V 16 6 - 20 - 24 - ns CC V = 6.0 V 14 5 - 17 - 20 - ns CC PE to CP; see Fig. 11 V = 2.0 V 80 22 - 100 - 120 - ns CC V = 4.5 V 16 8 - 20 - 24 - ns CC V = 6.0 V 14 6 - 17 - 20 - ns CC CEP, CET to CP; see Fig. 13 V = 2.0 V 175 58 - 220 - 265 - ns CC V = 4.5 V 35 21 - 44 - 53 - ns CC V = 6.0 V 30 17 - 37 - 45 - ns CC 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 9 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max t hold time Dn, PE, CEP, CET, MR to CP; h see Fig. 11, Fig. 12 and Fig. 13 V = 2.0 V 0 -14 - 0 - 0 - ns CC V = 4.5 V 0 -5 - 0 - 0 - ns CC V = 6.0 V 0 -4 - 0 0 - ns CC f maximum CP; see Fig. 9 max frequency V = 2.0 V 5 15 - 4 - 4 - MHz CC V = 4.5 V 27 46 - 22 - 18 - MHz CC V = 5.0 V; C = 15 pF - 51 - - - - - MHz CC L V = 6.0 V 32 55 - 26 - 21 - MHz CC C power V = GND to V ; V = 5 V; [3] - 33 - - - - - pF PD I CC CC dissipation f = 1 MHz i capacitance 74HCT163 t propagation CP to Qn; see Fig. 9 [1] pd delay V = 4.5 V - 23 39 - 49 - 59 ns CC V = 5.0 V; C = 15 pF - 20 - - - - - ns CC L CP to TC; see Fig. 9 V = 4.5 V - 29 49 - 61 - 74 ns CC V = 5.0 V; C = 15 pF - 25 - - - - - ns CC L CET to TC; see Fig. 10 V = 4.5 V - 17 32 - 44 - 48 ns CC V = 5.0 V; C = 15 pF - 14 - - - - - ns CC L t transition see Fig. 9 and Fig. 10 [2] t time V = 4.5 V - 7 15 - 19 - 22 ns CC t pulse width CP; HIGH or LOW; see Fig. 9 W V = 4.5 V 20 6 - 25 - 30 - ns CC t set-up time MR, Dn to CP; see Fig. 11 and su Fig. 12 V = 4.5 V 20 9 - 25 - 30 - ns CC PE to CP; see Fig. 11 V = 4.5 V 20 11 - 25 - 30 - ns CC CEP, CET to CP; see Fig. 13 V = 4.5 V 40 24 - 50 - 60 - ns CC t hold time Dn, PE, CEP, CET, MR to CP; h see Fig. 11, Fig. 12 and Fig. 13 V = 4.5 V 0 -5 - 0 - 0 - ns CC f maximum CP; see Fig. 9 max frequency V = 4.5 V 26 45 - 21 - 17 - MHz CC V = 5.0 V; C = 15 pF - 50 - - - - - MHz CC L 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 10 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max C power V = GND to V - 1.5 V; [3] - 35 - - - - - pF PD I CC dissipation V = 5 V; f = 1 MHz CC i capacitance [1] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in μW): PD = CPD x VCC2 x fi x N + ∑(CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL x VCC2 x fo) = sum of outputs. 10.1. Waveforms and test circuit 1/fmax VI CP input VM GND tW tPHL tPLH VOH 90 % 90 % Qn, TC VM output 10 % 10 % VOL tTHL tTLH aaa-012353 Measurement points are given in Table 8. Logic levels V and V are typical output voltage levels that occur with the output load. OL OH Fig. 9. The clock (CP) to outputs (Qn, TC) propagation delays, pulse width, output transition times and maximum frequency VI CET input VM GND tPLH tPHL VOH 90 % 90 % TC output VM 10 % 10 % VOL tTLH tTHL aaa-012354 Measurement points are given in Table 8. Logic levels V and V are typical output voltage levels that occur with the output load. OL OH Fig. 10. The count enable carry input (CET) to terminal count output (TC) propagation delays and output transition times 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 11 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset VI PE input VM GND tsu tsu th th VI CP input VM GND tsu tsu th th VI Dn input VM GND aaa-012356 The shaded areas indicate when the input is permitted to change for predictable output performance. Measurement points are given in Table 8. Fig. 11. The data input (Dn) and parallel enable input (PE) set-up and hold times VI MR input VM GND tsu tsu th th VI CP input VM GND aaa-012357 The shaded areas indicate when the input is permitted to change for predictable output performance. Measurement points are given in Table 8. Fig. 12. The master reset (MR) set-up and hold times VI CEP, CET input VM GND tsu tsu th th VI CP input VM GND aaa-012358 The shaded areas indicate when the input is permitted to change for predictable output performance. Measurement points are given in Table 8. Fig. 13. The count enable input (CEP) and count enable carry input (CET) set-up and hold times Table 8. Measurement points Type Input Output V V V M I M 74HC163 0.5 x V GND to V 0.5 x V CC CC CC 74HCT163 1.3 V GND to 3 V 1.3 V 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 12 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset tW VI 90 % negative pulse VM VM 10 % 0 V tf tr tr tf VI 90 % positive pulse VM VM 10 % 0 V tW VCC VCC VI VO RL S1 G DUT open RT CL 001aad983 Test data is given in Table 9. Test circuit definitions: R = Termination resistance should be equal to output impedance Z of the pulse generator T o C = Load capacitance including jig and probe capacitance L R = Load resistance. L S1 = Test selection switch Fig. 14. Test circuit for measuring switching times Table 9. Test data Type Input Load S1 position V t, t C R t , t I r f L L PHL PLH 74HC163 V 6 ns 15 pF, 50 pF 1 kΩ open CC 74HCT163 3 V 6 ns 15 pF, 50 pF 1 kΩ open 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 13 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 11. Application information The 74HC163; 74HCT63 facilitate designing counters of any modulus with minimal external logic. The output is glitch-free due to the synchronous reset. other Q0 inputs Q1 Q2 output Q3 reset aaa-012190 Fig. 15. Modulo-5 counter other Q0 inputs Q1 Q2 output Q3 reset aaa-012191 Fig. 16. Modulo-11 counter 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 14 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A 3 ) A pin 1 index θ L p 1 8 L e w M detail X b p 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (1) e H E L L p Q v w y Z (1) θ 0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7 mm 1.75 0.25 1.27 1.05 0.2 5 0.25 0.1 0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8 o 0.010 0.057 0.019 0.0100 0.39 0.16 0.244 0.039 0.028 0.028 0 o inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004 0.004 0.049 0.014 0.0075 0.38 0.15 0.228 0.016 0.020 0.012 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT109-1 076E07 MS-012 03-02-19 Fig. 17. Package outline SOT109-1 (SO16) 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 15 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A 3 ) A pin 1 index θ L p L 1 8 detail X w M e b p 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (1) e H E L L p Q v w y Z (1) θ 0.21 1.80 0.38 0.20 6.4 5.4 7.9 1.03 0.9 1.00 8 o mm 2 0.05 1.65 0.25 0.25 0.09 6.0 5.2 0.65 7.6 1.25 0.63 0.7 0.2 0.13 0.1 0.55 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT338-1 MO-150 03-02-19 Fig. 18. Package outline SOT338-1 (SSOP16) 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 16 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y H E v M A Z 16 9 Q A 2 (A 3 ) A pin 1 index A 1 θ L p L 1 8 detail X w M e b p 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mAax . A 1 A 2 A 3 b p c D (1) E (2) e H E L L p Q v w y Z (1) θ 0.15 0.95 0.30 0.2 5.1 4.5 6.6 0.75 0.4 0.40 8 o mm 1.1 0.05 0.80 0.25 0.19 0.1 4.9 4.3 0.65 6.2 1 0.50 0.3 0.2 0.13 0.1 0.06 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION IEC JEDEC JEITA PROJECTION 99-12-27 SOT403-1 MO-153 03-02-18 Fig. 19. Package outline SOT403-1 (TSSOP16) 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 17 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT163 v.5 20181012 Product data sheet - 74HC_HCT163 v.4 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Typo corrected for pin name Q0: Fig. 5 and Fig. 6. 74HC_HCT163 v.4 20151228 Product data sheet - 74HC_HCT163 v.3 Modifications: • Type numbers 74HC163N and 74HCT163N (SOT38-4) removed. 74HC_HCT163 v.3 20140602 Product data sheet - 74HC_HCT163_CNV v.2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT163_CNV v.2 19930927 Product specification - - 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 18 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset injury, death or severe property or environmental damage. Nexperia and its 15. Legal information suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the Data sheet status product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status Product Definition Applications — Applications that are described herein for any of these [1][2] status [3] products are for illustrative purposes only. Nexperia makes no representation Objective [short] Development This document contains data from or warranty that such applications will be suitable for the specified use data sheet the objective specification for without further testing or modification. product development. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for Preliminary [short] Qualification This document contains data from any assistance with applications or customer product design. It is customer’s data sheet the preliminary specification. sole responsibility to determine whether the Nexperia product is suitable Product [short] Production This document contains the product and fit for the customer’s applications and products planned, as well as data sheet specification. for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. [1] Please consult the most recently issued document before initiating or completing a design. Nexperia does not accept any liability related to any default, damage, costs [2] The term 'short data sheet' is explained in section "Definitions". or problem which is based on any weakness or default in the customer’s [3] The product status of device(s) described in this document may have applications or products, or the application or use by customer’s third party changed since this document was published and may differ in case of customer(s). Customer is responsible for doing all necessary testing for the multiple devices. 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This between the translated and English versions. document supersedes and replaces all information supplied prior to the publication hereof. Trademarks Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical Notice: All referenced brands, product names, service names and systems or equipment, nor in applications where failure or malfunction trademarks are the property of their respective owners. of an Nexperia product can reasonably be expected to result in personal 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 19 / 20

Nexperia 74HC163; 74HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Contents 1. General description......................................................1 2. Features and benefits..................................................1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................4 5.1. Pinning.........................................................................4 5.2. Pin description.............................................................4 6. Functional description.................................................5 7. Limiting values.............................................................6 8. Recommended operating conditions..........................7 9. Static characteristics....................................................7 10. Dynamic characteristics............................................9 10.1. Waveforms and test circuit......................................11 11. Application information............................................14 12. Package outline........................................................15 13. Abbreviations............................................................18 14. Revision history........................................................18 15. Legal information......................................................19 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 12 October 2018 74HC_HCT163 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 5 — 12 October 2018 20 / 20