Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 UCC27211A 120-V Boot, 4-A Peak, High-Frequency High-Side and Low-Side Driver 1 Features 2 Applications • DrivesTwoN-ChannelMOSFETsinHigh-Side • PowerSuppliesforTelecom,Datacom,and 1 andLow-SideConfigurationWithIndependent Merchant Inputs • Half-BridgeandFull-BridgeConverters • MaximumBootVoltage120-VDC • Push-PullConverters • 4-ASink,4-ASourceOutputCurrents • HighVoltageSynchronous-BuckConverters • 0.9-Ω PullupandPulldownResistance • Two-SwitchForwardConverters • InputPinsCanTolerate –10Vto+20Vandare • Active-ClampForwardConverters IndependentofSupplyVoltageRange • Class-DAudioAmplifiers • TTLorPseudo-CMOSCompatibleInputVersions • 8-Vto17-VVDDOperatingRange,(20-VABS 3 Description MAX) The UCC27211A driver is based on the popular • 7.2-nsRiseand5.5-nsFallTimeWith1000-pF UCC27201 MOSFET drivers; but, this device offers several significant performance improvements. Peak Load output pullup and pulldown current has been • FastPropagationDelayTimes(20-nstypical) increased to 4-A source and 4-A sink, and pullup and • 4-nsDelayMatching pulldown resistance have been reduced to 0.9 Ω, and • SymmetricalUndervoltageLockoutforHigh-Side thereby allows for driving large power MOSFETs with andLow-SideDriver minimized switching losses during the transition through the Miller Plateau of the MOSFET. The input • AllIndustryStandardPackagesAvailable structure can directly handle –10 VDC, which – SOIC-8 increases robustness and also allows direct interface – 4-mm ×4-mmSON-8 to gate-drive transformers without using rectification diodes. The inputs are also independent of supply – 4-mm ×4-mmSON-10 voltageandhavea20-Vmaximumrating. • Specifiedfrom–40to+140°C DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.90mm×3.91mm UCC27211A VSON(8) 4.00mm×4.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TypicalApplicationDiagram PropagationDelaysvsSupplyVoltage +12V +100V 32 T=25°C 28 VDD SECSOINDDEARY s) 24 HB CIRCUIT y (n a 20 CONPTRWOMLLER HLII CONTROL DDRRHIIVVIEE HHLOOS gation Del 1126 LO a p UCC27211A Pro 8 TDLRR VSS TDLFF ISOLATION 4 TDHRR FEEADNBDACK TDHFF UDG-13114 0 8 12 16 20 VDD=VHB−Supply Voltage (V) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 8.1 Overview.................................................................12 2 Applications........................................................... 1 8.2 FunctionalBlockDiagram.......................................13 3 Description............................................................. 1 8.3 FeatureDescription.................................................13 8.4 DeviceFunctionalModes........................................14 4 RevisionHistory..................................................... 2 9 ApplicationandImplementation........................ 15 5 Description(continued)......................................... 3 9.1 ApplicationInformation............................................15 6 PinConfigurationandFunctions......................... 4 9.2 TypicalApplication..................................................15 7 Specifications......................................................... 5 10 PowerSupplyRecommendations..................... 20 7.1 AbsoluteMaximumRatings......................................5 11 Layout................................................................... 20 7.2 ESDRatings..............................................................5 11.1 LayoutGuidelines.................................................20 7.3 RecommendedOperatingConditions.......................5 11.2 LayoutExample....................................................21 7.4 ThermalInformation..................................................6 11.3 ThermalConsiderations........................................21 7.5 ElectricalCharacteristics...........................................6 12 DeviceandDocumentationSupport................. 22 7.6 SwitchingCharacteristics:PropagationDelays........7 7.7 SwitchingCharacteristics:DelayMatching...............7 12.1 DocumentationSupport........................................22 7.8 SwitchingCharacteristics:OutputRiseandFall 12.2 CommunityResources..........................................22 Time........................................................................... 7 12.3 Trademarks...........................................................22 7.9 SwitchingCharacteristics:Miscellaneous.................7 12.4 ElectrostaticDischargeCaution............................22 7.10 TypicalCharacteristics............................................9 12.5 Glossary................................................................22 8 DetailedDescription............................................ 12 13 Mechanical,Packaging,andOrderable Information........................................................... 22 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(September2013)toRevisionC Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 • ChangedPowerPADtothermalpadthroughoutdocument .................................................................................................. 1 • RemovedtheUCC27210Adevicefromthedatasheet......................................................................................................... 1 ChangesfromRevisionA(August2013)toRevisionB Page • Changedmarketingstatusfromproductpreviewtoproductiondata..................................................................................... 1 ChangesfromOriginal(August2013)toRevisionA Page • AddedNote2totheTerminalFunctionsTable...................................................................................................................... 4 • ChangedRepetitivepulsedatafrom–18Vto–(24V–VDD)............................................................................................... 5 • AddedadditionaldetailstoNote2.......................................................................................................................................... 5 • ChangedVoltageonHS,V (repetitivepulse<100ns)datafrom–15to–(24V–VDD).................................................. 5 HS 2 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 5 Description (continued) TheswitchingnodeoftheUCC27211A(HSpin)canhandle–18-Vmaximum,whichallowsthehigh-sidechannel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance. The UCC27210A (Pseudo-CMOS inputs) and UCC27211A (TTL inputs) have increased hysteresis that allows for interfacetoanalogordigitalPWMcontrollerswithenhancednoiseimmunity. The low-side and high-side gate drivers are independently controlled and matched to 2 ns between the turnon andturnoffofeachother. An on-chip 120-V rated bootstrap diode eliminates the external discrete diodes. Undervoltage lockout is provided for both the high-side and the low-side drivers which provides symmetric turnon and turnoff behavior and forces theoutputslowifthedrivevoltageisbelowthespecifiedthreshold. TheUCC27211Adeviceisofferedin8-pinSOIC(D)and8-pinVSON(DRM)packages. Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 6 Pin Configuration and Functions DPackage 8-PinSOIC DRMPackage TopView 8-PinVSON TopView VDD 1 8 LO 1 8 VDD LO Exposed Thermal HB 2 7 VSS Die Pad* 2 7 HB VSS HO 3 6 LI 3 6 HO LI HS 4 5 HI 4 5 HS HI PinFunctions PIN I/O DESCRIPTION NAME NO. High-sidebootstrapsupply.Thebootstrapdiodeison-chipbuttheexternalbootstrapcapacitoris required.Connectpositivesideofthebootstrapcapacitortothispin.TypicalrangeofHBbypass HB 2 P capacitoris0.022µFto0.1µF.Thecapacitorvalueisdependantonthegatechargeofthehigh- sideMOSFETandmustalsobeselectedbasedonspeedandripplecriteria. HI 5 I High-sideinput.(1) HO 3 O High-sideoutput.Connecttothegateofthehigh-sidepowerMOSFET. High-sidesourceconnection.Connecttosourceofhigh-sidepowerMOSFET.Connectthe HS 4 P negativesideofbootstrapcapacitortothispin. LI 6 I Low-sideinput.(1) LO 8 O Low-sideoutput.Connecttothegateofthelow-sidepowerMOSFET. Positivesupplytothelower-gatedriver.De-couplethispintoV (GND).Typicaldecoupling VDD 1 P capacitorrangeis0.22µFto4.7µF(See (2)). SS VSS 7 — Negativesupplyterminalforthedevicethatisgenerallygrounded. Thermalpad(3) — UtilizedontheDRMpackageonly.ElectricallyreferencedtoVSS(GND).Connecttoalarge thermalmasstraceorGNDplanetodramaticallyimprovethermalperformance. (1) HIorLIinputisassumedtoconnecttoalowimpedancesourcesignal.Thesourceoutputimpedanceisassumedlessthan100Ω.Ifthe sourceimpedanceisgreaterthan100Ω,addabypassingcapacitor,each,betweenHIandVSSandbetweenLIandVSS.Theadded capacitorvaluedependsonthenoiselevelspresentedonthepins,typicallyfrom1nFto10nFshouldbeeffectivetoeliminatethe possiblenoiseeffect.Whennoiseispresentontwopins,HIorLI,theeffectistocauseHOandLOmalfunctionstohavewronglogic outputs. (2) ForcoldtemperatureapplicationsTIrecommendstheuppercapacitancerange.FollowtheLayoutGuidelinesforPCBlayout. (3) Thethermalpadisnotdirectlyconnectedtoanyleadsofthepackage;however,itiselectricallyandthermallyconnectedtothe substratewhichisthegroundofthedevice. 4 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Supplyvoltagerange,V (2),V –V –0.3 20 V DD HB HS InputvoltagesonLIandHI,V ,V –10 20 V LI HI DC –0.3 V +0.3 DD OutputvoltageonLO,V V LO Repetitivepulse<100ns(3) –2 V +0.3 DD DC V –0.3 V +0.3 HS HB OutputvoltageonHO,V V HO Repetitivepulse<100ns(3) V –2 V +0.3 HS HB DC –1 115 VoltageonHS,V V HS Repetitivepulse<100ns(3) –(24V–VDD) 115 VoltageonHB,V –0.3 120 V HB Operatingvirtualjunctiontemperaturerange,T –40 150 °C J Storagetemperature,T –65 150 °C STG (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) AllvoltagesarewithrespecttoVSSunlessotherwisenoted.Currentsarepositiveintoandnegativeoutofthespecifiedterminal. (3) Verifiedatbenchcharacterization.VDDisthevalueusedinanapplicationdesign. 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V(ESD) Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22- V C101(2) ±1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions allvoltagesarewithrespecttoV ;currentsarepositiveintoandnegativeoutofthespecifiedterminal.–40°C<T =T < SS J A 140°C(unlessotherwisenoted) MIN NOM MAX UNIT Supplyvoltagerange,V ,V –V 8 12 17 V DD HB HS VoltageonHS,V –1 105 V HS VoltageonHS,V (repetitivepulse<100ns) –(24V–VDD) 110 V HS V +8, V +17, VoltageonHB,V HS HS V HB V –1 115 DD VoltageslewrateonHS 50 V/ns Operatingjunctiontemperature –40 140 °C Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 7.4 Thermal Information UCC27211A THERMALMETRIC(1) D(SOIC) DRM(SON) UNIT 8PINS 8PINS R Junction-to-ambientthermalresistance 111.8 37.7 °C/W θJA R Junction-to-case(top)thermalresistance 56.9 47.2 °C/W θJC(top) R Junction-to-boardthermalresistance 53.0 9.6 °C/W θJB ψ Junction-to-topcharacterizationparameter 7.8 2.8 °C/W JT ψ Junction-to-boardcharacterizationparameter 52.3 9.4 °C/W JB R Junction-to-case(bottom)thermalresistance n/a 3.6 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. 7.5 Electrical Characteristics V =V =12V,V =V =0V,noloadonLOorHO,T =T =–40°Cto140°C,(unlessotherwisenoted) DD HB HS SS A J PARAMETER TESTCONDITION MIN TYP MAX UNIT SUPPLYCURRENTS I V quiescentcurrent V(LI)=V(HI)=0V 0.05 0.085 0.17 mA DD DD 2.1 2.6 6.5 mA I V operatingcurrent f=500kHz,C =0 DDO DD LOAD 2.1 2.5 6.5 mA I Bootvoltagequiescentcurrent V(LI)=V(HI)=0V 0.015 0.065 0.1 mA HB I Bootvoltageoperatingcurrent f=500kHz,C =0 1.5 2.5 5.1 mA HBO LOAD I HBtoV quiescentcurrent V(HS)=V(HB)=115V 0.0005 1 µA HBS SS I HBtoV operatingcurrent f=500kHz,C =0 0.07 1.2 mA HBSO SS LOAD INPUT V Inputvoltagethreshold 1.9 2.3 2.7 V HIT V Inputvoltagethreshold 1.3 1.6 1.9 V LIT V Inputvoltagehysteresis 700 mV IHYS R Inputpulldownresistance 68 kΩ IN UNDER-VOLTAGELOCKOUT(UVLO) V V turnonthreshold 6.2 7 7.8 V DDR DD V Hysteresis 0.5 V DDHYS V V turnonthreshold 5.6 6.7 7.9 V HBR HB V Hysteresis 1.1 V HBHYS BOOTSTRAPDIODE V Low-currentforwardvoltage I =100µA 0.65 0.8 V F VDD-HB V High-currentforwardvoltage I =100mA 0.85 0.95 V FI VDD-HB R Dynamicresistance,ΔVF/ΔI I =100mAand80mA 0.3 0.5 0.85 Ω D VDD-HB LOGATEDRIVER V Low-leveloutputvoltage I =100mA 0.05 0.1 0.19 V LOL LO V Highleveloutputvoltage I =–100mA,V =V –V 0.1 0.16 0.29 V LOH LO LOH DD LO Peakpull-upcurrent(1) V =0V 3.7 A LO Peakpull-downcurrent(1) V =12V 4.5 A LO HOGATEDRIVER V Low-leveloutputvoltage I =100mA 0.05 0.1 0.19 V HOL HO V High-leveloutputvoltage I =–100mA,V =V –V 0.1 0.16 0.29 V HOH HO HOH HB HO Peakpull-upcurrent(1) V =0V 3.7 A HO Peakpull-downcurrent(1) V =12V 4.5 A HO (1) Ensuredbydesign. 6 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 7.6 Switching Characteristics: Propagation Delays overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT T V fallingtoV falling 10 16 30 ns DLFF LI LO T V fallingtoV falling 10 16 30 ns DHFF HI HO C =0 LOAD T V risingtoV rising 10 20 42 ns DLRR LI LO T V risingtoV rising 10 20 42 ns DHRR HI HO 7.7 Switching Characteristics: Delay Matching overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT T =25°C 4 9.5 J T FromHOOFFtoLOON ns MON T =–40°Cto140°C 4 17 J T =25°C 4 9.5 J T FromLOOFFtoHOON ns MOFF T =–40°Cto140°C 4 17 J 7.8 Switching Characteristics: Output Rise and Fall Time overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT t LOrisetime 7.2 ns R C =1000pF,from10%to90% LOAD t HOrisetime 7.2 ns R t LOfalltime 5.5 ns F C =1000pF,from90%to10% LOAD t HOfalltime 5.5 ns F t LO,HO C =0.1µF,(3Vto9V) 0.36 0.6 µs R LOAD t LO,HO C =0.1µF,(9Vto3V) 0.15 0.4 µs F LOAD 7.9 Switching Characteristics: Miscellaneous overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Minimuminputpulsewidththatchangesthe 50 ns output Bootstrapdiodeturnofftime(1)(2) I =20mA,I =0.5A(3) 20 ns F REV (1) Ensuredbydesign. (2) I :Forwardcurrentappliedtobootstrapdiode,I :Reversecurrentappliedtobootstrapdiode. F REV (3) TypicalvaluesforT =25°C. A Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com LI Input HI (HI,LI) TDLRR,TDHRR LO Output (HO,LO) TDLFF,TDHFF HO TMON TMOFF Figure1. TimingDiagram 8 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 7.10 Typical Characteristics 100 100 T= 25°C VDD= 12V µA) A) −Quiescent Current ( 468000 Operating Current (m 110 CCLL==00ppFF,,TT==−254°0C°C I, IDDHB 20 IIDHDB I−DDO 0.1 CCCCLLLL====0114p007F000,000Tppp=FFF,,,1TTT4===0°211C544°00C°°CC 0 0.01 0 2 4 6 8 10 12 14 16 18 20 10 100 1000 VDD= VHB−Supply Voltage (V) Frequency (kHz) G002 Figure2.QuiescentCurrentvsSupplyVoltage Figure3.IDDOperatingCurrentvsFrequency 100 100 VDD= 12V VHB−VHS= 12V A) A) m m nt ( 10 nt ( 10 e e urr urr C C ng 1 ng 1 erati CL=0pF,T=−40°C erati CL=0pF,T=−40°C Op CL=0pF,T=25°C Op CL=0pF,T=25°C − 0.1 CL=0pF,T=140°C − 0.1 CL=0pF,T=140°C DO CL=1000pF,T=25°C BO CL=1000pF,T=25°C ID CL=1000pF,T=140°C IH CL=1000pF,T=140°C CL=4700pF,T=140°C CL=4700pF,T=140°C 0.01 0.01 10 100 1000 10 100 1000 Frequency (kHz) Frequency (kHz) Figure4.IDDOperatingCurrentvsFrequency Figure5.BootVoltageOperatingCurrentvs Frequency(HBToHS) 6 6 V) T= 25°C V) VDD= 12V Voltage ( 45 Voltage ( 45 Threshold 23 Threshold 23 −Input 1 −Input 1 HI, LI 0 RFaislliinngg HI, LI 0 RFaislliinngg −1 −1 8 12 16 20 −40 −20 0 20 40 60 80 100 120 140 VDD−Supply Voltage (V) Temperature (°C) Figure6.InputThresholdvsSupplyVoltage Figure7.InputThresholdsvsTemperature Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com Typical Characteristics (continued) 0.32 0.2 IHO=ILO= 100mA IHO=ILO= 100mA Output Voltage (V) 000.0..122.6248 Output Voltage (V) 00..1126 HO 0.12 HO 0.08 O/ O/ L 0.08 VDD=VHB=8V L VDD=VHB=8V V−OH 0.04 VVDDDD==VVHHBB==1126VV V−OL 0.04 VVDDDD==VVHHBB==1126VV VDD=VHB=20V VDD=VHB=20V 0 0 −40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 Temperature (°C) Temperature (°C) Figure8.LOandHOHigh-LevelOutputVoltage Figure9.LOandHOLow-LevelOutputVoltage vsTemperature vsTemperature 8 1.5 7.6 1.2 7.2 V) V) hreshold ( 66..48 ysteresis ( 00..69 T H 6 0.3 5.6 VDD Rising Threshold VDD UVLO Hysteresis HB Rising Threshold HB UVLO Hysteresis 5.2 0 −40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 Temperature (°C) Temperature (°C) G009 G010 Figure10.UndervoltageLockoutThreshold Figure11.UndervoltageLockoutThresholdHysteresis vsTemperature vsTemperature 40 32 36 VDD=VHB=12V VDD=VHB=12V 32 s) s) 24 y (n 28 y (n ela 24 ela D D n 20 n 16 o o ati 16 ati g g a a Prop 12 TDLRR Prop 8 TDLRR 8 TDLFF TDLFF TDHRR TDHRR 4 TDHFF TDHFF 0 0 −40 −20 0 20 40 60 80 100 120 140 −40 −20 0 20 40 60 80 100 120 140 Temperature (°C) Temperature (°C) Figure12.PropagationDelaysvsTemperature Figure13.PropagationDelaysvsTemperature 10 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 Typical Characteristics (continued) 32 10 T=25°C VDD=VHB=12V 28 8 ns) 24 s) ay ( 20 g (n 6 Del hin pagation 1126 elay Matc 24 Pro 8 TDLRR D TDLFF 0 4 TDHRR TMon TDHFF TMoff 0 −2 8 12 16 20 −40 −20 0 20 40 60 80 100 120 140 VDD=VHB−Supply Voltage (V) Temperature (°C) Figure14.PropagationDelaysvsSupplyVoltage Figure15.DelayMatchingvsTemperature 5 100 VDD=VHB=12V A) 4 10 ent ( A) utput Curr 3 Current (m 1 − O 2 de 0.1 HO Dio , IO 1 0.01 IL Pull Down Current Pull Up Current 0 0.001 0 2 4 6 8 10 12 500 550 600 650 700 750 800 850 VLO, VHO − Output Voltage (V) G016 Diode Voltage (mV) G017 Figure16.OutputCurrentvsOutputVoltage Figure17.DiodeCurrentvsDiodeVoltage Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 8 Detailed Description 8.1 Overview The UCC27211A devices represent Texas Instruments’ latest generation of high-voltage gate drivers, which are designed to drive both the high-side and low-side of N-Channel MOSFETs in a half- and full-bridge or synchronous-buck configuration. The floating high-side driver can operate with supply voltages of up to 120 V, which allows for N-Channel MOSFET control in half-bridge, full-bridge, push-pull, two-switch forward, and active clampforwardconverters. The UCC27211A devices feature 4-A source and sink capability, industry best-in-class switching characteristics and a host of other features listed in Table 1. These features combine to ensure efficient, robust and reliable operationinhigh-frequencyswitchingpowercircuits. Table1.UCC27211AHighlights FEATURE BENEFIT HighpeakcurrentidealfordrivinglargepowerMOSFETswith 4-Asourceandsinkcurrentwith0.9-Ωoutputresistance minimalpowerloss(fast-drivecapabilityatMillerplateau) Increasedrobustnessandabilitytohandleundershootand Inputpins(HIandLI)candirectlyhandle–10VDCupto20VDC overshootcaninterfacedirectlytogate-drivetransformerswithout havingtouserectificationdiodes. 120-Vinternalbootdiode Providesvoltagemargintomeettelecom100-Vsurgerequirements Allowsthehigh-sidechanneltohaveextraprotectionfrominherent Switchnode(HSpin)abletohandle–18Vmaximumfor100ns negativevoltagescausedbyparasiticinductanceandstray capacitance RobustESDcircuitrytohandlevoltagespikes ExcellentimmunitytolargedV/dTconditions Best-in-classswitchingcharacteristicsandextremelylow-pulse 18-nspropagationdelaywith7.2-nsrisetimeand5.5-nsfalltime transmissiondistortion 2-ns(typ)delaymatchingbetweenchannels Avoidstransformervolt-secondoffsetinbridge SymmetricalUVLOcircuit Ensureshigh-sideandlow-sideshutdownatthesametime CMOSoptimizedthresholdorTTLoptimizedthresholdswith ComplementarytoanalogordigitalPWMcontrollers;increased increasedhysteresis hysteresisoffersaddednoiseimmunity In UCC27211A, the high side and low side each have independent inputs that allow maximum flexibility of input control signals in the application. The boot diode for the high-side driver bias supply is internal to the UCC27211A. The UCC27210A is the Pseudo-CMOS compatible input version and the UCC27211A is the TTL or logic compatible version. The high-side driver is referenced to the switch node (HS), which is typically the source pin of the high-side MOSFET and drain pin of the low-side MOSFET. The low-side driver is referenced to V , SS which is typically ground. UCC27211A functions are divided into the input stages, UVLO protection, level shift, bootdiode,andoutputdriverstages. 12 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 8.2 Functional Block Diagram 2 HB UVLO LEVEL 3 HO SHIFT 4 HS HI 5 V 1 DD UVLO 8 LO LI 6 7 V SS 8.3 Feature Description 8.3.1 InputStages The input stages provide the interface to the PWM output signals. The input impedance is 100-kΩ nominal and input capacitance is approximately 2 pF. The 100 kΩ is a pulldown resistance to V (ground). The Pseudo- SS CMOS input structure has been designed to provide large hysteresis and at the same time to allows interfacing to a multitude of analog or digital PWM controllers. In some CMOS designs, the input thresholds are determined as a percentage of VDD. By doing so, the high-level input threshold can become unreasonably high and unusable. The device recognizes the fact that VDD levels are trending downward and it therefore provides a rising threshold with 5.0 V (typical) and falling threshold with 3.2 V (typical). The input hysteresis of the is 1.8 V (typical). The input stages of the UCC27211A have impedance of 70-kΩ nominal and input capacitance is approximately 2pF.PulldownresistancetoV (ground)is70kΩ.Thelogiclevelcompatibleinputprovidesarisingthresholdof SS 2.3Vandafallingthresholdof1.6V. 8.3.2 UndervoltageLockout(UVLO) The bias supplies for the high-side and low-side drivers have UVLO protection. V as well as V to V DD HB HS differential voltages are monitored. The V UVLO disables both drivers when V is below the specified DD DD threshold. The rising V threshold is 7.0 V with 0.5-V hysteresis. The VHB UVLO disables only the high-side DD driver when the V to V differential voltage is below the specified threshold. The V UVLO rising threshold is HB HS HB 6.7Vwith1.1-Vhysteresis. 8.3.3 LevelShift The level shift circuit is the interface from the high-side input to the high-side driver stage which is referenced to the switch node (HS). The level shift allows control of the HO output referenced to the HS pin and provides excellentdelaymatchingwiththelow-sidedriver. 8.3.4 BootDiode The boot diode necessary to generate the high-side bias is included in the UCC27211A family of drivers. The diodeanodeisconnectedtoV andcathodeconnectedtoV .WiththeV capacitorconnectedtoHBandthe DD HB HB HS pins, the V capacitor charge is refreshed every switching cycle when HS transitions to ground. The boot HB diode provides fast recovery times, low diode resistance, and voltage rating margin to allow for efficient and reliableoperation. Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com Feature Description (continued) 8.3.5 OutputStages TheoutputstagesaretheinterfacetothepowerMOSFETsinthepowertrain.Highslewrate,lowresistanceand high peak current capability of both output drivers allow for efficient switching of the power MOSFETs. The low- sideoutputstageisreferencedfromV toV andthehighsideisreferencedfromV toV . DD SS HB HS 8.4 Device Functional Modes The device operates in normal mode and UVLO mode. See the Undervoltage Lockout (UVLO) section for information on UVLO operation mode. In the normal mode the output state is dependent on states of the HI and LIpins.Table2liststheoutputstatesfordifferentinputpincombinations. Table2.DeviceLogicTable HIPIN LIPIN HO(1) LO(2) L L L L L H L H H L H L H H H H (1) HOismeasuredwithrespecttoHS. (2) LOismeasuredwithrespecttoVSS. 14 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information Toaffectfastswitchingofpowerdevicesandreduceassociatedswitchingpowerlosses,apowerfulgatedriveris employed between the PWM output of controllers and the gates of the power semiconductor devices. Also, gate drivers are indispensable when it is impossible for the PWM controller to directly drive the gates of the switching devices. With the advent of digital power, this situation will be often encountered because the PWM signal from the digital controller is often a 3.3-V logic signal which cannot effectively turn on a power switch. Level shifting circuitry is needed to boost the 3.3-V signal to the gate-drive voltage (such as 12 V) in order to fully turn on the power device and minimize conduction losses. Traditional buffer drive circuits based on NPN/PNP bipolar transistors in totem-pole arrangement, being emitter follower configurations, prove inadequate with digital power becausetheylacklevel-shiftingcapability.Gatedriverseffectivelycombineboththelevel-shiftingandbuffer-drive functions. Gate drivers also find other needs such as minimizing the effect of high-frequency switching noise by locating the high-current driver physically close to the power switch, driving gate-drive transformers, and controlling floating power-device gates, reducing power dissipation and thermal stress in controllers by moving gatechargepowerlossesfromthecontrollerintothedriver. Finally, emerging wide band-gap power device technologies such as GaN based switches, which are capable of supporting very high switching frequency operation, are driving very special requirements in terms of gate drive capability. These requirements include operation at low VDD voltages (5 V or lower), low propagation delays and availability in compact, low-inductance packages with good thermal capability. Gate-driver devices are extremely important components in switching power, and they combine the benefits of high-performance, low-cost componentcountandboard-spacereductionaswellassimplifiedsystemdesign. 9.2 Typical Application +12V +100V SECONDARY V DD SIDE HB CIRCUIT HI DRIVE HO OL HI PWM R HS CONTROLLER T N LI O C DRIVE LO LO UCC27211A VSS ISOLATION AND FEEDBACK UDG-13114 Figure18. UCC27211ATypicalApplicationDiagram Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com Typical Application (continued) +12V V +100V SECONDARY DD SIDE HB CIRCUIT HI DRIVE HO L HI O PWM R HS CONTROLLER T N LI O C DRIVE LO LO UCC27211 VSS +12V VDD +100V HB HI DRIVE HO L HI O R HS T N LI O C DRIVE LO LO UCC27211 Figure19. UCC27211TypicalApplicationDiagram 9.2.1 DesignRequirements Table3.DesignSpecifications DESIGNPARAMETER EXAMPLEVALUE Supplyvoltage,VDD 12V VoltageonHS,VHS 0Vto100V VoltageonHB,VHB 12Vto112V Outputcurrentrating,IO –4Ato4A Operatingfrequency 500kHz 16 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 9.2.2 DetailedDesignProcedure 9.2.2.1 InputThresholdType The UCC27211A has an input maximum voltage range from –10 V to 20 V. This increased robustness means that both parts can be directly interfaced to gate drive transformers. The UCC27211A features TTL compatible input threshold logic with wide hysteresis. The threshold voltage levels are low voltage and independent of the VDD supply voltage, which allows compatibility with both logic-level input signals from microcontrollers as well as higher-voltage input signals from analog controllers. See the Electrical Characteristics table for the actual input thresholdvoltagelevelsandhysteresisspecificationsfortheUCC27211Adevice. 9.2.2.2 V BiasSupplyVoltage DD The bias supply voltage to be applied to the VDD pin of the device should never exceed the values listed in the Absolute Maximum Ratings table. However, different power switches demand different voltage levels to be applied at the gate terminals for effective turnon and turnoff. With certain power switches, a positive gate voltage may be required for turnon and a negative gate voltage may be required for turnoff, in which case the VDD bias supply equals the voltage differential. With a wide operating range from 8 V to 17 V, the UCC27211A device can be used to drive a variety of power switches, such as Si MOSFETs, IGBTs, and wide-bandgap power semiconductors (such as GaN, certain types of which allow no higher than 6 V to be applied to the gate terminals). 9.2.2.3 PeakSourceandSinkCurrents Generally, the switching speed of the power switch during turnon and turnoff should be as fast as possible in order to minimize switching power losses. The gate driver device must be able to provide the required peak current for achieving the targeted switching speeds with the targeted power MOSFET. The system requirement for the switching speed is typically described in terms of the slew rate of the drain-to-source voltage of the power MOSFET (such as dV /dt). For example, the system requirement might state that a SPP20N60C3 power DS MOSFET must be turned-on with a dV /dt of 20V/ns or higher with a DC bus voltage of 400 V in a continuous- DS conduction-mode (CCM) boost PFC-converter application. This type of application is an inductive hard-switching application and reducing switching power losses is critical. This requirement means that the entire drain-to- source voltage swing during power MOSFET turnon event (from 400 V in the OFF state to V in on state) DS(on) must be completed in approximately 20 ns or less. When the drain-to-source voltage swing occurs, the Miller charge of the power MOSFET (QGD parameter in SPP20N60C3 data sheet is 33 nC typical) is supplied by the peak current of gate driver. According to power MOSFET inductive switching mechanism, the gate-to-source voltage of the power MOSFET at this time is the Miller plateau voltage, which is typically a few volts higher than thethresholdvoltageofthepowerMOSFET,V . GS(TH) To achieve the targeted dV /dt, the gate driver must be capable of providing the Q charge in 20 ns or less. In DS GD other words a peak current of 1.65 A (= 33 nC / 20 ns) or higher must be provided by the gate driver. The UCC27211A gate driver is capable of providing 4-A peak sourcing current which clearly exceeds the design requirement and has the capability to meet the switching speed needed. The 2.4× overdrive capability provides an extra margin against part-to-part variations in the Q parameter of the power MOSFET along with additional GD flexibility to insert external gate resistors and fine tune the switching speed for efficiency versus EMI optimizations. However, in practical designs the parasitic trace inductance in the gate drive circuit of the PCB will have a definitive role to play on the power MOSFET switching speed. The effect of this trace inductance is to limit the dI/dt of the output current pulse of the gate driver. In order to illustrate this, consider output current pulse waveform from the gate driver to be approximated to a triangular profile, where the area under the triangle (½ × I × time) would equal the total gate charge of the power MOSFET (QG parameter in SPP20N60C3 PEAK power MOSFET datasheet = 87 nC typical). If the parasitic trace inductance limits the dI/dt then a situation may occurinwhichthefullpeakcurrentcapabilityofthegatedriverisnotfullyachievedinthetimerequiredtodeliver the QG required for the power MOSFET switching. In other words the time parameter in the equation would dominate and the I value of the current pulse would be much less than the true peak current capability of the PEAK device, while the required QG is still delivered. Because of this, the desired switching speed may not be realized, even when theoretical calculations indicate the gate driver is capable of achieving the targeted switching speed. Thus, placing the gate driver device very close to the power MOSFET and designing a tight gate drive-loop with minimalPCBtraceinductanceisimportanttorealizethefullpeak-currentcapabilityofthegatedriver. Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 9.2.2.4 PropagationDelay The acceptable propagation delay from the gate driver is dependent on the switching frequency at which it is used and the acceptable level of pulse distortion to the system. The UCC27211A features 16-ns (typical) propagation delays, which ensures very little pulse distortion and allows operation at very high-frequencies. See theElectricalCharacteristicstableforthepropagationandswitchingcharacteristicsoftheUCC27211Adevice. 9.2.2.5 PowerDissipation PowerdissipationofthegatedriverhastwoportionsasshowninEquation1. P =P +P (1) DISS DC SW The DC portion of the power dissipation is PDC = I × VDD where I is the quiescent current for the driver. The Q Q quiescentcurrentisthecurrentconsumedbythedevicetobiasallinternalcircuitssuchasinputstage,reference voltage, logic circuits, protections, and also any current associated with switching of internal devices when the driver output changes state (such as charging and discharging of parasitic capacitances, parasitic shoot-through, and so forth). The UCC27211A features very low quiescent currents (less than 0.17 mA, refer to the Electrical Characteristics table and contain internal logic to eliminate any shoot-through in the output driver stage. Thus the effect of the PDC on the total power dissipation within the gate driver can be safely assumed to be negligible. Thepowerdissipatedinthegate-driverpackageduringswitching(PSW)dependsonthefollowingfactors: • Gate charge required of the power device (usually a function of the drive voltage VG, which is very close to inputbiassupplyvoltageVDD) • Switchingfrequency • Use of external gate resistors. When a driver device is tested with a discrete, capacitive load calculating the power that is required from the bias supply is fairly simple. The energy that must be transferred from the bias supplytochargethecapacitorisgivenbyEquation2. EG=½C ×V 2 LOAD DD where • C isloadcapacitor LOAD • V isbiasvoltagefeedingthedriver (2) DD There is an equal amount of energy dissipated when the capacitor is charged and when it is discharged. This leadstoatotalpowerlossgivenbyEquation3. PG=C ×V 2×f LOAD DD SW where • f istheswitchingfrequency (3) SW TheswitchingloadpresentedbyapowerMOSFET/IGBTisconvertedtoanequivalentcapacitancebyexamining the gate charge required to switch the device. This gate charge includes the effects of the input capacitance plus theaddedchargeneededtoswingthedrainvoltageofthepowerdeviceasitswitchesbetweentheONandOFF states. Most manufacturers provide specifications of typical and maximum gate charge, in nC, to switch the device under specified conditions. Using the gate charge Qg, determine the power that must be dissipated when switchingacapacitorwhichiscalculatedusingtheequationQ =C ×V toprovideEquation4forpower. G LOAD DD P =C ×V 2×f =Q ×V ×f (4) G LOAD DD SW G DD SW This power P is dissipated in the resistive elements of the circuit when the MOSFET/IGBT is being turned on G and off. Half of the total power is dissipated when the load capacitor is charged during turnon, and the other half is dissipated when the load capacitor is discharged during turnoff. When no external gate resistor is employed between the driver and MOSFET/IGBT, this power is completely dissipated inside the driver package. With the use of external gate-drive resistors, the power dissipation is shared between the internal resistance of driver and externalgateresistor. 18 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 9.2.3 ApplicationCurves Figure20.Negative10-VInput Figure21.StepInput Figure22.SymmetricalUVLO Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 10 Power Supply Recommendations The bias supply voltage range for which the UCC27211A device is recommended to operate is from 8 V to 17 V. The lower end of this range is governed by the internal undervoltage-lockout (UVLO) protection feature on the V pin supply circuit blocks. Whenever the driver is in UVLO condition when the V pin voltage is below the DD DD V supply start threshold, this feature holds the output low, regardless of the status of the inputs. The upper (ON) end of this range is driven by the 20-V absolute maximum voltage rating of the V pin of the device (which is a DD stressrating).Keepinga3-Vmargintoallowfortransientvoltagespikes,themaximumrecommendedvoltagefor the V pin is 17 V. The UVLO protection feature also involves a hysteresis function, which means that when the DD V pin bias voltage has exceeded the threshold voltage and device begins to operate, and if the voltage drops, DD then the device continues to deliver normal functionality unless the voltage drop exceeds the hysteresis specification V . Therefore, ensuring that, while operating at or near the 8-V range, the voltage ripple on the DD(hys) auxiliary power supply output is smaller than the hysteresis specification of the device is important to avoid triggering device shutdown. During system shutdown, the device operation continues until the V pin voltage DD has dropped below the V threshold, which must be accounted for while evaluating system shutdown timing (OFF) design requirements. Likewise, at system start-up the device does not begin operation until the V pin voltage DD hasexceededtheV threshold. (ON) The quiescent current consumed by the internal circuit blocks of the device is supplied through the V pin. DD Although this fact is well known, it is importatnt to recognize that the charge for source current pulses delivered by the HO pin is also supplied through the same V pin. As a result, every time a current is sourced out of the DD HO pin, a corresponding current pulse is delivered into the device through the V pin. Thus, ensure that a local DD bypass capacitor is provided between the V and GND pins and located as close to the device as possible for DD the purpose of decoupling is important. A lo-ESR, ceramic surface-mount capacitor is required. TI recommends using a capacitor in the range 0.22 µF to 4.7 µF between V and GND. In a similar manner, the current pulses DD delivered by the LO pin are sourced from the HB pin. Therefore a 0.022-µF to 0.1-µF local decoupling capacitor isrecommendedbetweentheHBandHSpins. 11 Layout 11.1 Layout Guidelines Toimprovetheswitchingcharacteristicsandefficiencyofadesign,thefollowinglayoutrulesmustbefollowed. • LocatethedriverascloseaspossibletotheMOSFETs. • LocatetheV –V andV -V (bootstrap)capacitorsascloseaspossibletothedevice(seeFigure23). DD SS HB HS • Pay close attention to the GND trace. Use the thermal pad of the DRM package as GND by connecting it to the VSS pin (GND). The GND trace from the driver goes directly to the source of the MOSFET, but must not beinthehighcurrentpathoftheMOSFETdrainorsourcecurrent. • UsesimilarrulesfortheHSnodeasforGNDforthehigh-sidedriver. • For systems using multiple and UCC27211A devices, TI recommends that dedicated decoupling capacitors belocatedatV -V foreachdevice. DD SS • CaremustbetakentoavoidplacingVDDtracesclosetoLO,HS,andHOsignals. • Use wide traces for LO and HO closely following the associated GND or HS traces. A width of 60 to 100 mils ispreferablewherepossible. • Use as least two or more vias if the driver outputs or SW node must be routed from one layer to another. For GND, the number of vias must be a consideration of the thermal pad requirements as well as parasitic inductance. • Avoid LI and HI (driver input) going close to the HS node or any other high dV/dT traces that can induce significantnoiseintotherelativelyhighimpedanceleads. A poor layout can cause a significant drop in efficiency or system malfunction, and it can even lead to decreased reliabilityofthewholesystem. 20 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

UCC27211A www.ti.com SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 11.2 Layout Example UCC2721x Figure23. UCC27211APCBLayoutExample 11.3 Thermal Considerations The useful range of a driver is greatly affected by the drive-power requirements of the load and the thermal characteristics of the package. For a gate driver to be useful over a particular temperature range, the package must allow for efficient removal of the heat produced while keeping the junction temperature within rated limits. The thermal metrics for the driver package are listed in Thermal Information. For detailed information regarding the table, refer to the Application Note from Texas Instruments entitled Semiconductor and IC Package Thermal Metrics (SPRA953). The UCC27211A device is offered in SOIC (8) and VSON (8). The Thermal Information sectionliststhethermalperformancemetricsrelatedtotheSOT-23package. Copyright©2013–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:UCC27211A

UCC27211A SLUSBL4C–AUGUST2013–REVISEDOCTOBER2015 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Thereferenceandlinktoadditionalinformationmaybefoundatwww.ti.com. • Additional layout guidelines for PCB land patterns may be found in, QFN/SON PCB Attachment, Application Brief(SLUA271) 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 22 SubmitDocumentationFeedback Copyright©2013–2015,TexasInstrumentsIncorporated ProductFolderLinks:UCC27211A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) UCC27211ADRMR ACTIVE VSON DRM 8 3000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 140 27211A & no Sb/Br) UCC27211ADRMT ACTIVE VSON DRM 8 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 140 27211A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF UCC27211A : •Automotive: UCC27211A-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) UCC27211ADRMR VSON DRM 8 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 UCC27211ADRMT VSON DRM 8 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) UCC27211ADRMR VSON DRM 8 3000 367.0 367.0 35.0 UCC27211ADRMT VSON DRM 8 250 210.0 185.0 35.0 PackMaterials-Page2

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