TS921 Rail-to-rail high output current single operational amplifier − Datasheet production data Features ■ Rail-to-rail input and output ■ Low noise: 9 nV/√ Hz N ■ Low distortion DIP8 ■ High output current: 80 mA (able to drive 32 Ω (plastic package) loads) ■ High-speed: 4 MHz, 1 V/μs ■ Operating from 2.7 V to 12 V ■ ESD internal protection: 1.5 kV D SO-8 ■ Latch-up immunity (plastic micropackage) ■ Macromodel included in this specification Applications ■ Headphone amplifier P ■ Piezoelectric speaker driver TSSOP8 (thin shrink small outline package) ■ Sound cards, multimedia systems ■ Line driver, actuator driver ■ Servo amplifier Pin connections (top view) ■ Mobile phone and portable communication sets ■ Instrumentation with low noise as key factor Table 1. Device summary Temperature Order code Package Packing Marking range TS921IN -40 °C, +125 °C DIP8 Tube TS921IN TS921ID/IDT SO-8 Tube or tape and reel 921I TSSOP8 TS921IPT Tape and reel (thin shrink outline package) September 2012 Doc ID 5560 Rev 4 1/16 This is information on a product in full production. www.st.com 16

Description TS921 1 Description The TS921 device is a rail-to-rail single BiCMOS operational amplifier optimized and fully specified for 3 V and 5 V operation. Its high output current allows low load impedances to be driven. The TS921 device exhibits very low noise, low distortion and low offset. It has a high output current capability which makes this device an excellent choice for high quality, low voltage or battery operated audio systems. The device is stable for capacitive loads up to 500 pF. 2/16 Doc ID 5560 Rev 4

TS921 Absolute maximum ratings 2 Absolute maximum ratings Table 2. K ey parameters and their absolute maximum ratings Symbol Parameter Condition Value Unit V Supply voltage(1) 14 V CC V Differential input voltage(2) ±1 V id V Input voltage V - 0.3 to V + 0.3 V i DD CC T Storage temperature -65 to +150 °C stg T Maximum junction temperature 150 °C j SO-8 125 R Thermal resistance junction-to-ambient TSSOP8 120 °C/W thja DIP8 85 SO-8 40 R Thermal resistance junction-to-case TSSOP8 37 °C/W thjc DIP8 41 HBM 1.5 kV Human body model(3) MM ESD Electrostatic discharge 100 V Machine model(4) CDM 1.5 kV Charged device model Output short-circuit duration See(5) Latch-up immunity 200 mA 10 sec., 250 °C standard package Soldering temperature 10 sec., 260 lead-free package 1. All voltage values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If V > ±1 V, the id maximum input current must not exceed ±1 mA. In this case (V > ±1 V) an input serie resistor must be added to limit input id current. 3. Human body model, 100 pF discharged through a 1.5 kΩ resistor into pin of device. 4. Machine model ESD, a 200 pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5 Ω), into pin to pin of device. 5. There is no short-circuit protection inside the device: short-circuits from the output to V can cause excessive heating. The CC maximum output current is approximately 80 mA, independent of the magnitude of V . Destructive dissipation can result CC from simultaneous short-circuits on all amplifiers. Table 3. O perating conditions Symbol Parameter Value Unit V Supply voltage 2.7 to 12 V CC V Common mode input voltage range V - 0.2 to V + 0.2 V icm DD CC T Operating free air temperature range -40 to +125 °C oper Doc ID 5560 Rev 4 3/16

Electrical characteristics TS921 3 Electrical characteristics Table 4. E lectrical characteristics for V =3 V, V =0 V, V =V /2, R connected to CC DD icm CC L V /2, T =25 °C (unless otherwise specified) CC amb Symbol Parameter Conditions Min. Typ. Max. Unit V Input offset voltage 3 io mV at T ≤ T ≤ T 5 min. amb max ΔV Input offset voltage drift 2 μV/°C io I Input offset current V =1.5 V 1 30 nA io out I Input bias current V =1.5 V 15 100 nA ib out V High level output voltage R =600 Ω 2.87 OH L V R =32 Ω 2.63 L V Low level output voltage R =600 Ω 100 OL L mV R =32 Ω 180 L A Large signal voltage gain V = 2 V vd out pk-pk R =600 Ω 35 V/mV L R =32 Ω 16 L GBP Gain bandwidth product R = 600 Ω 4 MHz L I Supply current No load, V = V /2 1 1.5 mA CC out CC CMR Common mode rejection ratio 60 80 dB SVR Supply voltage rejection ratio V = 2.7 to 3.3 V 60 80 dB CC I Output short-circuit current 50 80 mA o SR Slew rate 0.7 1.3 V/μs Pm Phase margin at unit gain R = 600 Ω, C =100 pF 68 Degrees L L GM Gain margin R = 600 Ω, C =100 pF 12 dB L L nV e Equivalent input noise voltage f = 1 kHz 9 ------------ n Hz THD Total harmonic distortion V =2 V , f=1 kHz, out pk-pk 0.005 % A =1, R =600 Ω v L 4/16 Doc ID 5560 Rev 4

TS921 Electrical characteristics Table 5. E lectrical characteristics for V = 5 V, V = 0 V, V = V /2, R connected to V /2, CC DD icm CC L CC T = 25 °C (unless otherwise specified) amb Symbol Parameter Conditions Min. Typ. Max. Unit Vio Input offset voltage 3 mV at T ≤ T ≤ T 5 min. amb max ΔVio Input offset voltage drift 2 μV/°C Iio Input offset current Vout = 1.5 V 1 30 nA Iib Input bias current Vout = 1.5 V 15 100 nA V High level output voltage OH 4.85 R = 600 Ω V L 4.4 R = 32 Ω L VOL Low level output voltage RL = 600 Ω 120 mV R = 32 Ω 300 L A Large signal voltage gain V = 2 V vd out pk-pk R = 600 Ω 35 V/mV L R = 32 Ω 16 L GBP Gain bandwidth product RL = 600 Ω 4 MHz I Supply current No load, V = V /2 1 1.5 mA CC out CC CMR Common mode rejection ratio 60 80 dB SVR Supply voltage rejection ratio V = 4.5 to 5.5 V 60 80 dB CC I Output short-circuit current 50 80 mA o SR Slew rate 0.7 1.3 V/μs Pm Phase margin at unit gain R = 600 Ω, C =100 pF 68 Degrees L L GM Gain margin R = 600 Ω, C =100 pF 12 dB L L nV e Equivalent input noise voltage f = 1 kHz 9 ------------ n Hz V = 2 V , f=1 kHz, THD Total harmonic distortion out pk-pk 0.005 % A =1, R =600 Ω v L Doc ID 5560 Rev 4 5/16

Electrical characteristics TS921 Figure 1. Output short-circuit vs. output Figure 2. Voltage gain and phase vs. voltage (V = 5 V, V = 0 V) frequency (R = 10 kΩ, C = 100 pF) CC DD L L 100 60 180 A) 80 Phase m ( 60 nt Sink 40 120 e 40 L rr Gain L uit cu 200 dB) deg.) rc n( 20 60 e( ort-ci --4200 Gai Phas h s ut -60 0 0 p Source ut -80 O -100 -120 -20 -60 0 1 2 3 1E+02 1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 Output voltage(V) Frequency (Hz) Figure 3. Output short-circuit vs. output Figure 4. Equivalent input noise voltage vs. voltage (V = 3 V, V = 0 V) frequency (V = ±1.5 V, R = 100 Ω) CC DD CC L A) 100 z) 30 ort-circuitcurrent(m -22468000000 Sink nputnoise(nV/sqrt(H 11220505 h -40 i s nt utput --8600 Source uivale 5 O q -100 E 0 0 0,5 1 1,5 2 2,5 3 0.01 0.1 1 10 100 Output voltage (V) Frequency(kHz) Figure 5. Output supply current vs. supply Figure 6. THD + noise vs. frequency (R = 2 kΩ, L voltage V = 10 Vpp, V = ±6 V, A = 1) o CC v 0.02 %)0.015 ( e s noi 0.01 + D H T0.005 0 0.01 0.1 1 10 100 Frequency(kHz) 6/16 Doc ID 5560 Rev 4

TS921 Electrical characteristics Figure 7. THD + noise vs. frequency Figure 8. THD + noise vs. output voltage (R = 32 Ω, V = 4 Vpp, (R = 600 Ω, f = 1 kHz, L o L V = ±2.5 V, A = 1) V = 0/3 V, A = -1) CC v CC v 0.04 10 0.032 %) %) 1 ( ( e0.024 e s s oi oi n n THD + 0.016 THD + 0.1 0.008 0 0.01 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 Frequency(kHz) Figure 9. THD + noise vs. frequency Figure 10. THD + noise vs. output voltage (R = 32 Ω, V = 2 Vpp, (R = 32 Ω, f = 1 kHz, L o L V = ±1.5 V, A = 10) V = ±1.5 V, A = -1) CC v CC v 10 0.7 0.6 1 %)0.5 %) noise(0.4 noise( 0.1 +0.3 + D D TH0.2 TH 0.01 0.1 0 0.01 0.1 1 10 100 0.001 Frequency(kHz) 0 0.2 0.4 0.6 0.8 1 1.2 Figure 11. THD + noise vs. output voltage Figure 12. Open loop gain and phase (R = 2 kΩ, f = 1 kHz, vs. frequency (C = 500 pF) L L V = ±1.5 V, A = -1) CC v 10,000 50 180 40 1,000 D +noise(%) 0,100 Gain(dB)2300 61020 Phase(deg.) H T 0,010 10 0 0 0,001 1E+2 1E+3 1E+4 1E+5 1E+6 1E+7 1E+8 0 0,2 0,4 0,6 0,8 1 1,2 Frequency(Hz) Doc ID 5560 Rev 4 7/16

Macromodel TS921 4 Macromodel 4.1 Important note concerning this macromodel Please consider following remarks before using this macromodel: ● All models are a trade-off between accuracy and complexity (i.e. simulation time). ● Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. ● A macromodel emulates the NOMINAL performance of a TYPICAL device within SPECIFIED OPERATING CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as the datasheet, its goal is to illustrate the main parameters of the product. ● Data issued from macromodels used outside of its specified conditions (V , temperature, etc.) or even worse: outside of the device operating conditions CC (V , V , etc.) are not reliable in any way. CC icm In Section4.3, the electrical characteristics resulting from the use of these macromodels are presented. 4.2 Electrical characteristics from macromodelization Table 6. E lectrical characteristics resulting from macromodel simulation at V = 3 V, CC V = 0 V, R , C connected to V , T = 25 °C (unless otherwise specified) DD L L CC/2 amb Symbol Conditions Value Unit V 0 mV io A R = 10 kΩ 200 V/mV vd L I No load, per operator 1.2 mA CC V -0.2 to 3.2 V icm V R = 10 kΩ 2.95 V OH L V R = 10 kΩ 25 mV OL L I V = 3 V 80 mA sink O I V = 0 V 80 mA source O GBP R = 600 kΩ 4 MHz L SR R = 10 kΩ, C = 100 pF 1.3 V/μs L L φm R = 600 kΩ 68 Degrees L 8/16 Doc ID 5560 Rev 4

TS921 Macromodel 4.3 Macromodel code ** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS921 1 3 2 4 5 (analog) ********************************************************* .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.200000E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.100000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.400000E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE *************** FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE *************** G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 R2N 19 5 1E+07 ************************** VINT1 500 0 5 Doc ID 5560 Rev 4 9/16

Macromodel TS921 GCONVP 500 501 119 4 19.38!send ds VP, I(VP)=(V119-V4)/2/Ut VP 501 0 0 GCONVN 500 502 119 5 19.38!send ds VN, I(VN)=(V119-V5)/2/Ut VN 502 0 0 ********* orientation isink isource ******* VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 *************************** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5!multiply I(vout)*I(VP)=Iout*(V119- V4)/2/Ut F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5 !multiply I(vout)*I(VN)=Iout*(V119- V5)/2/Ut F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75 !multiply I(vout)*I(VP)=Iout*(V119- V4)/2/Ut F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75 !multiply I(vout)*I(VN)=Iout*(V119- V5)/2/Ut * COMPENSATION ************ CC 19 119 25p * OUTPUT*********** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.000000E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.300000E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS 10/16 Doc ID 5560 Rev 4

TS921 Package information 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 5560 Rev 4 11/16

Package information TS921 Figure 13. DIP8 package outline T able 7. DIP8 package mechanical data Dimensions Symbol mm inch Min. Typ. Max. Min. Typ. Max. A 3.3 0.130 a1 0.7 0.028 B 1.39 1.65 0.055 0.065 B1 0.91 1.04 0.036 0.041 b 0.5 0.020 b1 0.38 0.5 0.015 0.020 D 9.8 0.386 E 8.8 0.346 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 7.1 0.280 I 4.8 0.189 L 3.3 0.130 Z 0.44 1.6 0.017 0.063 12/16 Doc ID 5560 Rev 4

TS921 Package information Figure 14. SO-8 package outline 0016023/C T able 8. SO-8 package mechanical data Dimensions Symbol mm inch Min. Typ. Max. Min. Typ. Max. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k 8° (max.) ddd 0.1 0.04 Doc ID 5560 Rev 4 13/16

Package information TS921 Figure 15. TSSOP8 package outline 0079397/D T able 9. TSSOP8 package mechanical data Dimensions Symbol mm inch Min. Typ. Max. Min. Typ. Max. A 1.2 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 2.90 3.00 3.10 0.114 0.118 0.122 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 0.0256 K 0° 8° 0° 8° L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1 0.039 14/16 Doc ID 5560 Rev 4

TS921 Revision history 6 Revision history T able 10. Document revision history Date Revision Changes Feb. 2001 1 Initial release - Product in full production. Modifications on AMR table page 2 (explanation of V and V limits, Dec. 2004 2 id i ESD, MM and CDM values added, Rthja added) The following changes were made in this revision: PPAP references inserted in the datasheet see Table1. Nov. 2005 3 Data in tables Electrical characteristics on page4 reformatted for easier use. Thermal Resistance Junction to Case added in Table2 on page3. Updated Figure on page 1(replaced V - by V ). CC DD Updated (renamed) Table1, removed TS921IYD/IYDT devices from Table1. Moved Description to page 2. 19-Sep-2012 4 Updated Figure1 to Figure4, Figure6 to Figure12 (added conditions to titles). Updated ECOPACK text and reformatted Section5 (added Table7 to Table9, reversed order of figures and tables). Minor corrections throughout document. Doc ID 5560 Rev 4 15/16

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