Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 SN74LVCH16245A 16-bit Bus Transceiver With 3-state Outputs 1 Features 2 Applications • MemberoftheTexasInstruments • ElectronicPointsofSale 1 Widebus™Family • TestandMeasurement • OperatesFrom1.65Vto3.6V • WearableHealthandFitnessDevices • InputsAcceptVoltagesto5.5V • Tablets • Maxt of4nsat3.3V pd 3 Description • TypicalV (OutputGroundBounce) OLP <0.8VatV =3.3V,T =25°C This 16-bit (dual-octal) noninverting bus transceiver is CC A designed for 1.65-V to 3.6-V V operation. The • TypicalV (OutputV Undershoot) CC OHV OH SN74LVCH16245A device is designed for >2VatV =3.3V,T =25°C CC A asynchronouscommunicationbetweendatabuses. • SupportsMixed-ModeSignalOperation This device can be used as two 8-bit transceivers or onAllPorts(5-VInput/OutputVoltageWith3.3-V one 16-bit transceiver. Active bus-hold circuitry holds V ) CC unusedorundrivendatainputsatavalidlogicstate. • I SupportsLiveInsertion,Partial-Power-Down off Mode,andBack-DriveProtection DeviceInformation(1) • BusHoldonDataInputsEliminatestheNeedfor PARTNUMBER PACKAGE BODYSIZE(NOM) ExternalPulluporPulldownResistors TSSOP(48) 12.50mm×6.10mm • Latch-UpPerformanceExceeds250mA SN74LVCH16245A TVSOP(48) 9.70mm×4.40mm PerJESD17 SSOP(48) 15.88mm×7.49mm • ESDProtectionExceedsJESD22 (1) For all available packages, see the orderable addendum at – 2000-VHuman-BodyModel(A114-A) theendofthedatasheet. – 200-VMachineModel(A115-A) 4 Simplified Schematic 1 24 1DIR 2DIR 48 25 1OE 2OE 47 36 1A1 2A1 2 13 1B1 2B1 To Seven Other Channels To Seven Other Channels 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com Table of Contents 1 Features.................................................................. 1 9.1 Overview.................................................................11 2 Applications........................................................... 1 9.2 FunctionalBlockDiagram.......................................11 3 Description............................................................. 1 9.3 FeatureDescription.................................................12 9.4 DeviceFunctionalModes........................................12 4 SimplifiedSchematic............................................. 1 10 ApplicationandImplementation........................ 13 5 RevisionHistory..................................................... 2 10.1 ApplicationInformation..........................................13 6 PinConfigurationandFunctions......................... 3 10.2 TypicalApplication ...............................................13 7 Specifications......................................................... 6 11 PowerSupplyRecommendations..................... 14 7.1 AbsoluteMaximumRatings......................................6 12 Layout................................................................... 14 7.2 HandlingRatings.......................................................6 12.1 LayoutGuidelines.................................................14 7.3 RecommendedOperatingConditions......................7 12.2 LayoutExample....................................................14 7.4 ThermalInformation..................................................7 13 DeviceandDocumentationSupport................. 15 7.5 ElectricalCharacteristics...........................................8 7.6 SwitchingCharacteristics..........................................9 13.1 Trademarks...........................................................15 7.7 OperatingCharacteristics..........................................9 13.2 ElectrostaticDischargeCaution............................15 7.8 TypicalCharacteristics..............................................9 13.3 Glossary................................................................15 8 ParameterMeasurementInformation................10 14 Mechanical,Packaging,andOrderable Information........................................................... 15 9 DetailedDescription............................................ 11 5 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(August2006)toRevisionC Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • RemovedOrderingInformationtable..................................................................................................................................... 1 • UpdatedI Featurebullet...................................................................................................................................................... 1 off • AddedApplications................................................................................................................................................................. 1 • AddedDeviceInformationtable............................................................................................................................................. 1 • AddedHandlingRatingstable................................................................................................................................................ 6 • ChangedMAXambienttemperatureto125°C. ..................................................................................................................... 7 • AddedThermalInformationtable........................................................................................................................................... 7 • Updatedt valuesinSwitchingCharacteristicstable......................................................................................................... 9 sk(o) • AddedTypicalCharacteristics. .............................................................................................................................................. 9 2 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 6 Pin Configuration and Functions DGG,DGV,ORDLPACKAGE (TOPVIEW) 1DIR 1 48 1OE 1B1 2 47 1A1 1B2 3 46 1A2 GND 4 45 GND 1B3 5 44 1A3 1B4 6 43 1A4 V 7 42 V CC CC 1B5 8 41 1A5 1B6 9 40 1A6 GND 10 39 GND 1B7 11 38 1A7 1B8 12 37 1A8 2B1 13 36 2A1 2B2 14 35 2A2 GND 15 34 GND 2B3 16 33 2A3 2B4 17 32 2A4 V 18 31 V CC CC 2B5 19 30 2A5 2B6 20 29 2A6 GND 21 28 GND 2B7 22 27 2A7 2B8 23 26 2A8 2DIR 24 25 2OE PinFunctions PIN I/O DESCRIPTION NO. NAME 1 1DIR I Directionpin1 2 1B1 I/O 1B1inputoroutput 3 1B2 I/O 1B2inputoroutput 4 GND — Groundpin 5 1B3 I/O 1B3inputoroutput 6 1B4 I/O 1B4inputoroutput 7 VCC — Powerpin 8 1B5 I/O 1B5inputoroutput 9 1B6 I/O 1B6inputoroutput 10 GND — Groundpin 11 1B7 I/O 1B7inputoroutput 12 1B8 I/O 1B8inputoroutput 13 2B1 I/O 2B1inputoroutput 14 2B2 I/O 2B2inputoroutput 15 GND — Groundpin 16 2B3 I/O 2B3inputoroutput 17 2B4 I/O 2B4inputoroutput 18 VCC — Powerpin 19 2B5 I/O 2B5inputoroutput 20 2B6 I/O 2B6inputoroutput Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com PinFunctions(continued) PIN I/O DESCRIPTION NO. NAME 21 GND — Groundpin 22 2B7 I/O 2B7inputoroutput 23 2B8 I/O 2B8inputoroutput 24 2DIR — Directionpin2 25 2OE I OutputEnable2 26 2A8 I/O 2A8inputoroutput 27 2A7 I/O 2A7inputoroutput 28 GND — Groundpin 29 2A6 I/O 2A6inputoroutput 30 2A5 I/O 2A5inputoroutput 31 VCC — Powerpin 32 2A4 I/O 2A4inputoroutput 33 2A3 I/O 2A3inputoroutput 34 GND — Groundpin 35 2A2 I/O 2A2inputoroutput 36 2A1 I/O 2A1inputoroutput 37 1A8 I/O 1A8inputoroutput 38 1A7 I/O 1A7inputoroutput 39 GND — Groundpin 40 1A6 I/O 1A6inputoroutput 41 1A5 I/O 1A5inputoroutput 42 VCC — Powerpin 43 1A4 I/O 1A4inputoroutput 44 1A3 I/O 1A3inputoroutput 45 GND — Groundpin 46 1A2 I/O 1A2inputoroutput 47 1A1 I/O 1A1inputoroutput 48 1OE I OutputEnable1 4 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 GQLORZQLPACKAGE (TOPVIEW) 1 2 3 4 5 6 A B C D E F G H J K Table1.PinAssignments(1) (56-BallGQLorZQLPackage) 1 2 3 4 5 6 A 1DIR NC NC NC NC 1OE B 1B2 1B1 GND GND 1A1 1A2 C 1B4 1B3 V V 1A3 1A4 CC CC D 1B6 1B5 GND GND 1A5 1A6 E 1B8 1B7 1A7 1A8 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 H 2B5 2B6 V V 2A6 2A5 CC CC J 2B7 2B8 GND GND 2A8 2A7 K 2DIR NC NC NC NC 2OE (1) NC–Nointernalconnection GRDORZRDPACKAGE (TOPVIEW) 1 2 3 4 5 6 A B C D E F G H J Table2.PinAssignments(1) (54-BallGRDorZRDPackage) 1 2 3 4 5 6 A 1B1 NC 1DIR 1OE NC 1A1 B 1B3 1B2 NC NC 1A2 1A3 C 1B5 1B4 V V 1A4 1A5 CC CC D 1B7 1B6 GND GND 1A6 1A7 E 2B1 1B8 GND GND 1A8 2A1 F 2B3 2B2 GND GND 2A2 2A3 G 2B5 2B4 V V 2A4 2A5 CC CC H 2B7 2B6 NC NC 2A6 2A7 J 2B8 NC 2DIR 2OE NC 2A8 (1) NC–Nointernalconnection Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 6.5 V CC V Inputvoltagerange(2) –0.5 6.5 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 6.5 V O V Voltagerangeappliedtoanyoutputinthehighorlowstate(2)(3) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthrougheachV orGND ±100 mA CC (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputnegative-voltageandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintherecommendedoperatingconditionstable. CC 7.2 Handling Ratings MIN MAX UNIT T Storagetemperaturerange –65 150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all pins(1) 0 2000 V Electrostaticdischarge V (ESD) Chargeddevicemodel(CDM),perJEDECspecification JESD22-C101,allpins(2) 0 1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT Operating 1.65 3.6 V Supplyvoltage V CC Dataretentiononly 1.5 V =1.65Vto1.95V 0.65×V CC CC V High-levelinputvoltage V =2.3Vto2.7V 1.7 V IH CC V =2.7Vto3.6V 2 CC V =1.65Vto1.95V 0.35×V CC CC V Low-levelinputvoltage V =2.3Vto2.7V 0.7 V IL CC V =2.7Vto3.6V 0.8 CC V Inputvoltage 0 5.5 V I Highorlowstate 0 V CC V Outputvoltage V O 3-state 0 5.5 V =1.65V –4 CC V =2.3V –8 CC I High-leveloutputcurrent mA OH V =2.7V –12 CC V =3V –24 CC V =1.65V 4 CC V =2.3V 8 CC I Low-leveloutputcurrent mA OL V =2.7V 12 CC V =3V 24 CC Δt/Δv Inputtransitionriseandfallrate 5 ns/V T Operatingfree-airtemperature –40 125 °C A (1) AllunusedcontrolinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 7.4 Thermal Information DGG DGV DL THERMALMETRIC(1) UNIT 48PINS 48PINS 48PINS R Junction-to-ambientthermalresistance 67.1 80.2 70.6 θJA R Junction-to-case(top)thermalresistance 19.9 32.7 36.8 θJC(top) R Junction-to-boardthermalresistance 34.2 43.5 43.1 θJB °C/W ψ Junction-to-topcharacterizationparameter 1.8 4.7 13.9 JT ψ Junction-to-boardcharacterizationparameter 33.9 42.9 42.6 JB R Junction-to-case(bottom)thermalresistance n/a n/a n/a θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com 7.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP(1) MAX UNIT CC I =–100µA 1.65Vto3.6V V –0.2 OH CC I =–4mA 1.65V 1.2 OH I =–8mA 2.3V 1.7 OH V V OH 2.7V 2.2 I =–12mA OH 3V 2.4 I =–24mA 3V 2.2 OH I =100µA 1.65Vto3.6V 0.2 OL I =4mA 1.65V 0.45 OL V I =8mA 2.3V 0.7 V OL OL I =12mA 2.7V 0.4 OL I =24mA 3V 0.55 OL I Controlinputs V =0to5.5V 3.6V ±5 µA I I V =0.58V 15 I 1.65V V =1.07V –15 I V =0.7V 45 I 2.3V I AorBport V =1.7V –45 µA I(hold) I V =0.8V 75 I 3V V =2V –75 I V =0to3.6V(2) 3.6V ±500 I I V orV =5.5V 0 ±10 µA off I O I (3) V =0Vor(V to5.5V) 2.3Vto3.6V ±5 µA OZ O CC V =V orGND 20 I CC I I =0 3.6V µA CC 3.6V≤V ≤5.5V(4) O 20 I ΔI OneinputatV –0.6V,OtherinputsatV orGND 2.7Vto3.6V 500 µA CC CC CC C Controlinputs V =V orGND 3.3V 5 pF i I CC C AorBport V =V orGND 3.3V 7.5 pF io O CC (1) AlltypicalvaluesareatV =3.3V,T =25°C. CC A (2) Thisisthebus-holdmaximumdynamiccurrentrequiredtoswitchtheinputfromonestatetoanother. (3) ForthetotalleakagecurrentinanI/Oport,consulttheI specificationfortheinputvoltagecondition0V<V <V ,andtheI I(hold) I CC OZ specificationfortheinputvoltageconditionsV =0VorV =V to5.5V.Thebus-holdcurrent,atinputvoltagegreaterthanV ,is I I CC CC negligible. (4) Thisappliesinthedisabledstateonly. 8 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 7.6 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3) V =1.8V V =2.5V V =3.3V PARAMETER FROM TO C±C0.15V C±C0.2V VCC=2.7V C±C0.3V UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX t AorB BorA 1.5 7.1 1 4.5 1 4.7 1 4 ns pd t OE AorB 1.5 8.9 1 5.6 1.5 6.7 1.5 5.5 ns en t OE AorB 1.5 11.9 1 6.8 1.5 7.1 1.5 6.6 ns dis t 1 1 1 1 ns sk(o) 7.7 Operating Characteristics T =25°C A TEST VCC=1.8V VCC=2.5V VCC=3.3V PARAMETER UNIT CONDITIONS TYP TYP TYP Powerdissipationcapacitance Outputsenabled 36 36 40 C f=10MHz pF pd pertransceiver Outputsdisabled 3 3 4 7.8 Typical Characteristics 4 4 TPD in ns TPD in ns 3.5 3.5 3 3 2.5 2.5 s s n n D - 2 D - 2 P P T T 1.5 1.5 1 1 0.5 0.5 0 0 0 1 2 3 4 -100 -50 0 50 100 150 VCC - V D001 Temperature (qC) D001 Figure1.TDPAcrossV at25°C Figure2.TPDAcrossTemperatureat3.3V CC Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com 8 Parameter Measurement Information VLOAD From Output RL S1 Open TEST S1 Under Test GND tPLH/tPHL Open (see NoteCAL) RL tPLZ/tPZL VLOAD tPHZ/tPZH GND LOAD CIRCUIT INPUTS VCC VI tr/tf VM VLOAD CL RL V∆ 1.8 V±0.15 V VCC ≤2ns VCC/2 2×VCC 30 pF 1 kΩ 0.15 V 2.5 V±0.2 V VCC ≤2ns VCC/2 2×VCC 30 pF 500Ω 0.15 V 2.7 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500Ω 0.3 V 3.3 V±0.3 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500Ω 0.3 V VI Timing Input VM 0 V tw tsu th VI VI Input VM VM Data Input VM VM 0 V 0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PULSEDURATION SETUPAND HOLD TIMES VI VI Output Input VM VM Control VM VM 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 VLOAD/2 Output VM VM VOL (Ss1ee a tN VoLteO ABD) VM VOL+V∆ VOL tPHL tPLH tPZH tPHZ Output VM VM VOH WSa1v eaOftou GrtmpNu D2t VM VOH−V∆ VOH VOL (see Note B) ≈0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PROPAGATIONDELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-ANDHIGH-LEVELENABLING NOTES: A. CLincludes probe and jig capacitance. B. Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol. Waveform2is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO= 50Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZand tPHZare the same as tdis. F. tPZLand tPZHare the same as ten. G. tPLHand tPHLare the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms 10 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 9 Detailed Description 9.1 Overview The SN74LVCH16245A device is designed for asynchronous communication between data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic high or lowlevelappliedtopreventexcessI andI . CC CCZ Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is notdisabledby OEorDIR. To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup CC resistor;theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators inamixed3.3-Vand5-Vsystemenvironment. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, off off thuspreventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown. 9.2 Functional Block Diagram 1 24 1DIR 2DIR 48 25 1OE 2OE 47 36 1A1 2A1 2 13 1B1 2B1 To Seven Other Channels To Seven Other Channels Figure4. LogicDiagram(PositiveLogic) Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com 9.3 Feature Description • Wideoperatingvoltagerange – Operatesfrom1.65Vto3.6V • Allowsdownvoltagetranslation – Inputsacceptvoltagesto5.5V • I feature off – AllowsvoltagesontheinputsandoutputswhenV is0V CC 9.4 Device Functional Modes Table3.FunctionTable(1) (Each8-bitSection) CONTROLINPUTS OPERATION OE DIR L L BdatatoAbus L H AdatatoBbus H X Isolation (1) InputcircuitsofthedataI/Osalwaysareactive. 12 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 10 Application and Implementation 10.1 Application Information The SN74LVC16245A device is a 16-bit bidirectional transceiver. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The device has 5.5 V tolerant inputs at anyvalidV .Thisallowsittobeusedinmulti-powersystems,anditcanbeusedfordowntranslation. CC 10.2 Typical Application Regulated 3.6 V OE Vcc DIR 1A1 1B1 uC System Logic uC or 1A8 1B8 LEDs System Logic GND Figure5. TypicalApplicationDiagram 10.2.1 DesignRequirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edgesintolightloads;therefore,routingandloadconditionsshouldbeconsideredtopreventringing. 10.2.2 DetailedDesignProcedure 1. RecommendedInputConditions – Risetimeandfalltimespecs:See(Δt/ΔV)intheRecommendedOperatingConditionstable. – Specifiedhighandlowlevels:See(V andV )intheRecommendedOperatingConditions table. IH IL – Inputsareovervoltagetolerantallowingthemtogoashighas5.5VatanyvalidV . CC 2. RecommendOutputConditions – Loadcurrentsshouldnotexceed25mAperoutputand50mAtotalforthepart. – OutputsshouldnotbepulledaboveV . CC Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A SCES495C–OCTOBER2003–REVISEDJUNE2014 www.ti.com Typical Application (continued) 10.2.3 ApplicationCurves 300 ICC 1.8 V ICC 2.5 V 250 ICC 3.3 V 200 s n D - 150 P T 100 50 0 0 10 20 30 40 50 60 Frequency - MHz D004 Figure6.I vsFrequency CC 11 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the RecommendedOperatingConditionstable. Each V pin should have a good bypass capacitor to prevent power disturbance. For devices with a single CC supply, 0.1 μf is recommended; if there are multiple V pins, then 0.01 μf or 0.022 μf is recommended for each CC power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μf and a 1 μf are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possibleforbestresults. 12 Layout 12.1 Layout Guidelines Whenusingmultiple-bitlogicdevices,inputsshouldneverfloat. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 7 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or V , whichever makes more sense or is more convenient. It is generally acceptable to float outputs, CC unlessthepartisatransceiver.Ifthetransceiverhasanoutputenablepin,itwilldisabletheoutputsectionofthe partwhenasserted.ThiswillnotdisabletheinputsectionoftheI/Os,sotheycannotfloatwhendisabled. 12.2 Layout Example V cc Input Unused Input Output Unused Input Output Input Figure7. LayoutDiagram 14 SubmitDocumentationFeedback Copyright©2003–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVCH16245A

SN74LVCH16245A www.ti.com SCES495C–OCTOBER2003–REVISEDJUNE2014 13 Device and Documentation Support 13.1 Trademarks WidebusisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 13.2 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.3 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2003–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN74LVCH16245A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) 74LVCH16245ADGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVCH16245A & no Sb/Br) 74LVCH16245ADLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVCH16245A & no Sb/Br) SN74LVCH16245ADGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVCH16245A & no Sb/Br) SN74LVCH16245ADGVR ACTIVE TVSOP DGV 48 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LDH245A & no Sb/Br) SN74LVCH16245ADL ACTIVE SSOP DL 48 25 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVCH16245A & no Sb/Br) SN74LVCH16245ADLR ACTIVE SSOP DL 48 1000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVCH16245A & no Sb/Br) SN74LVCH16245AZQLR LIFEBUY BGA ZQL 56 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 LDH245A MICROSTAR & no Sb/Br) JUNIOR SN74LVCH16245AZRDR LIFEBUY BGA ZRD 54 1000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 LDH245A MICROSTAR & no Sb/Br) JUNIOR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVCH16245ADGGR TSSOP DGG 48 2000 330.0 24.4 8.6 13.0 1.8 12.0 24.0 Q1 SN74LVCH16245ADGVR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 SN74LVCH16245ADLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 SN74LVCH16245AZQLR BGAMI ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 CROSTA RJUNI OR SN74LVCH16245AZRDR BGAMI ZRD 54 1000 330.0 16.4 5.8 8.3 1.55 8.0 16.0 Q1 CROSTA RJUNI OR PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVCH16245ADGGR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74LVCH16245ADGVR TVSOP DGV 48 2000 367.0 367.0 38.0 SN74LVCH16245ADLR SSOP DL 48 1000 367.0 367.0 55.0 SN74LVCH16245AZQLR BGAMICROSTAR ZQL 56 1000 350.0 350.0 43.0 JUNIOR SN74LVCH16245AZRDR BGAMICROSTAR ZRD 54 1000 350.0 350.0 43.0 JUNIOR PackMaterials-Page2

MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,50 0,08 M 0,17 48 25 6,20 8,30 6,00 7,90 0,15 NOM Gage Plane 0,25 1 24 0°–8° A 0,75 0,50 Seating Plane 0,15 1,20 MAX 0,10 0,05 PINS ** 48 56 64 DIM A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 4040078/F 12/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OUTLINE ZQL0056A JRBGA - 1 mm max height SCALE 2.100 PLASTIC BALL GRID ARRAY 4.6 B A 4.4 BALL A1 CORNER 7.1 6.9 1 MAX C SEATING PLANE 0.35 0.15 TYP BALL TYP 0.1 C 3.25 TYP SYMM (0.625) TYP K J (0.575) TYP H G 5.85 F SYMM TYP E D C 0.45 56X NOTE 3 0.35 B 0.15 C B A 0.08 C A 0.65 TYP 1 2 3 4 5 6 BALL A1 CORNER 0.65 TYP 4219711/B 01/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. No metal in this area, indicates orientation. www.ti.com

EXAMPLE BOARD LAYOUT ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY (0.65) TYP 56X ( 0.33) 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK 0.05 MAX 0.05 MIN METAL UNDER OPENING SOLDER MASK EXPOSED METAL ( 0.33) ( 0.33) METAL EXPOSED METAL SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219711/B 01/2017 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99). www.ti.com

EXAMPLE STENCIL DESIGN ZQL0056A JRBGA - 1 mm max height PLASTIC BALL GRID ARRAY 56X ( 0.33) (0.65) TYP 1 2 3 4 5 6 A (0.65) TYP B C D E SYMM F G H J K SYMM SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4219711/B 01/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

None

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated