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ICGOO电子元器件商城为您提供SN74LV221AQPWRG4Q1由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74LV221AQPWRG4Q1价格参考¥3.82-¥9.48。Texas InstrumentsSN74LV221AQPWRG4Q1封装/规格:逻辑 - 多频振荡器, Monostable Multivibrator 13.2ns 16-TSSOP。您可以下载SN74LV221AQPWRG4Q1参考资料、Datasheet数据手册功能说明书,资料中有SN74LV221AQPWRG4Q1 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)

描述

IC MONOSTABLE DUAL 16TSSOP

产品分类

逻辑 - 多频振荡器

品牌

Texas Instruments

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产品型号

SN74LV221AQPWRG4Q1

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

Automotive, AEC-Q100, 74LV

传播延迟

13.2ns

供应商器件封装

16-TSSOP

其它名称

296-29240-1

包装

剪切带 (CT)

安装类型

表面贴装

封装/外壳

16-TSSOP(0.173",4.40mm 宽)

工作温度

-40°C ~ 125°C

施密特触发器输入

标准包装

1

独立电路

2

电压-电源

2 V ~ 5.5 V

电流-输出高,低

12mA,12mA

逻辑类型

单稳态

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SN74LV221A-Q1 www.ti.com SCLS692A–OCTOBER2005–REVISEDAPRIL2008 DUAL MONOSTABLE MULTIVIBRATOR WITH SCHMITT-TRIGGER INPUTS CheckforSamples:SN74LV221A-Q1 FEATURES 1 • QualifiedforAutomotiveApplications PW PACKAGE • 2-Vto5.5-VV Operation CC (TOP VIEW) • SupportsMixed-ModeVoltageOperationon AllPorts 1A 1 16 VCC • Schmitt-TriggerCircuitryonA,B,andCLR 1B 2 15 1Rext/Cext InputsforSlowTransitionRates 1CLR 3 14 1Cext • OverridingClearTerminatesOutputPulse 1Q 4 13 1Q • Glitch-FreePower-UpResetonOutputs 2Q 5 12 2Q • I SupportsPartial-Power-DownMode 2Cext 6 11 2CLR off Operation 2Rext/Cext 7 10 2B GND 8 9 2A DESCRIPTION/ORDERING INFORMATION The SN74LV221A is a dual multivibrator designed for 2-V to 5.5-V V operation. Each multivibrator has a CC negative-transition-triggered (A) input and a positive-transition-triggered (B) input, either of which can be used as aninhibitinput. This edge-triggered multivibrator features output pulse-duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In thethirdmethod,theAinputislow,theBinputishigh,andtheclear(CLR)inputgoeshigh. The output pulse duration is programmable by selecting external resistance and capacitance values. The external timing capacitor must be connected between C and R /C (positive) and an external resistor ext ext ext connected between R /C and V . To obtain variable pulse durations, connect an external variable resistor ext ext CC betweenR /C andV .TheoutputpulsedurationalsocanbereducedbytakingCLRlow. ext ext CC Pulse triggering occurs at a particular voltage level and is not related directly to the transition time of the input pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rateswithjitter-freetriggeringattheoutputs. Once triggered, the outputs are independent of further transitions of the A and B inputs and are a function of the timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration relative to the output pulse. Output pulse duration can be varied by choosing the appropriate timing components. Output rise and fall times are TTL compatible and independent of pulse duration. Typical triggering andclearingsequencesareillustratedintheinput/outputtimingdiagram. The variance in output pulse duration from device to device typically is less than ±0.5% for given external timing components. An example of this distribution for the SN74LV221A-Q1 is shown in Figure 8. Variations in output pulsedurationversussupplyvoltageandtemperatureareshowninFigure5. During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free, withoutapplyingaresetpulse. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, off off preventingdamagingcurrentbackflowthroughthedeviceswhentheyarepowereddown. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. UNLESS OTHERWISE NOTED this document contains Copyright©2005–2008,TexasInstrumentsIncorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN74LV221A-Q1 SCLS692A–OCTOBER2005–REVISEDAPRIL2008 www.ti.com Table1. ORDERINGINFORMATION(1) T PACKAGE(2) ORDERABLEPARTNUMBER TOP-SIDEMARKING A –40°Cto125°C TSSOP–PW Reelof2000 SN74LV221AQPWRQ1 LV221AQ (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Packagedrawings,thermaldata,andsymbolizationareavailableatwww.ti.com/packaging. DESCRIPTION/ORDERING INFORMATION (CONTINUED) Pin assignments are identical to those of the SN74AHC123A and SN74AHCT123A devices, so the SN74LV221A-Q1canbesubstitutedforthosedevicesnotusingtheretriggerfeature. For additional application information on multivibrators, see the application report Designing With The SN74AHC123AandSN74AHCT123A,literaturenumberSCLA014. FUNCTIONTABLE (EACHMULTIVIBRATOR) INPUTS OUTPUTS FUNCTION CLR A B Q Q L X X L H Reset H H X L H Inhibit H X L L H Inhibit H L ↑ Outputsenabled H ↓ H Outputsenabled ↑(1) L H Outputsenabled (1) ThisconditionistrueonlyiftheoutputofthelatchformedbytheNANDgatehasbeenconditionedtothelogic1statepriortoCLR goinghigh.ThislatchisconditionedbytakingeitherAhighorBlowwhileCLRisinactive(high). LOGICDIAGRAM(POSITIVELOGIC) Rext/Cext A Cext B Q CLR R Q 2 Copyright©2005–2008,TexasInstrumentsIncorporated

SN74LV221A-Q1 www.ti.com SCLS692A–OCTOBER2005–REVISEDAPRIL2008 INPUT/OUTPUTTIMINGDIAGRAM A B CLR Rext/Cext Q Q tw tw tw Absolute Maximum Ratings(1) overoperatingfree-airtemperature(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 7 V CC V Inputvoltagerange(2) –0.5 7 V I V Outputvoltagerangeinhighorlowstate(2) (3) –0.5 V +0.5 V O CC V Outputvoltagerangeinpower-offstate(2) –0.5 7 V O I Inputclampcurrent V <0 –20 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent V =0toV ±25 mA O O CC ContinuouscurrentthroughV orGND ±50 mA CC θ Packagethermalimpedance(4) 108 °C/W JA Human-BodyModel 2(H2) kV ESDrating(5) Charged-DeviceModel 1(C5) MachineModel 200(M3) V T Storagetemperaturerange –65 150 °C stg (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) Thisvalueislimitedto5.5Vmaximum. (4) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. (5) ESDprotectionlevelperAECQ100classification Copyright©2005–2008,TexasInstrumentsIncorporated 3

SN74LV221A-Q1 SCLS692A–OCTOBER2005–REVISEDAPRIL2008 www.ti.com Recommended Operating Conditions(1) –40°Cto125°C –40°Cto85°C UNIT MIN MAX MIN MAX V Supplyvoltage 2 5.5 2 5.5 V CC V =2V 1.5 1.5 CC V =2.3Vto2.7V V ×0.7 V ×0.7 CC CC CC V High-levelinputvoltage V IH V =3Vto3.6V V ×0.7 V ×0.7 CC CC CC V =4.5Vto5.5V V ×0.7 V ×0.7 CC CC CC V =2V 0.5 0.5 CC V =2.3Vto2.7V V ×0.3 V ×0.3 CC CC CC V Low-levelinputvoltage V IL V =3Vto3.6V V ×0.3 V ×0.3 CC CC CC V =4.5Vto5.5V V ×0.3 V ×0.3 CC CC CC V Inputvoltage 0 5.5 0 5.5 V I V Outputvoltage 0 V 0 V V O CC CC V =2V –50 –50 μA CC V =2.3Vto2.7V –2 –2 CC I High-leveloutputcurrent OH V =3Vto3.6V –6 –6 mA CC V =4.5Vto5.5V –12 –12 CC V =2V 50 50 μA CC V =2.3Vto2.7V 2 2 CC I Low-leveloutputcurrent OL V =3Vto3.6V 6 6 mA CC V =4.5Vto5.5V 12 12 CC V =2V 5k 5k CC R Externaltimingresistance Ω ext V ≥3V 1k 1k CC C Externaltimingcapacitance Norestriction Norestriction pF ext Δt/ΔV Power-upramprate 1 1 ms/V CC T Operatingfree-airtemperature –40 125 –40 85 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 4 Copyright©2005–2008,TexasInstrumentsIncorporated

SN74LV221A-Q1 www.ti.com SCLS692A–OCTOBER2005–REVISEDAPRIL2008 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) –40°Cto125°C –40°Cto85°C PARAMETER TESTCONDITIONS V UNIT CC MIN TYP MAX MIN TYP MAX I =–50μA 2Vto5.5V V – V –0.1 OH CC CC 0.1 VOH IOH=–2mA 2.3V 2 2 V I =–6mA 3V 2.48 2.48 OH I =–12mA 4.5V 3.8 3.8 OH I =50μA 2Vto5.5V 0.1 0.1 OL I =2mA 2.3V 0.4 0.4 OL V V OL I =6mA 3V 0.44 0.44 OL I =12mA 4.5V 0.55 0.55 OL A,B, 0 ±1 ±1 I V =5.5VorGND μA I andCLR I 0to5.5V ±1 ±1 I Quiescent V =V orGND, I =0 5.5V 20 20 μA CC I CC O Active 3V 280 280 state I V =V orGND, R /C =0.5V 4.5V 650 650 μA CC (per I CC ext ext CC circuit) 5.5V 975 975 I V orV =0to5.5V 0 10 5 μA off I O 3.3V 1.9 1.9 C V =V orGND pF i I CC 5V 1.9 1.9 Timing Requirements overrecommendedoperatingfree-airtemperaturerange,V =3.3V±0.3V(unlessotherwisenoted)(seeFigure1) CC T =25°C –40°Cto125°C –40°Cto85°C A UNIT MIN MAX MIN MAX MIN MAX CLR 5 7 5 t Pulseduration ns w AorBtrigger 5 7 5 Timing Requirements overrecommendedoperatingfree-airtemperaturerange,V =5V±0.5V(unlessotherwisenoted)(seeFigure1) CC T =25°C –40°Cto125°C –40°Cto85°C A UNIT MIN MAX MIN MAX MIN MAX CLR 5 7 5 t Pulseduration ns w AorBtrigger 5 7 5 Copyright©2005–2008,TexasInstrumentsIncorporated 5

SN74LV221A-Q1 SCLS692A–OCTOBER2005–REVISEDAPRIL2008 www.ti.com Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,V =3.3V±0.3V(unlessotherwisenoted)(seeFigure1) CC –40°Cto –40°Cto PARAMETER FROM TO LOAD TA=25°C 125°C 85°C UNIT (INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX AorB 11.8 24.1 1 30.5 1 27.5 t CLR QorQ C =50pF 10.6 19.3 1 25 1 22 ns pd L CLRtrigger 12.3 25.9 1 32.5 1 29.5 C =50pF, L C =28pF, 186 240 340 300 ns ext R =2kΩ ext C =50pF, L t (1) QorQ C =0.01μF, 90 100 110 85 115 90 110 μs w ext R =10kΩ ext C =50pF, L C =0.1pF, 0.9 1 1.1 0.85 1.15 0.9 1.1 ms ext R =10kΩ ext Δt (2) C =50pF ±1 % w L (1) t =PulsedurationatQandQoutputs w (2) Δt =Outputpulse-durationvariation(QandQ)betweencircuitsinsamepackage w Switching Characteristics overrecommendedoperatingfree-airtemperaturerange,V =5V±0.5V(unlessotherwisenoted)(seeFigure1) CC –40°Cto –40°Cto PARAMETER FROM TO LOAD TA=25°C 125°C 85°C UNIT (INPUT) (OUTPUT) CAPACITANCE MIN TYP MAX MIN MAX MIN MAX AorB 8.2 14 1 19 1 16 t CLR QorQ C =50pF 7.4 11.4 1 16 1 13 ns pd L CLRtrigger 8.6 14.9 1 20 1 17 C =50pF, L C =28pF, 171 200 280 240 ns ext R =2kΩ ext C =50pF, L t (1) QorQ C =0.01μF, 90 100 110 85 115 90 110 μs w ext R =10kΩ ext C =50pF, L C =0.1pF, 0.9 1 1.1 0.85 1.15 0.9 1.1 ms ext R =10kΩ ext Δt (2) C =50pF ±1 % w L (1) t =PulsedurationatQandQoutputs w (2) Δt =Outputpulse-durationvariation(QandQ)betweencircuitsinsamepackage w Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC 3.3V 50 C Powerdissipationcapacitance C =50pF, f=10MHz pF pd L 5V 51 6 Copyright©2005–2008,TexasInstrumentsIncorporated

SN74LV221A-Q1 www.ti.com SCLS692A–OCTOBER2005–REVISEDAPRIL2008 PARAMETER MEASUREMENT INFORMATION From Output Test Under Test Point tw CL Inputs or VCC (see Note A) Outputs 50% VCC 50% VCC 0 V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATION VCC Input A (see Note B) 50% VCC 0 V Input CLR VCC Input B VCC (see Note B) 50% VCC 50% VCC 0 V (see Note B) 50% VCC 0 V tPLH tPHL In-Phase tPLH VOH InO-Puhtapsuet 50% VCC 50% VCVCOH Output 50% VCC VOL VOL tPHL tPHL tPLH VOH VOH Out-of-Phase Out-of-Phase Output 50% VCC Output 50% VCC 50% VCC VOL VOL VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS DELAY TIMES DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 W , tr (cid:1) 3 ns, tf (cid:1) 3 ns. C. The outputs are measured one at a time, with one input transition per measurement. Figure1.LoadCircuitandVoltageWaveforms Copyright©2005–2008,TexasInstrumentsIncorporated 7

SN74LV221A-Q1 SCLS692A–OCTOBER2005–REVISEDAPRIL2008 www.ti.com APPLICATION INFORMATION CautioninUse To prevent malfunctions due to noise, connect a high-frequency capacitor between V and GND, and keep the CC wiringbetweentheexternalcomponentsandC andR /C terminalsasshortaspossible. ext ext ext Power-DownConsiderations Large values of C can cause problems when powering down the SN74LV221A-Q1 because of the amount of ext energy stored in the capacitor. When a system containing this device is powered down, the capacitor can discharge from V through the protection diodes at pin 2 or pin 14. Current through the input protection diodes CC must be limited to 30 mA; therefore, the turn-off time of the V power supply must not be faster than CC t = V × C /30 mA. For example, if V = 5 V and C = 15 pF, the V supply must turn off no faster than CC ext CC ext CC t = (5 V) × (15 pF)/30 mA = 2.5 ns. Usually, this is not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of V to zero occurs, the SN74LV221A-Q1 can CC sustaindamage.Toavoidthispossibility,useexternalclampingdiodes. OutputPulseDuration The output pulse duration, t , is determined primarily by the values of the external capacitance (C ) and timing w T resistance(R ).ThetimingcomponentsareconnectedasshowninFigure2. T VCC RT CT To Rext/Cext To Cext Terminal Terminal Figure2. Timing-ComponentConnections Thepulsedurationisgivenby: t =K×R ×C w T T ifC is≥ 1000pF,K=1.0 T or ifC is<1000pF,KcanbedeterminedfromFigure7 T where: t =pulsedurationinns w R =externaltimingresistanceinkΩ T C =externalcapacitanceinpF T K=multiplierfactor (1) Equation 1 and Figure 3 or Figure 4 can be used to determine values for pulse duration, external resistance, and externalcapacitance. 8 Copyright©2005–2008,TexasInstrumentsIncorporated

SN74LV221A-Q1 www.ti.com SCLS692A–OCTOBER2005–REVISEDAPRIL2008 APPLICATION INFORMATION Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"isnotimplied. OUTPUT PULSE DURATION OUTPUT PULSE DURATION vs vs EXTERNAL TIMING CAPACITANCE EXTERNAL TIMING CAPACITANCE 1.00E+07 1.00E+07 VCC = 3 V VCC = 4.5 V TA = 25°C TA = 25°C 1.00E+06 1.00E+06 ns ns − − on RT = 1 MW on RT = 1 MW urati 1.00E+05 urati 1.00E+05 D D ulse RT = 100 kW ulse RT = 100 kW P P ut 1.00E+04 ut 1.00E+04 p p ut ut − O RT = 10 kW − O RT = 10 kW w w t 1.00E+03 t 1.00E+03 RT = 1 kW RT = 1 kW 1.00E+02 1.00E+02 101 102 103 104 105 101 102 103 104 105 CT − External Timing Capacitance − pF CT − External Timing Capacitance − pF Figure3. Figure4. VARIATION IN OUTPUT PULSE DURATION vs TEMPERATURE 14% tw = 866 ns at: 12% VCC = 5 V n RT = 10 kW VCC = 2.5 V Duratio 180%% CTAT == 2550° pCF VVCCCC == 33. 5V V e VCC = 4 V s ul 6% VCC = 5 V P ut 4% VCC = 6 V p Out VCC = 7 V 2% n n i o 0% ati ari −2% V −4% −6% −60 −40 −20 0 20 40 60 80 100 120 140 160 180 Temperature − °C Figure5. Copyright©2005–2008,TexasInstrumentsIncorporated 9

SN74LV221A-Q1 SCLS692A–OCTOBER2005–REVISEDAPRIL2008 www.ti.com OUTPUT PULSE DURATION CONSTANT EXTERNAL CAPACITANCE vs vs SUPPLY VOLTAGE MULTIPLIER FACTOR 1.20 0.001 − K 1.15 RTtwAT === K215 0×° kCCWT × RT me − F F0(K.o0 ri0s C1 I anm pdFae ocpriet Gonrdr eVeaantlteu ore,f sK R o =)f 1.0 Constant 1.10 CT = 1000 pF citor Valu uration 1.05 al Capa 0.0001 e D CT = 0.01 m F ern uls 1.00 Ext ut P CT = 0.1 m F − T p C ut 0.95 O TA = 25°C 0.00001 VCC = 5 V 0.90 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 VCC − Supply Voltage − V Multiplier Factor − K Figure6. Figure7. DISTRIBUTION OF UNITS vs OUTPUT PULSE DURATION VCC = 5 V ce TA = 25°C en CT = 50 pF urr RT = 10 kW c c O of y Mean = 856 ns nc Median = 856 ns e u Std. Dev. = 3.5 ns q e r F e v ati el R −3 Std. Dev. +3 Std. Dev. Median 99% of Data Units tw − Output Pulse Duration Figure8. 10 Copyright©2005–2008,TexasInstrumentsIncorporated

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LV221AQPWRG4Q1 ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV221AQ & no Sb/Br) SN74LV221AQPWRQ1 ACTIVE TSSOP PW 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LV221AQ & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF SN74LV221A-Q1 : •Catalog: SN74LV221A NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LV221AQPWRG4Q1 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV221AQPWRQ1 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LV221AQPWRG4Q1 TSSOP PW 16 2000 367.0 367.0 35.0 SN74LV221AQPWRQ1 TSSOP PW 16 2000 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE PW0016A TSSOP - 1.2 mm max height SCALE 2.500 SMALL OUTLINE PACKAGE SEATING PLANE C 6.6 TYP 6.2 A 0.1 C PIN 1 INDEX AREA 14X 0.65 16 1 2X 5.1 4.55 4.9 NOTE 3 8 9 0.30 B 4.5 16X 0.19 1.2 MAX 4.3 0.1 C A B NOTE 4 (0.15) TYP SEE DETAIL A 0.25 GAGE PLANE 0.15 0.05 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220204/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL UNDER SOLDER MASK OPENING METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220204/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN PW0016A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 16X (1.5) SYMM (R0.05) TYP 1 16X (0.45) 16 SYMM 14X (0.65) 8 9 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220204/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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