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  • 型号: SN74HC21QDRQ1
  • 制造商: Texas Instruments
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SN74HC21QDRQ1产品简介:

ICGOO电子元器件商城为您提供SN74HC21QDRQ1由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74HC21QDRQ1价格参考¥1.18-¥3.38。Texas InstrumentsSN74HC21QDRQ1封装/规格:逻辑 - 栅极和逆变器, AND Gate IC 2 Channel 14-SOIC。您可以下载SN74HC21QDRQ1参考资料、Datasheet数据手册功能说明书,资料中有SN74HC21QDRQ1 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC GATE AND 2CH 4-INP 14-SOIC逻辑门 Auto Cat Dual 4 Inp Positive AND Gates

产品分类

逻辑 - 栅极和逆变器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,逻辑门,Texas Instruments SN74HC21QDRQ174HC

数据手册

点击此处下载产品Datasheet

产品型号

SN74HC21QDRQ1

不同V、最大CL时的最大传播延迟

19ns @ 6V,50pF

产品

AND

产品目录页面

点击此处下载产品Datasheet

产品种类

逻辑门

传播延迟时间

140 ns

低电平输出电流

4 mA

供应商器件封装

14-SOIC

其它名称

296-24750-6

包装

Digi-Reel®

单位重量

122.400 mg

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

14-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-14

工作温度

-40°C ~ 125°C

工作温度范围

- 40 C to + 125 C

工厂包装数量

2500

最大工作温度

+ 125 C

最小工作温度

- 40 C

栅极数量

2 Gate

标准包装

1

特性

-

电压-电源

2 V ~ 6 V

电流-输出高,低

5.2mA,5.2mA

电流-静态(最大值)

2µA

电源电压-最大

6 V

电源电压-最小

2 V

电路数

2

系列

SN74HC21-Q1

输入/输出线数量

4 / 1

输入数

4

输入线路数量

4

输出线路数量

1

逻辑电平-低

0.5 V ~ 1.8 V

逻辑电平-高

1.5 V ~ 4.2 V

逻辑类型

与门

逻辑系列

HC

高电平输出电流

- 4 mA

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PDF Datasheet 数据手册内容提取

SN74HC21-Q1 DUAL 4-INPUT POSITIVE-AND GATE SCLS597A − NOVEMBER 2004 − REVISED APRIL 2008 (cid:1) Qualified for Automotive Applications D OR PW PACKAGE (cid:1) (TOP VIEW) Wide Operating Voltage Range of 2 V to 6 V (cid:1) Outputs Can Drive up to Ten LSTTL Loads 1A 1 14 VCC (cid:1) Low Power Consumption, 20-µA Max I 1B 2 13 2D CC (cid:1) Typical tpd = 11 ns NC 3 12 2C (cid:1) ±4-mA Output Drive at 5 V 1C 4 11 NC (cid:1) Low Input Current of 1 µA Max 1D 5 10 2B 1Y 6 9 2A GND 7 8 2Y description/ordering information This device contains two independent 4-input AND gates. It performs the Boolean function Y(cid:1)A•B•C•Dor Y(cid:1)A(cid:2)B(cid:2)C(cid:2)D in positive logic. (cid:1) ORDERING INFORMATION ORDERABLE TOP-SIDE TA PACKAGE‡ PART NUMBER MARKING SOIC − D Reel of 2500 SN74HC21QDRQ1 HC21Q −4400°°CC ttoo 112255°°CC TSSOP − PW Reel of 2000 SN74HC21QPWRQ1 HC21Q †For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. FUNCTION TABLE (each gate) INPUTS OOUUTTPPUUTT A B C D Y H H H H H L X X X L X L X X L X X L X L X X X L L logic diagram (positive logic) 1 9 1A 2A 2 10 1B 6 2B 8 4 1Y 12 2Y 1C 2C 1D 5 2D 13 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright  2008, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN74HC21-Q1 DUAL 4-INPUT POSITIVE-AND GATE SCLS597A − NOVEMBER 2004 − REVISED APRIL 2008 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V CC Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA IK I I CC Output clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA OK O O CC Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA O O CC Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA CC Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W JA PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C stg †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN NOM MAX UNIT VCC Supply voltage 2 5 6 V VCC = 2 V 1.5 VVIIHH HHiigghh-lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 3.15 VV VCC = 6 V 4.2 VCC = 2 V 0.5 VVIILL LLooww-lleevveell iinnppuutt vvoollttaaggee VCC = 4.5 V 1.35 VV VCC = 6 V 1.8 VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 2 V 1000 ∆∆tt//∆∆vv IInnppuutt ttrraannssiittiioonn rriissee//ffaallll ttiimmee VCC = 4.5 V 500 nnss VCC = 6 V 400 TA Operating free-air temperature −40 125 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN74HC21-Q1 DUAL 4-INPUT POSITIVE-AND GATE SCLS597A − NOVEMBER 2004 − REVISED APRIL 2008 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS VVCCCC TA = 25°C TTAO = 1 −2450°°CC TAT O= 8−54°0C°C UUNNIITT MIN TYP MAX MIN MAX MIN MAX 2 V 1.9 1.998 1.9 1.9 IIOOHH = −2200 µµAA 4.5 V 4.4 4.499 4.4 4.4 VVOOHH VVII = VVIIHH oorr VVIILL 6 V 5.9 5.999 5.9 5.9 VV IOH = −4 mA 4.5 V 3.98 4.3 3.7 3.84 IOH = −5.2 mA 6 V 5.48 5.8 5.2 5.34 2 V 0.002 0.1 0.1 0.1 IIOOLL = 2200 µµAA 4.5 V 0.001 0.1 0.1 0.1 VVOOLL VVII = VVIIHH oorr VVIILL 6 V 0.001 0.1 0.1 0.1 VV IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33 IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33 II VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA ICC VI = VCC or 0, IO = 0 6 V 2 40 20 µA Ci 2 V to 6 V 3 10 10 10 pF switching characteristics over recommended operating free-air temperature range, C = 50 pF L (unless otherwise noted) (see Figure 1) PPAARRAAMMEETTEERR ((IIFNNRPPOUUMTT)) ((OOUUTTTOPPUUTT)) VVCCCC TA = 25°C TTAO = 1 −2450°°CC TAT O= 8−54°0C°C UUNNIITT MIN TYP MAX MIN MAX MIN MAX 2 V 44 110 165 140 ttppdd AA,, BB,, CC,, oorr DD YY 4.5 V 14 22 33 28 nnss 6 V 11 19 28 24 2 V 29 75 110 95 ttt Y 4.5 V 10 15 22 19 ns 6 V 8 13 19 16 operating characteristics, T = 25°C A PARAMETER TEST CONDITIONS TYP UNIT Cpd Power dissipation capacitance per gate No load 25 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN74HC21-Q1 DUAL 4-INPUT POSITIVE-AND GATE SCLS597A − NOVEMBER 2004 − REVISED APRIL 2008 PARAMETER MEASUREMENT INFORMATION From Output Test VCC Under Test Point Input 50% 50% 0 V CL = 50 pF (see Note A) tPLH tPHL In-Phase VOH 90% 90% Output 50% 50% LOAD CIRCUIT 10% 10% VOL tr tf 90% 90% VCC tPHL tPLH VOH Input 105%0% 501%0% Out-of-Phase 90% 50% 50% 90% 0 V Output 10% 10% VOL tr tf tf tr VOLTAGE WAVEFORM VOLTAGE WAVEFORMS INPUT RISE AND FALL TIMES PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time, with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74HC21QDRQ1 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 HC21Q & no Sb/Br) SN74HC21QPWRG4Q1 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 HC21Q & no Sb/Br) SN74HC21QPWRQ1 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 HC21Q & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74HC21-Q1 : •Catalog: SN74HC21 •Military: SN54HC21 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74HC21QPWRG4Q1 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74HC21QPWRQ1 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74HC21QPWRG4Q1 TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC21QPWRQ1 TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

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