图片仅供参考

详细数据请看参考数据手册

Datasheet下载
  • 型号: SN74AUP1G79DRLR
  • 制造商: Texas Instruments
  • 库位|库存: xxxx|xxxx
  • 要求:
数量阶梯 香港交货 国内含税
+xxxx $xxxx ¥xxxx

查看当月历史价格

查看今年历史价格

SN74AUP1G79DRLR产品简介:

ICGOO电子元器件商城为您提供SN74AUP1G79DRLR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74AUP1G79DRLR价格参考。Texas InstrumentsSN74AUP1G79DRLR封装/规格:逻辑 - 触发器, 。您可以下载SN74AUP1G79DRLR参考资料、Datasheet数据手册功能说明书,资料中有SN74AUP1G79DRLR 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC D-TYPE POS TRG SNGL 5SOT触发器 LoPwrSngl+EdgeTrggrd D Type Flip Flop

产品分类

逻辑 - 触发器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,触发器,Texas Instruments SN74AUP1G79DRLR74AUP

数据手册

点击此处下载产品Datasheet

产品型号

SN74AUP1G79DRLR

PCN设计/规格

点击此处下载产品Datasheet

不同V、最大CL时的最大传播延迟

5.8ns @ 3.3V, 30pF

产品目录页面

点击此处下载产品Datasheet

产品种类

触发器

传播延迟时间

17.3 ns

低电平输出电流

4 mA

元件数

1

其它名称

296-19594-6

功能

标准

包装

Digi-Reel®

单位重量

2.800 mg

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

SOT-553

封装/箱体

SOT-553-5

工作温度

-40°C ~ 85°C (TA)

工厂包装数量

4000

最大工作温度

+ 85 C

最小工作温度

- 40 C

极性

Non-Inverting

标准包装

1

每元件位数

1

电压-电源

0.8 V ~ 3.6 V

电流-输出高,低

4mA,4mA

电流-静态

0.5µA

电源电压-最大

3.6 V

电源电压-最小

0.8 V

电路数量

1

类型

D 型

系列

SN74AUP1G79

触发器类型

正边沿

输入电容

1.5pF

输入类型

Single-Ended

输入线路数量

1

输出类型

非反相

输出线路数量

1

逻辑类型

Single-Gate

逻辑系列

AUP

频率-时钟

266MHz

高电平输出电流

- 4 mA

推荐商品

型号:MC74VHC74DTR2

品牌:ON Semiconductor

产品名称:集成电路(IC)

获取报价

型号:CD74HC574ME4

品牌:Texas Instruments

产品名称:集成电路(IC)

获取报价

型号:MC14013BFG

品牌:ON Semiconductor

产品名称:集成电路(IC)

获取报价

型号:SN74HC374N

品牌:Texas Instruments

产品名称:集成电路(IC)

获取报价

型号:74ABT574CMSAX

品牌:ON Semiconductor

产品名称:集成电路(IC)

获取报价

型号:MC14174BCPG

品牌:ON Semiconductor

产品名称:集成电路(IC)

获取报价

型号:CD74AC574MG4

品牌:Texas Instruments

产品名称:集成电路(IC)

获取报价

型号:74LVT574WM

品牌:ON Semiconductor

产品名称:集成电路(IC)

获取报价

样品试用

万种样品免费试用

去申请
SN74AUP1G79DRLR 相关产品

SN74F377ADW

品牌:Texas Instruments

价格:

74ALVC374D,112

品牌:Nexperia USA Inc.

价格:

SN74LVC2G74DCUT

品牌:Texas Instruments

价格:

74HC175D,652

品牌:Nexperia USA Inc.

价格:¥3.02-¥3.02

74VHC374MTC

品牌:ON Semiconductor

价格:¥0.32-¥0.32

74ACT74SC

品牌:ON Semiconductor

价格:

MC74AC273DWG

品牌:ON Semiconductor

价格:

74LV74D,118

品牌:Nexperia USA Inc.

价格:

PDF Datasheet 数据手册内容提取

Product Order Technical Tools & Support & Folder Now Documents Software Community SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 SN74AUP1G79 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop 1 Features 3 Description • AvailableintheTexasInstruments NanoStar™ The AUP family is TI's premier solution to the 1 industry's low-power needs in battery-powered Package portable applications. This family assures a very-low • LowStatic-PowerConsumption: static and dynamic power consumption across the ICC=0.9µAMaximum entireVCCrangeof0.8Vto3.6V,thusresultinginan • LowDynamic-PowerConsumption: increased battery life. The AUP devices also maintain C =3pFTypicalat3.3V excellentsignalintegrity. pd • LowInputCapacitance: The SN74AUP1G79 is a single positive-edge- C =1.5pFTypical triggered D-type flip-flop. When data at the data (D) i • LowNoise:OvershootandUndershoot input meets the setup-time requirement, the data is transferred to the Q output on the positive-going edge <10%ofV CC of the clock pulse. Clock triggering occurs at a • I SupportsPartialPower-Down-ModeOperation off voltage level and is not directly related to the rise • InputHysteresisAllowsSlowInputTransitionand time of the clock pulse. Following the hold-time BetterSwitchingNoiseImmunityattheInput interval, data at the D input can be changed without (V =250mVTypicalat3.3V) affectingthelevelsattheoutputs. hys • WideOperatingV Rangeof0.8Vto3.6V NanoStar™ package technology is a major CC • Optimizedfor3.3-VOperation breakthrough in IC packaging concepts, using the die asthepackage. • 3.6-VI/OToleranttoSupportMixed-ModeSignal Operation The SN74AUP1G79 device is fully specified for partial-power-down applications using I . The I • t =4nsMaximumat3.3V off off pd circuitry disables the outputs when the device is • SuitableforPoint-to-PointApplications powered down. This inhibits current backflow into the • Latch-UpPerformanceExceeds100mAPer devicewhichpreventsdamagetothedevice. JESD78,ClassII DeviceInformation(1) • ESDPerformanceTestedPerJESD22 PARTNUMBER PACKAGE BODYSIZE(NOM) – 2000-VHuman-BodyModel (A114-B,ClassII) SN74AUP1G79DBV SOT-23(5) 2.90mm×1.60mm SN74AUP1G79DCK SC70(5) 2.00mm×1.25mm – 1000-VCharged-DeviceModel(C101) SN74AUP1G79DRL SOT-5X3(5) 1.60mm×1.20mm 2 Applications SN74AUP1G79DRY SON(6) 1.45mm×1.00mm SN74AUP1G79DSF SON(6) 1.00mm×1.00mm • BarcodeScanner SN74AUP1G79DPW X2SON(5) 0.80mmx0.80mm • CableSolutions SN74AUP1G79YFP DSBGA(6) 1.16mm×0.76mm • E-Book SN74AUP1G79YZP DSBGA(5) 1.39mm×0.89mm • EmbeddedPC (1) For all available packages, see the orderable addendum at • FieldTransmitter:TemperatureorPressure theendofthedatasheet. Sensor • FingerprintBiometrics PowerConsumptionandPerformance • HVAC:Heating,Ventilating,andAirConditioning Switching Characteristics at25MHz† • Network-AttachedStorage(NAS) 3.5 • ServerMotherboardandPSU 3 2.5 • SoftwareDefinedRadio(SDR) −V 2 Input Output e • TV:High-Definition(HDTV),LCD,andDigital ag 1.5 olt 1 • VideoCommunicationsSystem V 0.5 • WirelessDataAccessCard,Headset,Keyboard, 0 −0.5 Mouse,andLANCard 0 5 10 15 20 25 30 35 40 45 Time−ns †AUP1G08dataatCL=15pF 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com Table of Contents 1 Features.................................................................. 1 7.2 EnableandDisableTimes......................................14 2 Applications........................................................... 1 8 DetailedDescription............................................ 15 3 Description............................................................. 1 8.1 Overview.................................................................15 4 RevisionHistory..................................................... 2 8.2 FunctionalBlockDiagram.......................................15 8.3 FeatureDescription.................................................15 5 PinConfigurationandFunctions......................... 3 8.4 DeviceFunctionalModes........................................16 6 Specifications......................................................... 4 9 Applications,Implementation,andLayout....... 17 6.1 AbsoluteMaximumRatings......................................4 9.1 ApplicationInformation............................................17 6.2 ESDRatings..............................................................4 9.2 TypicalApplication..................................................17 6.3 RecommendedOperatingConditions.......................5 10 PowerSupplyRecommendations..................... 19 6.4 ThermalInformation..................................................5 6.5 ElectricalCharacteristics:T =25°C........................6 11 Layout................................................................... 19 A 6.6 ElectricalCharacteristics:T =–40°Cto85°C.........7 11.1 LayoutGuidelines.................................................19 A 6.7 TimingRequirements................................................8 11.2 LayoutExample....................................................19 6.8 SwitchingCharacteristics:C =5pF........................9 12 DeviceandDocumentationSupport................. 20 L 6.9 SwitchingCharacteristics:C =10pF......................9 12.1 DocumentationSupport........................................20 L 6.10 SwitchingCharacteristics:C =15pF..................10 12.2 ReceivingNotificationofDocumentationUpdates20 L 6.11 SwitchingCharacteristics:C =30pF..................11 12.3 CommunityResources..........................................20 L 6.12 OperatingCharacteristics......................................11 12.4 Trademarks...........................................................20 6.13 TypicalCharacteristics..........................................12 12.5 ElectrostaticDischargeCaution............................20 7 ParameterMeasurementInformation................13 12.6 Glossary................................................................20 7.1 PropagationDelays,SetupandHoldTimes,and 13 Mechanical,Packaging,andOrderable PulseWidth..............................................................13 Information........................................................... 20 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionH(April2015)toRevisionI Page • AddedDPW(X2SON)package.............................................................................................................................................. 1 • AddedMaximumjunctiontemperature,T inAbsoluteMaximumRatings............................................................................ 4 J • ChangedvaluesintheThermalInformationtabletoalignwithJEDECstandards............................................................... 5 • AddedBalancedHigh-DriveCMOSPush-PullOutputs,StandardCMOSInputs,ClampDiodes,PartialPowerDown (I ),Over-voltageTolerantInputs........................................................................................................................................ 15 off • AddedReceivingNotificationofDocumentationUpdatesandCommunityResources....................................................... 20 ChangesfromRevisionG(May2010)toRevisionH Page • UpdateddocumenttothenewTIdatasheetformat.............................................................................................................. 1 • RemovedOrderingInformationtable .................................................................................................................................... 1 • AddedDeviceInformationtable ............................................................................................................................................ 1 • AddedTypicalCharacteristicssection.................................................................................................................................. 12 2 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 5 Pin Configuration and Functions DBVPackage 5-PinSOT-23 DCKPackage TopView 5-PinSC70 TopView D 1 5 VCC D 1 5 VCC CLK 2 CLK 2 GND 3 4 Q GND 3 4 Q DRLPackage 5-PinSOT-5X3 DPWPackage TopView 5-PinX2SON TopView D 1 5 V CC GND D VCC CLK 2 CLK Q GND 3 4 Q DRYPackage 6-PinSON DSFPackage TopView 6-PinSON TopView D 1 6 V CC D 1 6 V CC CLK 2 5 NC CLK 2 5 NC GND 3 4 Q GND 3 4 Q YFPPackage 6-PinDSBGA YZPPackage BottomView 5-PinDSBGA BottomView 1 2 1 2 C GND Q C GND Q B CLK N.C. B CLK A D VCC A D VCC Not to scale Not to scale PinFunctions PIN DBV,DCK, DRY, I/O DESCRIPTION NAME YZP YFP DRL,DPW DSF CLK 2 2 B1 B1 I Positive-Edge-TriggeredClockinput D 1 1 A1 A1 I DataInput GND 3 3 C1 C1 — Groundpin NC — 5 — B2 — NoConnect Q 4 4 C2 C2 O Qoutput V 5 6 A2 A2 — Positivesupply CC Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltage –0.5 4.6 V CC V Inputvoltage(2) –0.5 4.6 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 4.6 V O V Outputvoltagerangeinthehighorlowstate(2) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±20 mA O ContinuouscurrentthroughV orGND ±50 mA CC T Maximumjunctiontemperature 150 °C J T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputnegative-voltageandoutputvoltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) 2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) 1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 4 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 6.3 Recommended Operating Conditions MIN MAX UNIT V Supplyvoltage 0.8 3.6 V CC V =0.8V V CC CC V =1.1Vto1.95V 0.65×V CC CC V High-levelinputvoltage V IH V =2.3Vto2.7V 1.6 CC V =3Vto3.6V 2 CC V =0.8V 0 CC V =1.1Vto1.95V 0.35×V CC CC V Low-levelinputvoltage V IL V =2.3Vto2.7V 0.7 CC V =3Vto3.6V 0.9 CC V Inputvoltage(1) 0 3.6 V I V Outputvoltage 0 V V O CC V =0.8V –20 µA CC V =1.1V –1.1 CC V =1.4V –1.7 CC I High-leveloutputcurrent OH V =1.65V –1.9 mA CC V =2.3V –3.1 CC V =3V –4 CC V =0.8V 20 µA CC V =1.1V 1.1 CC V =1.4V 1.7 CC I Low-leveloutputcurrent OL V =1.65V 1.9 mA CC V =2.3V 3.1 CC V =3V 4 CC Δt/Δv Inputtransitionriseorfallrate V =0.8Vto3.6V 200 ns/V CC T Operatingfree-airtemperature –40 85 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoassureproperdeviceoperation.SeetheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs. 6.4 Thermal Information SN74AUP1G79 THERMALMETRIC(1) DBV DCK DRL DRY DSF DPW YFP YZP UNIT (SOT-23) (SC70) (SOT-5X3) (SON) (SON) (X2SON) (DSBGA) (DSBGA) 5PINS 5PINS 5PINS 6PINS 6PINS 5PINS 6PINS 5PINS Junction-to-ambientthermal RθJA resistance 267.2 284.1 294.1 341.1 377.1 489.2 125.4 146.2 °C/W Junction-to-case(top)thermal RθJC(top) resistance 191.9 208.5 132.5 233.1 187.7 226.3 1.9 1.4 °C/W Junction-to-boardthermal RθJB resistance 101.1 103.1 143.4 206.7 236.6 352.9 37.2 39.3 °C/W Junction-to-topcharacterization ψJT parameter 83.0 76.6 14.5 63.4 29.0 38.2 0.5 0.7 °C/W Junction-to-board ψJB characterizationparameter 100.8 102.3 143.9 206.7 236.3 352.1 37.5 39.8 °C/W Junction-to-case(bottom) RθJC(bot) thermalresistance N/A N/A N/A N/A N/A 150.8 N/A N/A °C/W (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 6.5 Electrical Characteristics: T = 25°C A overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN TYP MAX UNIT CC I =–20µA 0.8Vto3.6V V –0.1 OH CC I =–1.1mA 1.1V 0.75×V OH CC I =–1.7mA 1.4V 1.11 OH I =–1.9mA 1.65V 1.32 OH V V OH I =–2.3mA 2.05 OH 2.3V I =–3.1mA 1.9 OH I =–2.7mA 2.72 OH 3V I =–4mA 2.6 OH I =20µA 0.8Vto3.6V 0.1 OL I =1.1mA 1.1V 0.3× V OL CC I =1.7mA 1.4V 0.31 OL I =1.9mA 1.65V 0.31 OL V V OL I =2.3mA 0.31 OL 2.3V I =3.1mA 0.44 OL I =2.7mA 0.31 OL 3V I =4mA 0.44 OL DorCLK I V =GNDto3.6V 0Vto3.6V 0.1 µA I input I I V orV =0Vto3.6V 0V 0.2 µA off I O ΔI V orV =0Vto3.6V 0Vto0.2V 0.2 µA off I O I V =GNDorV to3.6V, I =0 0.8Vto3.6V 0.5 µA CC I CC O ΔI V =V –0.6V,(1) I =0 3.3V 40 µA CC I CC O 0V 1.5 C V =V orGND pF i I CC 3.6V 1.5 C V =GND 0V 3 pF o O (1) One-inputswitching 6 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 6.6 Electrical Characteristics: T = –40°C to 85°C A overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS V MIN MAX UNIT CC I =–20µA 0.8Vto3.6V V –0.1 OH CC I =–1.1mA 1.1V 0.7×V OH CC I =–1.7mA 1.4V 1.03 OH I =–1.9mA 1.65V 1.3 OH V V OH I =–2.3mA 1.97 OH 2.3V I =–3.1mA 1.85 OH I =–2.7mA 2.67 OH 3V I =–4mA 2.55 OH I =20µA 0.8Vto3.6V 0.1 OL I =1.1mA 1.1V 0.3× V OL CC I =1.7mA 1.4V 0.37 OL I =1.9mA 1.65V 0.35 OL V V OL I =2.3mA 0.33 OL 2.3V I =3.1mA 0.45 OL I =2.7mA 0.33 OL 3V I =4mA 0.45 OL DorCLK I V =GNDto3.6V 0Vto3.6V 0.5 µA I input I I V orV =0Vto3.6V 0V 0.6 µA off I O ΔI V orV =0Vto3.6V 0Vto0.2V 0.6 µA off I O I V =GNDorV to3.6V, I =0 0.8Vto3.6V 0.9 µA CC I CC O ΔI V =V –0.6V,(1) I =0 3.3V 50 µA CC I CC O (1) One-inputswitching Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 6.7 Timing Requirements overrecommendedoperatingfree-airtemperaturerange,T =–40°Cto+85°C(unlessotherwisenoted)(seeFigure3) A V MIN TYP(1) MAX UNIT CC 0.8V 20 1.2V±0.1V 80 1.5V±0.1V 100 f Clockfrequency MHz clock 1.8V±0.15V 140 2.5V±0.2V 210 3.3V±0.3V 260 0.8V 4.8 1.2V±0.1V 2.2 1.5V±0.1V 1.5 t Pulseduration,CLKhighorlow ns w 1.8V±0.15V 1.6 2.5V±0.2V 1.7 3.3V±0.3V 1.9 0.8V 4.2 2.9 1.2V±0.1V 1.4 1.5V±0.1V 1 Datahigh 1.8V±0.15V 0.9 2.5V±0.2V 0.7 Setuptimebefore 3.3V±0.3V 0.6 t ns su CLK↑ 0.8V 5.3 3.5 1.2V±0.1V 1.8 1.5V±0.1V 1.2 Datalow 1.8V±0.15V 1.1 2.5V±0.2V 1 3.3V±0.3V 1 0.8V 0 0 1.2V±0.1V 0 1.5V±0.1V 0 t Holdtime,dataafterCLK↑ ns h 1.8V±0.15V 0 2.5V±0.2V 0 3.3V±0.3V 0 (1) T =25°C A 8 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 6.8 Switching Characteristics: C = 5 pF L overrecommendedoperatingfree-airtemperaturerange,C =5pF(unlessotherwisenoted)(seeFigure3andFigure4) L FROM TO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (INPUT) (OUTPUT) T =25°C 93 A V =0.8V CC T =–40°Cto+85°C 90 A T =25°C 199 A V =1.2V±0.1V CC T =–40°Cto+85°C 220 A T =25°C 250 A V =1.5V±0.1V CC T =–40°Cto+85°C 230 A f MHz max T =25°C 271 A V =1.8V±0.15V CC T =–40°Cto+85°C 240 A T =25°C 280 A V =2.5V±0.2V CC T =–40°Cto+85°C 250 A T =25°C 280 A V =3.3V±0.3V CC T =–40°Cto+85°C 260 A V =0.8V T =25°C 15.9 CC A T =25°C 3.7 6.9 11 A V =1.2V±0.1V CC T =–40°Cto+85°C 2.6 13.1 A T =25°C 3 4.8 7.6 A V =1.5V±0.1V CC T =–40°Cto+85°C 2 8.8 A t CLK Q T =25°C 2.4 3.8 6.1 ns pd A V =1.8V±0.15V CC T =–40°Cto+85°C 1.5 7.1 A T =25°C 1.8 2.7 4.4 A V =2.5V±0.2V CC T =–40°Cto+85°C 1.1 5 A T =25°C 1.5 2.1 3.6 A V =3.3V±0.3V CC T =–40°Cto+85°C 0.9 4 A 6.9 Switching Characteristics: C = 10 pF L overrecommendedoperatingfree-airtemperaturerange,C =10pF(unlessotherwisenoted)(seeFigure3andFigure4) L FROM TO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (INPUT) (OUTPUT) T =25°C 62 A V =0.8V CC T =–40°Cto+85°C 50 A T =25°C 147 A V =1.2V±0.1V CC T =–40°Cto+85°C 160 A T =25°C 189 A V =1.5V±0.1V CC T =–40°Cto+85°C 200 A f MHz max T =25°C 180 A V =1.8V±0.15V CC T =–40°Cto+85°C 240 A T =25°C 260 A V =2.5V±0.2V CC T =–40°Cto+85°C 250 A T =25°C 280 A V =3.3V±0.3V CC T =–40°Cto+85°C 260 A Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com Switching Characteristics: C = 10 pF (continued) L overrecommendedoperatingfree-airtemperaturerange,C =10pF(unlessotherwisenoted)(seeFigure3andFigure4) L FROM TO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (INPUT) (OUTPUT) V =0.8V T =25°C 18 CC A T =25°C 4.3 7.8 12.3 A V =1.2V±0.1V CC T =–40°Cto+85°C 3.2 14.4 A T =25°C 3.5 5.5 8.4 A V =1.5V±0.1V CC T =–40°Cto+85°C 2.5 9.8 A t CLK Q T =25°C 2.8 4.4 6.8 ns pd A V =1.8V±0.15V CC T =–40°Cto+85°C 1.9 8 A T =25°C 2.2 3.2 5 A V =2.5V±0.2V CC T =–40°Cto+85°C 1.5 5.7 A T =25°C 1.8 2.6 4.1 A V =3.3V±0.3V CC T =–40°Cto+85°C 1.3 4.5 A 6.10 Switching Characteristics: C = 15 pF L overrecommendedoperatingfree-airtemperaturerange,C =15pF(unlessotherwisenoted)(seeFigure3andFigure4) L FROM TO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (INPUT) (OUTPUT) T =25°C 48 A V =0.8V CC T =–40°Cto+85°C 30 A T =25°C 112 A V =1.2V±0.1V CC T =–40°Cto+85°C 120 A T =25°C 151 A V =1.5V±0.1V CC T =–40°Cto+85°C 160 A f MHz max T =25°C 194 A V =1.8V±0.15V CC T =–40°Cto+85°C 220 A T =25°C 248 A V =2.5V±0.2V CC T =–40°Cto+85°C 250 A T =25°C 280 A V =3.3V±0.3V CC T =–40°Cto+85°C 260 A V =0.8V T =25°C 20.3 CC A T =25°C 5 8.7 13.6 A V =1.2V±0.1V CC T =–40°Cto+85°C 3.9 15.6 A T =25°C 4.1 6.3 9.3 A V =1.5V±0.1V CC T =–40°Cto+85°C 3.1 10.7 A t CLK Q T =25°C 3.3 4 7.6 ns pd A V =1.8V±0.15V CC T =–40°Cto+85°C 2.4 8.7 A T =25°C 2.6 3.6 5.5 A V =2.5V±0.2V CC T =–40°Cto+85°C 1.9 6.3 A T =25°C 2.2 3 4.5 A V =3.3V±0.3V CC T =–40°Cto+85°C 1.6 5 A 10 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 6.11 Switching Characteristics: C = 30 pF L overrecommendedoperatingfree-airtemperaturerange,C =30pF(unlessotherwisenoted)(seeFigure3andFigure4) L FROM TO PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (INPUT) (OUTPUT) T =25°C 24 A V =0.8V CC T =–40°Cto+85°C 20 A T =25°C 72 A V =1.2V±0.1V CC T =–40°Cto+85°C 80 A T =25°C 100 A V =1.5V±0.1V CC T =–40°Cto+85°C 100 A f MHz max T =25°C 127 A V =1.8V±0.15V CC T =–40°Cto+85°C 140 A T =25°C 185 A V =2.5V±0.2V CC T =–40°Cto+85°C 210 A T =25°C 266 A V =3.3V±0.3V CC T =–40°Cto+85°C 260 A V =0.8V T =25°C 27.2 CC A T =25°C 7 11.5 17.3 A V =1.2V±0.1V CC T =–40°Cto+85°C 5.9 24 A T =25°C 5.7 8.3 11.8 A V =1.5V±0.1V CC T =–40°Cto+85°C 4.6 15.9 A t CLK Q T =25°C 4.7 6.7 9.6 ns pd A V =1.8V±0.15V CC T =–40°Cto+85°C 3.8 13 A T =25°C 3.7 4.9 7 A V =2.5V±0.2V CC T =–40°Cto+85°C 2.9 9 A T =25°C 3.2 4.1 5.8 A V =3.3V±0.3V CC T =–40°Cto+85°C 2.6 7.2 A 6.12 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC 0.8V 2.5 1.2V±0.1V 2.5 1.5V±0.1V 2.5 C Powerdissipationcapacitance f=10MHz pF pd 1.8V±0.15V 2.5 2.5V±0.2V 3 3.3V±0.3V 3 Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 6.13 Typical Characteristics 18 6 TPD in ns 16 5 14 12 4 ns) 10 ns) D ( D ( 3 P 8 P T T 6 2 4 1 2 TPD in ns 0 0 0 1 2 3 4 -50 0 50 100 150 VCC (V) D001 Temperature (qC) D001 Figure1.TPDvsV Figure2.TPDvsTemperature CC 12 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 7 Parameter Measurement Information 7.1 Propagation Delays, Setup and Hold Times, and Pulse Width From Output Under Test CL 1 MW (see NoteA) LOAD CIRCUIT VCC= 0.8 V VC±C0=. 11 .V2 V VC±C0=. 11 .V5 V VC±C0=.1 15. 8V V VC±C0=. 22 .V5 V VC±C0=. 33 .V3 V CL 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF VM VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VI VCC VCC VCC VCC VCC VCC tw VCC Input VCC/2 VCC/2 VI 0 V Input VM VM 0 V VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL Output VM VM VOH VCC VOL Timing Input VCC/2 0 V tPHL tPLH VOH tsu th Output VM VM VCC VOL Data Input VCC/2 VCC/2 0 V VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES VOLTAGE WAVEFORMS INVERTINGAND NONINVERTING OUTPUTS SETUPAND HOLD TIMES NOTES: A. CLincludes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO= 50W, tr/tf= 3 ns. C. The outputs are measured one at a time, with one transition per measurement. D. tPLHand tPHLare the same as tpd. E. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 7.2 Enable and Disable Times 2×VCC 5 kW S1 From Output Under Test GND TEST S1 CL 5 kW tPLZ/tPZL 2×VCC (see NoteA) tPHZ/tPZH GND LOAD CIRCUIT VCC= 0.8 V VC±C0=. 11 .V2 V VC±C0=. 11 .V5 V VC±C0=.1 15. 8V V VC±C0=. 22 .V5 V VC±C0=. 33 .V3 V CL 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF VM VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VI VCC VCC VCC VCC VCC VCC VD 0.1 V 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCC Output Control VCC/2 VCC/2 0 V tPZL tPLZ Output Waveform 1 VCC S1 at 2×VCC VCC/2 VOL+ VD (see Note B) VOL tPZH tPHZ Output WSa1v eafto GrmN D2 VCC/2 VOH−VD VOH ≈0 V (see Note B) VOLTAGE WAVEFORMS ENABLEAND DISABLE TIMES LOW-AND HIGH-LEVELENABLING NOTES: A. CLincludes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO= 50W, tr/tf= 3 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZand tPHZare the same as tdis. F. tPZLand tPZHare the same as ten. G. All parameters and waveforms are not applicable to all devices. Figure4. LoadCircuitandVoltageWaveforms 14 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 8 Detailed Description 8.1 Overview The SN74AUP1G79 is a single positive-edge-triggered D-type flip-flop. Data at the input (D) is transferred to the output (Q) on the positive-going edge of the clock pulse when the setup time requirement is met. Because the clock triggering occurs at a voltage level, it is not directly related to the rise time of the clock pulse. This allows fordataattheinputtobechangedwithoutaffectingthelevelattheoutput,followingthehold-timeinterval. 8.2 Functional Block Diagram CLK CLK Q Q D D Figure5. LogicDiagram(PositiveLogic) 8.3 Feature Description 8.3.1 BalancedCMOSPush-PullOutputs A balanced output allows the device to sink and source similar currents. The drive capability of this device may create fast edges into light loads so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the power output of the device to be limited to avoid damage due to over- current. The electrical and thermal limits defined the in the Absolute Maximum Ratings must be followed at all times. 8.3.2 StandardCMOSInputs Standard CMOS inputs are high impedance and are typically modelled as a resistor in parallel with the input capacitance given in the Electrical Characteristics: T = 25°C. The worst case resistance is calculated with the A maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given intheElectricalCharacteristics:T =25°C,usingohm'slaw(R=V ÷ I). A Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in Recommended Operating Conditions to avoid excessive currents and oscillations. If a slow or noisy input signal is required, a device with a Schmitt-triggerinputshouldbeusedtoconditiontheinputsignalpriortothestandardCMOSinput. Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com Feature Description (continued) 8.3.3 ClampDiodes Theinputsandoutputstothisdevicehavenegativeclampingdiodes. CAUTION Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input negative-voltage and output voltage ratings maybeexceedediftheinputandoutputclamp-currentratingsareobserved. Device VCC Input Logic Output -IIK -IOK GND Figure6. ElectricalPlacementofClampingDiodesforEachInputandOutput 8.3.4 PartialPowerDown(I ) off The inputs and outputs for this device enter a high-impedance state when the supply voltage is 0 V. The maximum leakage into or out of any input or output pin on the device is specified by I in the Electrical off Characteristics:T =25°C. A 8.3.5 Over-voltageTolerantInputs Input signals to this device can be driven above the supply voltage so long as they remain below the maximum inputvoltagevaluespecifiedintheAbsoluteMaximumRatings. 8.4 Device Functional Modes Table1liststhefunctionalmodesoftheSN74AUP1G79device. Table1.FunctionTable INPUTS OUTPUT CLK D Q ↑ H H ↑ L L LorH X Q 0 16 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 9 Applications, Implementation, and Layout NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information A rotary quadrature encoder is a simple, infinitely-turning knob that outputs two out-of-phase square waves as it is turned and is often used in electronics as a method of human interface. One signal will lead the other in phase depending on which direction the knob is turned. The SN74AUP1G79 can be used to determine which direction theknobisbeingturnedwithouttheneedforamicrocontrollerorothercomplexmonitoringsystembyconnecting the outputs of the knob to the D and CLK inputs of the SN74AUP1G79 as shown in Figure 7. It is important to notethattheCLKinputwillcontrolwhenthedirectionsignalchanges,asshowninFigure8. 9.2 Typical Application SN74AUP1G79 0.8-3.6V QINA 1 D VCC 5 Quadrature 0.1 (cid:29)F Encoder QINB 2 CLK 3 GND Q 4 DIR Figure7. TypicalApplicationDiagram QINA tpd tpd QINB DIR Figure8. TimingDiagramforQuadratureEncoderApplication 9.2.1 DesignRequirements The SN74AUP1G79 device uses CMOS technology and has balanced output drive. Take care to avoid bus contentionbecauseitcandrivecurrentsthatwouldexceedmaximumlimits. 9.2.2 DetailedDesignProcedure 1. RecommendedInputconditions – Risetimeandfalltimespecifications.See Δt/ΔVinRecommendedOperatingConditions. – Specifiedhighandlowlevels.SeeV andV inRecommendedOperatingConditions. IH IL – Inputsareovervoltagetolerant,whichallowsthemtogoashighas3.6VatanyvalidV CC 2. Recommendedoutputconditions – Loadcurrentsmustnotexceed20mAontheoutputand50mAtotalforthepart Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com Typical Application (continued) 9.2.3 ApplicationCurves Switching Characteristics at25MHz† 3.5 3 2.5 V Input Output − 2 e g 1.5 a olt 1 V 0.5 0 −0.5 0 5 10 15 20 25 30 35 40 45 Time−ns † AUP1G08dataatCL=15pF Figure9.AUP–TheLowest-PowerFamily Figure10.ExcellentSignalIntegrity 18 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 www.ti.com SCES592I–JULY2004–REVISEDSEPTEMBER2017 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions table. A 0.1-µF bypass capacitor is recommended to be connected from the VCC terminal to GND to prevent power disturbance. To reject different frequencies of noise, use multiple bypass capacitors in parallel. Capacitors with values of 0.1 µF and 1 µF are commonly used in parallel. The bypasscapacitormustbeinstalledasclosetothepowerterminalaspossibleforbestresults. 11 Layout 11.1 Layout Guidelines Even low data rate digital signals can contain high-frequency signal components due to fast edge rates. When a printed-circuit board (PCB) trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners. Figure 11 shows progressively better techniques of rounding corners. Only the lastexample(BEST)maintainsconstanttracewidthandminimizesreflections. An example layout is given in Figure 12 for the DPW (X2SON-5) package. This example layout includes a 0402 (metric) capacitor and uses the measurements found in the example board layout appended to this end of this datasheet. A via of diameter 0.1 mm (3.973 mil) is placed directly in the center of the device. This via can be usedtotraceoutthecenterpinconnectionthroughanotherboardlayer,oritcanbeleftoutofthelayout 11.2 Layout Example WORST BETTER BEST W 2 1W min. W Figure11. TraceExample 0402 0.1 (cid:133)F Bypass Capacitor mil 4 8 mil 8 mil 8 mil SOLDER MASK OPENING, TYP METAL UNDER SOLDER MASK, TYP Figure12. ExampleLayoutWithDPW(X2SON-5)Package Copyright©2004–2017,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN74AUP1G79

SN74AUP1G79 SCES592I–JULY2004–REVISEDSEPTEMBER2017 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: ImplicationsofSloworFloatingCMOSInputs 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.4 Trademarks NanoStar,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 20 SubmitDocumentationFeedback Copyright©2004–2017,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G79

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74AUP1G79DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H79R & no Sb/Br) SN74AUP1G79DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H79R & no Sb/Br) SN74AUP1G79DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H79R & no Sb/Br) SN74AUP1G79DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H79R & no Sb/Br) SN74AUP1G79DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 (HWF, HWK, HWO, HW & no Sb/Br) R) SN74AUP1G79DCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 (HWO, HWR) & no Sb/Br) SN74AUP1G79DPWR ACTIVE X2SON DPW 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 9N & no Sb/Br) SN74AUP1G79DRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 85 HWR & no Sb/Br) SN74AUP1G79DRYR ACTIVE SON DRY 6 5000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 HW & no Sb/Br) SN74AUP1G79DSFR ACTIVE SON DSF 6 5000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 HW & no Sb/Br) SN74AUP1G79YFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM HWN & no Sb/Br) SN74AUP1G79YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 HWN & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Feb-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74AUP1G79DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G79DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G79DCKR SC70 DCK 5 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 SN74AUP1G79DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74AUP1G79DCKT SC70 DCK 5 250 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74AUP1G79DPWR X2SON DPW 5 3000 178.0 8.4 0.91 0.91 0.5 2.0 8.0 Q3 SN74AUP1G79DRLR SOT-5X3 DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 SN74AUP1G79DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74AUP1G79DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74AUP1G79YFPR DSBGA YFP 6 3000 178.0 9.2 0.89 1.29 0.62 4.0 8.0 Q1 SN74AUP1G79YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Feb-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74AUP1G79DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74AUP1G79DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74AUP1G79DCKR SC70 DCK 5 3000 203.0 203.0 35.0 SN74AUP1G79DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74AUP1G79DCKT SC70 DCK 5 250 202.0 201.0 28.0 SN74AUP1G79DPWR X2SON DPW 5 3000 205.0 200.0 33.0 SN74AUP1G79DRLR SOT-5X3 DRL 5 4000 202.0 201.0 28.0 SN74AUP1G79DRYR SON DRY 6 5000 184.0 184.0 19.0 SN74AUP1G79DSFR SON DSF 6 5000 184.0 184.0 19.0 SN74AUP1G79YFPR DSBGA YFP 6 3000 220.0 220.0 35.0 SN74AUP1G79YZPR DSBGA YZP 5 3000 220.0 220.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

None

PACKAGE OUTLINE DPW0005A X2SON - 0.4 mm max height SCALE 12.000 PLASTIC SMALL OUTLINE - NO LEAD B 0.85 A 0.75 PIN 1 INDEX AREA 0.85 0.75 0.4 MAX C SEATING PLANE NOTE 3 (0.1) 0.05 (0.25) 4X (0.05) 0.00 0.25 0.1 2 4 NOTE 3 2X 3 2X (0.26) 0.48 5 1 0.27 0.27 4X 0.17 0.17 0.1 C A B (0.06) 0.05 C 0.32 3X 0.23 4223102/B 09/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The size and shape of this feature may vary. www.ti.com

EXAMPLE BOARD LAYOUT DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.78) SYMM ( 0.1) 4X (0.42) VIA 0.05 MIN ALL AROUND 1 TYP 5 4X (0.22) SYMM 4X (0.26) (0.48) 3 2 4 (R0.05) TYP SOLDER MASK 4X (0.06) OPENING, TYP ( 0.25) (0.21) TYP METAL UNDER EXPOSED METAL SOLDER MASK CLEARANCE TYP LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:60X 4223102/B 09/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, refer to QFN/SON PCB application note in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4X (0.42) 4X (0.06) 5 4X (0.22) 1 ( 0.24) 4X (0.26) SYMM (0.21) (0.48) TYP SOLDER MASK 3 EDGE 2 4 (R0.05) TYP SYMM (0.78) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 92% PRINTED SOLDER COVERAGE BY AREA SCALE:100X 4223102/B 09/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE YZP0005 DSBGA - 0.5 mm max height SCALE 8.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.05 C 0.15 BALL TYP 0.5 TYP C SYMM 1 B D: Max = 1.418 mm, Min =1 .358 mm TYP 0.5 TYP E: Max = 0.918 mm, Min =0 .858 mm A 0.25 5X 1 2 0.21 0.015 C A B SYMM 4219492/A 05/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.23) 1 2 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:40X SOLDER MASK 0.05 MAX 0.05 MIN ( 0.23) OPENING SOLDER MASK OPENING ( 0.23) METAL METAL UNDER SOLDER MASK NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219492/A 05/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM C METAL SYMM TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219492/A 05/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

PACKAGE OUTLINE YFP0006 DSBGA - 0.5 mm max height SCALE 10.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.13 BALL TYP 0.05 C 0.4 TYP SYMM C D: Max = 1.19 mm, Min = 1.13 mm 0.8 TYP B SYMM E: Max = 0.79 mm, Min = 0.73 mm 0.4 TYP A 0.25 6X 0.21 1 2 0.015 C A B 4223410/A 11/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YFP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 6X ( 0.23) 1 2 A (0.4) TYP B SYMM C SYMM LAND PATTERN EXAMPLE SCALE:50X ( 0.23) 0.05 MAX 0.05 MIN METAL UNDER METAL SOLDER MASK SOLDER MASK ( 0.23) OPENING SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4223410/A 11/2016 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YFP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 6X ( 0.25) (R0.05) TYP 1 2 A (0.4) TYP B SYMM METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:50X 4223410/A 11/2016 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

None

None

PACKAGE OUTLINE DSF0006A X2SON - 0.4 mm max height SCALE 10.000 PLASTIC SMALL OUTLINE - NO LEAD 1.05 B A 0.95 PIN 1 INDEX AREA 1.05 0.95 0.4 MAX C SEATING PLANE 0.05 C (0.11) TYP SYMM 0.05 0.00 3 4 2X SYMM 0.7 4X 0.35 6 1 0.22 6X 0.12 (0.1) PIN 1 ID 0.45 0.07 C B A 6X 0.35 0.05 C 4220597/A 06/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MO-287, variation X2AAF. www.ti.com

EXAMPLE BOARD LAYOUT DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:40X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK SOLDER MASK METAL METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220597/A 06/2017 NOTES: (continued) 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:40X 4220597/A 06/2017 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

None

None

GENERIC PACKAGE VIEW DRY 6 USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4207181/G

PACKAGE OUTLINE DRY0006A USON - 0.6 mm max height SCALE 8.500 PLASTIC SMALL OUTLINE - NO LEAD B 1.05 A 0.95 PIN 1 INDEX AREA 1.5 1.4 0.6 MAX C SEATING PLANE 0.05 0.00 0.08 C 3X 0.6 SYMM (0.127) TYP (0.05) TYP 3 4 4X 0.5 SYMM 2X 1 6 1 0.25 6X 0.15 0.4 0.3 0.1 C A B 0.05 C PIN 1 ID (OPTIONAL) 0.35 5X 0.25 4222894/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) LAND PATTERN EXAMPLE 1:1 RATIO WITH PKG SOLDER PADS EXPOSED METAL SHOWN SCALE:40X 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4222894/A 01/2018 NOTES: (continued) 3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) SOLDER PASTE EXAMPLE BASED ON 0.075 - 0.1 mm THICK STENCIL SCALE:40X 4222894/A 01/2018 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated