M74HC74 DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR n HIGH SPEED : f = 67MHz (TYP.) at V = 6V MAX CC n LOW POWER DISSIPATION: I =2m A(MAX.) at T =25°C CC A n HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC n SYMMETRICAL OUTPUT IMPEDANCE: DIP SOP TSSOP |I | = I = 4mA (MIN) OH OL n BALANCED PROPAGATION DELAYS: tPLH @ tPHL ORDER CODES n WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R V (OPR) = 2V to 6V CC DIP M74HC74B1R n PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 74 SOP M74HC74M1R M74HC74RM13TR TSSOP M74HC74TTR DESCRIPTION The M74HC74 is an high speed CMOS DUAL D independent of the clock and accomplished by a TYPE FLIP FLOP WITH CLEAR fabricated with low on the appropriate input. silicon gate C2MOS technology. All inputs are equipped with protection circuits A signal on the D INPUT is transferred on the Q against static discharge and transient excess OUTPUT during the positive going transition of the voltage. clock pulse. CLEAR and PRESET are PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/12

M74HC74 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION Asynchronous Reset - 1,13 1CLR, 2CLR Direct Input 2, 12 1D, 2D Data Inputs Clock Input 3, 11 1CK, 2CK (LOW-to-HIGH, Edge-Triggered) Asynchronous Set - Direct 4, 10 1PR, 2PR Input 5, 9 1Q, 2Q True Flip-Flop Outputs Complement Flip-Flop 6, 8 1Q, 2Q Outputs 7 GND Ground (0V) 14 Vcc Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X L H CLEAR H L X X H L PRESET L L X X H H ---- H H L L H ---- H H H H L ---- H H X Qn Qn NO CHANGE X : Don’t Care LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/12

M74HC74 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current – 20 mA IOK DC Output Diode Current – 20 mA IO DC Output Current – 25 mA ICC or IGND DC VCC or Ground Current – 50 mA PD Power Dissipation 500(*) mW Tstg Storage Temperature -65 to +150 °C TL Lead Temperature (10 sec) 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 (cid:176) C; derate to 300mW by 10mW/(cid:176) C from 65(cid:176) C to 85(cid:176) C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit VCC Supply Voltage 2 to 6 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C Input Rise and Fall Time VCC = 2.0V 0 to 1000 ns tr, tf VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns 3/12

M74HC74 DC SPECIFICATIONS Test Condition Value Symbol Parameter V TA = 25°C -40 to 85°C -55 to 125°C Unit CC (V) Min. Typ. Max. Min. Max. Min. Max. V High Level Input 2.0 1.5 1.5 1.5 IH Voltage 4.5 3.15 3.15 3.15 V 6.0 4.2 4.2 4.2 V Low Level Input 2.0 0.5 0.5 0.5 IL Voltage 4.5 1.35 1.35 1.35 V 6.0 1.8 1.8 1.8 VOH High Level Output 2.0 IO=-20 m A 1.9 2.0 1.9 1.9 Voltage 4.5 IO=-20 m A 4.4 4.5 4.4 4.4 6.0 IO=-20 m A 5.9 6.0 5.9 5.9 V 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 VOL Low Level Output 2.0 IO=20 m A 0.0 0.1 0.1 0.1 Voltage 4.5 IO=20 m A 0.0 0.1 0.1 0.1 6.0 IO=20 m A 0.0 0.1 0.1 0.1 V 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 I Input Leakage I Current 6.0 VI = VCC or GND – 0.1 – 1 – 1 m A I Quiescent Supply CC Current 6.0 VI = VCC or GND 2 20 40 m A 4/12

M74HC74 AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6ns) L r f Test Condition Value Symbol Parameter V TA = 25°C -40 to 85°C -55 to 125°C Unit CC (V) Min. Typ. Max. Min. Max. Min. Max. t t Output Transition 2.0 30 75 95 110 TLH THL Time 4.5 8 15 19 22 ns 6.0 7 13 16 19 t t Propagation Delay 2.0 48 150 190 225 PLH PHL Time (CK - Q, Q) 4.5 16 30 38 45 ns 6.0 13 26 32 38 t t Propagation Delay 2.0 51 150 190 225 PLH PHL Time (CLR, PR - 4.5 17 30 38 45 ns Q, Q) 6.0 15 26 32 38 f Maximum Clock 2.0 6.2 21 5 4.2 MAX Frequency 4.5 31 63 25 21 MHz 6.0 37 67 30 25 t Minimum Pulse 2.0 18 75 95 110 W(H) tW(L) Width (CK) 4.5 6 15 19 22 ns 6.0 6 13 16 19 t Minimum Pulse 2.0 21 75 95 110 W(L) Width (CLR, PR) 4.5 7 15 19 22 ns 6.0 6 13 16 19 t Minimum Set-up 2.0 15 75 95 110 s Time 4.5 4 15 19 22 ns 6.0 3 13 16 19 t Minimum Hold 2.0 0 0 0 h Time 4.5 0 0 0 ns 6.0 0 0 0 t Minimum Removal 2.0 0 25 30 35 REM Time (CLR, PR to 4.5 0 5 6 7 ns CK) 6.0 0 4 5 6 CAPACITIVE CHARACTERISTICS Test Condition Value Symbol Parameter V TA = 25°C -40 to 85°C -55 to 125°C Unit CC (V) Min. Typ. Max. Min. Max. Min. Max. CIN Input Capacitance 5.0 5 10 10 10 pF C Power Dissipation PD Capacitance (note 5.0 34 pF 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I = C x V x f + I /2 (per FLIP/ CC(opr) PD CC IN CC FLOP) 5/12

M74HC74 TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance) L R = Z of pulse generator (typically 50W ) T OUT WAVEFORM 1: nCK TO nQ,nQ PROPAGATION DELAY TIMES,nD TO nCK SETUP AND HOLD TIMES, nCK MINIMUM PULSE WIDTH, MAXIMUM nCK FREQUENCY (f=1MHz; 50% duty cycle) 6/12

M74HC74 WAVEFORM 2 :nQ , nQ TO CLR, PR PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH (nCLR and nPR) (f=1MHz; 50% duty cycle) WAVEFORM 3 : MINIMUM PULSE WIDTH (nCLR and nPR),MINIMUM REMOVAL TIME (nCLR and nPR TO nCK)(f=1MHz; 50% duty cycle) 7/12

M74HC74 WAVEFORM 4 : MINIMUM PULSE WIDTH (nCLR, nPR , nCK) (f=1MHz; 50% duty cycle) 8/12

M74HC74 Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. a1 0.51 0.020 B 1.39 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 2.54 0.050 0.100 P001A 9/12

M74HC74 SO-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.68 0.026 S 8° (max.) PO13G 10/12

M74HC74 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 1.2 0.047 A1 0.05 0.15 0.002 0.004 0.006 A2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0° 8° 0° 8° L 0.45 0.60 0.75 0.018 0.024 0.030 A A2 K L A1 b e c E D E1 PIN 1 IDENTIFICATION 1 0080337D 11/12

M74HC74 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 12/12