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  • 型号: SN74AS867NT
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ICGOO电子元器件商城为您提供SN74AS867NT由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 提供SN74AS867NT价格参考¥17.83-¥41.12以及Texas InstrumentsSN74AS867NT封装/规格参数等产品信息。 你可以下载SN74AS867NT参考资料、Datasheet数据手册功能说明书, 资料中有SN74AS867NT详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC SYNC UP/DOWN COUNTER 24-DIP计数器 IC Synch 8-Bit Up/Down Counter

产品分类

逻辑 -计数器,除法器

品牌

Texas Instruments

产品手册

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产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

计数器 IC,Texas Instruments SN74AS867NT74AS

数据手册

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产品型号

SN74AS867NT

产品种类

计数器 IC

位数

8 bit

供应商器件封装

24-PDIP

元件数

1

其它名称

296-6380-5
SN74AS867NTE4
SN74AS867NTE4-ND

包装

管件

单位重量

1.754 g

商标

Texas Instruments

复位

异步

安装类型

通孔

安装风格

Through Hole

定时

同步

封装

Tube

封装/外壳

24-DIP(0.300",7.62mm)

封装/箱体

PDIP-24

工作温度

0°C ~ 70°C

工作温度范围

0 C to + 70 C

工作电源电压

4.5 V to 5.5 V

工厂包装数量

15

方向

上,下

标准包装

15

每元件位数

8

电压-电源

4.5 V ~ 5.5 V

系列

SN74AS867

触发器类型

正边沿

计数器类型

Binary

计数速率

50MHz

计数顺序

Up/Down

逻辑类型

二进制计数器

逻辑系列

AS

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PDF Datasheet 数据手册内容提取

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 • Fully Programmable With Synchronous SN54AS867, SN54AS869...JT PACKAGE Counting and Loading SN74ALS867A, SN74ALS869, SN74AS867, • SN74AS869...DW OR NT PACKAGE SN74ALS867A and ′AS867 Have (TOP VIEW) Asynchronous Clear; SN74ALS869 and ′AS869 Have Synchronous Clear S0 1 24 VCC • Fully Independent Clock Circuit S1 2 23 ENP Simplifies Use A 3 22 QA • Ripple-Carry Output for n-Bit Cascading B 4 21 QB • C 5 20 QC Package Options Include Plastic D 6 19 QD Small-Outline (DW) Packages, Ceramic E 7 18 QE Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs F 8 17 QF G 9 16 QG description H 10 15 QH ENT 11 14 CLK These synchronous, presettable, 8-bit up/down GND 12 13 RCO counters feature internal-carry look-ahead circuitry for cascading in high-speed counting SN54AS867, SN54AS869...FK PACKAGE applications. Synchronous operation is provided (TOP VIEW) by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each C P 1 0 C C N A other when so instructed by the count-enable A S S N V EQ (ENP, ENT) inputs and internal gating. This mode 4 3 2 1 28 27 26 of operation eliminates the output counting spikes B 5 25 QB normally associated with asynchronous (ripple- C 6 24 QC clock) counters. A buffered clock (CLK) input D 7 23 QD triggers the eight flip-flops on the rising (positive- NC 8 22 NC going) edge of the clock waveform. E 9 21 QE These counters are fully programmable; they may F 10 20 QF be preset to any number between 0 and 255. The G 1112 13 14 15 16 17 1819 QG load-input circuitry allows parallel loading of the H T D C O K H cascaded counters. Because loading is N N N C L Q E G R C synchronous, selecting the load mode disables the counter and causes the outputs to agree with NC – No internal connection the data inputs after the next clock pulse. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Two count-enable (ENP and ENT) inputs and a ripple-carry (RCO) output are instrumental in accomplishing this function. Both ENP and ENT must be low to count. The direction of the count is determined by the levels of the select (S0, S1) inputs as shown in the function table. ENT is fed forward to enable RCO. RCO thus enabled produces a low-level pulse while the count is zero (all outputs low) counting down or 255 counting up (all outputs high). This low-level overflow-carry pulse can be used to enable successive cascaded stages. Transitions at ENP and ENT are allowed regardless of the level of CLK. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. These counters feature a fully independent clock circuit. With the exception of the asynchronous clear on the SN74ALS867A and ′AS867, changes at S0 and S1 that modify the operating mode have no effect on the Q outputs until clocking occurs. For the ′AS867 and ′AS869, any time ENP and/or ENT is taken high, RCO either goes or remains high. For the SN74ALS867A and SN74ALS869, any time ENT is taken high, RCO either goes or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. PRODUCTION DATA information is current as of publication date. Copyright  1995, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 description (continued) The SN54AS867 and SN54AS869 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS867A, SN74ALS869, SN74AS867, and SN74AS869 are characterized for operation from 0°C to 70°C. FUNCTION TABLE S1 S0 FUNCTION L L Clear L H Count down H L Load H H Count up 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic symbols† SN74ALS867A 1 CTRDIV 256 S0 0 0 2 M S1 1 3 11 13 ENT G4 1,4CT=0 RCO 23 ENP G5 3,4CT=255 14 CLK C6/1,4,5–/3,4,5+ 0R 3 22 A 2,6D QA 4 21 B QB 5 20 C QC 6 19 D QD 7 18 E QE 8 17 F QF 9 16 G QG 10 15 H QH SN74ALS869 1 CTRDIV 256 S0 0 0 2 M S1 1 3 11 13 ENT G4 1,4CT=0 RCO 23 3,4CT=255 ENP G5 14 CLK C6/1,4,5–/3,4,5+ 0,6R 3 22 A 2,6D QA 4 21 B QB 5 20 C QC 6 19 D QD 7 18 E QE 8 17 F QF 9 16 G QG 10 15 H QH †These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic symbols (continued)† ′AS867 1 CTRDIV 256 S0 0 0 2 M S1 1 3 11 13 ENT G4 1,4,5CT=0 RCO 23 ENP G5 3,4,5CT=255 14 CLK C6/1,4,5–/3,4,5+ 0R 3 22 A 2,6D QA 4 21 B QB 5 20 C QC 6 19 D QD 7 18 E QE 8 17 F QF 9 16 G QG 10 15 H QH ′AS869 1 CTRDIV 256 S0 0 0 2 M S1 1 3 11 13 ENT G4 1,4,5CT=0 RCO 23 3,4,5CT=255 ENP G5 14 CLK C6/1,4,5–/3,4,5+ 0,6R 3 22 A 2,6D QA 4 21 B QB 5 20 C QC 6 19 D QD 7 18 E QE 8 17 F QF 9 16 G QG 10 15 H QH †These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic diagram (positive logic) SN74ALS867A, SN74ALS869 14 CLK 1 SN74ALS867A Only S0 2 (asynchronous clear) S1 23 ENP 1D 3 C1 22 A R QA 1D 4 C1 21 B R QB 1D 5 C1 20 C R QC 1D 6 C1 19 D R QD 1D 7 C1 18 E R QE 1D 8 C1 17 F R QF 1D 9 C1 16 G R QG 1D 10 C1 15 H R QH 13 RCO 11 ENT Pin numbers shown are for the DW, JT, and NT packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic diagram (positive logic) ′AS867, ′AS869 1 S0 2 ′AS867 Only S1 (asynchronous clear) 11 ENT 13 23 RCO ENP 14 CLK 22 QA 3 1D A C1 R 21 QB 4 1D B C1 R 20 QC 5 1D C C1 R 19 QD 6 1D D C1 R 18 QE 7 1D E C1 R 17 QF 8 1D F C1 R 16 QG 9 1D G C1 R 15 QH 10 1D H C1 R Pin numbers shown are for the DW, JT, and NT packages. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 typical clear, preset, count, and inhibit sequences The following sequence is illustrated below: 1. Clear outputs to zero (SN74ALS867A and ′AS867 are asynchronous; SN74ALS869 and ′AS869 are synchronous.) 2. Preset to binary 252 3. Count up to 253, 254, 255, 0, 1, and 2 4. Count down to 1, 0, 255, 254, 253, and 252 5. Inhibit S0 S1 A B C D Data Inputs E F G H CLK ENP ENT QA QB QC QD Outputs QE QF QG QH RCO Sync 252253 254 255 0 1 2 1 0 255 254253 252 Clear Count Up Count Down Inhibit† Async Preset Clear †ENT and ENP both must be low for counting to occur. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V CC Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I Operating free-air temperature range, T : SN74ALS867A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS867A UUNNIITT MIN NOM MAX VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V IOH High-level output current –0.4 mA IOL Low-level output current 8 mA fclock Clock frequency 0 35 MHz tw(clock) Pulse duration, CLK high or low 14 ns tw(clear) Pulse duration of clear pulse, S0 and S1 low 10 ns Data inputs A–H 10 ENP or ENT 15 tsu Setup time before CLK↑ S0 low and S1 high (load) 12 ns S0 high and S1 low (count down) 12 S0 and S1 high (count up) 12 S0 high after S1↑ or S1 high after S0↑ 3 tthh HHoolldd ttiimmee aafftteerr CCLLKK↑↑ nnss Data inputs A–H 0 TA Operating free-air temperature 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN74ALS867A PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP‡ MAX VIK VCC = 4.5 V, II = –18 mA –1.2 V VOH VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 V IOL = 4 mA 0.25 0.4 VVOOLL VVCCCC == 44.55 VV VV IOL = 8 mA 0.35 0.5 II VCC = 5.5 V, VI = 7 V 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 m A IIL VCC = 5.5 V, VI = 0.4 V –0.2 mA IO§ VCC = 5.5 V, VO = 2.25 V –30 –112 mA ICC VCC = 5.5 V 28 45 mA ‡All typical values are at VCC = 5 V, TA = 25°C. §The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) VCC = 4.5 V to 5.5 V, CL = 50 pF, FROM TO RL = 500 W , PARAMETER ((IINNPPUUTT)) ((OOUUTTPPUUTT)) TA = MIN to MAX† UNIT SN74ALS867A MIN MAX fmax 35 MHz tPLH 4 14 CCLLKK RRCCOO nnss tPHL 4 14 tPLH 3 16 CCLLKK AAnnyy QQ nnss tPHL 3 16 tPLH 3 14 EENNTT RRCCOO nnss tPHL 2 9 tPHL S0 or S1 (clear mode) Any Q 8 26 ns tPLH S0 or S1 4 16 RRCCOO nnss tPHL (count up/down) 4 16 tPLH S0 or S1 (clear mode) RCO 4 16 ns †For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V CC Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I Operating free-air temperature range, T : SN74ALS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C A Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS869 UUNNIITT MIN NOM MAX VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V IOH High-level output current –0.4 mA IOL Low-level output current 8 mA fclock Clock frequency 0 35 MHz tw(clock) Pulse duration, CLK high or low 14 ns Data inputs A–H 10 ENP or ENT 15 S0 and S1 low (clear) 13 ttsu SSeettupp ttiimmee bbeeffoorree CCLLKK↑↑ nnss S0 low and S1 high (load) 13 S0 high and S1 low (count down) 13 S0 and S1 high (count up) 13 S0 high after S1↑ or S1 high after S0↑ 3 tthh HHoolldd ttiimmee aafftteerr CCLLKK↑↑ nnss Data inputs A–H 0 TA Operating free-air temperature 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN74ALS869 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP‡ MAX VIK VCC = 4.5 V, II = –18 mA –1.2 V VOH VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 V IOL = 4 mA 0.25 0.4 VVOOLL VVCCCC == 44.55 VV VV IOL = 8 mA 0.35 0.5 II VCC = 5.5 V, VI = 7 V 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 m A IIL VCC = 5.5 V, VI = 0.4 V –0.2 mA IO§ VCC = 5.5 V, VO = 2.25 V –30 –112 mA ICC VCC = 5.5 V 28 45 mA ‡All typical values are at VCC = 5 V, TA = 25°C. §The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) VCC = 4.5 V to 5.5 V, CL = 50 pF, FROM TO RL = 500 W , PARAMETER ((IINNPPUUTT)) ((OOUUTTPPUUTT)) TA = MIN to MAX† UNIT SN74ALS869 MIN MAX fmax 35 MHz tPLH 4 14 CCLLKK RRCCOO nnss tPHL 4 14 tPLH 3 16 CCLLKK AAnnyy QQ nnss tPHL 3 16 tPLH 3 14 EENNTT RRCCOO nnss tPHL 2 9 tPLH S1 4 15 RRCCOO nnss tPHL (count up/down) 4 15 tPLH S0 4 16 RRCCOO nnss tPHL (clear/load) 4 12 †For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V CC Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I Operating free-air temperature range, T : SN54AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C A SN74AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS867 SN74AS867 UUNNIITT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IOH High-level output current –2 –2 mA IOL Low-level output current 20 20 mA fclock* Clock frequency 0 40 0 50 MHz tw(clock)* Pulse duration, CLK high or low 12.5 10 ns tw(clear)* Pulse duration of clear pulse, S0 and S1 low 12.5 10 ns Data inputs A–H 5 4 ENP or ENT 9 8 S0 low and S1 high (load) 11 10 ttsu** SSeettupp ttiimmee bbeeffoorree CCLLKK↑↑ nnss S0 and S1 low (clear) 11 10 S0 high and S1 low (count down) 42 40 S0 and S1 high (count up) 42 40 th* Hold time after CLK↑ Data inputs A–H 0 0 ns Skew time between S0 and S1 tskew* (maximum to avoid inadvertent clear) 8 7 ns TA Operating free-air temperature –55 125 0 70 °C * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54AS867 SN74AS867 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP† MAX MIN TYP† MAX VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VOH VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VCC –2 V IOL = 20 mA, RCO 0.34 0.5 VOOLL VCCCC = 4.5 V VIL on ENT = 0.7 V V Other outputs IOL = 20 mA 0.34 0.5 II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA ENT 40 40 IIIIHH VVCCCC == 55.55 VV, VVII == 22.77 VV mm AA Other inputs 20 20 ENT –4 –4 IIIILL VVCCCC == 55.55 VV, VVII == 00.44 VV mmAA Other inputs –2 –2 IO‡ VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA ICC VCC = 5.5 V 134 195 134 195 mA †All typical values are at VCC = 5 V, TA = 25°C. ‡The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) VCC = 4.5 V to 5.5 V, CL = 50 pF, FROM TO RL = 500 W , PARAMETER ((IINNPPUUTT)) ((OOUUTTPPUUTT)) TA = MIN to MAX§ UNIT SN54AS867 SN74AS867 MIN MAX MIN MAX fmax* 40 50 MHz tPLH 5 31 5 22 CCLLKK RRCCOO nnss tPHL 6 19 6 16 tPLH 3 12 3 11 CCLLKK AAnnyy QQ nnss tPHL 4 16 4 15 tPLH 3 19 3 10 EENNTT RRCCOO nnss tPHL 5 21 5 17 tPLH 5 16 5 14 EENNPP RRCCOO nnss tPHL 5 21 5 17 tPHL Clear (S0 or S1 low) Any Q 7 23 7 21 ns * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. §For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V CC Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I Operating free-air temperature range, T : SN54AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C A SN74AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C †Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS869 SN74AS869 UUNNIITT MIN NOM MAX MIN NOM MAX VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.7 0.8 V IOH High-level output current –2 –2 mA IOL Low-level output current 20 20 mA fclock* Clock frequency 40 45 MHz tw(clock)* Pulse duration, CLK high or low 12.5 11 ns Data inputs A–H 6 5 ENP or ENT 10 9 S0 low and S1 high (load) 13 11 ttsu** SSeettupp ttiimmee bbeeffoorree CCLLKK↑↑ nnss S0 and S1 low (clear) 13 11 S0 high and S1 low (count down) 52 50 S0 and S1 high (count up) 52 50 th* Hold time after CLK↑ Data inputs A–H 0 0 ns TA Operating free-air temperature –55 125 0 70 °C * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54AS869 SN74AS869 PPAARRAAMMEETTEERR TTEESSTT CCOONNDDIITTIIOONNSS UUNNIITT MIN TYP† MAX MIN TYP† MAX VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VVOOHH VV VCC = 4.5 V, IOH = –2 mA VCC –2* IOL = 20 mA, RCO 0.34 0.5 VOOLL VCCCC = 4.5 V VIL on ENT = 0.7 V V Other outputs IOL = 20 mA 0.34 0.5 II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA ENT 40 40 IIIIHH VVCCCC == 55.55 VV, VVII == 22.77 VV mm AA Other inputs 20 20 ENT –4 –4 IIIILL VVCCCC == 55.55 VV, VVII == 00.44 VV mmAA Other inputs –2 –2 IO‡ VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA ICC VCC = 5.5 V 134 195 134 195 mA †All typical values are at VCC = 5 V, TA = 25°C. ‡The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) VCC = 4.5 V to 5.5 V, CL = 50 pF, FROM TO RL = 500 W , PARAMETER ((IINNPPUUTT)) ((OOUUTTPPUUTT)) TA = MIN to MAX§ UNIT SN54AS869 SN74AS869 MIN MAX MIN MAX fmax* 40 45 MHz tPLH 6 35 6 35 CCLLKK RRCCOO nnss tPHL 6 20 6 18 tPLH 3 12 3 11 CCLLKK AAnnyy QQ nnss tPHL 4 16 4 15 tPLH 3 25 3 15 EENNTT RRCCOO nnss tPHL 6 21 6 17 tPLH 5 27 5 19 EENNPP RRCCOO nnss tPHL 6 21 6 18 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. §For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7 V VCC RL = R1 = R2 S1 RL R1 From Output Test From Output Test From Output Test Under Test Point Under Test Point Under Test Point (see NoteC AL) RL CL (see NoteC AL) R2 (see Note A) LOAD CIRCUIT FOR BI-STATE LOAD CIRCUIT LOAD CIRCUIT TOTEM-POLE OUTPUTS FOR OPEN-COLLECTOR OUTPUTS FOR 3-STATE OUTPUTS 3.5 V 3.5 V Timing High-Level Input 1.3 V Pulse 1.3 V 1.3 V 0.3 V 0.3 V tsu th tw 3.5 V 3.5 V Data Low-Level Input 1.3 V 1.3 V Pulse 1.3 V 1.3 V 0.3 V 0.3 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS SETUP AND HOLD TIMES PULSE DURATIONS 3.5 V Output Control 1.3 V 1.3 V (low-level enabling) 0.3 V 3.5 V tPZL Input 1.3 V 1.3 V tPLZ (cid:1)3.5 V 0.3 V Waveform 1 tPLH tPHL S1 Closed 1.3 V In-Phase VOH (see Note B) VOL Output 1.3 V 1.3 V tPHZ 0.3 V VOL tPZH tPLH VOH tPHL Waveform 2 Out-of-Phase VOH S1 Open 1.3 V 0.3 V Output 1.3 V 1.3 V (see Note B) (cid:1)0 V (see Note C) VOL VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) 5962-8952601LA ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-8952601LA SNJ54AS869JT 5962-8966801LA ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-8966801LA SNJ54AS867JT SN54AS867JT ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 SN54AS867JT SN54AS869JT ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 SN54AS869JT SN74ALS867ADW ACTIVE SOIC DW 24 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 ALS867A & no Sb/Br) SN74ALS869DW ACTIVE SOIC DW 24 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 ALS869 & no Sb/Br) SN74ALS869DWE4 ACTIVE SOIC DW 24 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 ALS869 & no Sb/Br) SN74AS867DW ACTIVE SOIC DW 24 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 AS867 & no Sb/Br) SN74AS869DW ACTIVE SOIC DW 24 25 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 AS869 & no Sb/Br) SNJ54AS867JT ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-8966801LA SNJ54AS867JT SNJ54AS869JT ACTIVE CDIP JT 24 1 TBD SNPB N / A for Pkg Type -55 to 125 5962-8952601LA SNJ54AS869JT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 28-Jul-2020 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54AS867, SN54AS869, SN74AS867, SN74AS869 : •Catalog: SN74AS867, SN74AS869 •Military: SN54AS867, SN54AS869 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Military - QML certified for Military and Defense Applications Addendum-Page 2

MECHANICAL DATA MCER004A – JANUARY 1995 – REVISED JANUARY 1997 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE 24 LEADS SHOWN A PINS ** 24 28 DIM 24 13 1.280 1.460 A MAX (32,51) (37,08) B A MIN 1.240 1.440 (31,50) (36,58) 0.300 0.291 B MAX (7,62) (7,39) 1 12 0.070 (1,78) 0.245 0.285 B MIN 0.030 (0,76) (6,22) (7,24) 0.320 (8,13) 0.100 (2,54) MAX 0.015 (0,38) MIN 0.290 (7,37) 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.014 (0,36) 0.100 (2,54) 0.008 (0,20) 4040110/C 08/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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