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  • 型号: SN65HVD234DR
  • 制造商: Texas Instruments
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SN65HVD234DR产品简介:

ICGOO电子元器件商城为您提供SN65HVD234DR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN65HVD234DR价格参考。Texas InstrumentsSN65HVD234DR封装/规格:接口 - 驱动器,接收器,收发器, 半 收发器 1/1 CANbus 8-SOIC。您可以下载SN65HVD234DR参考资料、Datasheet数据手册功能说明书,资料中有SN65HVD234DR 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC CAN TRANSCEIVER 3.3V 8-SOICCAN 接口集成电路 SLEEP MODE

产品分类

接口 - 驱动器,接收器,收发器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

接口 IC,CAN 接口集成电路,Texas Instruments SN65HVD234DR-

数据手册

点击此处下载产品Datasheet

产品型号

SN65HVD234DR

产品种类

CAN 接口集成电路

供应商器件封装

8-SOIC

其它名称

296-27991-1

制造商产品页

http://www.ti.com/general/docs/suppproductinfo.tsp?distId=10&orderablePartNumber=SN65HVD234DR

包装

剪切带 (CT)

协议

CAN

单位重量

72.600 mg

双工

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

8-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-8

工作温度

-40°C ~ 125°C

工作电源电压

3.3 V

工厂包装数量

2500

接收器滞后

100mV

数据速率

1Mbps

最大工作温度

+ 125 C

最小工作温度

- 40 C

标准包装

1

电压-电源

3 V ~ 3.6 V

电源电压-最大

3.6 V

电源电压-最小

3 V

类型

收发器

系列

SN65HVD234

驱动器/接收器数

1/1

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PDF Datasheet 数据手册内容提取

Product Order Technical Tools & Support & Folder Now Documents Software Community SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 SN65HVD23x 3.3-V CAN Bus Transceivers 1 Features 3 Description • Single3.3-VSupplyVoltage TheSN65HVD233,SN65HVD234,andSN65HVD235 1 are used in applications employing the controller area • BusPinsFaultProtectionExceeds±36V network (CAN) serial communication physical layer in • BusPinsESDProtectionExceeds ±16kVHBM accordance with the ISO 11898 standard. As a CAN • CompatibleWithISO11898-2 transceiver, each provides transmit and receive capability between the differential CAN bus and a • GIFT/ICTCompliant CANcontroller,withsignalingratesupto1Mbps. • DataRatesupto1Mbps Designed for operation in especially harsh • Extended–7Vto12VCommonModeRange environments, the devices feature cross-wire • High-InputImpedanceAllowsfor120Nodes protection, overvoltage protection up to ±36 V, loss of • LVTTLI/Osare5-VTolerant ground protection, overtemperature (thermal shutdown) protection, and common-mode transient • AdjustableDriverTransitionTimesforImproved protection of ±100V. These devices operate over a EmissionsPerformance wide –7 V to 12 V common-mode range. These • UnpoweredNodeDoesNotDisturbtheBus transceivers are the interface between the host CAN • LowCurrentStandbyMode,200-μA(Typical) controller on the microprocessor and the differential CAN bus used in industrial, building automation, • SN65HVD233:LoopbackMode transportation,andautomotiveapplications. • SN65HVD234:UltraLowCurrentSleepMode – 50-nATypicalCurrentConsumption DeviceInformation(1) • SN65HVD235:AutobaudLoopbackMode PARTNUMBER PACKAGE BODYSIZE(NOM) • ThermalShutdownProtection SN65HVD233 • PowerupandDownWithGlitch-FreeBusInputs SN65HVD234 SOIC(8) 4.90mm×3.91mm andOutputs SN65HVD235 – High-InputImpedanceWithLowVCC (1) For all available packages, see the orderable addendum at theendofthedatasheet. – MonolithicOutputDuringPowerCycling BlockDiagram 2 Applications VCC • IndustrialAutomation,Control,Sensors,andDrive VCC Systems VCC VCC • MotorandRoboticControl D • BuildingandClimateControl(HVAC) T NI • BackplaneCommunicationandControl U S A • CANBusStandardssuchasCANopen, BI DeviceNet,CANKingdom,NMEA2000, SAEJ1939 VCC RS SLOPE CONTROL and MODE LOGIC LBK / EN /AB R GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com Table of Contents 1 Features.................................................................. 1 10.1 Overview...............................................................19 2 Applications........................................................... 1 10.2 FunctionalBlockDiagrams...................................19 3 Description............................................................. 1 10.3 FeatureDescription...............................................19 10.4 DeviceFunctionalModes......................................21 4 RevisionHistory..................................................... 2 11 ApplicationandImplementation........................ 23 5 Description(continued)......................................... 4 11.1 ApplicationInformation..........................................23 6 DeviceComparisonTable..................................... 4 11.2 TypicalApplication................................................24 7 PinConfigurationandFunctions......................... 5 11.3 SystemExample...................................................26 8 Specifications......................................................... 5 12 PowerSupplyRecommendations..................... 28 8.1 AbsoluteMaximumRatings .....................................5 13 Layout................................................................... 28 8.2 ESDRatings..............................................................6 13.1 LayoutGuidelines.................................................28 8.3 RecommendedOperatingConditions.......................6 13.2 LayoutExample....................................................29 8.4 ThermalInformation..................................................6 14 DeviceandDocumentationSupport................. 30 8.5 PowerDissipationRatings........................................6 14.1 RelatedLinks........................................................30 8.6 ElectricalCharacteristics:Driver...............................7 14.2 ReceivingNotificationofDocumentationUpdates30 8.7 ElectricalCharacteristics:Receiver..........................8 14.3 CommunityResources..........................................30 8.8 SwitchingCharacteristics:Driver..............................8 14.4 Trademarks...........................................................30 8.9 SwitchingCharacteristics:Receiver..........................9 14.5 ElectrostaticDischargeCaution............................30 8.10 SwitchingCharacteristics:Device...........................9 14.6 Glossary................................................................30 8.11 TypicalCharacteristics..........................................10 15 Mechanical,Packaging,andOrderable 9 ParameterMeasurementInformation................12 Information........................................................... 30 10 DetailedDescription........................................... 19 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionG(January2015)toRevisionH Page • Deleted:"ISO11783"fromthelastApplicationBullet............................................................................................................ 1 ChangesfromRevisionF(August2008)toRevisionG Page • AddedPinConfigurationandFunctionssection,ESDRatingstable,FeatureDescriptionsection,DeviceFunctional Modes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layoutsection,Device andDocumentationSupportsection,andMechanical,Packaging,andOrderableInformationsection .............................. 1 • ChangedtheFunctionalBlockDiagrams............................................................................................................................... 4 • AddedtheTHERMALSHUTDOWNparagraphtotheApplicationInformationsection....................................................... 21 • ChangedtheBUSCABLEparagraphtoBUSLOADING,LENGTHANDNUMBEROFNODESparagraphinthe ApplicationInformationsection............................................................................................................................................. 24 • AddedtheCANTERMINATIONparagraphtotheApplicationInformationsection............................................................. 24 ChangesfromRevisionE(October2007)toRevisionF Page • ChangedFigure17,ReceiverTestCircuitandVoltageWaveform.From:C =50pF±20%to:C =15pF±20%...........13 L L ChangesfromRevisionD(June2005)toRevisionE Page • Added60-ΩloadtestconditiontoFigure3......................................................................................................................... 10 • DeletedINTEROPERABILITYWITH5-VCANSYSTEMSsection...................................................................................... 26 • AddedISO11898COMPLIANCEOFSN65HVD230FAMILYOF3.3-VCANTRANSCEIVERSsection.......................... 26 2 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 ChangesfromRevisionC(March2005)toRevisionD Page • AddedFeaturesBullet:GIFT/ICTCompliant(SN65HVD234)................................................................................................ 1 ChangesfromRevisionB(June2003)toRevisionC Page • AddedI ,ReceiveroutputcurrenttotheAbsMaxTable...................................................................................................... 5 O ChangesfromRevisionA(March2003)toRevisionB Page • ChangedthedatasheetfromProductPreviewtoProductionforpartnumberSN65HVD234andSN65HVD235...............1 • ChangedtheAPPLICATIONINFORMATIONsection.......................................................................................................... 23 ChangesfromOriginal(November2002)toRevisionA Page • ChangedthedatasheetfromProductPreviewtoProductionforpartnumberSN65HVD233.............................................. 1 Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 5 Description (continued) Modes: The R pin (pin 8) of the SN65HVD233, SN65HVD234, and SN65HVD235 provides three modes of S operation: high-speed, slope control, and low-power standby mode. The high-speed mode of operation is selected by connecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor between the R pin and ground. The slope will be proportional to the pin's output current. With a resistor S valueof10kΩ thedevicedriverwillhaveaslewrateof~15V/μsandwithavalueof100kΩ thedevicewillhave ~2.0V/μsslewrate.Formoreinformationaboutslopecontrol,refertoFeatureDescription. The SN65HVD233, SN65HVD234, and SN65HVD235 enter a low-current standby (listen only) mode during which the driver is switched off and the receiver remains active if a high logic level is applied to the R pin. If the S local protocol controller needs to transmit a message to the bus it will have to return the device to either high- speedmodeorslopecontrolmodeviatheR pin. S Loopback (SN65HVD233): A logic high on the loopback (LBK) pin (pin 5) of the SN65HVD233 places the bus output and bus input in a high-impedance state. Internally, the D to R path of the device remains active and available for driver to receiver loopback that can be used for self-diagnostic node functions without disturbing the bus.Formoreinformationontheloopbackmode,refertoFeatureDescription. Ultra Low-Current Sleep (SN65HVD234): The SN65HVD234 enters an ultra low-current sleep mode in which both the driver and receiver circuits are deactivated if a low logic level is applied to EN pin (pin 5). The device remainsinthissleepmodeuntilthecircuitisreactivatedbyapplyingahighlogicleveltopin5. Autobaud Loopback (SN65HVD235): The AB pin (pin 5) of the SN65HVD235 implements a bus listen-only loopback feature which allows the local node controller to synchronize its baud rate with that of the CAN bus. In autobaud mode, the bus output of the driver is placed in a high-impedance state while the bus input of the receiver remains active. There is an internal D pin to R pin loopback to assist the controller in baud rate detection,ortheautobaudfunction.Formoreinformationontheautobaudmode,refertoFeatureDescription. 6 Device Comparison Table(1) SLOPE DIAGNOSTIC AUTOBAUD PARTNUMBER LOWPOWERMODE CONTROL LOOPBACK LOOPBACK SN65HVD233D 200-μAstandbymode Adjustable Yes No SN65HVD234D 200-μAstandbymodeor50-nAsleepmode Adjustable No No SN65HVD235D 200-μAstandbymode Adjustable No Yes (1) Forthemostcurrentpackageandorderinginformation,seeMechanical,Packaging,andOrderableInformation,orseetheTIwebsite atwww.ti.com. 4 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 7 Pin Configuration and Functions SN65HVD233D SN65HVD234D SN65HVD235D (Marked as VP233) (Marked as VP234) (Marked as VP235) (TOP VIEW) (TOP VIEW) (TOP VIEW) D 1 8 RS D 1 8 RS D 1 8 RS GND 2 7 CANH GND 2 7 CANH GND 2 7 CANH VCC 3 6 CANL VCC 3 6 CANL VCC 3 6 CANL R 4 5 LBK R 4 5 EN R 4 5 AB PinFunctions PIN TYPE DESCRIPTION NAME NO. CANtransmitdatainput(LOWfordominantandHIGHforrecessivebusstates),alsocalledTXD,driver D 1 I input GND 2 GND Groundconnection V 3 Supply Transceiver3.3-Vsupplyvoltage CC CANreceivedataoutput(LOWfordominantandHIGHforrecessivebusstates),alsocalledRXD,receiver R 4 O output LBK I SN65HVD233:Loopbackmodeinputpin SN65HVD234:Enableinputpin.Logichighforenablinganormalmode(highspeedorslopecontrol) EN 5 I mode.Logiclowforsleepmode. AB I SN65HVD235:Autobaudloopbackmodeinputpin CANL 6 I/O LowlevelCANbusline CANH 7 I/O HighlevelCANbusline Modeselectpin:strongpulldowntoGND=highspeedmode,strongpulluptoV =lowpowermode,10- R 8 I CC S kΩto100-kΩpulldowntoGND=slopecontrolmode 8 Specifications 8.1 Absolute Maximum Ratings(1)(2) overoperatingfree-airtemperaturerangeunlessotherwisenoted MIN MAX UNIT V Supplyvoltage –0.3 7 V CC Voltageatanybusterminal(CANHorCANL) –36 36 V Voltageinput,transientpulse,CANHandCANL,through100Ω(see –100 100 V Figure18) V Inputvoltage,(D,R ,EN,LBK,AB) –0.5 7 V I S V Outputvoltage –0.5 7 V O I Receiveroutputcurrent –10 10 mA O Continuoustotalpowerdissipation SeePowerDissipationRatings T Operatingjunctiontemperature 150 J °C T Storagetemperature 125 stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundpin. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 8.2 ESD Ratings VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS- CANH,CANLandGND ±16000 Electrostatic 001(1) V Allpins 3000 V (ESD) discharge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 8.3 Recommended Operating Conditions MIN MAX UNIT V Supplyvoltage 3 3.6 CC Voltageatanybusterminal(separatelyorcommonmode) –7 12 V High-levelinputvoltage D,EN,AB,LBK 2 5.5 V IH V Low-levelinputvoltage D,EN,AB,LBK 0 0.8 IL V DifferentialinputvoltagebetweenCANHandCANL –6 6 ID ResistancefromR toground 0 100 kΩ S V InputVoltageatR forstandby 0.75V 5.5 V I(Rs) S CC Driver –50 I High-leveloutputcurrent mA OH Receiver –10 Driver 50 I Low-leveloutputcurrent mA OL Receiver 10 T Operatingjunctiontemperature HVD233,HVD234,HVD235 150 °C J T Operatingfree-airtemperature(1) HVD233,HVD234,HVD235 –40 125 °C A (1) Maximumfree-airtemperatureoperationisallowedaslongasthedevicemaximumjunctiontemperatureisnotexceeded. 8.4 Thermal Information overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETERS TESTCONDITIONS VALUE UNIT Low-K(2)board,noairflow 185 R Junction-to-ambientthermalresistance(1) °C/W θJA High-K(3)board,noairflow 101 R Junction-to-boardthermalresistance High-K(3)board,noairflow 82.8 °C/W θJB R Junction-to-casethermalresistance 26.5 °C/W θJC R =60Ω,R at0V,inputtoDa1-MHz50%duty P Averagepowerdissipation L S 36.4 mW (AVG) cyclesquarewaveV at3.3V,T =25°C CC A T Thermalshutdownjunctiontemperature 170 °C (SD) (1) SeeSZZA003foranexplanationofthisparameter. (2) JESD51-3loweffectivethermalconductivitytestboardforleadedsurfacemountpackages. (3) JESD51-7higheffectivethermalconductivitytestboardforleadedsurfacemountpackages. 8.5 Power Dissipation Ratings CIRCUIT T ≤25°C DERATINGFACTOR(1) T =85°C T =125°C PACKAGE A A A BOARD POWERRATING ABOVET =25°C POWERRATING POWERRATING A D Low-K 596.6mW 5.7mW/°C 255.7mW 28.4mW D High-K 1076.9mW 10.3mW/°C 461.5mW 51.3mW (1) Thisistheinverseofthejunction-to-ambientthermalresistancewhenboard-mountedandwithnoairflow. 6 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 8.6 Electrical Characteristics: Driver overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT V Busoutputvoltage CANH Dat0V,RSat0V,SeeFigure12and 2.45 VCC V O(D) (Dominant) CANL Figure13 0.5 1.25 Busoutputvoltage CANH Dat3V,R at0V,SeeFigure12and 2.3 V S V O (Recessive) CANL Figure13 2.3 Dat0V,R at0V,SeeFigure12and S 1.5 2 3 Figure13 V Differentialoutputvoltage(Dominant) V OD(D) Dat0V,R at0V,SeeFigure13and S 1.2 2 3 Figure14 Dat3V,R at0V,SeeFigure12and S –120 12 mV V Differentialoutputvoltage(Recessive) Figure13 OD Dat3V,R at0V,NoLoad –0.5 0.05 V S V Peak-to-peakcommon-modeoutputvoltage SeeFigure21 1 V OC(pp) D,EN,LBK, I High-levelinputcurrent D=2VorEN=2VorLBK=2VorAB=2V –30 30 μA IH AB D,EN,LBK, D=0.8VorEN=0.8VorLBK=0.8VorAB I Low-levelinputcurrent –30 30 μA IL AB =0.8V V =–7V,CANLOpen,SeeFigure26 –250 CANH V =12V,CANLOpen,SeeFigure26 1 CANH I Short-circuitoutputcurrent mA OS V =–7V,CANHOpen,SeeFigure26 –1 CANL V =12V,CANHOpen,SeeFigure26 250 CANL C Outputcapacitance Seereceiverinputcapacitance O I R inputcurrentforstandby R at0.75V –10 μA IRs(s) S S CC Sleep ENat0V,DatV ,R at0VorV 0.05 2 CC S CC R atV ,DatV ,ABat0V,LBKat0V, μA Standby S CC CC 200 600 ENatV CC ICC Supplycurrent Dat0V,NoLoad,ABat0V,LBKat0V, Dominant 6 R at0V,ENatV S CC mA DatV ,NoLoad,ABat0V,LBKat0V, Recessive CC 6 R at0V,ENatV S CC (1) Alltypicalvaluesareat25°Candwitha3.3-Vsupply. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 8.7 Electrical Characteristics: Receiver overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT V Positive-goinginputthresholdvoltage 750 900 IT+ V Negative-goinginputthresholdvoltage ABat0V,LBKat0V,ENatV ,SeeTable1 500 650 mV IT– CC V Hysteresisvoltage(V –V ) 100 hys IT+ IT– V High-leveloutputvoltage I =–4mA,SeeFigure17 2.4 OH O V V Low-leveloutputvoltage I =4mA,SeeFigure17 0.4 OL O CANHorCANLat12V 150 500 CANHorCANLat12V, Otherbuspinat0V, 200 600 VCCat0V Dat3V,ABat0V, I Businputcurrent μA I CANHorCANLat–7V LBKat0V,RSat0V, –610 –150 ENatV CC CANHorCANLat–7V, –450 –130 V at0V CC Pin-to-ground,V =0.4sin(4E6πt)+0.5V,Dat3V, C Inputcapacitance(CANHorCANL) I 40 I ABat0V,LBKat0V,ENatV CC pF Pin-to-pin,V =0.4sin(4E6πt)+0.5V,Dat3V, C Differentialinputcapacitance I 20 ID ABat0V,LBKat0V,ENatV CC R Differentialinputresistance 40 100 ID Inputresistance(CANHorCANL)to Dat3V,ABat0V,LBKat0V,ENatVCC kΩ R 20 50 IN ground Sleep ENat0V,DatV ,R at0VorV 0.05 2 CC S CC μA Standby R atV ,DatV ,ABat0V,LBKat0V,ENatV 200 600 S CC CC CC ICC Supplycurrent Dominant Dat0V,NoLoad,RSat0V,LBKat0V,ABat0V, 6 ENatV CC mA DatV ,NoLoad,R at0V,LBKat0V,ABat0V, Recessive CC S 6 ENatV CC (1) Alltypicalvaluesareat25°Candwitha3.3-Vsupply. 8.8 Switching Characteristics: Driver overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT R at0V,SeeFigure15 35 85 S Propagationdelaytime, t R with10kΩtoground,SeeFigure15 70 125 ns PLH low-to-high-leveloutput S R with100kΩtoground,SeeFigure15 500 870 S R at0V,SeeFigure15 70 120 S Propagationdelaytime, t R with10kΩtoground,SeeFigure15 130 180 ns PHL high-to-low-leveloutput S R with100kΩtoground,SeeFigure15 870 1200 S R at0V,SeeFigure15 35 S t Pulseskew(|t –t |) R with10kΩtoground,SeeFigure15 60 ns sk(p) PHL PLH S R with100kΩtoground,SeeFigure15 370 S t Differentialoutputsignalrisetime 20 70 r R at0V,SeeFigure15 ns S t Differentialoutputsignalfalltime 20 70 f t Differentialoutputsignalrisetime 30 135 r R with10kΩtoground,SeeFigure15 ns S t Differentialoutputsignalfalltime 30 135 f t Differentialoutputsignalrisetime 350 1400 r R with100kΩtoground,SeeFigure15 ns S t Differentialoutputsignalfalltime 350 1400 f t Enabletimefromstandbytodominant 0.6 1.5 en(s) SeeFigure19andFigure20 μs t Enabletimefromsleeptodominant 1 5 en(z) (1) Alltypicalvaluesareat25°Candwitha3.3-Vsupply. 8 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 8.9 Switching Characteristics: Receiver overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT t Propagationdelaytime,low-to-high-leveloutput 35 60 PLH t Propagationdelaytime,high-to-low-leveloutput 35 60 PHL t Pulseskew(|t –t |) SeeFigure17 7 ns sk(p) PHL PLH t Outputsignalrisetime 2 5 r t Outputsignalfalltime 2 5 f (1) Alltypicalvaluesareat25°Candwitha3.3-Vsupply. 8.10 Switching Characteristics: Device overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP(1) MAX UNIT Loopbackdelay,driverinputto t HVD233 SeeFigure23 7.5 12 ns (LBK) receiveroutput Loopbackdelay,driverinputto t SeeFigure24 10 20 ns (AB1) receiveroutput HVD235 Loopbackdelay,businputto t SeeFigure25 35 60 ns (AB2) receiveroutput R at0V,SeeFigure22 70 135 S Totalloopdelay,driverinputtoreceiveroutput, t R with10kΩtoground,SeeFigure22 105 190 ns (loop1) recessivetodominant S R with100kΩtoground,SeeFigure22 535 1000 S R at0V,SeeFigure22 70 135 S Totalloopdelay,driverinputtoreceiveroutput, t R with10kΩtoground,SeeFigure22 105 190 ns (loop2) dominanttorecessive S R with100kΩtoground,SeeFigure22 535 1000 S (1) Alltypicalvaluesareat25°Candwitha3.3-Vsupply. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 8.11 Typical Characteristics Rs,LBK,AB=0V;EN=V CC Ressive−To−Dominant Loop Time − ns 7788905050 RENsV, =CL CBV KC=C ,3 A.6B V =V C0C V = 3.3V VCC = 3 V Dominant−To−Recessive Loop Time − ns 7889950505 RENs, =LVV BVCCCKCC C,= =A 3 3B.6. 3= V V0 V − OPL1) 65 − OPL2) 70 VCC = 3 V O O t(L 60−40 5 45 80 125 t(L 65−40 5 45 80 125 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure1.Recessive-to-DominantLoopTimevsFree-Air Figure2.Dominant-to-RecessiveLoopTimevsFree-Air Temperature Temperature 20 160 VCC = 3.3 V, VCC = 3.3 V, Rs, LBK, AB = 0 V, 140 Rs, LBK, AB = 0 V, mA 19 ET6A0N - =(cid:1)= 2 LV5oC°aCCd,, − mA 120 ETAN == 2 V5C°CC, I− Supply Current − CC 1178 − Driver Output Current 146800000 16 OL I 20 15 0 200 300 500 700 1000 0 1 2 3 4 f − Frequency − kbps VOL− Low-Level Output Voltage − V VCC=3.3V TA=25°C 60-ΩLoad VCC=3.3V TA=25°C Figure3.SupplyCurrentvsFrequency Figure4.DriverLow-LevelOutputCurrentvsLow-Level OutputVoltage 0.12 2.2 mA VRCsC, L=B 3K.3, AVB, = 0 V, VCC = 3.6 V h-Level Output Current − 000..00.168 ETAN == 2 V5C°CC, ential Output Voltage − V 11..682 VVCCCC = = 3 3.3 V V ver Hig 0.04 − Differ 1.4 − Dri 0.02 VOD 1.2 RL = 60 W OH Rs, LBK, AB = 0 V I EN = VCC 0 1 0 0.5 1 1.5 2 2.5 3 3.5 −40 5 45 80 125 VOH− High-Level Output Voltage − V TA − Free-Air Temperature − °C VCC=3.3V TA=25°C RL=60-Ω Figure5.DriverHigh-LevelOutputCurrentvsHigh-Level Figure6.DifferentialOutputVoltagevsFree-Air OutputVoltage Temperature 10 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 Typical Characteristics (continued) Rs,LBK,AB=0V;EN=V CC s 45 38 on Delay − n 4434 RESeNse, = LF BVigKCuC,r Ae B6 = 0 VVCC = 3.3 V n Delay − ns 37 RESeNse, = LF BVigKCuC,r Ae B6 = 0 V agati 42 VCC = 3 V gatio 36 op 41 pa − Receiver Low-To-High PrtPLH 333334567890−40 VCT5CA =− 3F.r6e Ve-Air T4e5mperature −8 0°C 125 − Receiver High-To-Low ProtPHL 33332345−40 VVCVCCCC C=T = A=35 3.−33. 6 FVV rVee-Air Te4m5perature − 8°C0 125 SeeFigure3 SeeFigure3 Figure7.ReceiverLow-to-HighPropagationDelayvsFree- Figure8.ReceiverHigh-to-LowPropagationDelayvsFree- AirTemperature AirTemperature s 55 s 65 − n Rs, LBK, AB = 0 V − n Delay 50 ESeNe = F VigCuCr e 4 Delay 60 VCC = 3 V n n gatio 45 VCC = 3 V VCC = 3.3 V gatio 55 gh Propa 40 ow Prora 50 VCC = 3.3 V − Driver Low-To-HiH 3305 VCC = 3.6 V − Driver High-To-LHL 344505 VCC = 3.6 V RENs, =L BVKCC, AB = 0 V tPL 25 tP 30 See Figure 4 −40 5 45 80 125 −40 5 45 80 125 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C SeeFigure1 SeeFigure1 Figure9.DriverLow-to-HighPropagationDelayvsFree-Air Figure10.DriverHigh-to-LowPropagationDelayvsFree-Air Temperature Temperature 35 Rs, LBK, AB = 0 V, 30 EN = VCC, − mA 25 TRAL == 2650° WC nt e urr 20 C put 15 ut O er 10 v Dri − 5 O I 0 −5 0 0.6 1.2 1.8 2.4 3 3.6 VCC−Supply Voltage − V R =60-Ω T =25°C L A Figure11.DriverOutputCurrentvsSupplyVoltage Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 9 Parameter Measurement Information IO(CANH) II D 60 W ±1% VOD VO(CANH) RS IIRs VO(CANH) + VO(CANL) VI + IO(CANL) VOC 2 VI(Rs) VO(CANL) - Figure12. DriverVoltage,Current,andTestDefinition Dominant ≈ 3 V VO(CANH) Recessive ≈ 2.3 V ≈ 1 V VO(CANL) Figure13. BusLogicStateVoltageDefinitions 330 W ±1% CANH D VI VOD 60 W ±1% RS _+ -7 V ≤ VTEST ≤ 12 V CANL 330 W ±1% Figure14. DriverV OD CANH VCC CL = 50 pF ±20% VI VCC/2 VCC/2 D (see Note B) 0 V VI RS + RL = 60 W ±1% VO tPLH tPHL VO(D) 90% (see Note A) -VI(Rs) CANL VO 0.9 V 10% 0.5 VVO(R) tr tf A. Theinputpulseissuppliedbyageneratorhavingthefollowingcharacteristics:Pulserepetitionrate(PRR)≤125kHz, 50%dutycycle,t ≤6ns,t ≤6ns,Z =50Ω. r f O B. C includesfixtureandinstrumentationcapacitance. L Figure15. DriverTestCircuitandVoltageWaveforms 12 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 Parameter Measurement Information (continued) CANH R IO VI(CANH + VI(CANL) VI(CANH) VID VIC = 2 CANL VO VI(CANL) Figure16. ReceiverVoltageandCurrentDefinitions 2.9 V CANH VI 2.2 V 2.2 V R IO 1.5 V (see NVoIteA) 1.5 VCANL CL=( s1e5e p NFo±t2e0 B%) VO tPLH 90%tPHL90% VOH 50% 50% VO 10% 10% VOL tr tf A. Theinputpulseissuppliedbyageneratorhavingthefollowingcharacteristics:Pulserepetitionrate(PRR)≤125kHz, 50%dutycycle,t ≤6ns,t ≤6ns,Z =50Ω. r f O B. C includesfixtureandinstrumentationcapacitance. L Figure17. ReceiverTestCircuitandVoltageWaveforms Table1.DifferentialInputVoltageThresholdTest INPUT OUTPUT MEASURED V V R |V | CANH CANL ID –6.1V –7V L 900mV 12V 11.1V L 900mV V OL –1V –7V L 6V 12V 6V L 6V –6.5V –7V H 500mV 12V 11.5V H 500mV –7V –1V H V 6V OH 6V 12V H 6V Open Open H X CANH R 100 W CANL Pulse Generator 15 m s Duration D at 0 V or VCC 1% Duty Cycle tr, tf ≤ 100 ns Rs, AB, EN, LBK, at 0 V or VCC NOTE: Thistestisconductedtotestsurvivabilityonly.DatastabilityattheRoutputisnotspecified. Figure18. TestCircuit,TransientOvervoltageTest Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com HVD233 or HVD235 HVD234 VI RS CANH VI RS CANH 0 V D 60 W ±1% 0 V D 60 W ±1% AB or LBK EN VCC CANL CANL R VO VO + + 15 pF ±20% 15 pF ±20% - - VCC VI 50% 0 V VOH 50% VO ten(s) VOL NOTE: AllV inputpulsesaresuppliedbyageneratorhavingthefollowingcharacteristics:t ort ≤6ns,pulserepetitionrate I r f (PRR)=125kHz,50%dutycycle. Figure19. T TestCircuitandVoltageWaveforms en(s) HVD234 RS CANH VCC 0 V D 60 W ±1% VI 50% 0 V EN VI CANL VOH 50% VO R VO ten(z) VOL + 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 50 kHz, 50% duty cycle. Figure20. T TestCircuitandVoltageWaveforms en(z) 27 W ±1% CANH D VOC(PP) VI VOC RS CANL 27 W ±1% VOC 50 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure21. V TestCircuitandVoltageWaveforms OC(pp) 14 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 0W , 10 kW , or 100 kW ±5% DUT RS CANH VCC VI D 60 W ±1% VI 50% 50% 0 V LBK or AB HVD233/235 CANL t(loop2) t(loop1) VOH EN VCC HVD234 VO 50% 50% R VOL + VO 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure22. T TestCircuitandVoltageWaveforms (loop) RS HVD233 CANH VCC D + VI 50% 50% VI VOD 60 W ±1% 0 V - t(LBK1) t(LBK2) VCC LBK CANL VOH VO 50% 50% R VOL t(LBK) = t(LBK1) = t(LBK2) VOD ≈ 2.3 V + VO 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure23. T TestCircuitandVoltageWaveforms (LBK) RS HVD235 CANH VOD ≈ 2.3 V + VCC D VI VOD 60 W ±1% VI 50% 50% - 0 V CANL t(ABH) t(ABL) VCC AB VOH R VO 50% 50% VOL t(AB1) = t(ABH) = t(ABL) + VO 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure24. T TestCircuitandVoltageWaveforms (AB1) Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com HVD235 RS CANH 2.9 V D VI 2.2 V 2.2 V VCC VI 60 W ±1% 1.5 V 1.5 V t(ABH) t(ABL) VCC AB CANL VOH VO 50% 50% R VOL t(AB2) = t(ABH) = t(ABL) + VO 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure25. T TestCircuitandVoltageWaveforms (AB2)  IOS  IOS 15 s CANH D 0 V 0 V or VCC IOS _+ VI 12 V CANL VI 0 V and 10 µs 0 V VI -7 V Figure26. I TestCircuitandWaveforms OS 16 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 3.3 V TA = 25°C R2 ± 1% R1 ± 1% VCC = 3.3 V CANH + R VID CANL - Vac R2 ± 1% R1 ± 1% VI The R Output State Does Not Change During Application of the Input Waveform. VID R1 R2 500 mV 50 Ω 280 Ω 900 mV 50 Ω 130 Ω 12 V VI -7 V NOTE: Allinputpulsesaresuppliedbyageneratorwithf≤1.5MHz. Figure27. Common-ModeVoltageRejection Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com D INPUT RS INPUT CANH INPUT VCC VCC VCC 100 kW 110 kW 9 kW 1 kW 45 kW INPUT INPUT 9 V 40 V 9 kW + _ INPUT CANL INPUT CANH and CANL OUTPUTS R OUTPUT VCC VCC VCC 110 kW 9 kW 45 kW 5 W OUTPUT INPUT OUTPUT 40 V 9 kW 40 V 9 V EN INPUT LBK or AB INPUT VCC VCC 1 kW 1 kW INPUT INPUT 9 V 100 kW 9 V 100 kW Figure28. EquivalentInputandOutputSchematicDiagrams 18 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 10 Detailed Description 10.1 Overview This family of CAN transceivers is compatible with the ISO11898-2 High-Speed CAN (controller area network) physical layer standard. They are designed to interface between the differential bus lines in CAN and the CAN protocolcontrolleratdataratesupto1Mpbs. 10.2 Functional Block Diagrams R S CANH D CANL LBK R LBK Figure29. SN65HVD33FunctionalBlockDiagram R S CANH D CANL EN R Figure30. SN65HVD34FunctionalBlockDiagram R S CANH D CANL AB R Figure31. SN65HVD35FunctionalBlockDiagram 10.3 Feature Description 10.3.1 DiagnosticLoopback(SN65HVD233) The diagnostic loopback or internal loopback function of the SN65HVD233 is enabled with a high-level input on pin 5, LBK. This mode disables the driver output while keeping the bus pins biased to the recessive state. This mode also redirects the D data input (transmit data) through logic to the received data output pin), thus creating an internal loopback of the transmit to receive data path. This mimics the loopback that occurs normally with a CAN transceiver because the receiver loops back the driven output to the R (receive data) pin. This mode allows the host protocol controller to input and read back a bit sequence or CAN messages to perform diagnostic routineswithoutdisturbingtheCANbus.AtypicalCANbusapplicationisdisplayedinFigure36. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com Feature Description (continued) If the LBK pin is not used it may be tied to ground (GND). However, it is pulled low internally (defaults to a low- levelinput)andmaybeleftopenifnotinuse. 10.3.2 AutobaudLoopback(SN65HVD235) The autobaud loopback mode of the SN65HVD235 is enabled by placing a high level input on pin 5, AB. In autobaudmode,thedriveroutputisdisabled,thusblockingtheDpintobuspathandthebustransmitfunctionof the transceiver. The bus pins remain biased to recessive. The receiver to R pin path or the bus receive function of the device remains operational, allowing bus activity to be monitored. In addition, the autobaud mode adds an internallogicloopbackpathfromtheDpintoRpinsothelocalnodemaytransmittoitselfinsyncwithbustraffic while not disturbing messages on the bus. Thus if the local node’s CAN controller generates an error frame, it is not transmitted to the bus, but is detected only by the local CAN controller. This is especially helpful to determine if the local node is set to the same baud rate as the network, and if not adjust it to the network baud rate (autobauddetection). Autobaud detection is best suited to applications that have a known selection of baud rates. For example, a popular industrial application has optional settings of 125 kbps, 250 kbps, or 500 kbps. Once the SN65HVD235 is placed into autobaud loopback mode the application software could assume the first baud rate of 125 kbps. It then waits for a message to be transmitted by another node on the bus. If the wrong baud rate has been selected, an error message is generated by the local CAN controller because the sample times will not be at the correct time. However, because the bus-transmit function of the device has been disabled, no other nodes receivetheerrorframegeneratedbythisnode'slocalCANcontroller. The application would then make use of the status register indications of the local CAN controller for message received and error warning status to determine if the set baud rate is correct or not. The warning status indicates that the CAN controller error counters have been incremented. A message received status indicates that a good message has been received. If an error is generated, the application would then set the CAN controller with the next possibly valid baud rate, and wait to receive another message. This pattern is repeated until an error free message has been received, thus the correct baud rate has been selected. At this point the application would place the SN65HVD235 in a normal transmitting mode by setting pin 5 to a low-level, thus enabling bus-transmit andbus-receivefunctionstonormaloperatingstatesforthetransceiver. If the AB pin is not used it may be tied to ground (GND). However, it is pulled low internally (defaults to a low- levelinput)andmaybeleftopenifnotinuse. 10.3.3 SlopeControl The rise and fall slope of the SN65HVD233, SN65HVD234, and SN65HVD235 driver output can be adjusted by connectingaresistorfromtheRs(pin8)toground(GND),ortoalow-levelinputvoltageasshowninFigure32. The slope of the driver output signal is proportional to the pin's output current. This slope control is implemented withanexternalresistorvalueof10kΩtoachievea~15V/μsslewrate,andupto100kΩ toachievea~2.0V/μs slew rate . A typical slew rate verses pulldown resistance graph is shown in Figure 33. Typical driver output waveformswithslopecontrolaredisplayedinFigure39. 10 kW to 100 kW Rs IOPF6 D 1 8 GND 2 7 CANH TMS320LF2407 Vcc 3 6 CANL R 4 5 LBK Figure32. SlopeControl/StandbyConnectiontoaDSP 20 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 Feature Description (continued) 25 20 s) 15 u V/ e ( p o Sl 10 5 0 0 4.7 6.8 10 15 22 33 47 68 100 Slope Control Resistance - kW Figure33. HVD233DriverOutputSignalSlopevsSlopeControlResistanceValue 10.3.4 Standby Ifahigh-levelinput(>0.75V )isappliedtoR (pin8),thecircuitentersalow-current, listenonlystandbymode CC S during which the driver is switched off and the receiver remains active. If using this mode to save system power whilewaitingforbustraffic,thelocalcontrollercanmonitortheRoutputpinforafallingedgewhichindicatesthat a dominant signal was driven onto the CAN bus. The local controller can then drive the R pin low to return to S slopecontrolmodeorhigh-speedmode. 10.3.5 ThermalShutdown If the junction temperature of the device exceeds the thermal shut down threshold the device turns off the CAN driver circuits thus blocking the D pin to bus transmission path. The shutdown condition is cleared when the junction temperature drops below the thermal shutdown temperature of the device. The CAN bus pins are high impedance biased to recessive level during a thermal shutdown, and the receiver to R pin path remains operational. 10.4 Device Functional Modes 10.4.1 DriverandReceiver Table2.Driver(SN65HVD233orSN65HVD235) INPUTS OUTPUTS D LBK/AB R CANH CANL BUSSTATE s X X >0.75V Z Z Recessive CC L Loropen H L Dominant ≤0.33V CC Horopen X Z Z Recessive X H ≤0.33V Z Z Recessive CC Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com Table3.Receiver(SN65HVD233) INPUTS OUTPUT BUSSTATE V =V –V LBK D R ID (CANH) (CANL) Dominant V ≥0.9V Loropen X L ID Recessive V ≤0.5Voropen Loropen Horopen H ID ? 0.5V<V <0.9V Loropen Horopen ? ID X X L L H X X H H Table4.Receiver(SN65HVD235)(1) INPUTS OUTPUT BUSSTATE V =V –V AB D R ID (CANH) (CANL) Dominant V ≥0.9V Loropen X L ID Recessive V ≤0.5Voropen Loropen Horopen H ID ? 0.5V<V <0.9V Loropen Horopen ? ID Dominant V ≥0.9V H X L ID Recessive V ≤0.5Voropen H H H ID Recessive V ≤0.5Voropen H L L ID ? 0.5V<V <0.9V H L L ID (1) H=highlevel;L=lowlevel;Z=highimpedance;X=irrelevant;?=indeterminate Table5.Driver(SN65HVD234) INPUTS OUTPUTS D EN R CANH CANL BUSSTATE s L H ≤0.33V H L Dominant CC H X ≤0.33V Z Z Recessive CC Open X X Z Z Recessive X X >0.75V Z Z Recessive CC X Loropen X Z Z Recessive Table6.Receiver(SN65HVD234)(1) INPUTS OUTPUT BUSSTATE V =V –V EN R ID (CANH) (CANL) Dominant V ≥0.9V H L ID Recessive V ≤0.5Voropen H H ID ? 0.5V<V <0.9V H ? ID X X Loropen H (1) H=highlevel;L=lowlevel;Z=highimpedance;X=irrelevant;?=indeterminate 22 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 11 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 11.1 Application Information The CAN bus has two states during powered operation of the device; dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the D and R pin. A recessive bus state is when the bus is biased to V / 2 via the high-resistance internal resistors R and R of the receiver, CC IN ID correspondingtoalogichighontheDandRpins.SeeFigure34andFigure35. 4 ) V ( e CANH g a t3 ol V s u B V al 2 diff(D) pic CANL Vdiff(R) y T 1 Time, t Recessive Dominant Recessive Logic H Logic L Logic H Figure34. BusStates(PhysicalBitRepresentation) CANH RXD V /2 CC CANL Figure35. SimplifiedRecessiveCommonModeBiasandReceiver These CAN transceivers are typically used in applications with a host microprocessor or FPGA that includes the linklayerportionoftheCANprotocol.Thedifferentnodesonthenetworkaretypicallyconnectedthroughtheuse ofa120-Ωcharacteristicimpedancetwisted-paircablewithterminationonbothendsofthebus. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 11.2 Typical Application Bus Lines -- 40 m max CANH W W 120 Stub Lines -- 0.3 m max 120 CANL 5 V 3.3 V 3.3 V Vref Vcc Rs Vcc Vref Vcc m m m SN65HVD251 0.1 F SN65HVD233 0.1 F SN65HVD230 0.1 F Rs Rs GND GND GND D R LBK D R D R CANTX CANRX GPIO CANTX CANRX CANTX CANRX TMS320LF243 TMS320F2812 TMS320LF2407A Sensor, Actuator, or Control Sensor, Actuator, or Control Sensor, Actuator, or Control Equipment Equipment Equipment Figure36. TypicalHVD233Application 11.2.1 DesignRequirements 11.2.1.1 BusLoading,LengthandNumberofNodes The ISO 11898 Standard specifies up to a data rate of 1 Mbps, maximum CAN bus cable length of 40 m, maximum drop line (stub) length of 0.3 m and a maximum of 30 nodes. However, with careful network design, the system may have longer cables, longer stub lengths, and many more nodes to a bus. Many CAN organizations and standards have scaled the use of CAN for applications outside the original ISO 11898 standard. They have made system level trade-offs for data rate, cable length, and parasitic loading of the bus. ExamplesofsomeofthesespecificationsareARINC825,CANopen,CANKingdom,DeviceNetandNMEA200. A high number of nodes requires a transceiver with high input impedance and wide common mode range such as the SN65HVD23x CAN family. ISO 11898-2 specifies the driver differential output with a 60-Ω load (two 120- Ω termination resistors in parallel) and the differential output must be greater than 1.5 V. The SN65HVD23x devicesarespecifiedtomeetthe1.5-Vrequirementwitha60-Ω load,andadditionallyspecifiedwithadifferential output voltage minimum of 1.2 V across a common mode range of –2 V to 7 V through a 330-Ω coupling network. This network represents the bus loading of 120 SN65HVD23x transceivers based on their minimum differential input resistance of 40 kΩ. Therefore, the SN65HVD23x supports up to 120 transceivers on a single bussegmentwithmargintothe1.2-Vminimumdifferentialinputvoltagerequirementateachnode. For CAN network design, margin must be given for signal loss across the system and cabling, parasitic loadings, network imbalances, ground offsets and signal integrity thus a practical maximum number of nodes may be lower. Bus length may also be extended beyond the original ISO 11898 standard of 40 m by careful system designanddataratetradeoffs.Forexample,CANopennetworkdesignguidelinesallowthenetworktobeupto1 kmwithchangesintheterminationresistance,cabling,lessthan64nodesandsignificantlylowereddatarate. This flexibility in CAN network design is one of the key strengths of the various extensions and additional standardsthathavebeenbuiltontheoriginalISO11898CANstandard. 11.2.1.2 CANTermination TheISO11898standardspecifiestheinterconnecttobeatwisted-paircable(shieldedorunshielded)with120-Ω characteristic impedance (Z ). Resistors equal to the characteristic impedance of the line should be used to O terminate both ends of the cable to prevent signal reflections. Unterminated drop lines (stubs) connecting nodes to the bus should be kept as short as possible to minimize signal reflections. The termination may be on the cable or in a node, but if nodes may be removed from the bus the termination must be carefully placed so that it isnotremovedfromthebus. 24 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 Typical Application (continued) 11.2.2 DetailedDesignProcedure Node n Node 1 Node 2 Node 3 (with termination) MCU or DSP MCU or DSP MCU or DSP MCU or DSP CAN CAN CAN CAN Controller Controller Controller Controller CAN CAN CAN CAN Transceiver Transceiver Transceiver Transceiver R TERM R TERM Figure37. TypicalCANBus Termination is typically a 120-Ω resistor at each end of the bus. If filtering and stabilization of the common mode voltage of the bus is desired, then split termination may be used (see Figure 38). Split termination uses two 60-Ω resistors with a capacitor in the middle of these resistors to ground. Split termination improves the electromagnetic emissions behavior of the network by eliminating fluctuations in the bus common mode voltages atthestartandendofmessagetransmissions. Care should be taken in the power ratings of the termination resistors used. Typically the worst case condition would be if the system power supply was shorted across the termination resistance to ground. In most cases the currentflowthroughtheresistorinthisconditionwouldbemuchhigherthanthetransceiver'scurrentlimit. Standard Termination Split Termination CANH CANH R /2 TERM CAN CAN R Transceiver TERM Transceiver C SPLIT R /2 TERM CANL CANL Figure38. CANBusTerminationConcepts 11.2.3 ApplicationCurve Figure 39 shows 3 typical output waveforms for the SN65HVD233 device with three different connections made to the R pin. The top waveform show the typical differential signal when transitioning from a recessive level to a S dominant level on the CAN bus with R tied to GND through a 0-Ω resistor. The second waveform shows the S same signal for the condition with a 10-kΩ resistor tied from R to ground. The bottom waveform shows the S typicaldifferentialsignalforthecasewherea100-kΩ resistoristiedfromtheR pintoground. S Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com Typical Application (continued) W Rs = 0 W Rs = 10 k W Rs = 100 k Figure39. TypicalSN65HVD233OutputWaveformsWithDifferentSlopeControlResistorValues 11.3 System Example 11.3.1 ISO11898ComplianceofSN65HVD23xFamilyof3.3-VCANTransceivers 11.3.1.1 Introduction Many users value the low power consumption of operating their CAN transceivers from a 3.3-V supply. However, some are concerned about the interoperability with 5 V supplied transceivers on the same bus. This report analyzesthissituationtoaddressthoseconcerns. 11.3.1.2 DifferentialSignal CAN is a differential bus where complementary signals are sent over two wires and the voltage difference between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage differenceandoutputsthebusstatewithasingleendedlogicleveloutputsignal. 26 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 System Example (continued) NOISE MARGIN 900mV Threshold RECEIVER DETECTION WINDOW 75%SAMPLE POINT 500mV Threshold NOISE MARGIN Figure40. TypicalSN65HVD230DifferentialOutputVoltageWaveform The CAN driver creates the differential voltage between CANH and CANL in the dominant state. The dominant differential output of the SN65HVD23x is greater than 1.5 V and less than 3 V across a 60 ohm load as defined by the ISO 11898 standard. These are the same limiting values for 5 V supplied CAN transceivers. The bus terminationresistorsdrivetherecessivebusstateandnottheCANdriver. ACANreceiverisrequiredtooutputarecessivestatewhenlessthan500mVofdifferentialvoltageexistsonthe bus, and a dominant state when more than 900 mV of differential voltage exists on the bus. The CAN receiver must do this with common-mode input voltages from –2 V to 7 V. The SN65HVD23x family receivers meet these sameinputspecificationsas5Vsuppliedreceivers. 11.3.1.3 Common-ModeSignal A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Since the bias voltage of the recessive state of the device is dependent on V , any noise present or variation of V will have an effect CC CC on this bias voltage seen by the bus. The SN65HVD23x family has the recessive bias voltage set higher than 0.5*V to comply with the ISO 11898-2 CAN standard. The caveat to this is that the common mode voltage will CC drop by a couple hundred millivolts when driving a dominant bit on the bus. This means that there is a common mode shift between the dominant bit and recessive bit states of the device. While this is not ideal, this small variation in the driver common-mode output is rejected by differential receivers and does not effect data, signal noisemarginsorerrorrates. 11.3.1.4 Interoperabilityof3.3-VCANin5-VCANSystems The 3.3-V supplied SN65HVD23x family of CAN transceivers are fully compatible with 5-V CAN transceivers. The differential output voltage is the same, the recessive common mode output bias is the same, and the receivers have the same input specifications. The only slight difference is in the dominant common mode output voltagewhichisacouplehundredmillivoltslowerfor3.3-VCANtransceiverthan5-Vsuppliedtransceiver. To help ensure the widest interoperability possible, the SN65HVD23x family has successfully passed the internationally recognized GIFT/ICT conformance and interoperability testing for CAN transceivers. Electrical interoperability does not always assure interchangeability however. Most implementers of CAN buses recognize that ISO 11898 does not sufficiently specify the electrical layer and that strict standard compliance alone does notensurefullinterchangeability.Thiscomesonlywiththoroughequipmenttesting. Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 12 Power Supply Recommendations To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100- nF ceramic capacitor located as close to the V supply pins as possible. The TPS76333 is a linear voltage CC regulatorsuitableforthe3.3Vsupply. 13 Layout 13.1 Layout Guidelines In order for the PCB design to be successful, start with design of the protection and filtering circuitry. Because ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency layout techniques must be applied during PCB design. On chip IEC ESD protection is good for laboratory and portable equipment but is usually not sufficient for EFT and surge transients occurring in industrial environments. Thereforerobustandreliablebusnodedesignrequirestheuseofexternaltransientprotectiondevicesatthebus connectors. Placement at the connector also prevents these harsh transient events from propagating further into thePCBandsystem. UseV andgroundplanestoprovidelowinductance. CC NOTE High frequency current follows the path of least inductance and not the path of least resistance. Design the bus protection components in the direction of the signal path. Do not force the transient current to divertfromthesignalpathtoreachtheprotectiondevice. An example placement of the Transient Voltage Suppression (TVS) device indicated as D1 (either bi-directional diodeorvaristorsolution)andbusfiltercapacitorsC8andC9areshowninFigure41. The bus transient protection and filtering components should be placed as close to the bus connector, J1, as possible. This prevents transients, ESD and noise from penetrating onto the board and disturbing otherdevices. Bus termination: Figure 41 shows split termination. This is where the termination is split into two resistors, R5 and R6, with the center or split tap of the termination connected to ground via capacitor C7. Split termination provides common mode filtering for the bus. When termination is placed on the board instead of directly on the bus, care must be taken to ensure the terminating node is not removed from the bus as this will cause signal integrity issues of the bus is not properly terminated on both ends. See the application section for information on powerratingsneededfortheterminationresistor(s). Bypass and bulk capacitors should be placed as close as possible to the supply pins of transceiver, examples C2,C3(V ). CC Use at least two vias for V and ground connections of bypass capacitors and protection devices to minimize CC traceandviainductance. Tolimitcurrentofdigitallines,serialresistorsmaybeused.ExamplesareR1,R2,R3andR4. To filter noise on the digital IO lines, a capacitor may be used close to the input side of the IO as shown by C1 andC4. Since the internal pullup and pulldown biasing of the device is weak for floating pins, an external 1-kΩ to 10-kΩ pullup or pulldown resistor should be used to bias the state of the pin more strongly against noise during transientevents. Pin 1: If an open drain host processor is used to drive the D pin of the device an external pull-up resistor between1kΩand10kΩ andV shouldbeusedtodrivetherecessiveinputstateofthedevice. CC Pin 8: is shown assuming the mode pin, RS, will be used. If the device will only be used in normal mode or slope controlmode,R3isnotneededandthepadsofC4couldbeusedforthepulldownresistortoGND. 28 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 www.ti.com SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 13.2 Layout Example Figure41. LayoutExampleSchematic Copyright©2002–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

SN65HVD233,SN65HVD234,SN65HVD235 SLLS557H–NOVEMBER2002–REVISEDNOVEMBER2018 www.ti.com 14 Device and Documentation Support 14.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table7.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY SN65HVD233 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD234 Clickhere Clickhere Clickhere Clickhere Clickhere SN65HVD235 Clickhere Clickhere Clickhere Clickhere Clickhere 14.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 14.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 14.4 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 14.5 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 14.6 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 15 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 30 SubmitDocumentationFeedback Copyright©2002–2018,TexasInstrumentsIncorporated ProductFolderLinks:SN65HVD233 SN65HVD234 SN65HVD235

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD233D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP233 & no Sb/Br) SN65HVD233DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP233 & no Sb/Br) SN65HVD233DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP233 & no Sb/Br) SN65HVD233DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP233 & no Sb/Br) SN65HVD234D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP234 & no Sb/Br) SN65HVD234DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP234 & no Sb/Br) SN65HVD234DRG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP234 & no Sb/Br) SN65HVD235D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP235 & no Sb/Br) SN65HVD235DG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP235 & no Sb/Br) SN65HVD235DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 VP235 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN65HVD233, SN65HVD234, SN65HVD235 : •Automotive: SN65HVD233-Q1, SN65HVD234-Q1, SN65HVD235-Q1 •Enhanced Product: SN65HVD233-EP NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65HVD233DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD234DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD235DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65HVD233DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD234DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD235DR SOIC D 8 2500 340.5 338.1 20.6 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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