19-2195; Rev 1; 10/04 10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 General Description Features M The MAX5711 is a small footprint, low-power, 10-bit digi- ♦ Wide -40°C to +125°C Operating Temperature A tal-to-analog converter (DAC) that operates from a single Range X +2.7V to +5.5V supply. The MAX5711 on-chip precision output amplifier provides rail-to-rail output swing. ♦ Low 85µA Supply Current 5 Drawing an 85µA supply current at 3V, the MAX5711 is ♦ Ultra Low 0.3µA Power-Down Supply Current 7 ideally suited to portable battery-operated equipment. 1 ♦ Single +2.7V to +5.5V Supply Voltage The MAX5711 utilizes a 3-wire serial interface compatible 1 with SPI™/QSPI™/MICROWIRE™ and DSP-interface ♦ Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and standards. All logic inputs are CMOS-logic compatible DSP-Compatible Serial Interface and buffered with Schmitt triggers to allow direct interfac- ♦ Schmitt-Triggered Inputs for Direct Interfacing to ing to optocouplers. The MAX5711 incorporates a power- on reset (POR) circuit that ensures that the DAC begins in Optocouplers a zero-volt-state upon power-up. A power-down mode ♦ Rail-to-Rail Output Buffer that reduces current consumption to 0.3µA may be initiat- ed through a software command. ♦ Power-On Reset to Zero Volts The MAX5711 is available in a small 6-pin SOT23 pack- ♦ Three Software-Selectable Power-Down Output age. For dual and quad 10-bit versions, see the MAX5721 Impedances (100kΩ, 1kΩ, Hi-Z) and MAX5741 data sheets. For single, dual, and quad ♦ Tiny 6-Pin SOT23 Package 12-bit versions, see the MAX5712, MAX5722, and MAX5742 data sheets. The MAX5711 is specified over the automotive temperature range of -40°C to +125°C. Applications Ordering Information Automatic Tuning PIN- TOP PART TEMP RANGE Gain and Offset Adjustment PACKAGE MARK Power Amplifier Control MAX5711EUT-T -40°C to +85°C 6 SOT23-6 ABCP Process Control I/O Boards MAX5711AUT-T -40°C to +125°C 6 SOT23-6 AAUC Battery-Powered Equipment VCO Control SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor, Corp. Functional Diagram __________________Pin Configuration VDD GND TOP VIEW REF+ REF- MAX5711 DAC OUTPUT REGISTER 1D0-ABCIT BUFFER OUT VDD 1 6 OUT 100kΩ 1kΩ MAX5711 GND 2 5 CS INPUT POWER-DOWN CONTROL CONTROL LOGIC LOGIC DIN 3 4 SCLK POWER-ON RESET SOT23 CS SCLK DIN ________________________________________________________________Maxim Integrated Products 1 For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 1 ABSOLUTE MAXIMUM RATINGS 1 VDDto GND..............................................................-0.3V to +6V Operating Temperature Range 7 OUT, SCLK, DIN, CSto GND.....................-0.3V to (VDD + 0.3V) MAX5711EUT.................................................-40°C to +85°C Maximum Current into Any Pin.........................................±50mA MAX5711AUT...............................................-40°C to +125°C 5 Continuous Power Dissipation (TA= +70°C) Maximum Junction Temperature.....................................+150°C X 6-Pin SOT23 (derate 9.1mW/°C above +70°C)...........727mW Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C A M Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMINto TMAX, unless otherwise noted. Typical values are at VDD= +5V, TA= +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC ACCURACY (NOTE 1) Resolution N 10 Bits Integral Nonlinearity Error INL (Note 2) ±0.5 ±4 LSB Differential Nonlinearity Error DNL Guaranteed monotonic (Note 2) ±1 LSB Zero-Code Error OE Code = 000 0.4 1.5 % of FS Zero-Code Error Tempco 2.3 ppm/°C Gain Error GE Code = 3FF hex -3 % of FS Gain Error Tempco 0.26 ppm/°C DAC OUTPUT Output Voltage Range No load (Note 3) 0 VDD V DC Output Impedance Code = 200 hex 0.8 Ω VDD = +3V 15 Short-Circuit Current mA VDD = +5V 48 VDD = +3V 8 Wake-Up Time µs VDD = +5V 8 Output Leakage Current P ow er -d own m ode = outp ut hi gh i m pe da nce ±18 nA DIGITAL INPUTS (SCLK, DIN, CS) Input High Voltage VIH VDD = +3V, +5V 0.7 x VDD V Input Low Voltage VIL VDD = +3V, +5V 0.3 x VDD V Input Leakage Current IIN Digital inputs = 0 or VDD ±0.1 ±1 µA Input Capacitance CIN 5 pF 2 _______________________________________________________________________________________

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 ELECTRICAL CHARACTERISTICS (continued) M (VDD= +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMINto TMAX, TA= +25°C, unless otherwise noted. Typical values are at A VDD= +5V, TA= +25°C.) X PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5 DYNAMIC PERFORMANCE 7 Voltage Output Slew Rate SR 0.5 V/µs 1 Voltage Output Settling Time 100 hex to 300 hex (Note 4) 4 10 µs 1 Digital Feedthrough Any digital inputs from 0 or VDD 0.2 nV-s Major carry transition (code 1FF hex to code Digital-Analog Glitch Impulse 12 nV-s 200 hex) POWER REQUIREMENTS Supply Voltage Range VDD 2.7 5.5 V All digital inputs at 0 or VDD, VDD = 3.6V 85 150 Supply Current with No Load IDD µA All digital inputs at 0 or VDD, VDD = 5.5V 105 187 Power-Down Supply Current IDDPD All digital inputs at 0 or VDD, VDD = 5.5V 0.29 1 µA TIMING CHARACTERISTICS (FIGURE 2) (Timing is tested with no load) SCLK Clock Frequency fSCLK 0 20 MHz SCLK Pulse Width High tCH 20 ns SCLK Pulse Width Low tCL 20 ns CS Fall to SCLK Rise Setup tCSS 15 ns DIN Setup Time tDS 15 ns DIN Hold Time tDH 0 ns SCLK Falling Edge to CS Rising tCSH 10 ns Edge CS Pulse Width High tCSW 80 ns Note 1: DC specifications are tested without output loads. Note 2: Linearity guaranteed from code 29 to code 995. Note 3: Offset and gain error limit the FSR. Note 4: Guaranteed by design. Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) INTEGRAL NONLINEARITY DIFFERENTIAL NONLINEARITY TOTAL UNADJUSTED ERROR vs. CODE (TA = +25°C) vs. CODE (TA = +25°C) vs. CODE (TA = +25°C) 34 MAX5711 toc01 00..1250 VDD = +3V OR +5V MAX5711 toc02 %) 001...860 MAX5711 toc03 2 0.10 R ( VDD = +5V RO 0.4 R INL (LSB) -011 DNL (LSB)-00..00055 NADJUSTED E -00..220 VDD = +5V U VDD = +3V AL -0.4 -2 -0.10 T TO -0.6 -3 -0.15 -0.8 VDD = +3V -4 -0.20 -1.0 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 CODE CODE CODE _______________________________________________________________________________________ 3

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 1 Typical Operating Characteristics (continued) 1 (TA = +25°C, unless otherwise noted.) 7 5 INTEGRAL NONLINEARITY DIFFERENTIAL NONLINEARITY TOTAL UNADJUSTED ERROR X vs. CODE (TA = +125°C) vs. CODE (TA = +125°C) vs. CODE (TA = +125°C) MA 34 MAX5711 toc04 00..1250 VDD = +3V OR +5V MAX5711 toc05 %) 001...860 MAX5711 toc06 2 VDD = +5V 0.10 ROR ( 0.4 1 0.05 ER INL (LSB) -01 DNL (LSB)-0.005 NADJUSTED -00..202 VDD = +5V VDD = +3V L U -0.4 -2 -0.10 TA TO -0.6 -3 -0.15 -0.8 VDD = +3V -4 -0.20 -1.0 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 CODE CODE CODE INTEGRAL NONLINEARITY DIFFERENTIAL NONLINEARITY TOTAL UNADJUSTED ERROR vs. CODE (TA = -40°C) vs. CODE (TA = -40°C) vs. CODE (TA = -40°C) 4 0.20 1.0 123 VDD = +5V MAX5711 toc07 000...011505 VDD = +3V OR +5V MAX5711 toc08 ERROR (%) 000...864 MAX5711 toc09 INL (LSB) -01 VDD = +3V DNL (LSB)-0.005 L UNADJUSTED -00..022 VDD = +5V -2 -0.10 OTA -0.4 T -3 -0.15 -0.6 VDD = +3V -4 -0.20 -0.8 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 0 128 256 384 512 640 768 896 1024 CODE CODE CODE WORST-CASE INL AND DNL SOURCE AND SINK CURRENT SOURCE AND SINK CURRENT vs. TEMPERATURE CAPABILITY (VDD = +3V) CAPABILTIY (VDD = +5V) 34 MAX5711 toc10 23..50 CODSCEOU U=R R3RCFEFINN HTGEX, MAX5711 toc11 445...500 CODSCEOU U=R R3RCFEFINN HTGEX, MAX5711 toc12 2 MAXIMUM INL MAXIMUM DNL FROM OUT FROM OUT L AND DNL (LSB) -101 V (V)OUT 12..50 SOCUORDFCREIO N=MG 3 0CO0UU HRTREXEN,TSCINOKDIEN G= 1C0U0R HREEXN,T V (V)OUT 2323....0055 SOCUORDFCREIO N=MG 3 0CO0UU HRTREXEN,T IN MINIMUM INL 1.0 INTO OUT 1.5 CODE = 100 HEX, -2 MINIMUM DNL SINKING CURRENT 1.0 INTO OUT 0.5 -3 CODE = 000, SINKING 0.5 CODE = 000, SINKING CURRENT INTO OUT CURRENT INTO OUT -4 0 0 -40 -20 0 20 40 60 80 100 120 0 2 4 6 8 10 12 14 16 0 5 10 15 20 25 30 35 40 TEMPERATURE (°C) ISOURCE/SINK (mA) ISOURCE/SINK (mA) 4 _______________________________________________________________________________________

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Typical Operating Characteristics (continued) M (TA = +25°C, unless otherwise noted.) A X SUPPLY CURRENT POWER-DOWN SUPPLY CURRENT SUPPLY CURRENT vs. 5 vs. SUPPLY VOLTAGE vs. SUPPLY VOLTAGE CS INPUT VOLTAGE 7 110200 CODE = 3FF HEX MAX5711 toc13 NT (nA) 235000 MAX5711 toc14 879000000 MAX5711 toc15 11 µPLY CURRENT (A) 8600 CODE = 000 WN SUPPLY CURRE 210500 µPLY CURRENT (A) 546000000 VDD = +5V SUP 40 ER-DO 100 SUP 230000 VDD = +3V W 20 O 50 P 100 0 0 0 2.7 3.2 3.7 4.2 4.7 5.2 2.7 3.2 3.7 4.2 4.7 5.2 0 1 2 3 4 5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) CS INPUT VOLTAGE (V) FULL-SCALE SETTLING TIME FULL-SCALE SETTLING TIME HALF-SCALE SETTLING TIME (VDD = +5V) (VDD = +5V) (VDD = +3V) MAX5711 toc16 VSCLK MAX5711 toc17 VSCLK MAX5711 toc18 5V/div 5V/div VSCLK 5V/div VOUT VOUT VOUT 1V/div 1V/div 1V/div CODE 000 TO 3FF HEX CODE 3FF HEX TO 000 CODE 100 HEX TO 300 HEX RL = 5kΩ RL = 5kΩ RL = 5kΩ CL = 200pF CL = 200pF CL = 200pF 1µs/div 2µs/div 1µs/div HALF-SCALE SETTLING TIME EXITING POWER-DOWN DIGITAL-TO-ANALOG (VDD = +3V) (VDD = +5V) GLITCH IMPULSE (VDD = +5V) MAX5711 toc19 MAX5711 toc20 MAX5711 toc21 VSCLK VSCLK 5V/div 5V/div CODE 200 HEX VOUT VOUT 10mV/div 1V/div VOUT CRCLOL =D= E52 k03Ω00p0F HEX TO 100 HEX CLR =L =2 050kpΩF 1V/div CRCLOL =D= E52 k02Ω00p0F HEX TO 1FF HEX 1µs/div 5µs/div 500ns/div _______________________________________________________________________________________ 5

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 1 Typical Operating Characteristics (continued) 1 (TA = +25°C, unless otherwise noted.) 7 5 DIGITAL-TO-ANALOG CLOCK FEEDTHROUGH X GLITCH IMPULSE (VDD = +5V) (VDD = +5V) A MAX5711 toc22 MAX5711 toc23 VSCLK M 2V/div VOUT 10mV/div VOUT CODE 1FF HEX TO 200 HEX 1mV/div RCLL == 52k0Ω0pF RCLL == 52k0Ω0pF 500ns/div 500ns/div Pin Description PIN NAME FUNCTION 1 VDD Power-Supply Input 2 GND Ground 3 DIN Serial Data Input 4 SCLK Serial Clock Input 5 CS Active-Low Chip-Select Input 6 OUT DAC Output Voltage 6 _______________________________________________________________________________________

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Detailed Description Program the input register bits to power-down the M device. The DAC registers are preserved during power- The MAX5711 voltage-output, 10-bit DAC, offers a full down and upon wake-up, the DAC output is restored to A 10-bit performance in a small 6-pin SOT23 package. The SOT23 footprint is less than 9mm2. The MAX5711 its pre-power-down voltage. X has less than 1LSB differential nonlinearity error, ensur- Power-On Reset 5 ing monotonic performance. The device uses a simple The MAX5711 has a POR circuit to set the DACs output 7 3-wire, SPI/QSPI/MICROWIRE and DSP-compatible ser- to zero when VDD is first applied. This ensures that 1 ial interface that operates up to 20MHz. The MAX5711 unwanted DAC output voltages will not occur immedi- 1 incorporates three shutdown modes, making it ideal for ately following a system startup, such as after a loss of low-power applications. power. Upon initial power-up, an internal power-on reset circuit ensures that all DAC registers are cleared, Analog Section the DAC is powered-down, and its output is terminated The MAX5711 consists of a resistor string, an output to GND by a 100kΩresistor. An 8µs recovery time after buffer, and a POR circuit. Monotonic digital-to-analog issuing a wake-up command is needed before writing conversion is achieved using a resistor string architec- to the DAC registers. ture. Since VDD is the reference for the MAX5711, the accuracy of the DAC depends on the accuracy of VDD. Digital Section The low bias current of the MAX5711 allows its power to be supplied by a voltage reference such as the 3-Wire Serial Interface MAX6030. The 10-bit DAC code is binary-unipolar with The MAX5711 digital interface is a standard 3-wire con- 1LSB = VDD/1024. nection compatible with SPI/QSPI/MICROWIRE/DSP interfaces. The chip-select input (CS) frames the serial Output Buffer data loading at DIN. Immediately following CS high-to- The DAC output buffer has a rail-to-rail output and is low transition, the data is shifted synchronously and capable of driving a 5kΩresistive load in parallel with a latched into the input register on the falling edge of the 200pF capacitive load. With a capacitive load of 200pF, serial clock input (SCLK). After 16 bits have been the output buffer slews 0.5V/µs. With a 1/4FS to 3/4FS loaded into the serial input register, the serial input reg- output transition, the amplifier output settles to 1/2LSB ister transfers its contents to the DAC latch. CS may in less than 10µs when loaded with 5kΩ in parallel with then either be held low or brought high. CS must be 200pF. The buffer amplifier is stable with any combination brought high for a minimum of 80ns before the next of resistive loads greater than 5kΩ and capacitive loads write sequence, since a write sequence is initiated on a less than 200pF. tCH SCLK tCL tCSS tCSW tDH tCSH tDS CS DIN C3 SO Figure 1. Timing Diagram _______________________________________________________________________________________ 7

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 1 Table 1. Serial Interface Mapping 1 7 16-BIT SERIAL WORD 5 MSB LSB MODE OUTPUT X C3 C2 C1 C0 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00 S1 S0 A 0 0 0 0 10-Bit DAC Code 0 0 Set and Update VOUT = VDD x DAC CODE/1024 M Current DAC 1 1 1 1 X X X X X X X X X X 0 0 Wake-Up setting (initially 0) 1 1 1 1 X X X X X X X X X X 0 1 Power-Down Floating 1 1 1 1 X X X X X X X X X X 1 0 Power-Down 1kΩ to GND 1 1 1 1 X X X X X X X X X X 1 1 Power-Down 100kΩ to GND X = Don’t Care falling edge of CS. Not keeping CS low during the first 15 SCLK cycles discards input data. The serial clock (SCLK) can idle either high or low between transitions. IN OUT Figure 1 shows the complete 3-wire serial interface transmission. Table 1 lists serial-interface mapping. The VDD first command after VDD is applied must be the wake- up command. MAX6050 OUT MAX6030 MAX5711 GND Power-Down Modes The MAX5711 includes three software-controlled GND power-down modes that reduce the supply current to below 1µA. In two of the three power-down modes, OUT is connected to GND through a resistor. Table 1 lists the three power-down modes of operation. When in Figure 2. MAX5711 Powered By Reference power-down, the MAX5711 does not respond to the Schmitt-trigger buffers to accept slow-transition inter- “set and update” command. faces. This allows optocouplers to interface directly to Applications Information the MAX5711 without additional external logic. The digi- tal inputs are compatible with CMOS-logic levels. Device Powered by Power-Supply Bypassing and Layout an External Reference Careful PC board layout is important for optimal system The MAX5711 generates an output voltage proportional performance. Keep analog and digital signals separate to VDD, coupling power-supply noise to the output. The to reduce noise injection and digital feedthrough. Use a circuit in Figure 2 rejects this power-supply noise by ground plane to ensure that the ground return from powering the device directly with a precision voltage GND to the supply ground is short and low impedance. reference, improving overall system accuracy. The MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm) Bypass VDD with a 0.1µF capacitor to ground as close as possible to the device. precision voltage references are ideal choices due to the low-power requirements of the MAX5711. This solu- Chip Information tion is also useful when the required full-scale output TRANSISTOR COUNT: 3856 voltage is less than the available supply voltages. PROCESS: BiCMOS Digital Inputs and Interface Logic The 3-wire digital interface for the MAX5711 is compati- ble with SPI, QSPI, MICROWIRE, and DSP. The three digital inputs (CS, DIN, and SCLK) load the digital input serially into the DAC. All of the digital inputs include 8 _______________________________________________________________________________________

10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23 Package Information M (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information A go to www.maxim-ic.com/packages.) X 5 7 1 1 S P E T. O S L 6 PACKAGE OUTLINE, SOT-23, 6L 1 21-0058 F 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________9 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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