19-4759; Rev 1; 1/99 EVFAOLLULAOTWIOSN D KAITTA M SAHNEUEATL 1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters General Description Features M The MAX1700/MAX1701 are high-efficiency, low-noise, 'Up to 96% Efficiency A step-up DC-DC converters intended for use in battery- powered wireless applications. They use a synchro- '1.1 VINGuaranteed Start-Up X nous-rectified pulse-width-modulation (PWM) boost '0.7V to 5.5V Input Range 1 topology to generate 2.5V to 5.5V outputs from battery 7 inputs such as one to three NiCd/NiMH cells or one Li- 'Up to 800mA Output 0 Icohna cnenlel. l BMoOthS dFeEvTic essw ihtacvhe aannd i nat e2rn5a0lm 1ΩA, P1-3c0hmaΩnnNe-l 'Step-Up Output (adjustable from 2.5V to 5.5V) 0 synchronous rectifier. 'PWM/PFM Synchronous-Rectified Topology /M With their internal synchronous rectifier, the MAX1700/ 'External Clock or Internal 300kHz Oscillator A MAX1701 deliver 5% better efficiency than similar non- '3µA Logic-Controlled Shutdown synchronous converters. They also feature a pulse- X frequency-modulation (PFM) standby mode to improve 'Power-Good Output (MAX1701) 1 efficiency at light loads, and a 3µA shutdown mode. 'Low-Battery Comparator (MAX1701) 7 The MAX1700/MAX1701 come in 16-pin QSOP pack- ages (which occupy the same space as an 8-pin SO). 'Uncommitted Gain Block (MAX1701) 0 1 The MAX1701 includes two comparators to generate power-good and low-battery warning outputs. It also contains a gain block that can be used to build a linear Ordering Information regulator using an external P-channel pass device. For higher-power outputs, refer to the MAX1703. For PART TEMP. RANGE PIN-PACKAGE dual outputs (step-up and linear regulator), refer to the MAX1700EEE -40°C to +85°C 16 QSOP MAX1705/MAX1706. For an on-board analog-to-digital MAX1701EEE -40°C to +85°C 16 QSOP converter, refer to the MAX848/MAX849. The MAX1701 evaluation kit is available to speed design time. Typical Operating Circuit Applications Digital Cordless Phones Personal Communicators PCS Phones Palmtop Computers Wireless Handsets Hand-Held Instruments Two-Way Pagers Pin Configurations OUTPUT 3.3V OR ADJ MAX1700 UP TO 800mA TOP VIEW I.C. 1 16 I.C. OFF ON I.C. 2 15 POUT INPUT REF 3 14 OUT PWM 0.7V TO 5.5V CLK/SEL PFM SYNC CLK/SEL 4 MAX1700 13 LX GND 5 12 PGND I.C. 6 11 FB ON ONB 10 I.C. OFF FBONAGND PGNLDX ONA 8 9 I.C. ONB QSOP OR POUT I.C. = INTERNAL CONNECTION. LEAVE OPEN OR CONNECT TO GND Pin Configurations continued at end of data sheet. REF OUT ________________________________________________________________Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 ABSOLUTE MAXIMUM RATINGS 0 ONA, ONB, OUT, AO, POK, LBO to GND...................-0.3V, +6V Operating Temperature Ranges 7 PGND to GND.....................................................................±0.3V MAX1700EEE, MAX1701EEE...........................-40°C to +85°C 1 LX to PGND.....................................................-0.3V,VPOUT+0.3V Junction Temperature......................................................+150°C CLK/SEL, AIN, REF, FB, LBP, LBN, POUT to GND............-0.3V, Storage Temperature Range.............................-65°C to +160°C X VOUT+0.3V................................................................................... Lead Temperature (soldering, 10sec).............................+300°C A Continuous Power Dissipation (TA=+70°C) 16-QSOP (Derate 8.30mW/°C above +70°C)...............667mW M Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional / 0 operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 0 7 ELECTRICAL CHARACTERISTICS 1 (CLK/SEL = ONA = ONB = FB = PGND = GND, OUT = POUT, VOUT = 3.6V (Note 6); MAX1701: AIN = LBN = GND, LBP = REF, X TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) A PARAMETER CONDITIONS MIN TYP MAX UNITS M DC-DCCONVERTER Input Voltage Range (Note 1) 0.7 5.5 V Minimum Start-Up Voltage ILOAD< 1mA, TA= +25°C 0.9 1.1 V (Note 2) Frequency in Start-Up Mode VOUT= 1.5V 40 150 300 kHz VFB< 0.1V, CLK/SEL = OUT, VBATT= 2.4V, Output Voltage (Note 3) 3.17 3.30 3.38 V includes load regulation error for 0A ≤ILX≤0.55A Adjustable output, CLK/SEL = OUT, VBATT= 2.4V, FB Regulation Voltage 1.210 1.24 1.255 V includes load regulation error for 0A ≤ILX≤0.55A FB Input Current VFB= 1.25V 0.01 20 nA Output Voltage Adjust Range 2.5 5.5 V Output Voltage Lockout (Note 4) 2.0 2.15 2.3 V Threshold Load Regulation (Note 5) CLK/SEL = OUT, No load to full load -1.6 % MAX1700 0.1 20 Supply Current in Shutdown VONB= 3.6V µA MAX1701 3 20 Supply Current in Low-Power CLK/SEL = GND (MAX1700) 35 70 µA Mode (Note 6) CLK/SEL = GND (MAX1701) 55 110 Supply Current in Low-Noise CLK/SEL = OUT (MAX1700) 125 250 µA Mode (Note 6) CLK/SEL = OUT (MAX1701) 140 300 DC-DC SWITCHES POUT Leakage Current VLX= 0V, VOUT= 5.5V 0.1 20 µA LX Leakage Current VLX= VONB= VOUT= 5.5V 0.1 20 µA CLK/SEL = GND 0.2 0.45 N-channel Switch On-Resistance CLK/SEL = OUT 0.13 0.28 Ω P-channel 0.25 0.5 CLK/SEL = OUT 1100 1300 1600 N-Channel Current Limit mA CLK/SEL = GND 250 400 550 P-Channel Turn-Off Current CLK/SEL = GND 20 120 mA 2 _______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters ELECTRICAL CHARACTERISTICS (continued) M (CLK/SEL = ONA = ONB = FB = PGND = GND, OUT = POUT, VOUT = 3.6V (Note 6); MAX1701: AIN = LBN = GND, LBP = REF, A TA= 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) X PARAMETER CONDITIONS MIN TYP MAX UNITS 1 GAIN BLOCK (MAX1701) 7 AIN Reference Voltage IAO= 20µA 1.237 1.25 1.263 V 0 AIN Input Current VAIN= 1.5V -30 30 nA 0 Transconductance 10µA < IAO= 100µA 5 9 16 mmho / AO Output Low Voltage VAIN= 0.7V, IAO= 100µA 0.1 0.4 V M AO Output High Leakage VAIN= 1.5V, VAO= 5.5V 0.01 1 µA A POWER GOOD (MAX1701) X Internal Trip Level Rising VOUT, VFB< 0.1V 2.93 2.97 3.02 V 1 External Trip Level Rising VFB 1.1 1.12 1.14 V 7 POK Low Voltage ISINK= 1mA, VOUT= 3.6V or ISINK= 20µA, VOUT= 1V 0.03 0.4 V 0 POK High Leakage Current VOUT= VPOK= 5.5V 0.01 1 µA 1 LOW-BATTERY COMPARATOR LBN, LBP Input Offset LBP falling, 15mV hysteresis -5 ±0.5 5 mV LBN, LBP Common Mode To maintain input offset < ±5mV (at least one input must 0.5 1.5 V Range be within this range) LBO Output Low Voltage ISINK= 1mA, VOUT= 3.6V or ISINK= 20µA, VOUT= 1V 0.03 0.4 V LBO High Leakage VOUT= VLBO= 5V 0.01 1 µA LBN, LBP Input Current VLBP= VLBN= 1.5V 20 nA REFERENCE Reference Output Voltage IREF= 0 1.237 1.250 1.263 V REF Load Regulation -1µA < IREF< 50µA 5 15 mV REF Supply Rejection 2.5V < VOUT< 5V 0.2 5 mV LOGIC AND CONTROL INPUTS 1.2V < VOUT< 5.5V, ONA and ONB 0.2VOUT Input Low Voltage (Note 7) V 2.5V < VOUT< 5.5V, CLK/SEL 0.2VOUT Input High Voltage (Note 7) 1.2V < VOUT< 5.5V, ONA and ONB 0.8VOUT Input High Voltage (Note 7) V 2.5V < VOUT< 5.5V, CLK/SEL 0.8VOUT Logic Input Current ONA, ONB, and CLK/SEL -1 1 µA Internal Oscillator Frequency CLK/SEL = OUT 260 300 340 kHz Oscillator Maximum Duty Cycle 80 86 90 % External Clock Frequency 200 400 kHz Range Minimum CLK/SEL Pulse Width 200 ns Maximum CLK/SEL Rise/Fall 100 ns Time _______________________________________________________________________________________ 3

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 ELECTRICAL CHARACTERISTICS (continued) 0 (CLK/SEL = ONA = ONB= FB = PGND = GND, OUT = POUT, VOUT= 3.6V (Note 6); MAX1701: AIN = LBN = GND, LBP = REF, 7 TA= -40°C to +85°C, unless otherwise noted.) (Note 8) 1 PARAMETER CONDITIONS MIN TYP MAX UNITS X DC-DC CONVERTER A VFB< 0.1V, CLK/SEL = OUT, VBATT= 2.4V, includes load Output Voltage (Note 3) 3.17 3.38 V M regulation error for 0A ≤ILX≤0.55A 0/ FB Regulation Voltage Aindcjluusdteasb lleo aodu trpeugtu, lCatLioKn/S eErLro =r fOorU 0TA, V≤BILAXTT≤=0 .25.54AV , 1.20 1.27 V 0 Output Voltage Lockout 7 (Note 4) 2.0 2.3 V Threshold 1 Supply Current in Shutdown VONB= 3.6V 20 µA X Supply Current in Low-Power CLK/SEL = GND (MAX1700) 70 A µA Mode (Note 6) CLK/SEL = GND (MAX1701) 110 M Supply Current in Low-Noise CLK/SEL = OUT (MAX1700) 250 µA Mode (Note 6) CLK/SEL = OUT (MAX1701) 300 DC-DC SWITCHES CLK/SEL = GND 0.45 N-channel Switch On-Resistance CLK/SEL = OUT 0.28 Ω P-channel 0.5 CLK/SEL = OUT 1100 1800 N-Channel Current Limit mA CLK/SEL = GND 250 600 GAIN BLOCK (MAX1701) AIN Reference Voltage IAO= 20µA 1.23 1.27 V Transconductance 10µA < IAO< 100µA 5 16 mmho POWER-GOOD (MAX1701) Internal Trip Level Rising VOUT, VFB< 0.1V 2.92 3.03 V External Trip Level Rising VFB 1.1 1.14 V LOW-BATTERY COMPARATOR (MAX1701) LBN, LBP Input Offset LBP falling, 15mV hysteresis -5 5 mV LBN, LBP Common Mode To maintain input offset < ±5mV (at least one input must 0.5 1.5 V Range be within this range) REFERENCE Reference Output Voltage IREF= 0 1.23 1.27 V 4 _______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters ELECTRICAL CHARACTERISTICS (continued) M (CLK/SEL = ONA = ONB = FB = PGND = GND, OUT = POUT, VOUT = 3.6V, MAX1701: AIN = LBN = GND, LBP = REF, A TA= -40°C to +85°C, unless otherwise noted.) (Note 8) X PARAMETER CONDITIONS MIN TYP MAX UNITS 1 LOGIC AND CONTROL INPUTS 7 1.2V < VOUT< 5.5V, ONA and ONB 0.2VOUT Input Low Voltage (Note 7) V 0 2.5V < VOUT< 5.5V, CLK/SEL 0.2VOUT 0 1.2V < VOUT< 5.5V, ONA and ONB 0.8VOUT Input High Voltage (Note 7) V / Input High Voltage (Note 7) 2.5V < VOUT< 5.5V, CLK/SEL 0.8VOUT M Logic Input Current ONA, ONB, and CLK/SEL -1 1 µA A Internal Oscillator Frequency CLK/SEL = OUT 260 340 kHz X Oscillator Maximum Duty Cycle 80 92 % 1 External Clock Frequency 200 400 kHz 7 Range 0 Note 1: Operating voltage. Since the regulator is bootstrapped to the output, once started it will operate down to 0.7V input. 1 Note 2: Start-up is tested with the circuit of Figure 2. Note 3: In low-power mode (CLK/SEL = GND), the output voltage regulates 1% higher than low-noise mode (CLK/SEL = OUT or synchronized). Note 4: The regulator is in start-up mode until this voltage is reached. Do not apply full load current. Note 5: Load regulation is measured from no-load to full load where full load is determined by the N-channel switch current limit. Note 6: Supply current from the 3.30V output is measured between the 3.30V output and the OUT pin. This current correlates directly to the actual battery supply current, but is reduced in value according to the step-up ratio and efficiency. Set VOUT = 3.6V to keep the internal switch open when measuring the current into the device. Note 7: ONA and ONBhave hysteresis of approximately 0.15xVOUT. Note 8: Specifications to -40°C are guaranteed by design and not production tested. Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) MAX1701 EFFICIENCY vs. LOAD CURRENT EFFICIENCY vs. LOAD CURRENT SHUTDOWN CURRENT (VOUT = 3.3V) (VOUT = 5V) vs. INPUT VOLTAGE (V) 10900 VIN = 2.4V MAX1700-01 10900 VIN = 3.6V MAX1700-02 67..00 T = 25°C MAX1770-03 EFFICIENCY (%) 678000 VIN = 0.9V VIN = 1.2V EFFICIENCY (%) 56780000 VIN = 1V.I2NV = 2.4V mHUTDOWN CURRENT (A) 2435....0000 T = 85°C T = -40°C S 50 PFM 40 PFM 1.0 PWM PWM 40 30 0 0.1 1 10 100 1000 0.1 1 10 100 1000 0 1 2 3 4 5 6 LOAD CURRENT (mA) LOAD CURRENT (mA) INPUT VOLTAGE (V) _______________________________________________________________________________________ 5

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 Typical Operating Characteristics (continued) 0 (TA = +25°C, unless otherwise noted.) 7 REFERENCE VOLTAGE REFERENCE VOLTAGE 1 vs. TEMPERATURE vs. REFERENCE CURRENT FREQUENCY vs. TEMPERATURE X MA 11..225524 MAX1700-04 11..225524 MAX1700-05 333122505 VOUT = 5V MAX1700-06 V) V) 700/ FERENCE VOLTAGE ( 11..225408 FERENCE VOLTAGE ( 11..225408 FREQUENCY (kHz) 332300915050 1 RE RE VOUT = 3.3V X 1.246 1.246 290 285 A 1.244 1.244 280 M -40 -20 0 20 40 60 80 100 0 10 20 30 40 50 60 70 80 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) REFERENCE CURRENT (m A) TEMPERATURE (°C) START-UP INPUT VOLTAGE PEAK INDUCTOR CURRENT vs. OUTPUT CURRENT vs. OUTPUT VOLTAGE AGE (V) 1212....7193 N100C...OO076V94-NL V SAAO TTATAA T+D-N 42+ TS058-°T°5CCAC°URCRTR-UEPN:T LOAD MAX1700/01 TOC06a A) 111...426 PWM MAX1700-08 P INPUT VOLT 11..53 VDL O1=U =1T 0 M=m B3HR.30V520L RRENT LIMIT ( 10..08 RT-U 1.1 TA = -40°C CU 0.6 A T 0.9 S 0.7 TA = +25°C 0.4 TA = +85°C PFM 0.5 0.2 0.01 0.1 1 10 100 1000 2.5 3 3.5 4 4.5 5 5.5 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) HEAVY-LOAD SWITCHING WAVEFORMS (VOUT = 3.3V) LINE-TRANSIENT RESPONSE MAX1700-08 MAX1700-09 VOUT A 0V A B 0V 0A C B 1m s/div 5ms/div VIN = 1.1V, IOUT = 200mA, VOUT = 3.3V IOUT = 0mA, VOUT = 3.3V A = LX VOLTAGE, 2V/div A = VIN, 1.1V TO 2.1V, 1V/div B = INDUCTOR CURRENT, 0.5A/div B = VOUT RIPPLE, 50mV/div, AC COUPLED C = VOUT RIPPLE, 50mV/div, AC COUPLED 6 _______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters Typical Operating Characteristics (continued) M (Circuit of Figure 1, TA= +25°C, unless otherwise noted.) A POWER-ON DELAY X LOAD-TRANSIENT RESPONSE (PFM MODE) MAX1700-10 MAX1700-11 1 7 3.3V 0 0 A 200mA A / M 0A B A X B C 0mA 1 7 2ms/div 5ms/div 0 VIN = 1.1V, VOUT = 3.3V A = VON1, 2V/div 1 A = LOAD CURRENT, 0mA TO 200mA, 0.2A/div B = VOUT, 1V/div B = VOUT RIPPLE, 50mV/div, AC COUPLED C = INPUT CURRENT, 0.2A/div GSM LOAD-TRANSIENT RESPONSE DECT LOAD-TRANSIENT RESPONSE MAX1700-12 MAX1700-13 5V 3.3V A A B B 0A 0A 1ms/div 2ms/div VIN = 3.6V, VOUT = 5V, COUT = 440m F VIN = 1.2V, VOUT = 3.3V, COUT = 440m F A = VOUT RIPPLE, 200mV/div, AC COUPLED A = VOUT RIPPLE, 200mV/div, AC COUPLED B = LOAD CURRENT, 100mA TO 1A, 0.5A/div, B = LOAD CURRENT, 50mA TO 400mA, 0.2A/div, PULSE WIDTH = 577m s PULSE WIDTH = 416m s NOISE SPECTRUM (VOUT = 3.3V, VIN = 1.2V, RLOAD = 50W ) 2.7 MAX1700-14 )MS VR m E ( S OI N 0 0.1k 1k 10k 100k 1M FREQUENCY (Hz) _______________________________________________________________________________________ 7

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 Pin Description 0 7 PIN NAME FUNCTION 1 MAX1700 MAX1701 X — 1 LBP Low-Battery Comparator Non-Inverting Input A — 2 LBN Low-Battery Comparator Inverting Input M Reference Output. Bypass with a 0.22µF capacitor to GND. REF can source up to 3 3 REF 50µA. / 0 Switching-Mode Selection and External-Clock Synchronization Inputs. 0 •CLK/SEL=Low: Low-power, delivers up to 10% of full load current. 7 •CLK/SEL=High: High-power PWM mode. Full output power available. Operates in 1 low-noise, constant-frequency mode. 4 4 CLK/SEL •CLK/SEL=External Clock: High-power PWM mode with the internal oscillator X synchronized to the external clock. A Turning on with CLK/SEL=0V also serves as a soft-start function since peak inductor current is limited to 25% of that allowed in PWM mode. M 5 5 GND Ground Power-Okay Comparator Output. Open drain N-channel output is low when VOUTis — 6 POK 10% below regulation point. No internal delay is provided. Shutdown Input. When ONB=high and ONA=low, the IC is off and the load is connect- 7 7 ONB ed to the battery through the Schottky diode. 8 8 ONA Turn ON Input. When ONA=high or ONB=low, the IC turns on. — 9 AO Gain Block Output. This open-drain output sinks when VAIN<VREF. Gain Block AIN input. When AIN is low, AO sinks current. The transconductance from — 10 AIN AIN to AO is 9mmhos. DC-DC Converter Dual-Mode Feedback Input. For a fixed output voltage of +3.3V, 11 11 FB connect FB to GND. For adjustable output, connect a divider between POUT and GND to set the output voltage in the range of 2.5V to 5V. 12 12 PGND Source of N-Channel Power MOSFET Switch. Connect to high-current ground path. 13 13 LX Drain of P-Channel Synchronous Rectifier and N-Channel Switch 14 14 OUT Output Sense Input. Power source for the IC. Source of P-Channel Synchronous Rectifier MOSFET Switch. Connect an external 15 15 POUT Schottky diode from LX to POUT. Low-Battery Comparator Output. Open-drain N-channel output is low when LBN > LBP — 16 LBO Input hysteresis is 15mV. 1, 2, 6, 9, — I.C. Internal Connection. Leave open or connect to GND. 10, 16 8 _______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters M A OUT UNDERVOLTAGE LOCKOUT X IC PWR 1 PFM/PWM POUT 7 2.25V CONTROLLER EN OSSTCAILRLTA-UTOPR Q D Q P0.C2H5W 00 / M ONA ON RDY EN LX ONB A REFERENCE REF 1.25V REF ENOSCILLATOR OSC Q N0.C13HW X GND 300kHz PFM/PWM 1 CLK/SEL MODE PGND FEEDBACK 7 FEEDBACK AND FB POK* FB POWER-GOOD 0 SELECT N 1 AIN* AO* GAIN N BLOCK REF LBP* COMPARATOR LBO* N LBN* *MAX1701 ONLY Figure 1. Functional Diagram _______________Detailed Description power operation, as well as low-quiescent current for maximum battery life during standby and shutdown The MAX1700/MAX1701 are highly efficient, low-noise modes. They feature constant-frequency (300kHz), low- power supplies for portable RF and data acquisition noise PWM operation with up to 800mA output capabili- instruments. The MAX1700 combines a boost switching ty. See Table 1 for typical available output current. A regulator, N-channel power MOSFET, P-channel syn- low-quiescent-current, low-power mode offers an out- chronous rectifier, precision reference, and shutdown put up to 100mA and reduces quiescent power con- control. The MAX1701 contains all of the MAX1700 fea- sumption to 200µW. In shutdown mode, the quiescent tures plus a versatile gain amplifier, POK output, and a current is further reduced to just 3µA. Figure 2 shows low-battery comparator (Figure 1). The MAX1700/ the standard application circuit for the MAX1701 come in a 16-pin QSOP package, which MAX1700/MAX1701. occupies no more space than an 8-pin SO. Additional features include synchronous rectification for The switching DC-DC converter boosts a 1- to 3-cell high efficiency and improved battery life, a POK output, input to an adjustable output between 2.5V and 5.5V. and an uncommitted comparator for low-battery detec- The MAX1700/MAX1701 start from a low 1.1V input and tion (MAX1701). A CLK input allows frequency synchro- remain operational down to 0.7V. nization to reduce interference. Dual shutdown controls These devices are optimized for use in cellular phones allow shutdown using a momentary pushbutton switch and other applications requiring low noise during full- and microprocessor control (MAX1701). _______________________________________________________________________________________ 9

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 0 0.7V TO 5.5V POUT 7 22m F 1 L1 10m H FB P X REF MBR0520L A MAX1700 LX OUTPUT R Q LX OUT MAX1701 D1 M CLK/SEL POUT 21 0x0m F S N / 0 ONA 10W 0.22m F 0 ONB OUT 7 0.22m F 1 R1 1.3A CURRENT PGND X REF FB ADJUSTABLE LIMIT A 0.22m F GND PGND OUFTIXPEUDT R2 OSC (GND) M Figure 2. Fixed or Adjustable Output (PWM mode). Figure 3. Simplified PWM Controller Block Diagram Table 1. Typical Available Output Current the output filter capacitor and load. As the energy stored in the inductor is depleted, the current ramps NUMBER INPUT OUTPUT OUTPUT down and the output diode and synchronous rectifier OF CELLS VOLTAGE (V) VOLTAGE (V) CURRENT (mA) turn off. Voltage across the load is regulated using 1 NiCd/NiMH 1.2 3.3 300 either low-noise PWM or low-power operation, depend- ing on the CLK/SEL pin setting (Table 2). 2 NiCd/NiMH 2.4 3.3 750 2 NiCd/NiMH 2.4 5.0 525 Low-Noise PWM Operation 3 NiCd/NiMH When CLK/SEL is pulled high, the MAX1700/MAX1701 or 1 Li-Ion 3.6 5.0 850 operate in a higher power, low-noise pulse-width- modulation (PWM) mode. During PWM operation, they switch at a constant frequency (300kHz) and then mod- ulate the MOSFET switch pulse width to control the Table 2. Selecting the Operating Mode power transferred per cycle and regulate the voltage CLK/SEL MODE FEATURES across the load. In PWM mode the devices can output 0 Low Power Low supply current up to 800mA. Switching harmonics generated by fixed- frequency operation are consistent and easily filtered. Low noise, 1 PWM See the Noise Spectrum Plot in the Typical Operating high output current Characteristics. External Clock Synchronized Low noise, During PWM operation, each rising edge of the internal (200kHz to 400kHz) PWM high output current clock sets a flip-flop, which turns on the N-channel MOSFET switch (Figure 3). The switch is turned off Step-Up Converter when the sum of the voltage-error, slope compensation, The step-up switching DC-DC converter generates an and current-feedback signals trips a multi-input com- adjustable output from 2.5V to 5.5V. During the first part parator and resets the flip-flop; the switch remains off of each cycle, the internal N-channel MOSFET switch is for the rest of the cycle. When a change occurs in the turned on. This allows current to ramp up in the induc- output-voltage error signal into the comparator, it shifts tor and store energy in a magnetic field. During the the level to which the inductor current is allowed to second part of each cycle, when the MOSFET is turned ramp during each cycle and modulates the MOSFET off, the voltage across the inductor reverses and forces switch pulse width. A second comparator enforces an current through the diode and synchronous rectifier to inductor current limit of 1.6A max. 10 ______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters rectifier current has ramped down to 70mA. This forces M operation with a discontinuous inductor current. Q D LOGIC HIGH A Q POUT Synchronous Rectifier X The MAX1700/MAX1701 feature an internal 250mΩ, P- R P channel synchronous rectifier to enhance efficiency. 1 Synchronous rectification provides a 5% efficiency 7 ERROR improvement over similar nonsynchronous boost regu- 0 COMPARATOR LX lators. In PWM mode, the synchronous rectifier is 0 turned on during the second half of each switching FB S Q N cycle. In low-power mode, an internal comparator turns /M on the synchronous rectifier when the voltage at LX REF exceeds the boost-regulator output and then turns it off A R when the inductor current drops below 70mA. X 400mA Low-Voltage Start-Up Oscillator 1 CURRENT LIMIT PGND The MAX1700/MAX1701 use a CMOS, low-voltage 7 start-up oscillator for a 1.1V guaranteed minimum start- 0 up input voltage at +25°C. On start-up, the low-voltage 1 oscillator switches the N-channel MOSFET until the out- Figure 4. Controller Block Diagram in Low-Power PFM Mode put voltage reaches 2.15V. Above this level, the normal boost-converter feedback and control circuitry take Synchronized PWM Operation over. Once the device is in regulation, it can operate By applying an external clock to CLK/SEL, the down to a 0.7V input since internal power for the IC is MAX1700/MAX1701 can also be synchronized in PWM bootstrapped from the output using the OUT pin. Do mode to a frequency between 200kHz and 400kHz. not apply full load until the output exceeds 2.4V. This allows the user to set the harmonics to avoid IF bands in wireless applications. The synchronous rectifi- Table 3. On/Off Logic Control er is also active during synchronized PWM operation. ONA (cid:79)(cid:79)(cid:78)(cid:78)(cid:66)(cid:66) Status Low-Power PFM Operation 0 0 On Pulling CLK/SEL low places the MAX1700/MAX1701 in 0 1 Off a low-power mode. During low-power mode, PFM oper- ation regulates the output voltage by transferring a 1 0 On fixed amount of energy during each cycle and then 1 1 On modulating the switching frequency to control the power delivered to the output. The devices switch only Shutdown as needed to service the load, resulting in the highest The MAX1700/MAX1701 shut down to reduce quies- possible efficiency at light loads. Output current capa- cent current to typically 3µA. During shutdown, the ref- bility in PFM mode is 100mA. The output voltage is typi- erence, low-battery comparator, gain block, and all cally 1% higher than the output voltage in PWM mode. feedback and control circuitry are off. The boost con- During PFM operation, the error comparator detects the verter’s output drops to one Schottky diode drop below output voltage falling out of regulation and sets a flip- the input. flop, turning on the N-channel MOSFET switch (Figure 4). When the inductor current ramps to the PFM mode Table 3 shows the control logic with ONA and ONB. current limit (400mA typical) and stores a fixed amount Both inputs have trip points near 0.5VOUT with of energy, the current-sense comparator resets a flip- 0.15VOUThysteresis. flop. The flip-flop turns off the N-channel switch and Low-Battery Comparator (MAX1701) turns on the P-channel synchronous rectifier. A second The internal low-battery comparator has uncommitted flip-flop, previously reset by the switch’s “on” signal, inputs and an open-drain output (LBO) capable of sink- inhibits the error comparator from initiating another ing 1mA. To use it as a low-battery-detection compara- cycle until the energy stored in the inductor is trans- tor, connect the LBN input to the reference, and ferred to the output filter capacitor and the synchronous connect the LBP input to an external resistor divider ______________________________________________________________________________________ 11

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 0 0.7V TO 5.5V POUT 7 REF 1 L1 X D1 MAX1701 R5 0.22m F MAX1701 LX A POUT LBO LBN CLK/SEL M ONA 10W 10k R6 / ONB OUT LBP 0 R3 0.22m F ARBITRARY BATTERY GND 0 VOLTAGE VOLTAGE LBP POK VOLTAGE MONITOR 7 LBN LBO LOW-BATTERY MONITOR R5 1 R4 REF AO ARBITRARY VOLTAGE MONITOR Figure 7. Detecting Battery Voltages Below 1.25V (MAX1701) X GNDPGNDFBAIN A R6 M OUTPUT P 10W Figure 5. Detecting Battery Voltage Above 1.25V C3 C5 0.22m F OUT POUT R3 270k C4 LBN POUT OUT MAX1701 R4 LBO MAX1701 R3 LBP REF LBO LBP 0.22m F GND LBN REF R4 0.22m F GND Figure 8. Using the Low-Battery Comparator for Load Control During Start-Up Figure 6. Using the Low-Battery Comparator to Sense the and LBN and connect the battery to the LBP input Output Voltage (MAX1701) through a 10kΩ current-limiting resistor (Figure 7). The equation for setting the resistors for the low-battery threshold is then as follows: between the positive battery terminal and GND (Figure 5). The resistor values are then calculated as follows: R5 = R6(VREF/VLBP-1) R3 = R4(VTH/VLBN-1) where VLBP is the desired voltage threshold. In Figures 5, 6, and 7, LBO goes low for a low-voltage input. The where VTH is the desired input voltage trip threshold low-battery comparator can be used to check the out- and VLBN = VREF = 1.25V. Since the input bias current into LBP is less than 20nA, R4 can be a large value put voltage or to control the load directly on POUT dur- (such as 270kΩ or less) without sacrificing accuracy. ing start-up (Figure 8). Use the following equation to set the resistor values: The inputs have a common-mode input range from 0.5V to 1.5V and an input-referred hysteresis of 15mV. R3 = R4(VOUTTH/VLBP- 1) The low-battery comparator can also be used to moni- where VOUTTH is the desired output-voltage trip point tor the output voltage, as shown in Figure 6. and VLBPis connected to the reference or 1.25V. To set the low-battery threshold to a voltage below the 1.25V reference, insert a resistor divider between REF 12 ______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters Reference Gain Block (MAX1701) M The MAX1700/MAX1701 have an internal 1.250V, 1% The MAX1701’s gain block can function as a third com- bandgap reference. Connect a 0.22µF bypass capaci- parator or can be used to build a linear regulator using A tor to GND within 0.2in. (5mm) of the REF pin. REF can an external P-channel MOSFET pass device. The gain- X source up to 50µA of external load current. block output is a single-stage transconductance ampli- 1 fier that drives an open-drain N-channel MOSFET. Power-OK (MAX1701) 7 Figure 9 shows the gain block used in a linear regula- The MAX1701 features a power-good comparator. This tor. The output of an external P-channel pass element is 0 comparator’s open-drain output (POK) is pulled low compared to the internal reference. The difference is 0 when the output voltage falls to 10% below the regula- amplified and used to drive the gate of the pass ele- / tion point. ment. Use a logic-level PFET such as the Fairchild M IN NDS336P (RDS(ON) = 270mW). If the PFET RDS(ON) is A less than 250mΩ, the linear regulator output filter capacitance may need to be increased to above 47µF. X 1 __________________Design Procedure P LX 7 Setting the Output Voltages 0 MAX1701 100m2Fx 20k 47m F Set the output voltage between 2.5V and 5.5V by con- 1 AO necting a resistor voltage-divider to FB from OUT to GND, as shown in Figure 2. The resistor values are then N as follows: R1 = R2 (VOUT/VFB- 1) AIN R5 where VFB, the boost-regulator feedback setpoint, is REF 1.23V. Since the input bias current into FB is less than R6 20nA, R2 can have a large value (such as 270kΩ or less) without sacrificing accuracy. Connect the resistor voltage-divider as close to the IC as possible, within Figure 9. Using Gain Block as a Linear Regulator 0.2in. (5mm) of the FB pin. Table 4. Component Suppliers Inductor Selection The MAX1700/MAX1701’s high switching frequency SUPPLIER PHONE FAX allows the use of a small surface-mount inductor. A USA: (803) 946-0690 (803) 626-3123 AVX 10µH inductor should have a saturation-current rating (800) 282-4975 that exceeds the N-channel switch current limit of 1.6A. Coilcraft USA: (847) 639-6400 (847) 639-1469 However, it is generally acceptable to bias the inductor Matsuo USA: (714) 969-2491 (714) 960-6492 current into saturation by as much as 20%, although Motorola USA: (602) 303-5454 (602) 994-6430 this will slightly reduce efficiency. For high efficiency, choose an inductor with a high-frequency core material USA: (619) 661-6835 (619) 661-1055 Sanyo (such as ferrite) to reduce core losses. To minimize Japan: 81-7-2070-6306 81-7-2070-1174 radiated noise, use a toroid, pot core, or shielded bob- USA: (847) 956-0666 (847) 956-0702 bin inductor. Connect the inductor from the battery to Sumida Japan: 81-3-3607-5111 81-3-3607-5144 the LX pin as close to the IC as possible. See Table 4 for a list of component suppliers and Table 5 for sug- gested components. Table 5. Component Selection Guide PRODUCTION INDUCTORS CAPACITORS DIODES Matsuo 267 series Sumida CDR63B, CD73, CDR73B, CD74B series Surface Mount Sprague 595D series Motorola MBR0520L Coilcraft DO1608, DO3308, DT3316 series AVX TPS series Sanyo OS-CON series Through Hole Sumida RCH654 series 1N5817 Nichicon PL series ______________________________________________________________________________________ 13

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 0 17 270k MAX1701 m C LX POUT X ON/OFF ONB OUT VDD MAX1700 MAX8865/MAX8866 DUAL OR A I/O MAX8863/MAX8864 SINGLE M LOW-DROPOUT LINEAR REGULATORS ONA I/O / 0 0 7 PA 0.1m F 270k 1 m C RADIO X A M Figure 10. Momentary Pushbutton On/Off Switch Figure 11. Typical Phone Application Output Diode exceed the ripple current ratings of tantalum capaci- Use a Schottky diode, such as a 1N5817, MBR0520L, or tors. Avoid most aluminum-electrolytic capacitors, equivalent. The Schottky diode carries current during since their ESR is often too high. start-up, and in PFM mode after the synchronous rectifier Bypass Capacitors turns off. Thus, its current rating only needs to be 500mA. Two ceramic bypass capacitors are required for proper Connect the diode between LX and POUTas close to the operation. Bypass REF with a 0.22µF capacitor to GND. IC as possible. Do not use ordinary rectifier diodes since Also connect a 0.22µF ceramic capacitor from OUT to slow switching speeds and long reverse recovery times GND. Each should be placed as close to their respec- will compromise efficiency and load regulation. tive pins as possible, within 0.2in. (5mm) of the DC-DC Input and Output Filter Capacitors converter IC. See Table 4 for suggested suppliers. Choose input and output filter capacitors that will ser- __________Applications Information vice the input and output peak currents with accept- able voltage ripple. Choose input capacitors with Push-On/Push-Off Control working voltage ratings over the maximum input volt- A momentary pushbutton switch can be used to turn age, and output capacitors with working voltage ratings the MAX1700/MAX1701 on and off. In Figure 10, ONA higher than the output. is pulled low and ONB is pulled high when the part is For full output, two 100µF, 100mΩ, low-ESR tantalum out- off. When the momentary switch is pressed, ONB is put filter capacitors are recommended. For loads below pulled low and the regulator turns on. The switch must 250mA, a single 100µF output capacitor will suffice. The be pressed long enough for the microcontroller to exit input filter capacitor (CIN) reduces peak currents drawn reset (200ms) and drive ONA high. A small capacitor is from the input source and reduces input switching noise. added to help debounce the switch. The controller The input voltage source impedance determines the issues a logic high to ONA, which holds the part on required size of the input capacitor. When operating regardless of the switch state. To turn the regulator off, directly from one or two NiCd cells placed close to the press the switch again, allowing the controller to read MAX1700/MAX1701, use a 22µF, low-ESR input filter the switch status and pull ONA low. When the switch is capacitor. When operating from a power source placed released, ONBis pulled high. farther away, or from higher impedance batteries such as alkaline or lithium cells, use one or two 100µF, 100mΩ, Use in a Typical Wireless Phone Application low-ESR tantalum capacitors. The MAX1700/MAX1701 are ideal for use in digital Sanyo OS-CON and Panasonic SP/CB-series ceramic cordless and PCS phones. The power amplifier (PA) is capacitors offer the lowest ESR. Low-ESR tantalum connected directly to the boost-converter output for capacitors are a good choice and generally offer a maximum voltage swing (Figure 11). Low-dropout linear good tradeoff between price and performance. Do not regulators are used for post-regulation to generate 14 ______________________________________________________________________________________

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters low-noise power for DSP, control, and RF circuitry. Soft-Start M Typically, RF phones spend most of their life in standby To implement soft-start, set CLK/SEL low on power-up; mode with only short periods in transmit/receive mode. this forces low-power operation and reduces the peak A During standby, maximize battery life by setting switching current to 550mA max. Once the circuit is in X CLK/SEL = 0; this places the IC in low-power mode (for regulation and start-up transients have settled, 1 the lowest quiescent power consumption). CLK/SEL can be set high for full-power operation. 7 Designing a PC Board Intermittent Supply/Battery Connections 0 High switching frequencies and large peak currents When boosting an input supply connected with a 0 make PC board layout an important part of design. mechanical switch, or a battery connected with spring / Poor design can cause excessive EMI and ground- contacts, input power may sometimes be intermittent M bounce, both of which can cause instability or regula- as a result of contact bounce. When operating in PFM tion errors by corrupting the voltage and current mode with input voltages greater than 2.5V, restarting A feedback signals. after such dropouts may initiate high current pulses that X interfere with the MAX1700/MAX1701 internal MOSFET Power components (such as the inductor, converter IC, 1 switch control. If contact or switch bounce is anticipat- filter capacitors, and output diode) should be placed as 7 ed in the design, use one of the following solutions. close together as possible, and their traces should be 0 kept short, direct, and wide. A separate low-noise 1) Connect a capacitor (CONB) from ONB to VIN, a 1MW ground plane containing the reference and signal resistor (RONB) from ONB to GND, and tie ONA to GND 1 grounds should only connect to the power-ground (Figure 12). This RC network differentiates fast input plane at one point. This minimizes the effect of power- edges at VIN and momentarily holds the IC off until VIN ground currents on the part. Consult the MAX1701 EV settles. The appropriate value of CONB is 10-5 times the kit manual for a layout example. total output filter capacitance (COUT), so a COUT of 200µF results in CONB= 2nF. On multilayer boards, do not connect the ground pins of the power components using vias through an internal 2) Use the system microcontroller to hold the ground plane. Instead, place them close together and MAX1700/MAX1701 in shut down from the time when route them in a star-ground configuration using compo- power is applied (or reapplied) until the output capaci- nent-side copper. Then use vias to connect the star tance (COUT) has charged to at least the input voltage. ground to the internal ground plane. Power-on reset times of tens of milliseconds accom- plish this. Keep the voltage feedback network very close to the IC, within 0.2in. (5mm) of the FB pins. Keep noisy 3) Ensure that the IC operates, or at least powers up, in traces, such as from the LX pin, away from the voltage PWM mode (CLK/SEL = high). Activate PFM mode only feedback networks. Separate them with grounded after the VOUThas settled and all of the system’s power- copper. Consult the MAX1700 evaluation kit for a full on reset flags are cleared. PC board example. Pin Configurations (continued) TOP VIEW 13 LBP 1 16 LBO CONB LX 2nF LBN 2 15 POUT 7 ONB OUT 14 C20O0UmTF REF 3 14 OUT RONB MAX1700 1M CLK/SEL 4 MAX1701 13 LX MAX1701 15 8 POUT GND 5 12 PGND ONA POK 6 11 FB ONB 7 10 AIN ONA 8 9 AO QSOP Figure 12. Connecting CONBand RONBwhen Switch or Battery-Contact Bounce Is Anticipated ______________________________________________________________________________________ 15

1-Cell to 3-Cell, High-Power (1A), Low-Noise, Step-Up DC-DC Converters 1 Chip Information 0 TRANSISTOR COUNT: 531 7 SUBSTRATE CONNECTED TO GND 1 X A ________________________________________________________Package Information M S P E / P. 0 O S Q 0 7 1 X A M 16 ______________________________________________________________________________________

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