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  • 型号: LT4356IMS-1#PBF
  • 制造商: LINEAR TECHNOLOGY
  • 库位|库存: xxxx|xxxx
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LT4356IMS-1#PBF产品简介:

ICGOO电子元器件商城为您提供LT4356IMS-1#PBF由LINEAR TECHNOLOGY设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LT4356IMS-1#PBF价格参考。LINEAR TECHNOLOGYLT4356IMS-1#PBF封装/规格:电涌抑制 IC, 。您可以下载LT4356IMS-1#PBF参考资料、Datasheet数据手册功能说明书,资料中有LT4356IMS-1#PBF 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

电路保护

描述

IC OVERVOLT PROT REG 10-MSOP

产品分类

电涌抑制 IC

品牌

Linear Technology

数据手册

http://www.linear.com/docs/25228

产品图片

产品型号

LT4356IMS-1#PBF

rohs

无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

-

产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=15210

产品目录绘图

产品目录页面

点击此处下载产品Datasheet

供应商器件封装

10-MSOP

其它名称

LT4356IMS1PBF

功率(W)

-

包装

管件

封装/外壳

10-TFSOP,10-MSOP(0.118",3.00mm 宽)

应用

自动

技术

混合技术

标准包装

50

电压-工作

4 ~ 80V

电压-箝位

27V,可调

电路数

1

配用

/product-detail/zh/DC1018B-C/DC1018B-C-ND/2658296/product-detail/zh/DC1018B-B/DC1018B-B-ND/2658295/product-detail/zh/DC1018B-A/DC1018B-A-ND/2658294

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PDF Datasheet 数据手册内容提取

LT4356-1/LT4356-2 Surge Stopper FeAtures Description n Stops High Voltage Surges The LT®4356 surge stopper protects loads from high voltage n Adjustable Output Clamp Voltage transients. It regulates the output during an overvoltage n Overcurrent Protection event, such as load dump in automobiles, by controlling n Wide Operation Range: 4V to 80V the gate of an external N-channel MOSFET. The output is n Reverse Input Protection to –60V limited to a safe value thereby allowing the loads to con- n Low 7µA Shutdown Current, LT4356-1 tinue functioning. The LT4356 also monitors the voltage n Adjustable Fault Timer drop between the V and SNS pins to protect against CC n Controls N-channel MOSFET overcurrent faults. An internal amplifier limits the current n Shutdown Pin Withstands –60V to 100V sense voltage to 50mV. In either fault condition, a timer n Fault Output Indication is started inversely proportional to MOSFET stress. If the n Guaranteed Operation to 125°C timer expires, the FLT pin pulls low to warn of an impend- n Auxiliary Amplifier for Level Detection Comparator or ing power down. If the condition persists, the MOSFET is Linear Regulator Controller turned off. After a cool down period, the GATE pin pulls n Available in (4mm × 3mm) 12-Pin DFN, up turning on the MOSFET again. 10-Pin MSOP or 16-Pin SO Packages The auxiliary amplifier may be used as a voltage detection comparator or as a linear regulator controller driving an ApplicAtions external PNP pass transistor. n Automotive/Avionic Surge Protection Back-to-back FETs can be used in lieu of a Schottky diode n Hot Swap/Live Insertion for reverse input protection, reducing voltage drop and n High Side Switch for Battery Powered Systems power loss. A shutdown pin reduces the quiescent current n Intrinsic Safety Applications to less than 7µA for the LT4356-1 during shutdown. The LT4356-2 differs from the LT4356-1 during shutdown by L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and No RSENSE and ThinSOT are trademarks of Analog Devices, Inc. All other trademarks are the reducing the quiescent current to 60µA and keeping alive property of their respective owners. the auxiliary amplifier for uses such as an undervoltage lockout or always-on regulator. typicAl ApplicAtion 4A, 12V Overvoltage Output Regulator Overvoltage Protector Regulates Output at 27V During Transient VIN 10mΩ IRLR2908 VOUT 12V 80V INPUT SURGE CTMR = 6.8µF ILOAD = 500mA 10Ω 102k 383k VCC SNS GATE OUT 20V/DVIIVN FB SHDN VCC 4.99k 12V IN+ LT4356DE DC-DC 27V ADJUSTABLE CLAMP CONVERTER VOUT 100k 20V/DIV EN SHDN GND 12V UNDERVOLTAGE AOUT GND TMR FLT FAULT 100ms/DIV 4356 TA01b 4356 TA01 0.1µF 4356fb 1 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 Absolute MAxiMuM rAtings (Notes 1 and 2) V , SHDN ................................................–60V to 100V Storage Temperature Range CC SNS .............................V – 30V or –60V to V + 0.3V DE12 ..................................................–65°C to 125°C CC CC OUT, A , FLT, EN .....................................–0.3V to 80V MS, SO ..............................................–65°C to 150°C OUT GATE (Note 3) .................................–0.3V to V + 10V Lead Temperature (Soldering, 10 sec) OUT FB, TMR, IN+ ................................................–0.3V to 6V MS, SO .............................................................300°C A , EN, FLT, IN+ ..................................................–3mA OUT Operating Temperature Range LT4356C ...................................................0°C to 70°C LT4356I ................................................–40°C to 85°C LT4356H ............................................–40°C to 125°C pin conFigurAtion TOP VIEW TOP VIEW TMR 1 16 IN+ TMR 1 12 IN+ FB 2 15 NC TOP VIEW FB 2 11 AOUT FB 1 10 TMR NC 3 14 AOUT OUT 3 13 10 GND OUT 2 9 GND OUT 4 13 NC GATE 4 9 EN GATE 3 8 EN SNS 4 7 FLT GATE 5 12 GND SNS 5 8 FLT VCC 5 6 SHDN NC 6 11 EN VCC 6 7 SHDN MS PACKAGE SNS 7 10 FLT 10-LEAD PLASTIC MSOP DE PACKAGE TJMAX = 125°C, θJA = 120°C/W VCC 8 9 SHDN 12-LEAD (4mm × 3mm) PLASTIC DFN S PACKAGE EXPOSED PAD T(PJMINAX 1 =3 )1 P2C5°BC G, NθJDA C=O 4N3N°CE/CWT ION OPTIONAL 16-LEAD PLASTIC SO TJMAX = 150°C, θJA = 100°C/W 4356fb 2 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 orDer inForMAtion http://www.linear.com/product/LT4356-1#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4356CDE-1#PBF LT4356CDE-1#TRPBF 43561 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-1#PBF LT4356IDE-1#TRPBF 43561 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-1#PBF LT4356HDE-1#TRPBF 43561 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4356CDE-2#PBF LT4356CDE-2#TRPBF 43562 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-2#PBF LT4356IDE-2#TRPBF 43562 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-2#PBF LT4356HDE-2#TRPBF 43562 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4356CMS-1#PBF LT4356CMS-1#TRPBF LTCNS 10-Lead Plastic MSOP 0°C to 70°C LT4356IMS-1#PBF LT4356IMS-1#TRPBF LTCNS 10-Lead Plastic MSOP –40°C to 85°C LT4356HMS-1#PBF LT4356HMS-1#TRPBF LTCNS 10-Lead Plastic MSOP –40°C to 125°C LT4356CS-1#PBF LT4356CS-1#TRPBF LT4356S-1 16-Lead Plastic SO 0°C to 70°C LT4356IS-1#PBF LT4356IS-1#TRPBF LT4356S-1 16-Lead Plastic SO –40°C to 85°C LT4356HS-1#PBF LT4356HS-1#TRPBF LT4356S-1 16-Lead Plastic SO –40°C to 125°C LT4356CS-2#PBF LT4356CS-2#TRPBF LT4356S-2 16-Lead Plastic SO 0°C to 70°C LT4356IS-2#PBF LT4356IS-2#TRPBF LT4356S-2 16-Lead Plastic SO –40°C to 85°C LT4356HS-2#PBF LT4356HS-2#TRPBF LT4356S-2 16-Lead Plastic SO –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4356CDE-1 LT4356CDE-1#TR 43561 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-1 LT4356IDE-1#TR 43561 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-1 LT4356HDE-1#TR 43561 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4356CDE-2 LT4356CDE-2#TR 43562 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C LT4356IDE-2 LT4356IDE-2#TR 43562 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C LT4356HDE-2 LT4356HDE-2#TR 43562 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT4356CMS-1 LT4356CMS-1#TR LTCNS 10-Lead Plastic MSOP 0°C to 70°C LT4356IMS-1 LT4356IMS-1#TR LTCNS 10-Lead Plastic MSOP –40°C to 85°C LT4356HMS-1 LT4356HMS-1#TR LTCNS 10-Lead Plastic MSOP –40°C to 125°C LT4356CS-1 LT4356CS-1#TR LT4356S-1 16-Lead Plastic SO 0°C to 70°C LT4356IS-1 LT4356CS-1#TR LT4356S-1 16-Lead Plastic SO –40°C to 85°C LT4356HS-1 LT4356HS-1#TR LT4356S-1 16-Lead Plastic SO –40°C to 125°C LT4356CS-2 LT4356CS-2#TR LT4356S-2 16-Lead Plastic SO 0°C to 70°C LT4356IS-2 LT4356IS-2#TR LT4356S-2 16-Lead Plastic SO –40°C to 85°C LT4356HS-2 LT4356HS-2#TR LT4356S-2 16-Lead Plastic SO –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 4356fb 3 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 electricAl chArActeristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage Range l 4 80 V CC I V Supply Current V = Float l 1 1.5 mA CC CC SHDN V = 0V, IN+ = 1.3V, LT4356-1 7 25 µA SHDN LT4356I-1, LT4356C-1 l 7 30 µA LT4356H-1 l 7 40 µA V = 0V, IN+ = 1.3V, LT4356-2 60 70 µA SHDN LT4356I-2, LT4356C-2 l 60 100 µA LT4356H-2 l 60 250 µA I Reverse Input Current V = V = –30V, SHDN Open l 0.3 1 mA R SNS CC V = V = V = –30V l 0.8 2 mA SNS CC SHDN ΔVGATE GATE Pin Output High Voltage VCC = 4V; (VGATE – VOUT) l 4.5 8 V 80V ≥ V ≥ 8V; (V – V ) l 10 16 V CC GATE OUT I GATE Pin Pull-Up Current V = 12V; V = 12V l –4 –23 –36 µA GATE(UP) GATE CC V = 48V; V = 48V l –4.5 –30 –50 µA GATE CC I GATE Pin Pull-Down Current Overvoltage, V = 1.4V, V = 12V l 75 150 mA GATE(DN) FB GATE Overcurrent, V – V = 120mV, V = 12V l 5 10 mA CC SNS GATE Shutdown Mode, V = 0V, V = 12V l 1.5 5 mA SHDN GATE V FB Pin Servo Voltage V = 12V; V = 12V, LT4356I, LT4356C l 1.225 1.25 1.275 V FB GATE OUT V = 12V; V = 12V, LT4356H l 1.215 1.25 1.275 V GATE OUT I FB Pin Input Current V = 1.25V l 0.3 1 µA FB FB ΔVSNS Overcurrent Fault Threshold ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356I, LT4356C l 45 50 55 mV ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356H l 42.5 50 55 mV ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356I, LT4356C l 46 51 56 mV ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356H l 43 51 56 mV I SNS Pin Input Current V = V = 12V to 48V l 5 10 22 µA SNS SNS CC I FLT, EN Pins Leakage Current FLT, EN = 80V l 2.5 µA LEAK A Pin Leakage Current A = 80V 4.5 µA OUT OUT I TMR Pin Pull-up Current V = 1V, V = 1.5V, (V – V ) = 0.5V l –1.5 –2.5 –4 µA TMR TMR FB CC OUT V = 1V, V = 1.5V, (V – V ) = 75V l –44 –50 –56 µA TMR FB CC OUT V = 1.3V, V = 1.5V l –3.5 –5.5 –8.5 µA TMR FB VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V l –2.5 –4.5 –6.5 µA VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V l –195 –260 –315 µA TMR Pin Pull-down Current VTMR = 1V, VFB = 1V, ΔVSNS = 0V l 1.5 2.2 2.7 µA V TMR Pin Thresholds FLT From High to Low, V = 5V to 80V l 1.22 1.25 1.28 V TMR CC V From Low to High, V = 5V to 80V l 0.48 0.5 0.52 V GATE CC ΔVTMR Early Warning Period From FLT going Low to GATE going Low, VCC = 5V to 80V l 80 100 120 mV V + IN+ Pin Threshold l 1.22 1.25 1.28 V IN I + IN+ Pin Input Current V + = 1.25V l 0.3 1 µA IN IN I OUT Pin Input Current V = V = 12V l 200 300 µA OUT OUT CC V = V = 12V, V = 0V l 6 14 mA OUT CC SHDN ΔVOUT OUT Pin High Threshold ΔVOUT = VCC – VOUT; EN From Low to High l 0.25 0.5 0.7 V V SHDN Pin Threshold V = 12V to 48V 0.6 1.4 1.7 V SHDN CC l 0.4 2.1 V V FLT, EN Pins Output Low I = 2mA l 2 8 V OL SINK I = 0.1mA l 300 800 mV SINK A Pin Output Low I = 2mA l 2 8 V OUT SINK I = 0.1mA l 200 400 mV SINK 4356fb 4 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 electricAl chArActeristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. V = 12V unless otherwise noted. A CC SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V SHDN Pin Float Voltage V = 12V to 48V l 0.6 1.2 2.1 V SHDN(FLT) CC I SHDN Pin Current V = 0V l –1 –4 –8 µA SHDN SHDN tOFF(OC) Overcurrent Turn Off Delay Time GATE From High to Low, ΔVSNS = 0 → 120mV l 2 4 µs tOFF(OV) Overvoltage Turn Off Delay Time GATE From High to Low, VFB = 0 → 1.5V l 0.25 1 µs Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: An internal clamp limits the GATE pin to a minimum of 10V above may cause permanent damage to the device. Exposure to any Absolute the OUT pin. Driving this pin to voltages beyond the clamp may damage Maximum Rating condition for extended periods may affect device the device. reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. typicAl perForMAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A ICC vs VCC ICC (Shutdown) vs VCC ICC (Shutdown) vs VCC 1000 60 120 LT4356-1 LT4356-2 IN+ = 1.3V 50 100 800 40 80 600 A) A) A) (µC (µC 30 (µC 60 C C C I 400 I I 20 40 200 10 20 0 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 VCC (V) VCC (V) VCC (V) 4356 G02 4356 G01 4356 G20 ICC (Shutdown) vs Temperature ICC (Shutdown) vs Temperature 35 300 LT4356-1 LT4356-2 30 250 25 200 A) 20 A) (µC (µC150 IC 15 IC 100 10 50 5 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) 4356 G03 4356 G21 4356fb 5 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl perForMAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A GATE Pull-Up Current vs SHDN Current vs Temperature GATE Pull-Up Current vs V Temperature CC 6 40 35 VSHDN = 0V VGATE = VOUT = 12V 5 35 30 30 25 4 25 I (µA)SHDN 3 I (µA)GATE 2105 I (µA)GATE 1250 2 10 10 1 5 5 0 0 0 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) VCC (V) TEMPERATURE (°C) 4356 G04 4356 G05 4356 G06 GATE Pull-Down Current vs GATE Pull-Down Current vs Temperature Temperature ΔVGATE vs IGATE 220 12 14 OVERVOLTAGE CONDITION OVERCURRENT CONDITION VOUT = 12V VFB = 1.5V ∆VSNS = 120mV 200 10 12 10 A)180 A) 8 m m (OWN)160 (OWN) 6 (V)ATE 8 GATE(D140 GATE(D 4 ∆VG 6 I I 4 120 2 2 100 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 TEMPERATURE (°C) TEMPERATURE (°C) IGATE (µA) 4356 G07 4356 G08 4356 G09 Overvoltage TMR Current vs ΔV vs Temperature ΔV vs V (V – V ) GATE GATE CC CC OUT 14 16 48 12 IGATE = –1µA VCC = 8V 14 TA = 130°C 40 OVVOTVMUETRR V== O 51LVVTAGE CONDITION 10 12 TA = –45°C 32 (V)GATE 8 (V)GATE180 TA = 25°C (µA)MR 24 ∆V 6 ∆V 6 IT VCC = 4V 16 4 4 8 2 2 IGATE = –1µA VOUT = VCC 0 0 0 –50 –25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) VCC (V) VCC – VOUT (V) 4356 G10 4356 G11 4356 G12 4356fb 6 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl perForMAnce chArActeristics Specifications are at V = 12V, T = 25°C unless otherwise noted. CC A Overcurrent TMR Current vs Warning Period TMR Pull-Down Current vs (V – V ) TMR Current vs V Temperature CC OUT CC 280 14 3.0 OVERCURRENT CONDITION OVERVOLTAGE, EARLY VTMR = 1V VOUT = 0V WARNING PERIOD 240 VTMR = 1V 12 VFB = 1.5V 2.5 VTMR = 1.3V 200 10 2.0 A) 160 A) 8 A) (µR (µR (µR1.5 ITM120 ITM 6 ITM 1.0 80 4 0.5 40 2 0 0 0 0 10 20 30 40 50 60 70 80 0 10 20 30 40 50 60 70 80 –50 –25 0 25 50 75 100 125 VCC – VOUT (V) VCC (V) TEMPERATURE (°C) 4356 G13 4356 G14 4356 G15 Overvoltage Turn-Off Time vs Output Low Voltage vs Current Temperature 4.0 500 OVERVOLTAGE CONDITION 3.5 VFB = 1.5V AOUT 400 3.0 2.5 300 V (V)OL 2.0 FLT EN (ns)OFF t200 1.5 1.0 100 0.5 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 –50 –25 0 25 50 75 100 125 CURRENT (mA) TEMPERATURE (°C) 4356 G16 4356 G17 Overcurrent Turn-Off Time vs Reverse Current vs Reverse Temperature Voltage 4.0 –20 OVERCURRENT CONDITION VCC = SNS ∆VSNS = 120mV 3.5 –15 3.0 s) A) µ m (OFF 2.5 (CC–10 t I 2.0 –5 1.5 1.0 0 –50 –25 0 25 50 75 100 125 0 –20 –40 –60 –80 TEMPERATURE (°C) VCC (V) 4356 G18 4356 G19 4356fb 7 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 pin Functions A (DFN and SO Packages Only): Amplifier Output. OUT: Output Voltage Sense Input. This pin senses the OUT Open collector output of the auxiliary amplifier. It is capable voltage at the source of the N-channel MOSFET and sets of sinking up to 2mA from 80V. The negative input of the the fault timer current. When the OUT pin voltage reaches amplifier is internally connected to a 1.25V reference. 0.7V away from V , the EN pin goes high impedance. CC EN: Open-Collector Enable Output. The EN pin goes high SHDN: Shutdown Control Input. The LT4356 can be shut impedance when the voltage at the OUT pin is above (V down to a low current mode by pulling the SHDN pin below CC – 0.7V), indicating the external MOSFET is fully on. The 0.4V. Pull this pin above 2.1V or disconnect it and allow state of the pin is latched until the OUT pin voltage resets the internal current source to turn the part back on. The at below 0.5V and goes back up above 2V. The internal leakage current to ground at the pin should be limited to NPN is capable of sinking up to 3mA of current from 80V no more than 1µA if no pull up device is used to turn the to drive an LED or opto-coupler. part on. The SHDN pin can be pulled up to 100V or below GND by 60V without damage. In shutdown, the auxiliary Exposed Pad (DFN Package Only): Exposed pad may be amplifier turns off in the LT4356-1 but continues operating left open or connected to device ground (GND). in the LT4356-2. FB: Voltage Regulator Feedback Input. Connect this pin SNS: Current Sense Input. Connect this pin to the output of to the center tap of the output resistive divider connected the current sense resistor. The current limit circuit controls between the OUT pin and ground. During an overvoltage the GATE pin to limit the sense voltage between V and condition, the GATE pin is servoed to maintain a 1.25V CC SNS pins to 50mV. At the same time the sense amplifier threshold at the FB pin. This pin is clamped internally to also starts a current source to charge up the TMR pin. 7V. Tie to GND to disable the OV clamp. This pin can be pulled below GND by up to 60V, though FLT: Open-Collector Fault Output. This pin pulls low the voltage difference with the V pin must be limited to CC after the voltage at the TMR pin has reached the fault less than 30V. Connect to V if unused. CC threshold of 1.25V. It indicates the pass transistor is TMR: Fault Timer Input. Connect a capacitor between this about to turn off because either the supply voltage has pin and ground to set the times for early warning, fault stayed at an elevated level for an extended period of and cool down periods. The current charging up this pin time (voltage fault) or the device is in an overcurrent during fault conditions depends on the voltage difference condition (current fault). The internal NPN is capable of between the V and OUT pins. When V reaches 1.25V, sinking up to 3mA of current from 80V to drive an LED or CC TMR the FLT pin pulls low to indicate the detection of a fault opto-coupler. condition. If the condition persists, the pass transistor turns GATE: N-Channel MOSFET Gate Drive Output. The GATE pin off when V reaches the threshold of 1.35V. As soon as TMR is pulled up by an internal charge pump current source and the fault condition disappears, the pull up current stops clamped to 14V above the OUT pin. Both voltage and cur- and a 2µA current starts to pull the TMR pin down. When rent amplifiers control the GATE pin to regulate the output V reaches the retry threshold of 0.5V, the GATE pin pulls TMR voltage and limit the current through the MOSFET. high turning back on the pass transistor. A minimum of 10nF capacitor is needed to compensate the loop. A 10V GND: Device Ground. rated X7R capacitor is recommended for C . TMR IN+ (DFN and SO Packages Only): Positive Input of the V : Positive Supply Voltage Input. The positive supply Auxiliary Amplifier. This amplifier can be used as a level CC input ranges from 4V to 80V for normal operation. It detection comparator with external hysteresis or linear can also be pulled below ground potential by up to 60V regulator controlling an external PNP transistor. This pin is during a reverse battery condition, without damaging the clamped internally to 7V. Connect to ground if unused. part. The supply current is reduced to 7µA with all the functional blocks off. 4356fb 8 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 block DiAgrAM VCC SNS GATE OUT + 14V 50mV – CHARGE PUMP FB + – + VA IA – 1.25V SHDN FLT AOUT OC OUT OV – 1.25V SHDN AUXILIARY CONTROL EN AMPLIFIER LOGIC + RESTART GATEOFF FLT IN+ 1.35V – VCC + 0.5V + ITMR – + 2µA 1.25V – TMR GND 4356 BD 4356fb 9 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 operAtion Some power systems must cope with high voltage surges The potential at the TMR pin starts decreasing as soon as of short duration such as those in automobiles. Load the overvoltage condition disappears. When the voltage circuitry must be protected from these transients, yet at the TMR pin reaches 0.5V the GATE pin begins rising, high availability systems must continue operating during turning on the MOSFET. The FLT pin will then go to a high these events. impedance state. The LT4356 is an overvoltage protection regulator that The fault timer allows the load to continue functioning drives an external N-channel MOSFET as the pass transis- during short transient events while protecting the MOSFET tor. It operates from a wide supply voltage range of 4V to from being damaged by a long period of supply overvolt- 80V. It can also be pulled below ground potential by up age, such as a load dump in automobiles. The timer period to 60V without damage. The low power supply require- varies with the voltage across the MOSFET. A higher voltage ment of 4V allows it to operate even during cold cranking corresponds to a shorter fault timer period, ensuring the conditions in automotive applications. The internal charge MOSFET operates within its safe operating area (SOA). pump turns on the N-channel MOSFET to supply current The LT4356 senses an overcurrent condition by monitor- to the loads with very little power loss. Two MOSFETs can ing the voltage across an optional sense resistor placed be connected back to back to replace an inline Schottky between the V and SNS pins. An active current limit CC diode for reverse input protection. This improves the ef- circuit (IA) controls the GATE pin to limit the sense volt- ficiency and increases the available supply voltage level age to 50mV. A current is also generated to start charging to the load circuitry during cold crank. up the TMR pin. This current is about 5 times the current Normally, the pass transistor is fully on, powering the generated during an overvoltage event. The FLT pin pulls loads with very little voltage drop. When the supply volt- low when the voltage at the TMR pin reaches 1.25V and age surges too high, the voltage amplifier (VA) controls the MOSFET is turned off when it reaches 1.35V. the gate of the MOSFET and regulates the voltage at the An auxiliary amplifier is provided with the negative input source pin to a level that is set by the external resistive connected to an internal 1.25V reference. The output pull divider from the OUT pin to ground and the internal 1.25V down device is capable of sinking up to 2mA of current reference. A current source starts charging up the capaci- allowing it to drive an LED or opto coupler. This amplifier tor connected at the TMR pin to ground. If the voltage at can be configured as a linear regulator controller driving the TMR pin, V , reaches 1.25V, the FLT pin pulls low TMR an external PNP transistor or a comparator function to to indicate impending turn-off due to the overvoltage monitor voltages. condition. The pass transistor stays on until the TMR pin reaches 1.35V, at which point the GATE pin pulls low A shutdown pin turns off the pass transistor and reduces turning off the MOSFET. the supply current to less than 7µA for the LT4356-1. The supply current drops down to 60µA while keeping the internal reference and the auxiliary amplifier active for the LT4356-2 version during shutdown. 4356fb 10 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion The LT4356 can limit the voltage and current to the load Overcurrent Fault circuitry during supply transients or overcurrent events. The LT4356 features an adjustable current limit that The total fault timer period should be set to ride through protects against short circuits or excessive load current. short overvoltage transients while not causing damage During an overcurrent event, the GATE pin is regulated to to the pass transistor. The selection of this N-channel limit the current sense voltage across the V and SNS CC MOSFET pass transistor is critical for this application. pins to 50mV. It must stay on and provide a low impedance path from An overcurrent fault occurs when the current limit circuitry the input supply to the load during normal operation and has been engaged for longer than the time-out delay set then dissipate power during overvoltage or overcurrent by the timer capacitor. The GATE pin is then immediately conditions. pulled low by a 10mA current to GND turning off the The following sections describe the overcurrent and the MOSFET. After the fault condition has disappeared and a overvoltage faults, and the selection of the timer capacitor cool down period has transpired, the GATE pin is allowed value based on the required warning time. The selection to pull back up and turn on the pass transistor. of the N-channel MOSFET pass transistor is discussed next. Auxiliary amplifier, reverse input, and the shutdown Fault Timer functions are covered after the MOSFET selection. External The LT4356 includes an adjustable fault timer pin. Con- component selection is discussed in detail in the Design necting a capacitor from the TMR pin to ground sets the Example section. delay timer period before the MOSFET is turned off. The same capacitor also sets the cool down period before the Overvoltage Fault MOSFET is allowed to turn back on after the fault condition The LTC4356 limits the voltage at the OUT pin during an has disappeared. overvoltage situation. An internal voltage amplifier regu- Once a fault condition, either overvoltage or overcurrent, lates the GATE pin voltage to maintain a 1.25V threshold at is detected, a current source charges up the TMR pin. The the FB pin. During this period of time, the power MOSFET current level varies depending on the voltage drop across is still on and continues to supply current to the load. This the drain and source terminals of the power MOSFET(V ), allows uninterrupted operation during short overvoltage DS which is typically from the V pin to the OUT pin. This transient events. CC scheme takes better advantage of the available Safe When the voltage regulation loop is engaged for longer Operating Area (SOA) of the MOSFET than would a fixed than the time-out period, set by the timer capacitor con- timer current. The timer function operates down to V = CC nected from the TMR pin to ground, an overvoltage fault is 5V across the whole temperature range. detected. The GATE pin is pulled down to the OUT pin by a 150mA current. After the fault condition has disappeared and a cool down period has transpired, the GATE pin starts to pull high again. This prevents the power MOSFET from being damaged during a long period of overvoltage, such as during load dump in automobiles. 4356fb 11 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion Fault Timer Current When the voltage at the TMR pin, V , reaches the 1.25V TMR threshold, the FLT pin pulls low to indicate the detection The timer current starts at around 2µA with 0.5V or less of a fault condition and provide warning to the load of of V , increasing linearly to 50µA with 75V of V dur- DS DS the impending power loss. In the case of an overvoltage ing an overvoltage fault (Figure 1). During an overcurrent fault, the timer current then switches to a fixed 5µA. The fault, it starts at 4µA with 0.5V or less of V but increases DS interval between FLT asserting low and the MOSFET turn- to 260µA with 80V across the MOSFET (Figure 2). This ing off is given by: arrangement allows the pass transistor to turn off faster during an overcurrent event, since more power is dissipated C • 100mV t = TMR during this condition. Refer to the Typical Performance WARNING 5µA Characteristics section for the timer current at different V in both overvoltage and overcurrent events. DS VTMR(V) ITMR = 5µA ITMR = 5µA 1.35 1.25 VDS = 75V (ITMR = 50µA) VDS = 10V (ITMR = 8µA) 0.50 TIME tFLT tWARNING = 15ms/µF = 20ms/µF tFLT = 93.75ms/µF tWARNING = 20ms/µF TOTAL FAULT TIMER = tFLT + tWARNING 4356 F01 Figure 1. Overvoltage Fault Timer Current VTMR(V) 1.35 1.25 VDS = 80V (ITMR = 260µA) VDS = 10V (ITMR = 35µA) 0.50 TIME tWARNING tFLT = 0.38ms/µF = 2.88ms/µF tFLT = 21.43ms/µF tWARNING TOTAL FAULT TIMER = tFLT + tWARNING = 2.86ms/µF 4356 F02 Figure 2. Overcurrent Fault Timer Current 4356fb 12 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion This fixed early warning period allows the systems to per- voltage N-channel MOSFETs. For systems with V less CC form necessary backup or house-keeping functions before than 8V, a logic level MOSFET is required since the gate the power supply is cut off. After V crosses the 1.35V drive can be as low as 4.5V. TMR threshold, the pass transistor turns off immediately. Note The SOA of the MOSFET must encompass all fault condi- that during an overcurrent event, the timer current is not tions. In normal operation the pass transistor is fully on, reduced to 5µA after V has reached 1.25V threshold, TMR dissipating very little power. But during either overvoltage since it would lengthen the overall fault timer period and or overcurrent faults, the GATE pin is servoed to regu- cause more stress on the power MOSFET. late either the output voltage or the current through the As soon as the fault condition has disappeared, a 2µA MOSFET. Large current and high voltage drop across the current starts to discharge the timer capacitor to ground. MOSFET can coexist in these cases. The SOA curves of When V reaches the 0.5V threshold, the internal charge the MOSFET must be considered carefully along with the TMR pump starts to pull the GATE pin high, turning on the selection of the fault timer capacitor. MOSFET. The TMR pin is then actively regulated to 0.5V until the next fault condition appears. The total cool down Transient Stress in the MOSFET timer period is given by: During an overvoltage event, the LT4356 drives a series C • 0.85V pass MOSFET to regulate the output voltage at an acceptable t = TMR COOL level. The load circuitry may continue operating throughout 2µA this interval, but only at the expense of dissipation in the MOSFET pass device. MOSFET dissipation or stress is a MOSFET Selection function of the input voltage waveform, regulation voltage The LT4356 drives an N-channel MOSFET to conduct the and load current. The MOSFET must be sized to survive load current. The important features of the MOSFET are this stress. on-resistance R , the maximum drain-source voltage DS(ON) Most transient event specifications use the model shown V , the threshold voltage, and the SOA. (BR)DSS in Figure 3. The idealized waveform comprises a linear The maximum allowable drain-source voltage must be ramp of rise time t , reaching a peak voltage of V and r PK higher than the supply voltage. If the output is shorted exponentially decaying back to V with a time constant IN to ground or during an overvoltage event, the full supply of t. A common automotive transient specification has voltage will appear across the MOSFET. constants of t = 10µs, V = 80V and t = 1ms. A surge r PK condition known as “load dump” has constants of t = The gate drive for the MOSFET is guaranteed to be more r than 10V and less than 16V for those applications with VCC 5ms, VPK = 60V and t = 200ms. higher than 8V. This allows the use of standard threshold VPK τ VIN tr 4356 F03 Figure 3. Prototypical Transient Waveform 4356fb 13 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion MOSFET stress is the result of power dissipated within VPK the device. For long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is τ a matter of device packaging and mounting, and heatsink thermal mass. This is analyzed by simulation, using the VREG MOSFET thermal model. VIN tr For short duration transients of less than 100ms, MOSFET 4356 F04 survival is increasingly a matter of safe operating area Figure 4. Safe Operating Area Required to Survive Prototypical (SOA), an intrinsic property of the MOSFET. SOA quanti- Transient Waveform fies the time required at any given condition of V and DS ID to raise the junction temperature of the MOSFET to its Typically VREG ≈ VIN and t >> tr simplifying the above to rated maximum. MOSFET SOA is expressed in units of watt-squared-seconds (P2t). This figure is essentially con- P2t = 1 I 2(V –V )2t (W2s) LOAD PK REG stant for intervals of less than 100ms for any given device 2 type, and rises to infinity under DC operating conditions. For the transient conditions of V = 80V, V = 12V, V PK IN REG Destruction mechanisms other than bulk die temperature = 16V, t = 10µs and t = 1ms, and a load current of 3A, r distort the lines of an accurately drawn SOA graph so that P2t is 18.4W2s—easily handled by a MOSFET in a D-pak P2t is not the same for all combinations of ID and VDS. package. The P2t of other transient waveshapes is evaluated In particular P2t tends to degrade as V approaches the DS by integrating the square of MOSFET power versus time. maximum rating, rendering some devices useless for absorbing energy above a certain voltage. Calculating Short-Circuit Stress Calculating Transient Stress SOA stress must also be calculated for short-circuit condi- tions. Short-circuit P2t is given by: To select a MOSFET suitable for any given application, the SOA stress must be calculated for each input transient P2t = (VIN • ΔVSNS/RSNS)2 • tTMR (W2s) which shall not interrupt operation. It is then a simple matter where, ΔV is the SENSE pin threshold, and t is the SNS TMR to chose a device which has adequate SOA to survive the overcurrent timer interval. maximum calculated stress. P2t for a prototypical transient For V = 14.7V, V = 50mV, R = 12mΩ and C waveform is calculated as follows (Figure 4). IN SNS SNS TMR = 100nF, P2t is 6.6W2s—less than the transient SOA Let calculated in the previous example. Nevertheless, to a = V – V account for circuit tolerances this figure should be doubled REG IN b = V – V to 13.2W2s. PK IN (V = Nominal Input Voltage) IN Limiting Inrush Current and GATE Pin Compensation Then The LT4356 limits the inrush current to any load capacitance P2t = ILOAD231tr(b−ba)3 +21t2a2lnba+3a2+b2−4ab bcayp caocnittoror lclianng bthee c GonAnTeEc pteind vfrooltmag GeA sTleEw to r agtreo. uAnnd e txot esrlnoawl   down the inrush current further at the expense of slower turn-off time. The gate capacitor is set at: I GATE(UP) C1= •C L I INRUSH 4356fb 14 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion The LTC4356 does not need extra compensation compo- RLIM 2N2905A OR nents at the GATE pin for stability during an overvoltage or *4.7Ω BCP53 2.5V OUTPUT INPUT ≈ 150mA MAX overcurrent event. With transient input voltage step faster 10µF than 5V/µs, a gate capacitor, C1, to ground is needed to R6 * OPTIONAL FOR prevent self enhancement of the N-channel MOSFET. 100k D1* CURRENT LIMIT BAV99 R4+R5 The extra gate capacitance slows down the turn off time 11 VOUT=1.25 R5 R4 dduurriinngg afnau olut tcpount dsihtioornt se vaenndt. mAna ye xatlrlao rwe seixsctoers, sRi1ve, i nc usrerreienst LT4356S AOIUNT+ 12 249k 47nF ILIM≈R0L.I7M with the gate capacitor can improve the turn off time. A 4356 F06 R5 249k diode, D1, should be placed across R1 with the cathode connected to C1 as shown in Figure 5. Figure 6. Auxiliary LDO Output with Optional Current Limit Q1 Reverse Input Protection D1 A blocking diode is commonly employed when reverse IN4148W input potential is possible, such as in automotive applica- R3 tions. This diode causes extra power loss, generates heat, R1 and reduces the available supply voltage range. During C1 GATE cold crank, the extra voltage drop across the diode is particularly undesirable. LT4356S The LT4356 is designed to withstand reverse voltage 4356 F05 without damage to itself or the load. The V , SNS, and CC Figure 5 SHDN pins can withstand up to 60V of DC voltage below Auxiliary Amplifier the GND potential. Back-to-back MOSFETs must be used to eliminate the current path through their body diodes An uncommitted amplifier is included in the LT4356 to (Figure 7). Figure 8 shows the approach with a P-Channel provide flexibility in the system design. With the negative MOSFET in place of Q2. input connected internally to the 1.25V reference, the am- plifier can be connected as a level detect comparator with VIN 1R0SmNΩS IRLRQ22908 IRLRQ21908 VOUT external hysteresis. The open collector output pin, A , 12V 12V, 3A OUT D2* CLAMPED is capable of driving an opto or LED. It can also interface SMAJ58CA Q3 R4 R5 R3 AT 16V 2N3904 10Ω 1M 10Ω with the system via a pull-up resistor to a supply voltage R1 up to 80V. Another use is to implement undervoltage 59k D1 R7 lockout, as shown in the typical application “Overvoltage 1N4148 10k Regulator with Undervoltage Lockout.” In shutdown, the 5 4 3 SNS GATE OUT auxiliary amplifier turns off in the LT4356-1 but continues 6 2 VCC FB operating in the LT4356-2. R2 4.99k The amplifier can also be configured as a low dropout LT4356S linear regulator controller. With an external PNP transistor, 7 SHDN such as 2N2905A, it can supply up to 100mA of current 11 AOUT FLT 8 with only a few hundred mV of dropout voltage. Current 12 IN+ GND TMR EN 9 limit can be easily included by adding two diodes and one *DIODES INC. 10 1 C0.T1MµRF 4356 F07 resistor (Figure 6). Figure 7. Overvoltage Regulator with N-channel MOSFET Reverse Input Protection 4356fb 15 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion RSNS Q2 Q1 VIN 10mΩ Si4435 IRLR2908 VOUT 12V D1 12V, 3A D2* 1N5245 CLAMPED SMAJ58CA 15V AT 16V R3 R6 10Ω R1 10k 59k 5 4 3 SNS GATE OUT 6 2 VCC FB R2 4.99k LT4356S 7 SHDN 11 8 AOUT FLT 12 IN+ EN 9 GND TMR 10 1 4356 F08 CTMR *DIODES INC. 0.1µF Figure 8. Overvoltage Regulator with P-Channel MOSFET Reverse Input Protection Shutdown The LT4356 can be shut down to a low current mode when A total bulk capacitance of at least 22µF low ESR electro- the voltage at the SHDN pin goes below the shutdown lytic is required close to the source pin of MOSFET Q1. In threshold of 0.6V. The quiescent current drops to 7µA for addition, the bulk capacitance should be at least 10 times the LT4356-1 and 60µA for the LT4356-2 which leaves the larger than the total ceramic bypassing capacitor on the auxiliary amplifier on. input of the DC/DC converter. The SHDN pin can be pulled up to V or below GND by CC RSNS Q1 up to 60V without damaging the pin. Leaving the pin open 10mΩ IRLR2908 VIN allows an internal current source to pull it up and turn D2 CL* on the part while clamping the pin to 2.5V. The leakage SMAJ58A 22µF current at the pin should be limited to no more than 1µA R3 R1 10Ω 59k if no pull up device is used to help turn it on. 5 4 3 6 SNS GATE OUT Supply Transient Protection VCC 2 FB 38R34k 7 SHDN R2 VCC The LT4356 is guaranteed to be safe from damage with supply voltages up to 100V. Nevertheless, voltage tran- 12 IN+ LT4356S 4.99k CONDVCE-DRCTER R5 sients above 100V may cause permanent damage. During 100k 9 EN SHDN GND a short-circuit condition, the large change in current flowing 11 8 through power supply traces and associated wiring can UNDERVOLTAGE AOUT GND TMR FLT FAULT 10 1 4356 F09 cause inductive voltage transients which could exceed *SANYO 25CE22GA CTMR 100V. To minimize the voltage transients, the power trace 47nF parasitic inductance should be minimized by using wide Figure 9. Overvoltage Regulator with Low-Battery Detection traces. A small surge suppressor, D2, in Figure 9, at the input will clamp the voltage spikes. 4356fb 16 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 ApplicAtions inForMAtion Layout Considerations Next calculate the sense resistor, R , value: SNS To achieve accurate current sensing, Kelvin connection 50mV 50mV R = = = 10mΩ to the current sense resistor (R in Figure 9) is recom- SNS SNS I 5A LIM mended. The minimum trace width for 1oz copper foil is 0.02" per amp to ensure the trace stays at a reasonable C is then chosen for 1ms of early warning time: TMR temperature. 0.03" per amp or wider is recommended. 1ms • 5µA Note that 1oz copper exhibits a sheet resistance of about C = = 50nF TMR 530µΩ/square. Small resistances can cause large errors in 100mV high current applications. Noise immunity will be improved The closest standard value for C is 47nF. significantly by locating resistive dividers close to the pins TMR with short V and GND traces. Finally, calculate R4 and R5 for the 6V low battery threshold CC detection: Design Example 1.25V • (R4 + R5) As a design example, take an application with the follow- 6V = R5 ing specifications: V = 8V to 14V DC with transient up CC to 80V, VOUT ≤ 16V, current limit (ILIM) at 5A, low battery Choose 100k for R5. detection at 6V, and 1ms of overvoltage early warning (6V – 1.25V) • R5 (Figure 9). R4 = = 380k 1.25V First, calculate the resistive divider value to limit V to OUT 16V during an overvoltage event: Select 383k for R4. 1.25V • (R1 + R2) The pass transistor, Q1, should be chosen to withstand V = =16V REG R2 the output short condition with VCC = 14V. The total overcurrent fault time is: Set the current through R1 and R2 during the overvoltage condition to 250µA. 47nF • 0.85V t = = 0.878ms OC 1.25V 45.5µA R2 = = 5k 250µA The power dissipation on Q1 equals to: Choose 4.99k for R2. 14V • 50mV P = = 70W (16V – 1.25V) • R2 10mΩ R1 = = 58.88k 1.25V These conditions are well within the Safe Operating Area of IRLR2908. The closest standard value for R1 is 59k. 4356fb 17 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl ApplicAtions Wide Input Range 5V to 28V Hot Swap with Undervoltage Lockout RSNS Q1 20mΩ SUD50N03-10 VIN VOUT 100µF R6 R3 118k 10Ω C1 47nF VCC SNS GATE OUT SHDN FB AOUT IN+ LT4356DE-1 R7 49.9k FLT EN GND TMR 4356 TA02 CTMR 1µF 24V Overvoltage Regulator Withstands 150V at V IN Q1 VIN IRF640 VOUT 24V CLAMPED AT 32V R9 1k R3 1W 10Ω R1 5 4 3 118k SNS GATE OUT 6 2 VCC FB D2* R2 SMAT70A 4.99k 7 LT4356DE SHDN 8 FLT 9 EN GND TMR 10 1 4356 TA03 *DIODES INC. CTMR 0.1µF 4356fb 18 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl ApplicAtions Overvoltage Regulator with Undervoltage Lockout RSNS Q1 20mΩ IRLR2908 VIN VCOLAUTMPED AT 16V D2* SMAJ58A R2860k R1M4 R3 R1 10Ω 59k VCC SNS GATE OUT R5 SHDN FB 1M AOUT R2 4.99k UV RISING = 5.04V IN+ LT4356DE-2 R7 100k FLT EN *DIODES INC. GND TMR 4356 TA04 CTMR 0.1µF Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown 1k 0.5W RSNS Q1 VIN 10mΩ IRLR2908 1V2OVU,T 4A 12V CLAMPED AT 16V D2* SMAJ58A R3 10Ω D1 Q2 1N4746A R4 VN2222 18V 402k 5 4 3 R1 1W SNS GATE OUT 294k 6 VCC FB 2 R2 VDD 24.9k R6 LT4356DE 47k 12 IN+ AOUT 11 LBO R5 7 8 105k SHDN FLT 9 EN GND TMR *DIODES INC. 10 1 4356 TA05 CTMR 0.1µF 4356fb 19 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl ApplicAtions 2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V RSNS Q1 VIN 15mΩ FDB3632 VOUT 48V 48V R4 R6 2.5A D2* SMAT70A R3 140k 100k 10Ω CL 300µF C1 6.8nF D1 6 5 4 3 1N4714 VCC SNS GATE OUT R7 BV = 33V7 IN+ 12 1M SHDN R5 R8 4.02k R1 47k 226k LT4356DE 2 FB R2 8 4.02k FLT 9 11 EN AOUT PWRGD GND TMR *DIODES INC. 10 1 4356 TA06 CTMR 0.1µF 2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V RSNS Q1 VIN 15mΩ FDB3632 VOUT 28V 28V R4 R6 2.5A D2* SMAT70A R3 113k 27k 10Ω CL 300µF C1 6.8nF D1 6 5 4 3 1N4700 VCC SNS GATE OUT R7 BV = 13V7 IN+ 12 1M SHDN R5 R8 4.02k R1 47k 110k LT4356DE 2 FB R2 8 4.02k FLT 9 11 EN AOUT PWRGD GND TMR *DIODES INC. 10 1 4356 TA07 CTMR 0.1µF 4356fb 20 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 typicAl ApplicAtions Overvoltage Regulator with Reverse Input Protection Up to –80V Q2 RSNS Q1 VIN IRLR2908 10mΩ IRLR2908 VOUT 12V 12V, 3A CLAMPED D2* R4 SMAJ58CA R3 AT 16V Q3 10Ω R5 10Ω 2N3904 1M 6 5 4 3 R1 D1 R7 VCC SNS GATE OUT 2 59k 1N4148 10k FB R2 D3** 4.99k IN4148 LT4356DE 7 SHDN 11 8 AOUT FLT 12 IN+ GND TMR EN 9 10 1 4356 TA08 * DIODES INC. CTMR ** OPTIONAL COMPONENT FOR 0.1µF REDUCED STANDBY CURRENT 4356fb 21 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 pAckAge Description Please refer to http://www.linear.com/product/LT4356-1#packaging for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 R = 0.115 0.40 ± 0.10 (2 SIDES) TYP 7 12 R = 0.05 TYP 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ± 0.10 PIN 1 PIN 1 NOTCH TOP MARK R = 0.20 OR (NOTE 6) 0.35 × 45° CHAMFER 6 1 (UE12/DE12) DFN 0806 REV D 0.200 REF 0.75 ±0.05 0.25 ± 0.05 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2.DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4356fb 22 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 pAckAge Description Please refer to http://www.linear.com/product/LT4356-1#packaging for the most recent package drawings. MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661 Rev F) 0.889 ±0.127 (.035 ±.005) 5.10 3.20 – 3.45 (.201) (.126 – .136) MIN 3.00 ±0.102 0.305 ±0.038 0.50 (.118 ±.004) 0.497 ±0.076 (.0120 ±.0015) (.0197) (NOTE 3) (.0196 ±.003) 10 9 8 76 TYP BSC REF RECOMMENDED SOLDER PAD LAYOUT 3.00 ±0.102 4.90 ±0.152 DETAIL “A” (.193 ±.006) (.118 ±.004) 0.254 (NOTE 4) (.010) 0° – 6° TYP GAUGE PLANE 1 2 3 4 5 0.53 ±0.152 (.021 ±.006) 1.10 0.86 (.043) (.034) DETAIL “A” MAX REF 0.18 (.007) SEATING PLANE 0.17 – 0.27 0.1016 ±0.0508 (.007 – .011) (.004 ±.002) 0.50 TYP (.0197) MSOP (MS) 0213 REV F NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 4356fb 23 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 pAckAge Description Please refer to http://www.linear.com/product/LT4356-1#packaging for the most recent package drawings. S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .386 – .394 .045 ±.005 (9.804 – 10.008) .050 BSC NOTE 3 16 15 14 13 12 11 10 9 N N .245 MIN .160 ±.005 .150 – .157 .228 – .244 (3.810 – 3.988) (5.791 – 6.197) NOTE 3 1 2 3 N/2 N/2 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 6 7 8 .010 – .020 × 45° .053 – .069 (0.254 – 0.508) (1.346 – 1.752) .004 – .010 .008 – .010 (0.101 – 0.254) (0.203 – 0.254) 0° – 8° TYP .014 – .019 .050 .016 – .050 (0.355 – 0.483) (1.270) (0.406 – 1.270) TYP BSC S16 REV G 0212 NOTE: INCHES 1. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 4356fb 24 For more information www.linear.com/LT4356-1

LT4356-1/LT4356-2 revision history (Revision history begins at Rev A) REV DATE DESCRIPTION PAGE NUMBER A 05/10 Revised Features and Description 1 Added parameters to V and updated Max value for V in the Electrical Characteristics section 4, 5 OL SHDN(FLT) Revised Pin Functions section 8 Replaced Figure 6 and made text edits in the Operation and Applications Information sections 10-17 Updated drawings in the Typical Applications section 19, 21 B 09/17 Updated TMR pin function with minimum recommended capacitance 8 4356fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 25 However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnFeoctri omn oofr iets i cnifrocurimts aatsi odnes wcrwibewd. hlienreeainr .wcioll mno/tL inTf4ri3ng5e6 o-n1 existing patent rights.

LT4356-1/LT4356-2 typicAl ApplicAtion Overvoltage Regulator with Linear Regulator Up to 100mA Q2 2N2905A 2.5V, 100mA C5 RSNS Q1 10µF VIN 10mΩ IRLR2908 VOUT 12V 12V, 3A D2* CLAMPED AT 16V SMAJ58A R3 10Ω R1 5 4 3 59k R6 SNS GATE OUT 100k 6 2 VCC FB R2 4.99k R4 C3 LT4356DE 249k 47nF 11 AOUT IN+ 12 R5 7 8 SHDN FLT 249k 9 EN GND TMR *DIODES INC. 10 1 4356 TA09 CTMR 0.1µF relAteD pArts PART NUMBER DESCRIPTION COMMENTS LT1641-1/LT1641-2 Positive High Voltage Hot Swap Controllers Active Current Limiting, Supplies From 9V to 80V LTC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 28V LTC1735 High Efficiency Synchronous Step-Down Output Fault Protection, 16-Pin SSOP Switching Regulator LTC1778 No R ™ Wide Input Range Synchronous Up to 97% Efficiency, 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ (0.9)(V ), SENSE IN OUT IN Step-Down Controller I Up to 20A OUT LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ 14V IN OUT LTC3827/LTC3827-1 Low I , Dual, Synchronous Controller 4V ≤ V ≤ 36V, 0.8V ≤ V ≤ 10V, 80µA Quiescent Current Q IN OUT LTC3835/LTC3835-1 Low I , Synchronous Step-Down Controller Single Channel LTC3827/LTC3827-1 Q LT3845 Low I , Synchronous Step-Down Controller 4V ≤ V ≤ 60V, 1.23V ≤ V ≤ 36V, 120µA Quiescent Current Q IN OUT LTC3850 Dual, 550kHz, 2-Phase Synchronous Step-Down Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm Controller QFN-28, SSOP-28 Packages LT4256-1/LT4256-2 Positive 48V Hot Swap Controller with Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to Open-Circuit Detect 80V Supply LTC4260 Positive High Voltage Hot Swap Controller with Wide Operating Range 8.5V to 80V ADC and I2C LTC4352 Ideal MOSFET ORing Diode External N-channel MOSFETs Replace ORing Diodes, 0V to 18V Operation LTC4354 Negative Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 1µs Turn-Off, 80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 0.5µs Turn-Off, 80V Operation 4356fb 26 LT 0917 REV B • PRINTED IN USA www.linear.com/LT4356-1 For more information www.linear.com/LT4356-1 © LINEAR TECHNOLOGY CORPORATION 2009

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: LT4356IDE-1#PBF LT4356CMS-1 LT4356HDE-1#TRPBF LT4356HS-1#TRPBF LT4356IS-2#TRPBF LT4356CDE- 1#PBF LT4356IDE-2#PBF LT4356CS-1#TRPBF LT4356IDE-2#TRPBF LT4356CDE-2#PBF LT4356HDE-2#PBF LT4356IS-1#TRPBF LT4356IDE-1#TRPBF LT4356HS-2 LT4356IMS-1 LT4356CDE-2#TRPBF LT4356CS-2#PBF LT4356CS-2#TRPBF LT4356CDE-2 LT4356IS-2#PBF LT4356HDE-2 LT4356IMS-1#PBF LT4356CMS-1#PBF LT4356HMS-1#TRPBF LT4356IDE-1 LT4356HS-2#TRPBF LT4356HDE-2#TRPBF LT4356HDE-1 LT4356IDE-2 LT4356CMS-1#TRPBF LT4356CDE-1 LT4356HMS-1 LT4356IMS-1#TRPBF LT4356IS-1#PBF LT4356CS-1#PBF LT4356HS-1#PBF LT4356CDE-1#TRPBF LT4356HMS-1#PBF LT4356HS-2#PBF LT4356HDE-1#PBF