LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 LP3963/LP3966 3A Fast Ultra Low Dropout Linear Regulators CheckforSamples:LP3963,LP3966 FEATURES DESCRIPTION 1 • UltraLowDropoutVoltage The LP3963/LP3966 series of fast ultra low-dropout 2 linear regulators operate from a +2.5V to +7.0V input • LowGroundPinCurrent supply. Wide range of preset output voltage options • LoadRegulationof0.06% are available. These ultra low dropout linear • 15µAQuiescentCurrentinShutdownMode regulators respond very quickly to step changes in load which makes them suitable for low voltage • SpecifiedOutputCurrentof3ADC microprocessor applications. The LP3963/LP3966 are • AvailableinDDPAK/TO-263andTO-220 developed on a CMOS process which allows low Packages quiescent current operation independent of output • OutputVoltageAccuracy±1.5% load current. This CMOS process also allows the LP3963/LP3966 to operate under extremely low • ErrorFlagIndicatesOutputStatus(LP3963) dropoutconditions. • SenseOptionImprovesLoadRegulation Dropout Voltage: Ultra low dropout voltage; typically (LP3966) 80mV at 300mA load current and 800mV at 3A load • MinimumOutputCapacitorRequirements current. • Overtemperature/OvercurrentProtection Ground Pin Current: Typically 6mA at 3A load • −40°Cto+125°CJunctionTemperatureRange current. APPLICATIONS Shutdown Mode: Typically 15µA quiescent current whentheshutdownpinispulledlow. • MicroprocessorPowerSupplies Error Flag: Error flag goes low when the output • GTL,GTL+,BTL,andSSTLBusTerminators voltagedrops10%belownominalvalue(forLP3963). • PowerSuppliesforDSPs SENSE: Sense pin improves regulation at remote • SCSITerminator loads.(ForLP3966) • PostRegulators Precision Output Voltage: Multiple output voltage • HighEfficiencyLinearRegulators options are available ranging from 1.2V to 5.0V and • BatteryChargers adjustable (LP3966), with a specified accuracy of ±1.5% at room temperature, and ±3.0% over all • OtherBatteryPoweredApplications conditions(varyingline,load,andtemperature). Typical Application Circuits *SDandERRORpinsmustbepulledhighthrougha10kΩpull-upresistor.ConnecttheERRORpintogroundifthis functionisnotused.SeeApplicationHintsformoreinformation. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com *SDandERRORpinsmustbepulledhighthrougha10kΩpull-upresistor.ConnecttheERRORpintogroundifthis functionisnotused.SeeApplicationHintsformoreinformation. Block DiagramLP3963 2 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 Block DiagramLP3966 Block DiagramLP3966-ADJ Connection Diagram Figure1.TopView Figure2.TopView TO-220-5Package DDPAK/TO-263-5Package Bent,StaggeredLeads Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com PinDescriptionsforTO-220-5andDDPAK/TO-263-5Packages LP3963 LP3966 Pin# Name Function Name Function 1 SD Shutdown SD Shutdown 2 V InputSupply V InputSupply IN IN 3 GND Ground GND Ground 4 V OutputVoltage V OutputVoltage OUT OUT 5 ERROR ERRORFlag SENSE/ADJ RemoteSensePin/Output AdjustPin Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings (1)(2) StorageTemperatureRange −65°Cto+150°C LeadTemperature(Soldering,5sec.) 260°C ESDRating (3) 2kV PowerDissipation (4) InternallyLimited InputSupplyVoltage(Survival) −0.3Vto+7.5V ShutdownInputVoltage(Survival) −0.3VtoV +0.3V IN OutputVoltage(Survival) (5) (6) −0.3Vto+7.5V I (Survival) ShortCircuitProtected OUT MaximumVoltageforERRORPin V +0.3V IN MaximumVoltageforSENSEPin V +0.3V OUT (1) Absolutemaximumratingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.Operatingratingsindicateconditionsforwhich thedeviceisintendedtobefunctional,butdoesnotspecifyperformancelimits.Forensuredspecificationsandtestconditions,see ElectricalCharacteristics.Theensuredspecificationsapplyonlyforthetestconditionslisted.Someperformancecharacteristicsmay degradewhenthedeviceisnotoperatedunderthelistedtestconditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Thehumanbodymodelisa100pFcapacitordischargedthrougha1.5kΩresistorintoeachpin. (4) Atelevatedtemperatures,devicesmustbederatedbasedonpackagethermalresistance.ThedevicesinTO-220packagemustbe deratedatθ =50°C/W(with0.5in2,1oz.copperarea),junction-to-ambient(withnoheatsink).ThedevicesintheDDPAK/TO-263 jA surface-mountpackagemustbederatedatθ =60°C/W(with0.5in2,1oz.copperarea),junction-to-ambient.SeeApplicationHints. jA (5) Ifusedinadual-supplysystemwheretheregulatorloadisreturnedtoanegativesupply,theLP396Xoutputmustbediode-clampedto ground. (6) TheoutputPMOSstructurecontainsadiodebetweentheV andV terminals.Thisdiodeisnormallyreversebiased.Thisdiodewill IN OUT getforwardbiasedifthevoltageattheoutputterminalisforcedtobehigherthanthevoltageattheinputterminal.Thisdiodecan typicallywithstand200mAofDCcurrentand1Ampofpeakcurrent. Operating Ratings InputSupplyVoltage(Operating), (1) 2.5Vto7.0V ShutdownInputVoltage(Operating) −0.3VtoV +0.3V IN MaximumOperatingCurrent(DC) 3A OperatingJunctionTemp.Range −40°Cto+125°C (1) TheminimumoperatingvalueforV isequaltoeither[V +V ]or2.5V,whicheverisgreater. IN OUT(NOM) DROPOUT 4 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 Electrical Characteristics LP3963/LP3966 LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1.5V,I =10mA,C =33µF,V =V -0.3V. IN O(NOM) L OUT SD IN Symbol Parameter Conditions Typ (1) LP3963/6 (2) Units Min Max OutputVoltageTolerance(3) V +1.5V<V <7.0V -1.5 +1.5 V OUT IN 0 % O 10mA<I <3A -3.0 +3.0 L AdjustPinVoltage(ADJversion) 10mA≤I ≤3A 1.198 1.234 V L 1.216 V ADJ V +1.5V≤V ≤7.0V 1.180 1.253 OUT IN ΔV OutputVoltageLineRegulation V +1.5V<V <7.0V 0.02 % OL OUT IN (3) 0.06 ΔV /ΔI OutputVoltageLoadRegulation 10mA<I <3A 0.06 % O OUT L (3) 0.01 V -V I =300mA 80 100 IN OUT L 120 DropoutVoltage (4) mV I =3A 800 1000 L 1200 I =300mA 5 9 L GroundPinCurrentInNormal 10 I mA GND OperationMode I =3A 6 14 L 15 I GroundPinCurrentInShutdown V ≤0.2V 15 25 µA GND SD Mode (5) 75 I PeakOutputCurrent See (6) 4.5 4 A O(PK) 3.5 SHORTCIRCUITPROTECTION I ShortCircuitCurrent 5.5 A SC OVERTEMPERATUREPROTECTION Tsh(t) ShutdownThreshold 165 °C Tsh(h) ThermalShutdownHysteresis 10 °C SHUTDOWNINPUT Output=High V V –0.3 IN IN V ShutdownThreshold V SDT Output=Low 0 0.2 T Turn-offdelay I =3A 20 µs dOFF L T Turn-ondelay I =3A 25 µs dON L I SDInputCurrent V =V 1 nA SD SD IN ERRORFLAG V Threshold See (7) 10 5 16 % T V ThresholdHysteresis See (7) 5 2 8 % TH V ErrorFlagSaturation I =100µA 0.02 0.1 V EF(Sat) sink Td FlagResetDelay 1 µs (1) Typicalnumbersareat25°Candrepresentthemostlikelyparametricnorm. (2) Limitsare100%productiontestedat25°C.Limitsovertheoperatingtemperaturerangearespecifiedthroughcorrelationusing StatisticalQualityControl(SQC)methods.ThelimitsareusedtocalculateTI'sAverageOutgoingQualityLevel(AOQL). (3) Outputvoltagelineregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeintheinputlinevoltage. Outputvoltageloadregulationisdefinedasthechangeinoutputvoltagefromthenominalvalueduetochangeinloadcurrent.Theline andloadregulationspecificationcontainsonlythetypicalnumber.However,thelimitsforlineandloadregulationareincludedinthe outputvoltagetolerancespecification. (4) Dropoutvoltageisdefinedastheminimuminputtooutputdifferentialvoltageatwhichtheoutputdrops2%belowthenominalvalue. Dropoutvoltagespecificationappliesonlytooutputvoltagesof2.5Vandabove.Foroutputvoltagesbelow2.5V,thedrop-outvoltageis nothingbuttheinputtooutputdifferential,sincetheminimuminputvoltageis2.5V. (5) Thisspecificationhasbeentestedfor−40°C≤T ≤85°Csincethetemperatureriseofthedeviceisnegligibleundershutdown J conditions. (6) Atelevatedtemperatures,devicesmustbederatedbasedonpackagethermalresistance.ThedevicesinTO-220packagemustbe deratedatθ =50°C/W(with0.5in2,1oz.copperarea),junction-to-ambient(withnoheatsink).ThedevicesintheDDPAK/TO-263 jA surface-mountpackagemustbederatedatθ =60°C/W(with0.5in2,1oz.copperarea),junction-to-ambient.SeeApplicationHints. jA (7) ErrorFlagthresholdandhysteresisarespecifiedaspercentageofregulatedoutputvoltage.SeeApplicationHints. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com Electrical Characteristics LP3963/LP3966 (continued) LimitsinstandardtypefaceareforT =25°C,andlimitsinboldfacetypeapplyoverthefulloperatingtemperaturerange. J Unlessotherwisespecified:V =V +1.5V,I =10mA,C =33µF,V =V -0.3V. IN O(NOM) L OUT SD IN Symbol Parameter Conditions Typ (1) LP3963/6 (2) Units Min Max I ErrorFlagPinLeakageCurrent 1 nA lk I ErrorFlagPinSinkCurrent V =0.5V 1 mA max Error ACPARAMETERS V =V +1.5V 60 IN OUT C =100uF OUT V =3.3V OUT PSRR RippleRejection dB V =V +0.3V 40 IN OUT C =100uF OUT V =3.3V OUT ρ OutputNoiseDensity f=120Hz 0.8 µV n(l/f BW=10Hz–100kHz 150 e OutputNoiseVoltage(rms) µV(rms) n BW=300Hz–300kHz 100 6 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 Typical Performance Characteristics Unlessotherwisespecified,V =V +1.5V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT = IN O(NOM) OUT OUT OUT IN SD IN A 25°C. Drop-OutVoltage Drop-OutVoltage Vs Vs Temperature(I =100mA,1A,V =2.5V,Dropoutat50mV L OUT TemperatureforDifferentLoadCurrents Down) Figure3. Figure4. GroundPinCurrent GroundPinCurrent Vs Vs InputVoltage(V =V ) InputVoltage(V =100mV) SD IN SD Figure5. Figure6. GroundCurrent GroundCurrent Vs Vs Temperature(V =V ) Temperature(V =0V) SD IN SD Figure7. Figure8. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisespecified,V =V +1.5V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT = IN O(NOM) OUT OUT OUT IN SD IN A 25°C. GroundPinCurrent InputVoltage Vs Vs ShutdownPinVoltage OutputVoltage Figure9. Figure10. OutputNoiseDensity,V =2.5V OutputNoiseDensity,V =5V OUT OUT Figure11. Figure12. RippleRejection vs LoadTransientResponse Frequency Figure13. Figure14. 8 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 Typical Performance Characteristics (continued) Unlessotherwisespecified,V =V +1.5V,V =2.5V,C =33µF,I =10mA,C =68µF,V =V ,andT = IN O(NOM) OUT OUT OUT IN SD IN A 25°C. δV OUT vs Temperature NoiseDensityV =3.5V,V =2.5V,I =10mA IN OUT L Figure15. Figure16. LineTransientResponse LineTransientResponse Figure17. Figure18. LineTransientResponse(I =3.0A) LineTransientResponse(I =3.0A) OUT OUT Figure19. Figure20. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com APPLICATION HINTS EXTERNAL CAPACITORS Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be correctlyselectedforproperperformance. INPUT CAPACITOR: The LP3963/6 requires a low source impedance to maintain regulator stability because the internal bias circuitry is connected directly to V . The input capacitor must be located less than 1 cm from the IN LP3963/6 device and connected directly to the input and ground pins using traces which have no other currents flowingthroughthem(seePCBLAYOUT). The minimum allowable input capacitance for a given application depends on the type of the capacitor and ESR (equivalent series resistance). A lower ESR capacitor allows the use of less capacitance, while higher ESR types (likealuminumelectrolytics)requiremorecapacitance. The lowest value of input capacitance that can be used for stable full-load operation is 68 µF (assuming it is a ceramicorlow-ESRTantalumwithESRlessthan100mΩ). TodeterminetheminimuminputcapacitanceamountandESRvalue,anapproximationwhichshouldbeusedis: C ESR(mΩ)/C (µF)≤1.5 IN IN This shows that input capacitors with higher ESR values can be used if sufficient total capacitance is provided. Capacitor types (aluminum, ceramic, and tantalum) can be mixed in parallel, but the total equivalent input capacitance/ESRmustbedefinedasabovetoassurestableoperation. IMPORTANT: The input capacitor must maintain its ESR and capacitance in the "stable range" over the entire temperaturerangeoftheapplicationtoassurestability(seeCAPACITORCHARACTERISTICS). OUTPUT CAPACITOR: An output capacitor is also required for loop stability. It must be located less than 1 cm fromtheLP3963/6deviceandconnecteddirectlytotheoutputandgroundpinsusingtraceswhichhavenoother currentsflowingthroughthem(seePCBLAYOUT). The minimum value of the output capacitance that can be used for stable full-load operation is 33 µF, but it may be increased without limit. The output capacitor's ESR is critical because it forms a zero to provide phase lead whichisrequiredforloopstability.TheESRmustfallwithinthespecifiedrange: 0.2Ω≤C ESR≤5Ω OUT The lower limit of 200 mΩ means that ceramic capacitors are not suitable for use as LP3963/6 output capacitors (but can be used on the input). Some ceramic capacitance can be used on the output if the total equivalent ESR is in the stable range: when using a 100 µF Tantalum as the output capacitor, approximately 3 µF of ceramic capacitancecanbeappliedbeforestabilitybecomesmarginal. IMPORTANT: The output capacitor must meet the requirements for minimum amount of capacitance and also have an appropriate ESR value over the full temperature range of the application to assure stability (see CAPACITORCHARACTERISTICS). SELECTING A CAPACITOR It is important to note that capacitance tolerance and variation with temperature must be taken into consideration when selecting a capacitor so that the minimum required amount of capacitance is provided over the full operating temperature range. In general, a good Tantalum capacitor will show very little capacitance variation with temperature, but a ceramic may not be as good (depending on dielectric type). Aluminum electrolytics also typicallyhavelargetemperaturevariationofcapacitancevalue. Equally important to consider is a capacitor's ESR change with temperature: this is not an issue with ceramics, as their ESR is extremely low. However, it is very important in Tantalum and aluminum electrolytic capacitors. Both show increasing ESR at colder temperatures, but the increase in aluminum electrolytic capacitors is so severetheymaynotbefeasibleforsomeapplications(seeCAPACITORCHARACTERISTICS). 10 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 CAPACITOR CHARACTERISTICS CERAMIC: For values of capacitance in the 10 to 100 µF range, ceramics are usually larger and more costly than tantalums but give superior AC performance for bypassing high frequency noise because of very low ESR (typically less than 10 mΩ). However, some dielectric types do not have good capacitance characteristics as a functionofvoltageandtemperature. Z5U and Y5V dielectric ceramics have capacitance that drops severely with applied voltage. A typical Z5U or Y5Vcapacitorcanlose60%ofitsratedcapacitancewithhalfoftheratedvoltageappliedtoit.TheZ5UandY5V also exhibit a severe temperature effect, losing more than 50% of nominal capacitance at high and low limits of thetemperaturerange. X7R and X5R dielectric ceramic capacitors are strongly recommended if ceramics are used, as they typically maintain a capacitance range within ±20% of nominal over full operating ratings of temperature and voltage. Of course,theyaretypicallylargerandmorecostlythanZ5U/Y5Utypesforagivenvoltageandcapacitance. TANTALUM: Solid Tantalum capacitors are recommended for use on the output because their typical ESR is very close to the ideal value required for loop compensation. They also work well as input capacitors if selected tomeettheESRrequirementspreviouslylisted. Tantalums also have good temperature stability: a good quality Tantalum will typically show a capacitance value that varies less than 10-15% across the full temperature range of 125°C to −40°C. ESR will vary only about 2X goingfromthehightolowtemperaturelimits. The increasing ESR at lower temperatures can cause oscillations when marginal quality capacitors are used (if theESRofthecapacitorisneartheupperlimitofthestabilityrangeatroomtemperature). ALUMINUM:Thiscapacitortypeoffersthemostcapacitanceforthemoney.Thedisadvantagesarethattheyare larger in physical size, not widely available in surface mount, and have poor AC performance (especially at higherfrequencies)duetohigherESRandESL. Compared by size, the ESR of an aluminum electrolytic is higher than either Tantalum or ceramic, and it also varies greatly with temperature. A typical aluminum electrolytic can exhibit an ESR increase of as much as 50X whengoingfrom25°Cdownto −40°C. It should also be noted that many aluminum electrolytics only specify impedance at a frequency of 120 Hz, which indicates they have poor high frequency performance. Only aluminum electrolytics that have an impedance specifiedatahigherfrequency(between20kHzand100kHz)shouldbeusedfortheLP396X.Deratingmustbe appliedtothemanufacturer'sESRspecification,sinceitistypicallyonlyvalidatroomtemperature. Any applications using aluminum electrolytics should be thoroughly tested at the lowest ambient operating temperaturewhereESRismaximum. PCB LAYOUT GoodPClayoutpracticesmustbeusedorinstabilitycanbeinducedbecauseofgroundloopsandvoltagedrops. The input and output capacitors must be directly connected to the input, output, and ground pins of the LP3963/6 usingtraceswhichdonothaveothercurrentsflowinginthemKelvinconnect). The best way to do this is to lay out C and C near the device with short traces to the V , V , and ground IN OUT IN OUT pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its capacitorshavea"singlepointground". Itshouldbenotedthatstabilityproblemshavebeenseeninapplicationswhere"vias"toaninternalgroundplane were used at the ground points of the LP3963/6 IC and the input and output capacitors. This was caused by varying ground potentials at these nodes resulting from current flowing through the ground plane. Using a single pointgroundtechniquefortheregulatorandit'scapacitorsfixedtheproblem. Since high current flows through the traces going into V and coming from V , Kelvin connect the capacitor IN OUT leadstothesepinssothereisnovoltagedropinserieswiththeinputandoutputcapacitors. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com RFI/EMI SUSCEPTIBILITY RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must betakentoensurethatthisdoesnotaffecttheICregulator. If RFI/EMI noise is present on the input side of the LP396X regulator (such as applications where the input source comes from the output of a switching regulator), good ceramic bypass capacitors must be used at the inputpinoftheLP396X. If a load is connected to the LP396X output which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the LP396X output. Since the bandwidth of the regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency. The means the effective output impedance of the LP396X at frequencies above 100 kHz is determinedonlybytheoutputcapacitor(s). In applications where the load is switching at high speed, the output of the LP396X may need RF isolation from the load. It is recommended that some inductance be placed between the LP396X output capacitor and the load, andgoodRFbypasscapacitorsbeplaceddirectlyacrosstheload. PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the groundplane. In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not radiatedirectlyintoadjacentlayerswhichcarryanalogpowerandground. OUTPUT ADJUSTMENT An adjustable output device has output voltage range of 1.216V to 5.1V. To obtain a desired output voltage, the followingequationcanbeusedwithR1alwaysa10kΩ resistor. Foroutputstability,C mustbebetween68pFand100pF. F TURN-ON CHARACTERISTICS FOR OUTPUT VOLTAGES PROGRAMMED TO 2.0V OR BELOW As Vin increases during start-up, the regulator output will track the input until Vin reaches the minimum operating voltage (typically about 2.2V). For output voltages programmed to 2.0V or below, the regulator output may momentarily exceed its programmed output voltage during start up. Outputs programmed to voltages above 2.0V arenotaffectedbythisbehavior. OUTPUT NOISE Noiseisspecifiedintwoways- Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a functionoffrequency. Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually severaldecadesoffrequencies. Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and totaloutputnoiseismeasuredinµV(rms). 12 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the internal reference increases the total supply current (ground pin current). Using an optimized trade-off of ground pin current and die size, LP3963/LP3966 achieves lownoiseperformanceandlowquiescentcurrentoperation. The total output noise specification for LP3963/LP3966 is presented in the Electrical Characteristics table. The Outputnoisedensityatdifferentfrequenciesisrepresentedbyacurveundertypicalperformancecharacteristics. SHORT-CIRCUIT PROTECTION The LP3963 and LP3966 is short circuit protected and in the event of a peak over-current condition, the short- circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the POWER DISSIPATION/HEATSINKINGforpowerdissipationcalculations. ERROR FLAG OPERATION The LP3963/LP3966 produces a logic low signal at the Error Flag pin when the output drops out of regulation due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The timing diagram in Figure 21 shows the relationship between the ERROR flag and the output voltage. In this example, theinputvoltageischangedtodemonstratethefunctionalityoftheErrorFlag. The internal Error flag comparator has an open drain output stage. Hence, the ERROR pin should be pulled high through a pull up resistor. Although the ERROR flag pin can sink current of 1mA, this current is energy drain from the input supply. Hence, the value of the pull up resistor should be in the range of 10kΩ to 1MΩ. The ERROR pin must be connected to ground if this function is not used. It should also be noted that when the shutdown pin is pulled low, the ERROR pin is forced to be invalid for reasons of saving power in shutdown mode. Figure21. ErrorFlagOperation Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com SENSE PIN In applications where the regulator output is not very close to the load, LP3966 can provide better remote load regulation using the SENSE pin. Figure 22 depicts the advantage of the SENSE option. LP3963 regulates the voltage at the output pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.3V output, if the trace resistance is 100mΩ, the voltage at the remote load will be 3V with 3A of load current, I . The LP3966 regulates the voltage at the LOAD sense pin. Connecting the sense pin to the remote load will provide regulation at the remote load, as shown in Figure22.Ifthesenseoptionpinisnotrequired,thesensepinmustbeconnectedtotheV pin. OUT Figure22. ImprovingremoteloadregulationusingLP3966 SHUTDOWN OPERATION A CMOS Logic level signal at the shutdown (SD) pin will turn-off the regulator. Pin SD must be actively terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tiedtoVinifnotused. DROPOUT VOLTAGE The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the nominal output voltage. The LP3963/LP3966 use an internal MOSFET with an Rds(on) of 240mΩ (typically).ForCMOSLDOs,thedropoutvoltageistheproductoftheloadcurrentandtheRds(on)oftheinternal MOSFET. REVERSE CURRENT PATH The internal MOSFET in LP3963 and LP3966 has an inherent parasitic diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is pulledabovetheinputinanapplication,thencurrentflowsfromtheoutputtotheinputastheparasiticdiodegets forwardbiased.Theoutputcanbepulledabovetheinputaslongasthecurrentintheparasiticdiodeislimitedto 200mAcontinuousand1Apeak. POWER DISSIPATION/HEATSINKING LP3963 and LP3966 can deliver a continuous current of 3A over the full operating temperature range. A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operatingconditions.Thetotalpowerdissipationofthedeviceisgivenby: P =(V −V )I +(V )I D IN OUT OUT IN GND whereI istheoperatinggroundcurrentofthedevice(specifiedunderElectricalCharacteristics). GND 14 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 The maximum allowable temperature rise (T ) depends on the maximum ambient temperature (T ) of the Rmax Amax application,andthemaximumallowablejunctiontemperature(T ): Jmax T =T −T Rmax Jmax Amax The maximum allowable value for junction to ambient Thermal Resistance, θ , can be calculated using the JA formula: θ =T /P JA Rmax D LP3963 and LP3966 are available in TO-220 and DDPAK/TO-263 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow. If the maximum allowable value of θ calculated above is ≥ JA 60 °C/W for TO-220 package and ≥ 60 °C/W for DDPAK/TO-263 package no heatsink is needed since the package can dissipate enough heat to satisfy these requirements. If the value for allowable θ falls below these JA limits,aheatsinkisrequired. HEATSINKING TO-220 PACKAGE The thermal resistance of a TO-220 package can be reduced by attaching it to a heat sink or a copper plane on a PC board. If a copper plane is to be used, the values of θ will be same as shown in next section for JA DDPAK/TO-263package. Theheatsinktobeusedintheapplicationshouldhaveaheatsinktoambientthermalresistance, θ ≤θ −θ −θ . HA JA CH JC In this equation, θ is the thermal resistance from the case to the surface of the heat sink and θ is the thermal CH JC resistance from the junction to the surface of the case. θ is about 3°C/W for a TO-220 package. The value for JC θ depends on method of attachment, insulator, etc. θ varies between 1.5°C/W to 2.5°C/W. If the exact value CH CH isunknown,2°C/Wcanbeassumed. HEATSINKING DDPAK/TO-263 PACKAGE The DDPAK/TO-263 package uses the copper plane on the PCB as a heatsink. The tab of these packages are solderedtothecopperplaneforheatsinking.Figure23showsacurvefortheθ ofDDPAK/TO-263packagefor JA different copper area sizes, using a typical PCB with 1 ounce copper and no solder mask over the copper area forheatsinking. Figure23. θ vsCopper(1Ounce)AreaforDDPAK/TO-263package JA As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. The minimumvalueforθ fortheDDPAK/TO-263packagemountedtoaPCBis32°C/W. JA Figure 24 shows the maximum allowable power dissipation for DDPAK/TO-263 packages for different ambient temperatures,assumingθ is35°C/Wandthemaximumjunctiontemperatureis125°C. JA Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 SNVS067H–APRIL2000–REVISEDAPRIL2013 www.ti.com Figure24. MaximumpowerdissipationvsambienttemperatureforDDPAK/TO-263package 16 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LP3963 LP3966

LP3963, LP3966 www.ti.com SNVS067H–APRIL2000–REVISEDAPRIL2013 REVISION HISTORY ChangesfromRevisionG(April2013)toRevisionH Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 15 Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LP3963 LP3966

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3963ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3963ES TO-263 Exempt) -2.5 LP3963ES-3.3 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3963ES TO-263 -3.3 LP3963ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3963ES TO-263 Exempt) -3.3 LP3963ESX-2.5/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3963ES TO-263 Exempt) -2.5 LP3963ESX-3.3 NRND DDPAK/ KTT 5 500 TBD Call TI Call TI -40 to 125 LP3963ES TO-263 -3.3 LP3963ESX-3.3/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3963ES TO-263 Exempt) -3.3 LP3966ES-1.8 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -1.8 LP3966ES-1.8/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -1.8 LP3966ES-2.5 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -2.5 LP3966ES-2.5/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -2.5 LP3966ES-3.3 NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -3.3 LP3966ES-3.3/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -3.3 LP3966ES-ADJ NRND DDPAK/ KTT 5 45 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -ADJ LP3966ES-ADJ/NOPB ACTIVE DDPAK/ KTT 5 45 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -ADJ LP3966ESX-1.8 NRND DDPAK/ KTT 5 500 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -1.8 LP3966ESX-1.8/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -1.8 LP3966ESX-2.5 NRND DDPAK/ KTT 5 500 TBD Call TI Call TI -40 to 125 LP3966ES TO-263 -2.5 Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP3966ESX-2.5/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -2.5 LP3966ESX-3.3/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -3.3 LP3966ESX-ADJ/NOPB ACTIVE DDPAK/ KTT 5 500 Pb-Free (RoHS SN Level-3-245C-168 HR -40 to 125 LP3966ES TO-263 Exempt) -ADJ LP3966ET-ADJ NRND TO-220 NDH 5 45 TBD Call TI Call TI -40 to 125 LP3966ET -ADJ LP3966ET-ADJ/NOPB ACTIVE TO-220 NDH 5 45 Green (RoHS SN Level-1-NA-UNLIM -40 to 125 LP3966ET & no Sb/Br) -ADJ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP3963ESX-2.5/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3963ESX-3.3 DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3963ESX-3.3/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-1.8 DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-1.8/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-2.5 DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-2.5/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-3.3/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 LP3966ESX-ADJ/NOPB DDPAK/ KTT 5 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2 TO-263 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP3963ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3963ESX-3.3 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3963ESX-3.3/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-1.8 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-1.8/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-2.5 DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-2.5/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-3.3/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 LP3966ESX-ADJ/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 PackMaterials-Page2

MECHANICAL DATA NDH0005D www.ti.com

MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.com

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