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  • 型号: LP2986IMM-3.3/NOPB
  • 制造商: Texas Instruments
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ICGOO电子元器件商城为您提供LP2986IMM-3.3/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LP2986IMM-3.3/NOPB价格参考¥5.93-¥13.36。Texas InstrumentsLP2986IMM-3.3/NOPB封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Fixed 1 Output 3.3V 200mA 8-VSSOP。您可以下载LP2986IMM-3.3/NOPB参考资料、Datasheet数据手册功能说明书,资料中有LP2986IMM-3.3/NOPB 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC REG LDO 3.3V 0.2A 8VSSOP低压差稳压器 Micropower, 200 mA Ultra Low-Dropout Fixed or Adjustable Voltage Regulator 8-VSSOP -40 to 125

产品分类

PMIC - 稳压器 - 线性

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

电源管理 IC,低压差稳压器,Texas Instruments LP2986IMM-3.3/NOPB-

数据手册

点击此处下载产品Datasheet

产品型号

LP2986IMM-3.3/NOPB

PSRR/纹波抑制—典型值

65 dB

产品

Micropower Ultra Low-Dropout Fixed Regulator

产品目录页面

点击此处下载产品Datasheet

产品种类

低压差稳压器

供应商器件封装

8-VSSOP

其它名称

LP2986IMM-3.3/NOPBTR
LP2986IMM33NOPB

包装

带卷 (TR)

商标

Texas Instruments

回动电压—最大值

350 mV

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

8-TSSOP,8-MSOP(0.118",3.00mm 宽)

封装/箱体

VSSOP-8

工作温度

-40°C ~ 125°C

工厂包装数量

1000

最大工作温度

+ 125 C

最大输入电压

16 V

最小工作温度

- 40 C

最小输入电压

2.1 V

标准包装

1,000

电压-跌落(典型值)

0.18V @ 200mA

电压-输入

最高 16V

电压-输出

3.3V

电流-输出

200mA

电流-限制(最小值)

250mA

稳压器拓扑

正,固定式

稳压器数

1

类型

Precision LDO Voltage Regulator

系列

LP2986

线路调整率

0.007 %

设计资源

http://www.digikey.com/product-highlights/cn/zh/texas-instruments-webench-design-center/3176

输出电压

3.3 V

输出电流

200 mA

输出端数量

1 Output

输出类型

Fixed

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PDF Datasheet 数据手册内容提取

Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 LP2986 Micropower, 200-mA Ultra-Low-Dropout Fixed or Adjustable Voltage Regulator 1 Features 3 Description • WideSupplyVoltageRange(16VMaximum) The LP2986 is a 200-mA high-precision LDO 1 regulator with a wide input voltage supply. The device • Ultra-Low-DropoutVoltage has two output voltage modes: a fixed-precision • 0.5%OutputVoltageAccuracy(AGrade) output mode and an adjustable output voltage via an • Ensured200-mAOutputCurrent externalresistivedivider. • <1-μAQuiescentCurrentwhenShutdown Using an optimized Vertically Integrated PNP (VIP) • LowGROUNDPinCurrentatAllLoads process,theLP2986deliverssuperiorperformance: • Dropout Voltage: Typically 180 mV at 200-mA • HighPeakCurrentCapability(400mATypical) load,and1mVat1-mAload. • Overtemperature/OvercurrentProtection • GROUND Pin Current: Typically 1 mA at 200-mA • −40°Cto+125°CJunctionTemperatureRange load,and200μAat10-mAload. • Sleep Mode: The LP2986 draws less than 1 μA 2 Applications quiescent current when SHUTDOWN pin is pulled • CellularPhones low. • Palmtop/LaptopComputers • ERROR Flag: The built-in ERROR flag goes low when the output drops approximately 5% below • Camcorders,PersonalStereos,Cameras nominal. • Precision Output: The standard product versions available can be pin-strapped (using the internal resistive divider) to provide output voltages of 5 V, 3.3 V, or 3 V with ensured accuracy of 0.5% (A grade) and 1% (standard grade) at room temperature. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.90mm×3.91mm LP2986 VSSOP(8) 3.00mm×3.00mm WSON(8) 4.00mm×4.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. SimplifiedSchematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalModes........................................14 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 15 3 Description............................................................. 1 8.1 ApplicationInformation............................................15 4 RevisionHistory..................................................... 2 8.2 TypicalApplications................................................15 5 PinConfigurationandFunction........................... 3 9 PowerSupplyRecommendations...................... 19 6 Specifications......................................................... 4 10 Layout................................................................... 20 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................20 6.2 ESDRatings..............................................................4 10.2 LayoutExamples...................................................20 6.3 RecommendedOperatingConditions.......................4 10.3 WSONMounting...................................................21 6.4 ThermalInformation..................................................5 11 DeviceandDocumentationSupport................. 22 6.5 ElectricalCharacteristics...........................................5 11.1 DocumentationSupport........................................22 6.6 TypicalCharacteristics..............................................8 11.2 CommunityResources..........................................22 7 DetailedDescription............................................ 13 11.3 Trademarks...........................................................22 7.1 Overview.................................................................13 11.4 ElectrostaticDischargeCaution............................22 7.2 FunctionalBlockDiagram.......................................13 11.5 Glossary................................................................22 7.3 FeatureDescription.................................................13 12 Mechanical,Packaging,andOrderable Information........................................................... 22 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionH(April2013)toRevisionI Page • AddedDeviceInformationandPinConfigurationandFunctionssections,ESDRatingstable,updateThermal Values,FeatureDescription,DeviceFunctionalModes,ApplicationandImplementation,PowerSupply Recommendations,Layout,DeviceandDocumentationSupport,andMechanical,Packaging,andOrderable Informationsections................................................................................................................................................................ 1 • DeletedLeadTempfromAbsMaxtable(inPOA);deleteHeatsinkingsectionsre:specificpackages(outdatedinfo).......4 ChangesfromRevisionG(April2013)toRevisionH Page • ChangedlayoutofNationalDataSheettoTIformat........................................................................................................... 18 2 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 5 Pin Configuration and Function DPackage DGKPackage 8-PinSOIC 8-PinVSSOP TopView TopView 1 8 GROUND SHUTDOWN GROUND 1 8 SHUTDOWN FEEDBACK 2 7 ERROR 2 7 FEEDBACK ERROR TAP 3 6 SENSE TAP 3 6 SENSE IN 4 5 OUT 4 5 IN OUT NGNPackage 8-PinWSON TopView GROUND 1 8 SHUTDOWN FEEDBACK 2 Exposed Pad 7 ERROR on Bottom TAP 3 (DAP) 6 SENSE IN 4 5 OUT SeeWSONMounting. PinFunctions:AllPackages PIN I/O DESCRIPTION NAME NO. Active-lowopen-collectorerroroutput.GoeslowwhenV dropsby5%ofits ERROR 7 O OUT nominalvalue. Determinestheoutputvoltage.ConnecttoTAP(withOUTtiedtoSENSE)tooutput FEEDBACK 2 I thefixedvoltagecorrespondingtothepartversion,orconnecttoaresistordividerto adjusttheoutputvoltage(seeTypicalApplications). GROUND 1 — Ground. IN 4 I Inputvoltagesupply. OUT 5 O Regulatedoutput. ConnecttoOUT(withFEEDBACKtiedtoTAP)tooutputthevoltagecorrespondingto SENSE 6 I thepartversion(seeTypicalApplications). SHUTDOWN 8 I Active-high.pulllowtoshowdowntheoutputvoltage. MiddletapoftheInternalvoltagedivider.TietoFEEDBACK(withOUTtiedto TAP 3 O SENSE)tooutputthefixedvoltagecorrespondingtothepartversion(seeTypical Applications). TheexposedthermalpadonthebottomoftheWSONpackageshouldbeconnected toacopperthermalpadonthePCBunderthepackage.Theuseofthermalviasto removeheatfromthepackageintothePCBisrecommended.Connectthethermal DAP(ThermalPad- √ — padtogroundpotentialorleavefloating.Donotconnectthethermalpadtoany WSONonly) potentialotherthanthesamegroundpotentialseenatdevicepin1.Foradditional informationonusingTI'snon-pullbackWSONpackage,seeApplicationNoteAN- 1187LeadlessLeadframePackage(LLP)(SNOA401). Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN MAX UNIT Inputsupplyvoltage(survival) –0.3 16 V Inputsupplyvoltage(operating) 2.1 16 V SHUTDOWNpin –0.3 16 V FEEDBACKpin –0.3 5 V Outputvoltage(survival)(3) –0.3 16 V I (survival) Short-circuitprotected OUT Input-outputvoltage(survival)(4) –0.3 16 V Powerdissipation(5) Internallylimited Storagetemperature,T −65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) IfMilitary/Aerospacespecifieddevicesarerequired,contacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Ifusedinadual-supplysystemwheretheregulatorloadisreturnedtoanegativesupply,theLM2986outputmustbediode-clampedto ground. (4) TheoutputPNPstructurecontainsadiodebetweentheINandOUTpinsthatisnormallyreverse-biased.Forcingtheoutputabovethe inputwillturnonthisdiodeandmayinducealatch-upmodewhichcandamagethepart(seeReverseInput-OutputVoltage). (5) Themaximumallowablepowerdissipationisafunctionofthemaximumjunctiontemperature,T ),thejunction-to-ambientthermal J(MAX resistance,R ,andtheambienttemperature,T .Themaximumallowablepowerdissipationatanyambienttemperatureiscalculated θJA A using:P( =T –T /R MAX) J(MAX) A θJA ForimprovedthermalresistanceandpowerdissipationfortheWSONpackage,refertoTexasInstrumentsApplicationNoteLeadless LeadframePackage(LLP)(SNOA401).Exceedingthemaximumallowablepowerdissipationwillcauseexcessivedietemperature,and theregulatorwillgointothermalshutdown. 6.2 ESD Ratings VALUE UNIT Allpinsexcept ±2000 FEEDBACK,IN,andTAP V(ESD) Electrostaticdischarge HANumSIa/En-SbDoAdy/JmEDodEeCl(JHSB-0M0)1,(p1e)r FEEDBACKpin ±500 V INpin ±1000 TAPpin ±1500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT Supplyinputvoltage 2.1 16 V Enableinputvoltage 0 16 V Outputcurrent 200 mA Operatingjunctiontemperature −40 125 °C 4 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 6.4 Thermal Information LP2986 THERMALMETRIC(1) D(SOIC) DGK(VSSOP) NGN(WSON) UNIT 8PINS R (2) Junction-to-ambientthermalresistance,High-K 114.4 156.5 37.8(3) °C/W θJA R Junction-to-case(top)thermalresistance 61.4 51.0 28.58 °C/W θJC(top) R Junction-to-boardthermalresistance 55.5 76.5 15.0 °C/W θJB ψ Junction-to-topcharacterizationparameter 9.8 4.9 0.2 °C/W JT ψ Junction-to-boardcharacterizationparameter 54.9 75.2 15.2 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a 4.4 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. (2) ThermalresistancevalueR isbasedontheEIA/JEDECHigh-Kprintedcircuitboarddefinedby:JESD51-7-HighEffectiveThermal θJA ConductivityTestBoardforLeadedSurfaceMountPackages. (3) ThePCBfortheNGN(WSON)packageR includesfour(4)thermalviasundertheexposedthermalpadperEIA/JEDECJESD51-5. θJA 6.5 Electrical Characteristics Unlessotherwisespecified:T =25°C,V =V +1V,I =1mA,C =4.7µF,C =2.2µF,V =2V. J IN OUT(NOM) OUT OUT IN SD LP2986AI-X.X(1) LP2986I-X.X(1) PARAMETER TESTCONDITIONS UNIT MIN TYP MAX MIN TYP MAX 4.975 5 5.025 4.95 5 5.05 Outputvoltage(5-V 0.1mA<I <200mA 4.96 5 5.04 4.92 5 5.08 OUT V version) 0.1mA<I <200mA OUT 4.91 5.09 4.86 5.14 –40°C≤T ≤125°C J 3.283 3.3 3.317 3.267 3.3 3.333 Outputvoltage(3.3-V 0.1mA<I <200mA 3.274 3.3 3.326 3.247 3.3 3.353 V OUT V OUT version) 0.1mA<I <200mA OUT 3.241 3.359 3.208 3.392 –40°C≤T ≤125°C J 2.985 3 3.015 2.97 3 3.03 Outputvoltage(3-V 0.1mA<I <200mA 2.976 3 3.024 2.952 3 3.048 OUT V version) 0.1mA<I <200mA OUT 2.946 3.054 2.916 3.084 –40°C≤T ≤125°C J V +1V≤V ≤16 OUT(NOM) IN 0.007 0.014 0.007 0.014 V Outputvoltageline ΔVOUT/ΔVIN regulation VOUT(NOM)+1V≤VIN≤16 %/V V, 0.032 0.032 –40°C≤T ≤125°C J I =100µA 1 2 1 2 OUT I =100µA OUT 3.5 3.5 –40°C≤T ≤125°C J I =75mA 90 120 90 120 OUT VIN–VOUT Dropoutvoltage(2) IOUT=75mA 170 170 mV –40°C≤T ≤125°C J I =200mA 180 230 180 230 OUT I =200mA OUT 350 350 –40°C≤T ≤125°C J (1) Limitsare100%productiontestedat25°C.Limitsovertheoperatingtemperaturerangearespecifiedthroughcorrelationusing StatisticalQualityControl(SQC)methods.ThelimitsareusedtocalculateTI’sAverageOutgoingQualityLevel(AOQL). (2) Dropoutvoltageisdefinedastheinputtooutputdifferentialatwhichtheoutputvoltagedrops100mVbelowthevaluemeasuredwitha 1-Vdifferential. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Electrical Characteristics (continued) Unlessotherwisespecified:T =25°C,V =V +1V,I =1mA,C =4.7µF,C =2.2µF,V =2V. J IN OUT(NOM) OUT OUT IN SD LP2986AI-X.X(1) LP2986I-X.X(1) PARAMETER TESTCONDITIONS UNIT MIN TYP MAX MIN TYP MAX I =100µA 100 120 100 120 OUT I =100µA OUT 150 110 150 –40°C≤T ≤125°C J µA I =75mA 500 800 500 800 OUT I =75mA OUT 1400 1400 –40°C≤T ≤125°C J I Groundpincurrent GND I =200mA 1 2.1 1 2.1 OUT I =200mA mA OUT 3.7 3.7 –40°C≤T ≤125°C J V <0.3V 0.05 0.05 SD V <0.3V µA SD 1.5 1.5 –40°C≤T ≤125°C J I Peakoutputcurrent V ≥V −5% 250 400 250 400 mA OUT(PK) OUT OUT(NOM) I Short-circuitcurrent R =0(steadystate)(3) 400 400 mA OUT(MAX) L Outputnoisevoltage BW=300Hzto50kHz, e 160 160 µV n (RMS) C =10µF RMS OUT ΔV /ΔV Ripplerejection ƒ=1kHz,C =10µF 65 65 dB OUT IN OUT ΔV /ΔT Outputvoltage See(4) 20 20 ppm/°C OUT D temperaturecoefficient FEEDBACKPIN 1.21 1.23 1.25 1.2 1.23 1.26 V FEEDBACKpinvoltage –40°C≤T ≤125°C 1.2 1.26 1.19 1.27 V FB J See(5) 1.19 1.28 1.18 1.29 ΔV /ΔT FEEDBACKpinvoltage See(6) 20 20 ppm/°C FB temperaturecoefficient I =200mA 150 330 150 330 OUT FEEDBACKpinbias IFB current IOUT=200mA 760 760 nA –40°C≤T ≤125°C J FEEDBACKpinbias ΔI /ΔT currenttemperature See(6) 0.1 0.1 nA/°C FB coefficient SHUTDOWNINPUT V =OutputON 1.4 1.4 H V =OutputON V H 1.6 1.6 –40°C≤T ≤125°C V SDInputvoltage(7) J SD V =OutputOFF 0.55 0.55 L V =OutputOFF µA L 0.18 0.18 –40°C≤T ≤125°C J V =0V 0 0 SD V =0V,–40°C≤T ≤ V SD J –1 –1 125°C I SDInputcurrent SD V =5V 5 5 SD V =5V,–40°C≤T ≤ µA SD J 15 15 125°C (3) SeetheTypicalCharacteristicssection. (4) Temperaturecoefficientisdefinedasthemaximum(worst-case)changedividedbythetotaltemperaturerange. (5) V ≤V ≤(V −1),2.5V≤V ≤16V,100μA≤I ≤200mA,T ≤125°C. FB OUT IN IN L J (6) Temperaturecoefficientisdefinedasthemaximum(worst-case)changedividedbythetotaltemperaturerange. (7) Topreventmis-operation,theSHUTDOWNpinmustbedrivenbyasignalthatswingsaboveV andbelowV withaslewratenotless H L than40mV/μs(seeApplicationandImplementation). 6 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 Electrical Characteristics (continued) Unlessotherwisespecified:T =25°C,V =V +1V,I =1mA,C =4.7µF,C =2.2µF,V =2V. J IN OUT(NOM) OUT OUT IN SD LP2986AI-X.X(1) LP2986I-X.X(1) PARAMETER TESTCONDITIONS UNIT MIN TYP MAX MIN TYP MAX ERRORCOMPARATOR V =16V 0.01 1 0.001 1 OH IOH OutputHIGHleakage VOH=16V,–40°C≤TJ≤ 2 0.001 2 µA 125°C V =V −0.5V IN OUT(NOM) 150 220 150 220 µA I =300µA OUT(COMP) VOL OutputLOWvoltage VIN=VOUT(NOM)−0.5V I =300µA 350 350 mV OUT(COMP) –40°C≤T ≤125°C J −5.5 −4.6 −3.5 −5.5 −4.6 −3.5 V Upperthresholdvoltage %V THR(MAX) OUT –40°C≤T ≤125°C −7.7 −2.5 −7.7 −2.5 J −8.9 −6.6 −4.9 −8.9 −6.6 −4.9 V Lowerthresholdvoltage THR(MIN) –40°C≤T ≤125°C −13 −3.3 −13 −3.3 %V J OUT HYST Hysteresis 2 2 Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com 6.6 Typical Characteristics Unlessotherwisespecified:T =25°C,C =4.7µF,C =2.2µF,SDistiedtoV ,V =V (NOM)+1V,I =1mA. A OUT IN IN IN O L Figure1.V vsTemperature Figure2.DropoutVoltagevsTemperature OUT Figure3.DropoutVoltagevsLoadCurrent Figure4.DropoutCharacteristics Figure5.GroundPinCurrentvsTemperatureAndLoad Figure6.GroundPinCurrentvsLoadCurrent 8 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =4.7µF,C =2.2µF,SDistiedtoV ,V =V (NOM)+1V,I =1mA. A OUT IN IN IN O L Figure7.InputCurrentvsV Figure8.InputCurrentvsV IN IN Figure10.TurnoffWaveform Figure9.TurnonWaveform Figure11.Short-CircuitCurrent Figure12.Short-CircuitCurrent Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =4.7µF,C =2.2µF,SDistiedtoV ,V =V (NOM)+1V,I =1mA. A OUT IN IN IN O L Figure13.Short-CircuitCurrentvsOutputVoltage Figure14.InstantaneousShort-CircuitCurrentvs Temperature Figure15.DCLoadRegulation Figure16.FeedbackBiasCurrentvsLoad Figure17.FeedbackBiasCurrentvsTemperature Figure18.SHUTDOWNPinCurrentvsSHUTDOWNPin Voltage 10 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =4.7µF,C =2.2µF,SDistiedtoV ,V =V (NOM)+1V,I =1mA. A OUT IN IN IN O L Figure19.ShutdownVoltagevsTemperature Figure20.Input-to-OutputLeakagevsTemperature Figure21.OutputNoiseDensity Figure22.OutputImpedancevsFrequency Figure23.OutputImpedancevsFrequency Figure24.RippleRejection Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Typical Characteristics (continued) Unlessotherwisespecified:T =25°C,C =4.7µF,C =2.2µF,SDistiedtoV ,V =V (NOM)+1V,I =1mA. A OUT IN IN IN O L Figure25.LoadTransientResponse Figure26.LoadTransientResponse Figure27.LineTransientResponse Figure28.LineTransientResponse 12 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 7 Detailed Description 7.1 Overview The LP2986 is a bipolar, low-dropout (LDO) voltage regulator that can accommodate a wide input supply-voltage range of up to 16 V. The LP2986 LDO is able to output either a fixed or adjustable output from the same device. By tying the OUT and SENSE pins together, and the FEEDBACK and TAP pins together, the LP2986 device outputs a fixed 5 V, 3.3 V, or 3 V (depending on the version). Alternatively, by leaving the SENSE and TAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 2.1 V to 16 V. The LP2986 device also offers additional functionality that makes it particularly suitable for battery- poweredapplications.Forexample,alogic-compatibleshutdownfeatureallowstheregulatortobeputinstandby mode for power savings. In addition, there is a built-in supervisor reset function in which the ERROR output goes low when V drops by 5% of its nominal value for whatever reasons – due to a drop in V , current limiting, or OUT IN thermalshutdown. The LP2986 devices are designed to minimize all error contributions to the output voltage. With a tight output tolerance (0.5% at 25°C), a very low output voltage temperature coefficient (20 ppm typical), extremely good line and load regulation and remote sensing capability, the part can be used as either low-power voltage reference or 200-mAregulator. Multiplefeaturesofthedeviceinclude: • Veryhigh-accuracy1.23-Vreference • Sleepmode • Errorflagoutput • Internalprotectioncircuitry,suchasovercurrentlimit,andthermalshutdown. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 High-AccuracyOutputVoltage With special careful design to minimize all contributions to the output voltage error, the LP2989 distinguishes itself as a very high output-voltage-accuracy micro-power LDO. This includes a tight initial tolerance (0.5% typical,Agrade),extremelygoodlineregulation(0.007%/Vtypical). Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Feature Description (continued) 7.3.2 ErrorDetectionComparatorOutput The LP2989 will generate a logic low output whenever its output falls out of regulation by more than approximately 5% below nominal. Because the ERROR comparator has an open-collector output, an external pull-up resistor is required to pull the output up to V or another supply voltage (up to 16 V). The output of the OUT comparatorisratedtosinkupto300µA.If ERROR pinisnotused,itcanbeleftopen. Because the ERROR comparator has an open-collector output, an external pull-up resistor is required to pull the output up to VOUT or another supply voltage (up to 16 V). The output of the comparator is rated to sink up to 300µA.If ERROR pinisnotused,itcanbeleftopen. 7.3.3 ThermalProtection The device contains a thermal shutdown protection circuit to turn off the output current when excessive heat is dissipated in the LDO. The circuitry is not intended to replace proper heat sinking. Continuously running the deviceintothermalshutdowndegradesitsreliability. 7.3.4 Short-CircuitProtection(CurrentLimit) TheinternalcurrentlimitcircuitisusedtoprotecttheLDOagainsthigh-loadcurrentfaultsorshortingevents.The LDO is not designed to operate in a steady-state current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. Note also that if a current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO, resulting inathermalshutdownoftheoutput. 7.4 Device Functional Modes 7.4.1 ShutdownMode The LP2986 is shut off by driving the shutdown input low, and turned on by pulling it high. If this feature is not to beused,theSHUTDOWNinputshouldbetiedtoV tokeeptheregulatoroutputonatalltimes. IN To assure proper operation, the signal source used to drive the SHUTDOWN input must be able to swing above and below the specified turnon/turnoff voltage thresholds listed as V and V , respectively (see Typical H L Characteristics). Since the SHUTDOWN input comparator does not have hysteresis, It is also important that the turnon (and turnoff) voltage signals applied to the SHUTDOWN input have a slew rate which is not less than 40 mV/µs when movingbetweentheV andV thresholds. H L CAUTION The regulator output state (either On or Off) cannot be specified if a slow-moving AC (orDC)signalisappliedthatisintherangebetweenV andV . H L 7.4.2 FixedorAdjustableRegulatedOutput A unique feature of the LP2986 device is its ability to output either a fixed voltage or an adjustable voltage, dependingontheexternalpinconnections.Tooutputtheinternallyprogrammedfixedvoltage,tietheSENSEpin totheOUTPUTpinandtheFEEDBACKpintotheTAPpin. Alternatively, a user-programmable voltage ranging from the internal reference to a 16-V maximum can be set by using an external resistor divider pair. The resistor divider is tied to V , and the divided-down voltage is tied OUT directlytoFEEDBACKforcomparisonagainsttheinternalvoltagereference.Tosatisfythesteady-statecondition in which its two inputs are equal, the error amplifier drives the output to equal to Equation 1. For detailed informationseeApplicationandImplementation. 14 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LP2986 can provide 200-mA output current with 2.1-V to 16-V input. It is stable with a minimum of 4.7-µF ceramic output capacitor. An input capacitor of (≥ 2.2 μF) is required. An optional external bypass capacitor reduces the output noise without slowing down the load transient response. Typical output noise is 160 µV at RMS frequenciesfrom300Hzto50kHz.Typicalpowersupplyrejectionis65dBat1kHz. 8.2 Typical Applications Figure29. ApplicationUsingInternalResistiveDivider Figure30. ApplicationUsingExternalDivider Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com Typical Applications (continued) 8.2.1 DesignRequirements Fortypicalultra-low-dropoutlinearregulatorapplications,usetheparameterslistedinTable1. Table1.DesignParameters DESIGNPARAMETER EXAMPLEVALUE Inputvoltage 4.3V Outputvoltage 3.3V Outputcurrent 200mA(maximum) RMSnoise,300Hzto50kHz 150µV typical RMS PSRRat1kHz 65dBtypical 8.2.2 DetailedDesignProcedure 8.2.2.1 UsinganExternalResistiveDivider The LP2986 output voltage can be programmed using an external resistive divider. Figure 30 shows a typical circuitapplicationusingexternalresistivedivider. The resistor connected between the FEEDBACK pin and ground should be 51.1 kΩ. The value for the other resistor(R1)connectedbetweentheFEEDBACKpinandtheregulatedoutputisfoundusingtheformula: V =V ×(1+(R1/51.1k)) (1) OUT FB It should be noted that the 25 µA of current flowing through the external divider is approximately equal to the currentsavedbynotconnectingtheinternaldivider,whichmeansthequiescentcurrentisnotincreasedbyusing externalresistors. Aleadcompensationcapacitor(C )mustalsobeusedtoplaceazerointheloopresponseatabout50kHz.The F valueforC canbefoundusing: F C =1/(2π×R1×50k) (2) F A good quality capacitor must be used for C to ensure that the value is accurate and does not change F significantly over temperature. Mica or ceramic capacitors can be used, assuming a tolerance of ±20% or better isselected. If a ceramic is used, select one with a temperature coefficient of NPO, COG, Y5P, or X7R. Capacitor types Z5U, Y5V, and Z4V can not be used because their value varies more that 50% over the −25°C to +85°C temperature range. 8.2.2.2 ExternalCapacitors Like any low-dropout regulator, external capacitors are required to assure stability. These capacitors must be correctlyselectedforproperperformance. 8.2.2.2.1 InputCapacitor An input capacitor (≥ 2.2 µF) is required between the LP2986 input and ground (amount of capacitance may be increasedwithoutlimit). This capacitor must be located a distance of not more than 0.5 inches from the input pin and returned to a clean analogground.Anygoodqualityceramicortantalummaybeusedforthiscapacitor. 8.2.2.2.2 OutputCapacitor The output capacitor must meet the requirement for minimum amount of capacitance and also have an appropriateequivalentseriesresistance(ESR)value. Curves are provided which show the allowable ESR range as a function of load current for various output voltagesandcapacitorvalues(seeFigure31andFigure32). 16 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 Figure31.ESRCurvesFor5-VOutput Figure32.ESRCurvesfor2.5-VOutput NOTE The output capacitor must maintain its ESR in the stable region over the full operating temperaturerangeoftheapplicationtoassurestability. The minimum required amount of output capacitance is 4.7 µF. Output capacitor size can be increased without limit. It is important to remember that capacitor tolerance and variation with temperature must be taken into consideration when selecting an output capacitor so that the minimum required amount of output capacitance is provided over the full operating temperature range. A good tantalum capacitor will show very little variation with temperature,butaceramicmaynotbeasgood(seeCapacitorCharacteristics). 8.2.2.3 CapacitorCharacteristics 8.2.2.3.1 Tantalum Thebestchoiceforsize,cost,andperformancearesolidtantalumcapacitors.Availablefrommanysources,their typicalESRisveryclosetotheidealvaluerequiredontheoutputofmanyLDOregulators. Tantalums also have good temperature stability: a 4.7 µF was tested and showed only a 10% decline in capacitance as the temperature was decreased from +125°C to −40°C. The ESR increased only about 2:1 over thesamerangeoftemperature. However, it should be noted that the increasing ESR at lower temperatures present in all tantalums can cause oscillations when marginal quality capacitors are used (where the ESR of the capacitor is near the upper limit of thestabilityrangeatroomtemperature). 8.2.2.3.2 Ceramic Foragivenamountofacapacitance,ceramicsareusuallylargerandmorecostlythantantalums. Be warned that the ESR of a ceramic capacitor can be low enough to cause instability: a 2.2-µF ceramic capacitorwasmeasuredandfoundtohaveanESRofabout15mΩ. If a ceramic capacitor is to be used on the LP2986 output, a 1-Ω resistor should be placed in series with the capacitortoprovideaminimumESRfortheregulator. Anotherdisadvantageofceramiccapacitorsisthattheircapacitancevariesalotwithtemperature: Large ceramic capacitors are typically manufactured with the Z5U temperature characteristic, which results in the capacitancedroppingbya50%asthetemperaturegoesfrom+25°Cto80°C. ThismeansyouhavetobuyacapacitorwithtwicetheminimumC toassurestableoperationupto80°C. OUT 8.2.2.3.3 Aluminum The large physical size of aluminum electrolytics makes them unattractive for use with the LP2986. Their ESR characteristicsarealsonotwellsuitedtotherequirementsofLDOregulators. TheESRofanaluminumelectrolyticishigherthanatantalum,anditalsovariesgreatlywithtemperature. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com A typical aluminum electrolytic can exhibit an ESR increase of 50× when going from +20°C to −40°C. Also, some aluminumelectrolyticscannotbeusedbelow −25°Cbecausetheelectrolytewillfreeze. 8.2.2.4 ReverseInput-OutputVoltage The PNP power transistor used as the pass element in the LP2986 has an inherent diode connected between theregulatoroutputandinput. Duringnormaloperation(wheretheinputvoltageishigherthantheoutput)thisdiodeisreverse-biased. However, if the output voltage is pulled above the input, or the input voltage is pulled below the output, this diode willturnONandcurrentwillflowintotheregulatorOUTpin. LP2986 VIN VOUT PNP GND Figure33. InherentDiode In such cases, a parasitic SCR can latch which will allow a high current to flow into V (and out the GROUND IN pin),whichcandamagethepart. In any application where the output voltage may be higher than the input, an external Schottky diode must be connected from V to V (cathode on V , anode on V ), to limit the reverse voltage across the LP2986 to IN OUT IN OUT 0.3V(seeAbsoluteMaximumRatings). SCHOTTKY DIODE LP2986 VIN VOUT PNP GND Figure34. InherentandExternalSchottkyDiodes 8.2.2.5 WSONPackageDevices The LP2986 is offered in the 8-pin WSON surface mount package to allow for increased power dissipation compared to the 8-pin SOIC-8 and 8-pin VSSOP. For details on WSON thermal performance as well as mountingandsolderingspecifications,refertoWSONMounting. 18 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 8.2.3 ApplicationCurves Figure35.LoadTransientResponse Figure36.LoadTransientResponse Figure37.LineTransientResponse Figure38.LineTransientResponse 9 Power Supply Recommendations The LP2986 is designed to operate from an input voltage supply range from 2.1 V to 16 V. The input voltage range provides adequate headroom for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help improve the output noise performance. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com 10 Layout 10.1 Layout Guidelines For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this groundplaneisnecessarytomeetthermalrequirements. 10.2 Layout Examples GND 1 8 SHUTDOWN FEEDBACK 2 7 ERROR DAP TAP 3 6 SENSE Error Resistor IN 4 5 OUT CIN COUT Figure39. WSONLayoutwithInternalResistorDivider GGNNDD R2 1 8 SHUTDOWN FEEDBACK 2 7 ERROR R1 DAP Error Pullup C TAP 3 6 SENSE Resistor F IN 4 5 OUT C OUT C IN Figure40. WSONLayoutwithExternalResistorDivider 20 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

LP2986 www.ti.com SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 10.3 WSON Mounting The LDC08A (pullback) 8-pin WSON package requires specific mounting techniques which are detailed in Texas Instruments Application Note Leadless Leadframe Package (LLP) (SNOA401). Referring to the section PCB Design Recommendations in SNOA401, the pad style which should be used with this WSON package is the NSMD (non-solder mask defined) type. Additionally, for optimal reliability, there is a recommended 1:1 ratio betweenthepackagepadandthePCBpadforthepullbackWSON. The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the amountofadditionalcopperareaconnectedtotheDAP. TheDAP(exposedpad)onthebottomoftheWSONpackageisconnectedtothediesubstratewithaconductive die attach adhesive. The DAP has no direct electrical (wire) connection to any of the eight pins. There is a parasitic PN junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be connected directly to the ground at device pin 1 (GROUND). Alternately, but not recommended, the DAPmaybeleftfloating(thatis,noelectricalconnection).TheDAPmustnotbeconnectedtoanypotentialother thanground. For the LP2986 in the NGN 8-pin WSON package, the junction-to-case thermal rating (R ) is 4.4°C/W, where θJC thecaseisonthebottomofthepackageatthecenteroftheDAP. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LP2986

LP2986 SNVS137I–MARCH1999–REVISEDSEPTEMBER2015 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 RelatedDocumentation Foradditionalinformation,seethefollowing: TexasInstrumentsApplicationNote LeadlessLeadframePackage(LLP)(SNOA401). 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 11.3 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 22 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated ProductFolderLinks:LP2986

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP2986AILD-3.3/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS SN Level-3-260C-168 HR -40 to 125 L005A & no Sb/Br) LP2986AILDX-3.3/NOPB ACTIVE WSON NGN 8 4500 Green (RoHS SN Level-3-260C-168 HR -40 to 125 L005A & no Sb/Br) LP2986AIM-3.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986A & no Sb/Br) IM3.0 LP2986AIM-3.3 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2986A IM3.3 LP2986AIM-3.3/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986A & no Sb/Br) IM3.3 LP2986AIM-5.0 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2986A IM5.0 LP2986AIM-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986A & no Sb/Br) IM5.0 LP2986AIMM-3.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L39A & no Sb/Br) LP2986AIMM-3.3/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L40A & no Sb/Br) LP2986AIMM-5.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L41A & no Sb/Br) LP2986AIMMX-3.0/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L39A & no Sb/Br) LP2986AIMMX-5.0/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L41A & no Sb/Br) LP2986AIMX-3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986A & no Sb/Br) IM3.3 LP2986AIMX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986A & no Sb/Br) IM5.0 LP2986ILD-3.3/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS SN Level-3-260C-168 HR -40 to 125 L005A & no Sb/Br) B LP2986IM-3.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986I & no Sb/Br) M3.0 LP2986IM-3.3/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986I & no Sb/Br) M3.3 Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LP2986IM-5.0 NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 2986I M5.0 LP2986IM-5.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986I & no Sb/Br) M5.0 LP2986IMM-3.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L39B & no Sb/Br) LP2986IMM-3.3/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L40B & no Sb/Br) LP2986IMM-5.0/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L41B & no Sb/Br) LP2986IMMX-5.0/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 L41B & no Sb/Br) LP2986IMX-3.3/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986I & no Sb/Br) M3.3 LP2986IMX-5.0 NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 2986I M5.0 LP2986IMX-5.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 2986I & no Sb/Br) M5.0 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LP2986AILD-3.3/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LP2986AILDX-3.3/NOPB WSON NGN 8 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LP2986AIMM-3.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986AIMM-3.3/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986AIMM-5.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986AIMMX-3.0/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986AIMMX-5.0/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986AIMX-3.3/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2986AIMX-5.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2986ILD-3.3/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LP2986IMM-3.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986IMM-3.3/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986IMM-5.0/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986IMMX-5.0/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LP2986IMX-3.3/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2986IMX-5.0 SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LP2986IMX-5.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LP2986AILD-3.3/NOPB WSON NGN 8 1000 210.0 185.0 35.0 LP2986AILDX-3.3/NOPB WSON NGN 8 4500 367.0 367.0 35.0 LP2986AIMM-3.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986AIMM-3.3/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986AIMM-5.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986AIMMX-3.0/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LP2986AIMMX-5.0/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LP2986AIMX-3.3/NOPB SOIC D 8 2500 367.0 367.0 35.0 LP2986AIMX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LP2986ILD-3.3/NOPB WSON NGN 8 1000 210.0 185.0 35.0 LP2986IMM-3.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986IMM-3.3/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986IMM-5.0/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LP2986IMMX-5.0/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LP2986IMX-3.3/NOPB SOIC D 8 2500 367.0 367.0 35.0 LP2986IMX-5.0 SOIC D 8 2500 367.0 367.0 35.0 LP2986IMX-5.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE NGN0008A WSON - 0.8 mm max height SCALE 3.000 PLASTIC SMALL OUTLINE - NO LEAD 4.1 B A 3.9 PIN 1 INDEX AREA 4.1 3.9 PIN 1 ID DETAIL A PIN 1 ID C 0.8 MAX SEATING PLANE 0.05 0.08 C 0.00 2.2 0.05 EXPOSED SYMM (0.2) TYP THERMAL PAD 6X 0.8 4 5 2X 9 SYMM 2.4 3 0.05 SEE DETAIL A 8 1 0.35 (0.25) 8X 0.25 0.6 (0.25) (0.2) 8X 0.1 C A B 0.4 PIN 1 ID (0.15) 0.05 C 4214794/A 11/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT NGN0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD (2.2) 8X (0.5) SYMM 1 8X (0.3) 8 SYMM 9 (3) (1.25) 6X (0.8) 4 5 (R0.05) TYP ( 0.2) VIA TYP (0.85) (3.3) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214794/A 11/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN NGN0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 0.59 SYMM METAL 8X (0.5) TYP 1 8X (0.3) 8 4X (1.31) SYMM 9 (0.755) 6X (0.8) 5 4 (R0.05) TYP 4X (0.98) (3.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 9: 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4214794/A 11/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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