LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 2.9 nV/sqrt(Hz) Low Noise, RRIO Amplifier CheckforSamples:LMP7732 FEATURES DESCRIPTION 1 • (TypicalValues,T =25°C,V =5V) The LMP7732 is a dual low noise, rail-to-rail input 23 A S and output, low voltage amplifier. The LMP7732 is • InputVoltageNoise part of the LMP™ amplifier family and is ideal for – f=3Hz3.3nV/√Hz precision and low noise applications with low voltage – f=1kHz2.9nV/√Hz requirements. • CMRR130dB This operational amplifier offers low voltage noise of • OpenLoopGain130dB 2.9 nV/√Hz with a 1/f corner of only 3 Hz. The LMP7732 has bipolar junction input stages with a • GBW22MHz bias current of only 1.5 nA. This low input bias • SlewRate2.4V/µs current, complemented by the very low level of • THD0.001%@f=10kHz,AV=1,RL=2kΩ voltage noise, makes the LMP7732 an excellent choiceforphotometryapplications. • SupplyCurrent4.4mA • SupplyVoltageRange1.8Vto5.5V The LMP7732 provides a wide GBW of 22 MHz while consuming only 4 mA of current. This high gain • OperatingTemperatureRange−40°Cto125°C bandwidth along with the high open loop gain of 130 • InputBiasCurrent±1.5nA dB enables accurate signal conditioning in • RRIO applicationswithhighclosedloopgainrequirements. The LMP7732 has a supply voltage range of 1.8V to APPLICATIONS 5.5V, making it an ideal choice for battery operated portableapplications. • GasAnalysisInstruments • PhotometricInstrumentation The LMP7732 is offered in the 8-Pin SOIC and VSSOPpackages. • MedicalInstrumentation The LMP7731 is the single version of this product and is offered in the 5-Pin SOT-23 and 8-Pin SOIC packages. Typical Performance Characteristics InputVoltageNoisevs.Frequency InputCurrentNoisevs.Frequency 100 100 VS = 2.5V, 3.3V, 5V VS = 2.5V, 3.3V, 5V z) z) H H /V /A n p ( ES ( ES VCM = 0.5V IO 10 VCM = 0.5V IO 10 N N E T G N A E T R L R O U V VCM = 2.5V C VCM = 2.5V 1 1 0.1 1 10 100 1k 10k 0.1 1 10 100 1k 10k FREQUENCY (Hz) FREQUENCY (Hz) 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. LMPisatrademarkofTexasInstruments. 2 Allothertrademarksarethepropertyoftheirrespectiveowners. 3 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2007–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Absolute Maximum Ratings(1)(2) Forinputspinsonly 2000V HumanBodyModel Forallotherpins 2000V ESDTolerance(3) MachineModel 200V ChargeDeviceModel 1000V V Differential ±2V IN SupplyVoltage(V =V+–V−) 6.0V S StorageTemperatureRange −65°Cto150°C JunctionTemperature(4) +150°Cmax InfraredorConvection(20sec) 235°C SolderingInformation WaveSolderingLeadTemp.(10sec) 260°C (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotensured.Forensuredspecificationsandthetest conditions,seetheElectricalCharacteristicsTables. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) HumanBodyModel,applicablestd.MIL-STD-883,Method3015.7.MachineModel,applicablestd.JESD22-A115-A(ESDMMstd.of JEDEC)Field-InducedCharge-DeviceModel,applicablestd.JESD22-C101-C(ESDFICDMstd.ofJEDEC). (4) ThemaximumpowerdissipationisafunctionofT ,θ ,andT .Themaximumallowablepowerdissipationatanyambient J(MAX) JA A temperatureisP =(T -T )/θJ .AllnumbersapplyforpackagessoldereddirectlyontoaPCboard. D J(MAX) A A Operating Ratings(1) TemperatureRange −40°Cto125°C SupplyVoltage(V =V+–V–) 1.8Vto5.5V S 8-PinSOIC 190°C/W PackageThermalResistance(θ ) JA 8-PinVSSOP 235°C/W (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisintendedtobefunctional,butspecificperformanceisnotensured.Forensuredspecificationsandthetest conditions,seetheElectricalCharacteristicsTables. 2 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 2.5V Electrical Characteristics(1) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=2.5V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units ±500 V =2.0V ±9 CM ±600 V InputOffsetVoltage(4) μV OS ±500 V =0.5V ±9 CM ±600 V =2.0V ±0.5 ±5.5 CM TCV InputOffsetVoltageTemperatureDrift μV/°C OS V =0.5V ±0.2 ±5.5 CM ±30 V =2.0V ±1 CM ±45 I InputBiasCurrent nA B ±50 V =0.5V ±12 CM ±75 ±50 V =2.0V ±1 CM ±75 I InputOffsetCurrent nA OS ±60 V =0.5V ±11 CM ±80 TCI InputOffsetCurrentDrift V =0.5VandV =2.0V 0.0474 nA/°C OS CM CM 0.15V≤V ≤0.7V 101 120 CM 0.23V≤V ≤0.7V 89 CM CMRR CommonModeRejectionRatio dB 1.5V≤V ≤2.35V 105 129 CM 1.5V≤V ≤2.27V 99 CM 2.5V≤V+≤5V 105 113 PSRR PowerSupplyRejectionRatio 101 dB 1.8V≤V+≤5.5V 111 CMVR CommonModeVoltageRange LargeSignalCMRR≥80dB 0 2.5 V R =10kΩtoV+/2 112 130 L V =0.5Vto2.0V 104 OUT A OpenLoopVoltageGain dB VOL R =2kΩtoV+/2 109 119 L V =0.5Vto2.0V 90 OUT R =10kΩtoV+/2 4 50 L 75 OutputVoltageSwingHigh R =2kΩtoV+/2 13 50 L 75 mVfrom V OUT R =10kΩtoV+/2 6 50 eitherrail L 75 OutputVoltageSwingLow R =2kΩtoV+/2 9 50 L 75 Sourcing,V =V+/2 22 31 OUT V (diff)=100mV 12 IN I OutputCurrent mA OUT Sinking,V =V+/2 15 44 OUT V (diff)=−100mV 10 IN 5.4 V =2.0V 4.0 CM 6.8 I SupplyCurrent mA S 6.2 V =0.5V 4.6 CM 7.8 A =+1,C =10pF,R =10kΩtoV+/2 SR SlewRate V L L 2.4 V/μs V =2V OUT PP (1) ElectricalTablevaluesapplyonlyforfactorytestingconditionsatthetemperatureindicated.Factorytestingconditionsresultinvery limitedself-heatingofthedevicesuchthatT =T .Noensuredspecificationofparametricperformanceisindicatedintheelectrical J A tablesunderconditionsofinternalself-heatingwhereT >T .AbsolutemaximumRatingsindicatejunctiontemperaturelimitsbeyond J A whichthedevicemaybepermanentlydegraded,eithermechanicallyorelectrically. (2) Alllimitsarespecifiedbytesting,statisticalanalysisordesign. (3) Typicalvaluesrepresentthemostlikelyparametricnormasdeterminedatthetimeofcharacterization.Actualtypicalvaluesmayvary overtimeandwillalsodependontheapplicationandconfiguration.Thetypicalvaluesarenottestedandarenotensuredonshipped productionmaterial. (4) Ambientproductiontestisperformedat25°Cwithavarianceof±3°C. Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com 2.5V Electrical Characteristics(1) (continued) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=2.5V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units GBW GainBandwidth C =20pF,R =10kΩtoV+/2 21 MHz L L G GainMargin C =20pF,R =10kΩtoV+/2 14 dB M L L Φ PhaseMargin C =20pF,R =10kΩtoV+/2 60 deg M L L DifferentialMode 38 kΩ R InputResistance IN CommonMode 151 MΩ THD+N TotalHarmonicDistortion+Noise A =1,f =1kHz,Amplitude=1V 0.002 % V O f=1kHz,V =2.0V 3.0 CM InputReferredVoltageNoiseDensity nV/√Hz e f=1kHz,V =0.5V 3.0 n CM InputVoltageNoise 0.1Hzto10Hz 75 nV PP f=1kHz,V =2.0V 1.1 CM i InputReferredCurrentNoiseDensity pA/√Hz n f=1kHz,V =0.5V 2.3 CM 4 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 3.3V Electrical Characteristics(1) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=3.3V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units ±500 V =2.5V ±6 CM ±600 V InputOffsetVoltage(4) μV OS ±500 V =0.5V ±6 CM ±600 InputOffsetVoltageTemperature VCM=2.5V ±0.5 ±5.5 TCV μV/°C OS Drift V =0.5V ±0.2 ±5.5 CM ±30 V =2.5V ±1.5 CM ±45 I InputBiasCurrent nA B ±50 V =0.5V ±13 CM ±77 ±50 V =2.5V ±1 CM ±70 I InputOffsetCurrent nA OS ±60 V =0.5V ±11 CM ±80 TCI InputOffsetCurrentDrift V =0.5VandV =2.5V 0.048 nA/°C OS CM CM 0.15V≤V ≤0.7V 101 CM 120 0.23V≤V ≤0.7V 89 CM CMRR CommonModeRejectionRatio dB 1.5V≤V ≤3.15V 105 CM 130 1.5V≤V ≤3.07V 99 CM 2.5V≤V+≤5.0V 105 113 PSRR PowerSupplyRejectionRatio 101 dB 1.8V≤V+≤5.5V 111 CMVR CommonModeVoltageRange LargeSignalCMRR≥80dB 0 3.3 V R =10kΩtoV+/2 112 L 130 V =0.5Vto2.8V 104 OUT A OpenLoopVoltageGain dB VOL R =2kΩtoV+/2 110 L 119 V =0.5Vto2.8V 92 OUT R =10kΩtoV+/2 5 50 L 75 OutputVoltageSwingHigh R =2kΩtoV+/2 14 50 L 75 mVfrom V OUT R =10kΩtoV+/2 9 50 eitherrail L 75 OutputVoltageSwingLow R =2kΩtoV+/2 13 50 L 75 Sourcing,V =V+/2 28 OUT 45 V (diff)=100mV 22 IN I OutputCurrent mA OUT Sinking,V =V+/2 25 OUT 48 V (diff)=−100mV 20 IN 5.6 V =2.5V 4.2 mA CM 7.0 I SupplyCurrent S 6.4 V =0.5V 4.8 CM 8.0 A =+1,C =10pF,R =10kΩto V L L SR SlewRate V+/2 2.4 V/μs V =2V OUT PP (1) ElectricalTablevaluesapplyonlyforfactorytestingconditionsatthetemperatureindicated.Factorytestingconditionsresultinvery limitedself-heatingofthedevicesuchthatT =T .Noensuredspecificationofparametricperformanceisindicatedintheelectrical J A tablesunderconditionsofinternalself-heatingwhereT >T .AbsolutemaximumRatingsindicatejunctiontemperaturelimitsbeyond J A whichthedevicemaybepermanentlydegraded,eithermechanicallyorelectrically. (2) Alllimitsarespecifiedbytesting,statisticalanalysisordesign. (3) Typicalvaluesrepresentthemostlikelyparametricnormasdeterminedatthetimeofcharacterization.Actualtypicalvaluesmayvary overtimeandwillalsodependontheapplicationandconfiguration.Thetypicalvaluesarenottestedandarenotensuredonshipped productionmaterial. (4) Ambientproductiontestisperformedat25°Cwithavarianceof±3°C. Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com 3.3V Electrical Characteristics(1) (continued) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=3.3V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units GBW GainBandwidth C =20pF,R =10kΩtoV+/2 22 MHz L L G GainMargin C =20pF,R =10kΩtoV+/2 14 dB M L L Φ PhaseMargin C =20pF,R =10kΩtoV+/2 62 deg M L L THD+N TotalHarmonicDistortion+Noise A =1,f =1kHz,Amplitude=1V 0.002 % V O DifferentialMode 38 kΩ R InputResistance IN CommonMode 151 MΩ InputReferredVoltageNoise f=1kHz,VCM=2.5V 2.9 nV/√Hz e Density f=1kHz,V =0.5V 2.9 n CM InputVoltageNoise 0.1Hzto10Hz 75 nV PP InputReferredCurrentNoise f=1kHz,VCM=2.5V 1.1 pA/√Hz i n Density f=1kHz,V =0.5V 2.1 CM 5V Electrical Characteristics(1) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=5V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units ±500 V =4.5V ±6 CM ±600 V InputOffsetVoltage(4) μV OS ±500 V =0.5V ±6 CM ±600 V =4.5V ±0.5 ±5.5 CM TCV InputOffsetVoltageTemperatureDrift μV/°C OS V =0.5V ±0.2 ±5.5 CM ±30 V =4.5V ±1.5 CM ±50 I InputBiasCurrent nA B ±50 V =0.5V ±14 CM ±85 ±50 V =4.5V ±1 CM ±70 I InputOffsetCurrent nA OS ±65 V =0.5V ±11 CM ±80 TCI InputOffsetCurrentDrift V =0.5VandV =4.5V 0.0482 nA/°C OS CM CM 0.15V≤V ≤0.7V 101 120 CM 0.23V≤V ≤0.7V 89 CM CMRR CommonModeRejectionRatio dB 1.5V≤V ≤4.85V 105 130 CM 1.5V≤V ≤4.77V 99 CM 2.5V≤V+≤5V 105 113 PSRR PowerSupplyRejectionRatio 101 dB 1.8V≤V+≤5.5V 111 CMVR CommonModeVoltageRange LargeSignalCMRR≥80dB 0 5 V R =10kΩtoV+/2 112 130 L V =0.5Vto4.5V 104 OUT A OpenLoopVoltageGain dB VOL R =2kΩtoV+/2 110 119 L V =0.5Vto4.5V 94 OUT (1) ElectricalTablevaluesapplyonlyforfactorytestingconditionsatthetemperatureindicated.Factorytestingconditionsresultinvery limitedself-heatingofthedevicesuchthatT =T .Noensuredspecificationofparametricperformanceisindicatedintheelectrical J A tablesunderconditionsofinternalself-heatingwhereT >T .AbsolutemaximumRatingsindicatejunctiontemperaturelimitsbeyond J A whichthedevicemaybepermanentlydegraded,eithermechanicallyorelectrically. (2) Alllimitsarespecifiedbytesting,statisticalanalysisordesign. (3) Typicalvaluesrepresentthemostlikelyparametricnormasdeterminedatthetimeofcharacterization.Actualtypicalvaluesmayvary overtimeandwillalsodependontheapplicationandconfiguration.Thetypicalvaluesarenottestedandarenotensuredonshipped productionmaterial. (4) Ambientproductiontestisperformedat25°Cwithavarianceof±3°C. 6 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 5V Electrical Characteristics(1) (continued) Unlessotherwisespecified,alllimitsareensuredforT =25°C,V+=5V,V−=0V,V =V+/2,R >10kΩtoV+/2.Boldface A CM L limitsapplyatthetemperatureextremes. Symbol Parameter Conditions Min(2) Typ(3) Max(2) Units R =10kΩtoV+/2 8 50 L 75 OutputVoltageSwingHigh R =2kΩtoV+/2 24 50 L 75 mVfrom V OUT R =10kΩtoV+/2 9 50 eitherrail L 75 OutputVoltageSwingLow R =2kΩtoV+/2 23 50 L 75 Sourcing,V =V+/2 33 47 OUT V (diff)=100mV 27 IN I OutputCurrent mA OUT Sinking,V =V+/2 30 49 OUT V (diff)=−100mV 25 IN 6.0 V =4.5V 4.4 CM 7.4 I SupplyCurrent mA S 6.8 V =0.5V 5.0 CM 8.4 A =+1,C =10pF,R =10kΩtoV+/2 SR SlewRate V L L 2.4 V/μs V =2V OUT PP GBW GainBandwidth C =20pF,R =10kΩtoV+/2 22 MHz L L G GainMargin C =20pF,R =10kΩtoV+/2 12 dB M L L Φ PhaseMargin C =20pF,R =10kΩtoV+/2 65 deg M L L DifferentialMode 38 kΩ R InputResistance IN CommonMode 151 MΩ THD+N TotalHarmonicDistortion+Noise A =1,f =1kHz,Amplitude=1V 0.001 % V O f=1kHz,V =4.5V 2.9 CM InputReferredVoltageNoiseDensity nV/√Hz e f=1kHz,V =0.5V 2.9 n CM InputVoltageNoise 0.1Hzto10Hz 75 nV PP f=1kHz,V =4.5V 1.1 CM i InputReferredCurrentNoiseDensity pA/√Hz n f=1kHz,V =0.5V 2.2 CM Connection Diagram 8-PinSOIC/VSSOP OUT A 1 8 V+ 2 A 7 -IN A - + OUT B +IN A 3 B 6 -IN B + - V- 4 5 +IN B Figure1. TopView Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S OffsetVoltageDistribution TCV Distribution OS 10 25 VS = 2.5V, 3.3V VS = 2.5V 9 VCM = 0.5V VCM = 0.5V 8 20 )% 7 )% ( E 6 ( E 15 G G A A T 5 T N N E E C 4 C 10 R R E E P 3 P 2 5 1 0 0 -40 -30 -20 -10 0 10 20 30 40 -0.5 0 0.5 1 1.5 VOS (PV) TCVOS (PV/°C) Figure2. Figure3. OffsetVoltageDistribution TCV Distribution OS 10 25 9 VS = 5V VS = 3.3V, 5V 8 VCM = 0.5V 20 VCM = 0.5V )% 7 )% ( E 6 ( E 15 G G A A T 5 T N N E E C 4 C 10 R R E E P 3 P 2 5 1 0 0 -40 -30 -20 -10 0 10 20 30 40 -0.5 0 0.5 1 1.5 VOS (PV) TCVOS (PV/°C) Figure4. Figure5. OffsetVoltageDistribution TCV Distribution OS 9 14 8 VS = 2.5V, 5V VS = 2.5V VCM = VS - 0.5V 12 VCM = 2V 7 )% )% 10 ( E 6 ( E GA 5 GA 8 T T N N E 4 E 6 C C R R E 3 E P P 4 2 2 1 0 0 -40 -30 -20 -10 0 10 20 30 40 -0.5 0 0.5 1 1.5 VOS (PV) TCVOS (PV/°C) Figure6. Figure7. 8 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S OffsetVoltageDistribution TCV Distribution OS 8 14 VS = 3.3V, 5V 7 VS = 3.3V 12 VCM = 2.5V, 4.5V VCM = 2.5V 6 )% )% 10 ( E 5 ( E G G 8 A A TN 4 TN E E 6 CR 3 CR E E P P 4 2 1 2 0 0 -40 -30 -20 -10 0 10 20 30 40 -0.5 0 0.5 1 1.5 VOS (PV) TCVOS (PV/°C) Figure8. Figure9. OffsetVoltagevs.Temperature OffsetVoltagevs.Temperature 40 100 VS = 2.5V, 3.3V, 5V VS = 2.5V, 3.3V, 5V 30 VCM = 0.5V 75 VCM = 2V, 2.5V, 4.5V 5 TYPICAL PARTS 50 5 TYPICAL PARTS 20 25 V) 10 V) P P (S (S 0 O 0 O V V -25 -10 -50 -20 -75 -30 -100 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure10. Figure11. PSRRvs.Frequency CMRRvs.Frequency 0 160 VS = 2.5V, 3.3V, 5V 140 -20 -PSRR 120 -40 )B )B 100 d -60 d ( RR VS = 2.5V ( RR 80 SP -80 +PSRR MC 60 -100 40 -120 20 VS = 3.3V VS = 5V & 3.3V -140 0 10 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure12. Figure13. Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S OffsetVoltagevs.SupplyVoltage OffsetVoltagevs.V CM 5 100 VS = 2.5V 0 25°C 75 )V P 50 ( E -5 125°C G A )V 25 85°C T -40°C P LO -10 ( S V O 0 25°C T V ES -15 -40°C F -25 F 85°C O -20 -50 125°C -25 -75 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 SUPPLY VOLTAGE (V) VCM (V) Figure14. Figure15. OffsetVoltagevs.V OffsetVoltagevs.V CM CM 100 100 VS = 3.3V VS = 5V 75 75 50 50 125°C 125°C )V 25 85°C )V 25 85°C P P ( S ( S VO 0 25°C VO 0 25°C -40°C -40°C -25 -25 -50 -50 -75 -75 0 0.5 1 1.5 2 2.5 3 3.3 0 1 2 3 4 5 VCM (V) VCM (V) Figure16. Figure17. InputOffsetVoltageTimeDrift SlewRatevs.SupplyVoltage 5.0 3.4 RISING EDGE )V 3.2 P 4.0 ( TFIR )sP 3 D EGATLO 23..00 /V( ETAR W 22..86 FALLING EDGE V E TE LS 2.4 AV = +1 S F 1.0 VS = 5V VIN = 1 VPP F O RL = 2 k: 2.2 RL = 10 k: 5 TYPICAL UNITS CL = 10 pF 0.0 2 0 50 100 150 200 250 300 1.5 2 2.5 3 3.5 4 4.5 5 5.5 TIME (s) SUPPLY VOLTAGE (V) Figure18. Figure19. 10 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S TimeDomainVoltageNoise TimeDomainVoltageNoise Figure20. Figure21. TimeDomainVoltageNoise OutputVoltagevs.OutputCurrent 1000 VS = 2.5V, 3.3V, 5V 800 600 VS = 2.5V )V m ( L 400 SINK IA R 200 M O 0 R F T -200 U O V -400 SOURCE -600 -800 0 5 10 15 20 25 30 OUTPUT CURRENT (mA) Figure22. Figure23. InputBiasCurrentvs.V InputBiasCurrentvs.V CM CM 100 100 125°C VS = 2.5V 125°C VS = 3.3V 80 80 )A 60 )A 60 n( T 40 85°C n( T 40 85°C N 25°C N 25°C E E R 20 R 20 R R UC 0 UC 0 S S A -20 A -20 IB IB T -40 T -40 -40°C U -40°C U P P N -60 N -60 I I -80 -80 -100 -100 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 3 3.5 VCM (V) VCM (V) Figure24. Figure25. Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S InputBiasCurrentvs.V OpenLoopFrequencyResponseOverTemperature CM 100 100 225 125°C VS = 5V 80 GAIN 80 180 )A 60 n( TN 40 85°C 60 VS = 5V, TA = -40°C 135 E 25°C RRUC 200 )Bd( N 40 PHASE 90 )(° ES S IA 20 45 AH AIB -20 G VS = 2.5V, TA = 25°C P TU -40 -40°C 0 0 PN -60 VS = 2.5V, 3.3V, 5V I -20 RL = 10 k: -45 -80 TA = -40°C, 25°C, 85°C, 125°C -100 -40 -90 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 1k 10k 100k 1M 10M 100M VCM (V) FREQUENCY (Hz) Figure26. Figure27. OpenLoopFrequencyResponse OpenLoopFrequencyResponse 100 225 100 225 GAIN VS = 5V 80 GAIN 180 80 RL = 10 k: 180 VS = 5V, CL = 20 pF, CL = 20 pF 60 RL = 2 k: 135 60 135 -40°C )Bd( NIAG 2400 VPSH =A S2E.5V, CL = 100 pF, 9405 °) E(SAHP )Bd( NIAG 2400 PHASE 25°C 4950 )(° ESAHP 0 RL = 10 k: 0 0 85°C 0 VS = 2.5V, 3.3V, 5V -20 CL = 20 pF, 50 pF, 100 pF -45 -20 125°C -45 RL = 2 k:, 10 k: -40 -90 -40 -90 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure28. Figure29. THD+Nvs.Frequency THD+Nvs.OutputVoltage 1 1 RL = 100 k: RL = 100 k: CL = 10 pF CL = 10 pF 0.1 VO = VS -1V 0.1 f = 1 kHz )% )% ( N+D 0.01 VS = 2.5V VS = 3.3V ( N+D 0.01 H H T T VS = 2.5V 0.001 0.001 VS = 5V VS = 3.3V VS = 5V 0.0001 0.0001 10 100 1k 10k 100k 0.1 1 10 FREQUENCY (Hz) VOUT (VPP) Figure30. Figure31. 12 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S LargeSignalStepResponse SmallSignalStepResponse VID VID /Vm 005 VVSIN = = 5 2V VPP /Vm 02 VVSIN = = 5 1V00 mVPP f = 10 kHz f = 10 kHz AV = +1 AV = +1 RL = 10 k: RL = 10 k: CL = 10 pF CL = 10 pF 10 Ps/DIV 10 Ps/DIV Figure32. Figure33. LargeSignalStepResponse SmallSignalStepResponse V V ID ID VS = 5V /V VS = 5V /V m 1 VIN = 400 mVPP 00 VIN = 100 mVPP f = 10 kHz 2 f = 10 kHz AV = +10 AV = +10 RL = 10 k: RL = 10 k: CL = 10 pF CL = 10 pF 10 Ps/DIV 10 Ps/DIV Figure34. Figure35. SupplyCurrentvs.SupplyVoltage OutputSwingHighvs.SupplyVoltage 7 40 RL = 2 k: 35 6 125°C )Am( TN 5 )Vm( L 2350 125°C ER 4 25°C IAR 85°C R -40°C M 20 UC Y 3 ORF 15 -40°C LPPUS 2 VTUO 10 25°C 1 5 0 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure36. Figure37. Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com Typical Performance Characteristics (continued) Unlessotherwisenoted:T =25°C,R >10kΩ,V =V /2. A L CM S OutputSwingLowvs.SupplyVoltage SinkingCurrentvs,SupplyVoltage 40 60 RL = 2 k: -40°C 25°C 35 50 )V 30 125°C m ( LIAR 25 85°C )Am 40 85°C 125°C MO 20 ( KN RF 15 IIS 30 T -40°C U VO 10 25°C 20 5 0 10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure38. Figure39. SourcingCurrentvs.SupplyVoltage 60 -40°C 50 25°C )A m 40 ( E C R 125°C U O 30 S I 85°C 20 10 1.5 2 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) Figure40. 14 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 APPLICATION NOTES LMP7732 TheLMP7732isaduallownoise,rail-to-railinputandoutput,lowvoltageamplifier. The low input voltage noise of only 2.9 nV/√Hz with a 1/f corner at 3 Hz makes the LMP7732 ideal for sensor applicationswhereDCaccuracyisofimportance. The LMP7732 has high gain bandwidth of 22 MHz. This wide bandwidth enables the use of the amplifier at higher gain settings while retaining ample usable bandwidth for the application. This is particularly beneficial when system designers need to use sensors with very limited output voltage range as it allows larger gains in onestagewhichinturnincreasessignaltonoiseratio. The LMP7732 has a proprietary input bias cancellation circuitry on the input stages. This allows the LMP7732 to have only about 1.5 nA bias current with a bipolar input stage. This low input bias current, paired with the inherent lower input voltage noise of bipolar input stages makes the LMP7732 an excellent choice for precision applications. The combination of low input bias current, low input offset voltage, and low input voltage noise enablestheusertoachieveunprecedentedaccuracyandhighersignalintegrity. Texas Instruments is heavily committed to precision amplifiers and the market segment they serve. Technical support and extensive characterization data is available for sensitive applications or applications with a constrainederrorbudget. The LMP7732 comes in the 8-Pin SOIC and VSSOP packages. These small packages are ideal solutions for areaconstrainedPCboardsandportableelectronics. INPUT BIAS CURRENT CANCELLATION TheLMP7732hasproprietaryinputbiascurrentcancellationcircuitryonitsinputstage. The LMP7732 has rail-to-rail input. This is achieved by having a p-input and n-input stage in parallel. Figure 41 onlyshowsoneoftheinputstagesasthecircuitryissymmetricalforbothstages. Figure 41 shows that as the common mode voltage gets closer to one of the extreme ends, current I 1 significantly increases. This increased current shows as an increase in voltage drop across resistor R equal to 1 I *R on IN+ of the amplifier. This voltage contributes to the offset voltage of the amplifier. When common mode 1 1 voltage is in the mid-range, the transistors are operating in the linear region and I is significantly small. The 1 voltage drop due to I across R can be ignored as it is orders of magnitude smaller than the amplifier's input 1 1 offset voltage. As the common mode voltage gets closer to one of the rails, the offset voltage generated due to I 1 increasesandbecomescomparabletotheamplifiersoffsetvoltage. IBIAS CANCELLATION CIRCUIT + V INPUT STAGE + V R R C1 C2 R1 I1 IN+ Q1 Q2 R2 - IN Figure41. InputBiasCurrentCancellation Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com INPUT VOLTAGE NOISE MEASUREMENT The LMP7732 has very low input voltage noise. The peak-to-peak input voltage noise of the LMP7732 can be measuredusingthetestcircuitshowninFigure42. 0.1 PF 100 k: - ½ 2 k: 10: L+MP7732 L+MP½7732 4.3 k: 22 PF Sx C1OPE 4.7 PF - 100 k: 2.2 PF 110 k: RIN = 1M VOLTAGE GAIN = 50,000 24.3 k: 0.1 PF Figure42. 0.1Hzto10HzNoiseTestCircuit The frequency response of this noise test circuit at the 0.1 Hz corner is defined by only one zero. The test time for the 0.1 Hz to 10 Hz noise measurement using this configuration should not exceed 10 seconds, as this time limitactsasanadditionalzerotoreduceoreliminatethecontributionsofnoisefromfrequenciesbelow0.1Hz. Figure43showstypicalpeak-to-peaknoisefortheLMP7732measuredwiththecircuitinFigure42. Figure43. 0.1Hzto10HzInputVoltageNoise Measuring the very low peak-to-peak noise performance of the LMP7732, requires special testing attention. In order to achieve accurate results, the device should be warmed up for at least five minutes. This is so that the input offset voltage of the op amp settles to a value. During this warm up period, the offset can typically change by a few µV because the chip temperature increases by about 30°C. If the 10 seconds of the measurement is selected to include this warm up time, some of this temperature change might show up as the measured noise. Figure44showsthestart-updriftoffivetypicalLMP7732units. 16 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 5.0 )V P 4.0 ( T F IR D E 3.0 G A T L O 2.0 V T E S FF 1.0 VS = 5V O RL = 2 k: 5 TYPICAL UNITS 0.0 0 50 100 150 200 250 300 TIME (s) Figure44. Start-UpInputOffsetVoltageDrift During the peak-to-peak noise measurement, the LMP7732 must be shielded. This prevents offset variations due to airflow. Offset can vary by a few nV due to this airflow and that can invalidate measurements of input voltage noise with a magnitude which is in the same range. For similar reasons, sudden motions must also be restricted in the vicinity of the test area. The feed-through which results from this motion could increase the observed noise valuewhichinturnwouldinvalidatethemeasurement. DIODES BETWEEN THE INPUTS TheLMP7732hasasetofanti-paralleldiodesbetweentheirinputpins,asshowninFigure45.Thesediodesare present to protect the input stage of the amplifiers. At the same time, they limit the amount of differential input voltage that is allowed on the input pins. A differential signal larger than the voltage needed to turn on the diodes might cause damage to the diodes. The differential voltage between the input pins should be limited to ±3 diode dropsortheinputcurrentneedstobelimitedto±20mA. + + V V ESD ESD R1 R2 IN+ IN- ESD ESD V- V- Figure45. Anti-ParallelDiodesbetweenInputs DRIVING AN ADC Analog to Digital Converters, ADCs, usually have a sampling capacitor on their input. When the ADC's input is directly connected to the output of the amplifier a charging current flows from the amplifier to the ADC. This charging current causes a momentary glitch that can take some time to settle. There are different ways to minimizethiseffect.Onewayistoslowdownthesamplingrate.Thismethodgivestheamplifiersufficienttimeto stabilize its output. Another way to minimize the glitch, caused by the switch capacitor, is to have an external capacitor connected to the input of the ADC. This capacitor is chosen so that its value is much larger than the internal switching capacitor and it will hence provide the charge needed to quickly and smoothly charge the ADC's sampling capacitor. Since this large capacitor will be loading the output of the amplifier as well, an isolation resistor is needed between the output of the amplifier and this capacitor. The isolation resistor, R , ISO separates the additional load capacitance from the output of the amplifier and will also form a low-pass filter and can be designed to provide noise reduction as well as anti-aliasing. The draw back of having R is that it ISO reducessignalswingsincethereissomevoltagedropacrossit. Figure 46 (a) shows the ADC directly connected to the amplifier. To minimize the glitch in this setting, a slower samplerateneedstobeused.Figure46(b)showsR andanexternalcapacitorusedtominimizetheglitch. ISO Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LMP7732

LMP7732 SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 www.ti.com (a) FEEDBACK NETWORK V+ ADC INPUT SENSOR NETWORK V- (b) FEEDBACK NETWORK V+ ADC RISO INPUT SENSOR NETWORK C V- Figure46. DrivingAnADC 18 SubmitDocumentationFeedback Copyright©2007–2013,TexasInstrumentsIncorporated ProductFolderLinks:LMP7732

LMP7732 www.ti.com SNOSAZ0E–AUGUST2007–REVISEDMARCH2013 REVISION HISTORY ChangesfromRevisionD(March2013)toRevisionE Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 18 Copyright©2007–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LMP7732

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LMP7732MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LMP77 & no Sb/Br) 32MA LMP7732MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LMP77 & no Sb/Br) 32MA LMP7732MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM AZ3A & no Sb/Br) LMP7732MME/NOPB ACTIVE VSSOP DGK 8 250 Green (RoHS SN Level-1-260C-UNLIM AZ3A & no Sb/Br) LMP7732MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM AZ3A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LMP7732MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMP7732MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMP7732MME/NOPB VSSOP DGK 8 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMP7732MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LMP7732MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMP7732MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMP7732MME/NOPB VSSOP DGK 8 250 210.0 185.0 35.0 LMP7732MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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