Product Sample & Technical Tools & Support & Folder Buy Documents Software Community LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 ® LM22672/-Q1 42-V, 1-A SIMPLE SWITCHER Step-Down Voltage Regulator with Features 1 Features 3 Description • WideInputVoltageRange:4.5Vto42V The LM22672 switching regulator provides all of the 1 functions necessary to implement an efficient high • InternallyCompensatedVoltageModeControl voltage step-down (buck) regulator using a minimum • StablewithLowESRCeramicCapacitors of external components. This easy to use regulator • 200mΩN-ChannelMOSFET incorporates a 42 V N-channel MOSFET switch capable of providing up to 1 A of load current. • OutputVoltageOptions: Excellent line and load regulation along with high -ADJ(OutputsasLowas1.285V) efficiency (> 90%) are featured. Voltage mode control -5.0(OutputFixedto5V) offers short minimum on-time, allowing the widest • ±1.5%FeedbackReferenceAccuracy ratio between input and output voltages. Internal loop • 500kHzDefaultSwitchingFrequency compensation means that the user is free from the tedious task of calculating the loop compensation • AdjustableSwitchingFrequencyand components. Fixed 5 V output and adjustable output Synchronization voltageoptionsareavailable. • –40°Cto125°CJunctionTemperatureRange The default switching frequency is set at 500 kHz • PrecisionEnableInput allowing for small external components and good • IntegratedBoot-StrapDiode transient response. In addition, the frequency can be • AdjustableSoft-Start adjusted over a range of 200 kHz to 1 MHz with a single external resistor. The internal oscillator can be • FullyWEBENCH®Enabled synchronized to a system clock or to the oscillator of • LM22672-Q1isanAutomotiveGradeProduct another regulator. A precision enable input allows thatisAEC-Q100Grade1Qualified(–40°Cto simplification of regulator control and system power +125°CJunctionTemperature) sequencing. In shutdown mode the regulator draws • SOPowerPAD(ExposedPad) only 25 µA (typ). An adjustable soft-start feature is provided through the selection of a single external capacitor. The LM22672 also has built in thermal 2 Applications shutdown, and current limiting to protect against • IndustrialControl accidentaloverloads. • TelecomandDatacomSystems The LM22672 is a member of Texas Instruments' • EmbeddedSystems SIMPLE SWITCHER® family. The SIMPLE • ConversionsfromStandard24V,12Vand5V SWITCHER® concept provides for an easy to use complete design using a minimum number of external InputRails components and the TI WEBENCH® design tool. TI's WEBENCH® tool includes features such as external SimplifiedApplicationSchematic component calculation, electrical simulation, thermal VIN simulation,andBuild-Itboardsforeasydesign-in. VIN FB LM22672-ADJ BOOT DeviceInformation(1) VOUT SW PARTNUMBER PACKAGE BODYSIZE(NOM) RT/SYNC SS EN GND LM22672, HSOP(8) 4.89mmx3.90mm LM22672-Q1 (1) For all available packages, see the orderable addendum at theendofthedatasheet. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 7.4 DeviceFunctionalMode.........................................12 2 Applications........................................................... 1 8 ApplicationandImplementation........................ 16 3 Description............................................................. 1 8.1 ApplicationInformation............................................16 4 RevisionHistory..................................................... 2 8.2 TypicalApplication..................................................17 5 PinConfigurationandFunctions......................... 3 9 PowerSupplyRecommendations...................... 21 6 Specifications......................................................... 4 10 Layout................................................................... 21 6.1 AbsoluteMaximumRatings......................................4 10.1 LayoutGuidelines.................................................21 6.2 HandlingRatings:LM22672......................................4 10.2 LayoutExample....................................................22 6.3 HandlingRatings:LM22672-Q1................................4 10.3 ThermalConsiderations........................................22 6.4 RecommendedOperatingConditions.......................4 11 DeviceandDocumentationSupport................. 24 6.5 ThermalInformation..................................................4 11.1 DocumentationSupport........................................24 6.6 ElectricalCharacteristics...........................................5 11.2 RelatedLinks........................................................24 6.7 TypicalCharacteristics..............................................6 11.3 Trademarks...........................................................24 7 DetailedDescription.............................................. 8 11.4 ElectrostaticDischargeCaution............................24 7.1 Overview...................................................................8 11.5 Glossary................................................................24 7.2 FunctionalBlockDiagram.........................................8 12 Mechanical,Packaging,andOrderable Information........................................................... 24 7.3 FeatureDescription...................................................9 4 Revision History ChangesfromRevisionL(April2013)toRevisionM Page • AddedPinConfigurationandFunctionssection,HandlingRatingtable,FeatureDescriptionsection,Device FunctionalModes,ApplicationandImplementationsection,PowerSupplyRecommendationssection,Layout section,DeviceandDocumentationSupportsection,andMechanical,Packaging,andOrderableInformation section ................................................................................................................................................................................... 1 ChangesfromRevisionK(April2013)toRevisionL Page • ChangedfromNationaltoTIformat ...................................................................................................................................... 1 2 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 5 Pin Configuration and Functions 8-Pin HSOPPackage TopView BOOT 1 8 SW SS 2 7 VIN RT/SYNC 3 6 GND FB 4 5 EN Exposed Pad Connect to GND PinFunctions PIN TYPE DESCRIPTION APPLICATIONINFORMATION NAME NO. BOOT 1 I Bootstrapinput ProvidesthegatevoltageforthehighsideNFET. Usedtocontrolregulatorstart-upandshutdown.SeePrecision EN 5 I Enableinput EnableandUVLOsectionofdatasheet. Connecttoground.ProvidesthermalconnectiontoPCB.See EP EP — ExposedPad ThermalConsiderations. FB 4 I Feedbackinput Feedbackinputtoregulator. Groundinputtoregulator; GND 6 — Systemgroundpin. systemcommon Usedtocontroloscillatormodeofregulator.SeeSwitching RT/SYNC Oscillatormodecontrolinput FrequencyAdjustmentandSynchronizationsectionofdatasheet. Usedtoincreasesoft-starttime.SeeSoft-Startsectionofdata SS 2 I Soft-startinput sheet. SW 8 O Switchoutput Switchingoutputofregulator. VIN I Inputvoltage Supplyinputtotheregulator. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings(1)(2) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT VINtoGND 43 V ENPinVoltage –0.5 6 V SS,RT/SYNCPinVoltage –0.5 7 V SWtoGND(3) –5 V V IN BOOTPinVoltage V +7 V SW FBPinVoltage –0.5 7 V PowerDissipation InternallyLimited JunctionTemperature 150 °C Forsolderingspecifications,refertoApplicationReportAbsoluteMaximumRatingsforSoldering(SNOA549). (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur,includinginoperabilityanddegradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximumRatingsor otherconditionsbeyondthoseindicatedintheRecommendedOperatingConditionsisnotimplied.RecommendedOperatingConditions indicateconditionsatwhichthedeviceisfunctionalandshouldnotbeoperatedbeyondsuchconditions.Forensuredspecificationsand conditions,seetheElectricalCharacteristicstable. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Theabsolutemaximumspecificationofthe‘SWtoGND’appliestodcvoltage.Anextendednegativevoltagelimitof–10Vappliestoa pulseofupto50ns. 6.2 Handling Ratings: LM22672 MIN MAX UNIT T Storagetemperaturerange –65 150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all V(ESD) Electrostaticdischarge pins(1) –2 2 kV (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Handling Ratings: LM22672-Q1 MIN MAX UNIT T Storagetemperaturerange –65 150 °C stg V Electrostaticdischarge Humanbodymodel(HBM),perAECQ100-002(1) –2 2 kV (ESD) (1) AECQ100-002indicatesHBMstressingisdoneinaccordancewiththeANSI/ESDA/JEDECJS-001specification. 6.4 Recommended Operating Conditions MIN MAX UNIT V SupplyVoltage 4.5 42 V IN JunctionTemperatureRange –40 125 °C 6.5 Thermal Information LM22672, LM22672-Q1 THERMALMETRIC(1) UNIT HSOP 8PINS RθJA Junction-to-ambientthermal MRPackage,Junctiontoambientthermalresistance(2) 60 °C/W resistance (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport(SPRA953). (2) ThevalueofRθ fortheSOPowerPADexposedpad(MR)packageof60°C/Wisvalidifpackageismountedto1squareinchof JA copper.TheRθ valuecanrangefrom42to115°C/WdependingontheamountofPCBcopperdedicatedtoheattransfer. JA 4 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 6.6 Electrical Characteristics TypicalvaluesrepresentthemostlikelyparametricnormatT =T =25°C,andareprovidedforreferencepurposesonly. A J Unlessotherwisespecified:V =12V. IN PARAMETER TESTCONDITIONS MIN(1) TYP(2) MAX(1) UNIT LM22672-5.0 FeedbackVoltage V =8Vto42V 4.925 5.0 5.075 IN VFB VIN=8Vto42V,–40°C≤TJ≤ 4.9 5.1 V 125°C LM22672-ADJ FeedbackVoltage V =4.7Vto42V 1.266 1.285 1.304 IN VFB VIN=4.7Vto42V,–40°C≤TJ≤ 1.259 1.311 V 125°C ALLOUTPUTVOLTAGEVERSIONS V =5V 3.4 FB I QuiescentCurrent mA Q V =5V,–40°C≤T ≤125°C 6 FB J I StandbyQuiescentCurrent ENPin=0V 25 40 µA STDBY 1.3 1.5 1.7 I CurrentLimit A CL –40°C≤T ≤125°C 1.2 1.8 J V =42V,ENPin=0V,V =0V 0.2 2 µA IN SW I OutputLeakageCurrent L V =–1V 0.1 3 µA SW 0.2 0.24 R SwitchOn-Resistance Ω DS(ON) –40°C≤T ≤125°C 0.32 J 500 F OscillatorFrequency kHz sw –40°C≤T ≤125°C 400 600 J 200 T MinimumOff-time ns OFF –40°C≤T ≤125°C 100 300 J T MinimumOn-time 100 ns ON I FeedbackBiasCurrent V =1.3V(ADJVersionOnly) 230 nA BIAS FB Falling 1.6 V EnableThresholdVoltage V EN Falling,–40°C≤T ≤125°C 1.3 1.9 J V EnableVoltageHysteresis 0.6 V ENHYST I EnableInputCurrent ENInput=0V 6 µA EN MaximumSynchronization F V =3.5V,50%duty-cycle 1 MHz SYNC Frequency SYNC SynchronizationThreshold V 1.75 V SYNC Voltage 50 I Soft-StartCurrent µA SS –40°C≤T ≤125°C 30 70 J T ThermalShutdownThreshold 150 °C SD (1) MINandMAXlimitsare100%productiontestedat25°C.Limitsovertheoperatingtemperaturerangeareensuredthroughcorrelation usingStatisticalQualityControl(SQC)methods.LimitsareusedtocalculateAverageOutgoingQualityLevel(AOQL). (2) Typicalvaluesrepresentmostlikelyparametricnormsattheconditionsspecifiedandarenotensured. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 6.7 Typical Characteristics V =12V,T =25°C(unlessotherwisespecified) in J Figure1.EfficiencyvsI andV ,V =3.3V Figure2.NormalizedSwitchingFrequencyvsTemperature OUT IN OUT Figure3.CurrentLimitvsTemperature Figure4.NormalizedRDS(ON)vsTemperature Figure5.FeedbackBiasCurrentvsTemperature Figure6.NormalizedEnableThresholdVoltagevs Temperature 6 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Typical Characteristics (continued) V =12V,T =25°C(unlessotherwisespecified) in J Figure7.StandbyQuiescentCurrentvsInputVoltage Figure8.NormalizedFeedbackVoltagevsTemperature Figure9.NormalizedFeedbackVoltagevsInputVoltage Figure10.SwitchingFrequencyvsRT/SYNCResistor Figure11.Soft-StartCurrentvsTemperature Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 7 Detailed Description 7.1 Overview The LM22672 device incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feedforward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a rectangular waveform at the switch pin that swings from about zero volts to VIN. The inductor and output capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internalreferenceandadjuststhedutycycletoregulatetheoutputatthedesiredvalue. The internal loop compensation of the -ADJ option is optimized for outputs of 5 V and below. If an output voltage of 5 V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output voltageisequaltothereferencevoltage,thatis,1.285V(typ). 7.2 Functional Block Diagram VIN VIN V cc BOOT EN INT REG, EN,UVLO ILimit PWM Cmp. - TYPE III + FB + COMP - LOGIC Error Amp. VOUT SW OSC SS 1.285V/SS 50 µA RT/SYNC GND 8 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 7.3 Feature Description 7.3.1 PrecisionEnableandUVLO The precision enable input (EN) is used to control the regulator. The precision feature allows simple sequencing of multiple power supplies with a resistor divider from another supply. Connecting this pin to ground or to a voltage less than 1.6 V (typ) will turn off the regulator. The current drain from the input supply, in this state, is 25 µA (typ) at an input voltage of 12 V. The EN input has an internal pullup of about 6 µA. Therefore this pin can be left floating or pulled to a voltage greater than 2.2 V (typ) to turn the regulator on. The hysteresis on this input is about 0.6 V (typ) above the 1.6-V (typ) threshold. When driving the enable input, the voltage must never exceed the6Vabsolutemaximumspecificationforthispin. Although an internal pullup is provided on the EN pin, it is good practice to pull the input high, when this feature is not used, especially in noisy environments. This can most easily be done by connecting a resistor between VIN and the EN pin. The resistor is required, because the internal zener diode, at the EN pin, will conduct for voltages above about 6 V. The current in this zener must be limited to less than 100 µA. A resistor of 470 kΩ will limit the current to a safe value for input voltages as high 42 V. Smaller values of resistor can be used at lower inputvoltages. The LM22672 device also incorporates an input undervoltage lock-out (UVLO) feature. This prevents the regulator from turning on when the input voltage is not great enough to properly bias the internal circuitry. The risingthresholdis4.3V(typ)whilethefallingthresholdis3.9V(typ).Insomecasesthesethresholdsmaybetoo low to provide good system performance. The solution is to use the EN input as an external UVLO to disable the part when the input voltage falls below a lower boundary. This is often used to prevent excessive battery discharge or early turn-on during start-up. This method is also recommended to prevent abnormal device operation in applications where the input voltage falls below the minimum of 4.5 V. Figure 12 shows the connections to implement this method of UVLO. Equation 1 and Equation 2 can be used to determine the correct resistorvalues. (1) (2) Where: V istheinputvoltagewheretheregulatorshutsoff. off V isthevoltagewheretheregulatorturnson. on Due to the 6 µA pullup, the current in the divider should be much larger than this. A value of 20 kΩ, for R is a ENB goodfirstchoice.Also,azenerdiodemaybeneededbetweentheENpinandgroundinordertocomplywiththe absolutemaximumratingsonthispin. Vin RENT EN RENB Figure12. ExternalUVLOConnections 7.3.2 Soft-Start The soft-start feature allows the regulator to gradually reach steady-state operation, thus reducing start-up stresses. The internal soft-start feature brings the output voltage up in about 500 µs. This time can be extended byusinganexternalcapacitorconnectedtotheSSpin.Valuesintherangeof100nFto1 µFarerecommended. Theapproximatesoft-starttimecanbeestimatedfromEquation3. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com Feature Description (continued) T :26´103×C SS SS (3) Soft-startisresetanytimethepartisshutdownorathermaloverloadeventoccurs. 7.3.3 SwitchingFrequencyAdjustmentandSynchronization The LM22672 device will operate in three different modes, depending on the condition of the RT/SYNC pin. With the RT/SYNC pin floating, the regulator will switch at the internally set frequency of 500 kHz (typ). With a resistor in the range of 25 kΩ to 200 kΩ, connected from RT/SYNC to ground, the internal switching frequency can be adjusted from 1 MHz to 200 kHz. Figure 13 shows the typical curve for switching frequency versus the external resistance connected to the RT/SYNC pin. The accuracy of the switching frequency, in this mode, is slightly worse than that of the internal oscillator; about ±25% is to be expected. Finally, an external clock can be applied to the RT/SYNC pin to allow the regulator to synchronize to a system clock or another LM22672. The mode is set during start up of the regulator. When the LM22672 is enabled, or after V is applied, a weak pullup is IN connected to the RT/SYNC pin and, after approximately 100 µs, the voltage on the pin is checked against a threshold of about 0.8 V. With the RT/SYNC pin open, the voltage floats above this threshold, and the mode is set to run with the internal clock. With a frequency set resistor present, an internal reference holds the pin voltage at 0.8 V; thus, the resulting current sets the mode to allow the resistor to control the clock frequency. If theexternalcircuitforcestheRT/SYNCpintoavoltagemuchgreaterorlessthan0.8V,themodeissettoallow externalsynchronization.ThemodeislatcheduntileithertheENortheinputsupplyiscycled. The choice of switching frequency is governed by several considerations. As an example, lower frequencies may be desirable to reduce switching losses or improve duty cycle limits. Higher frequencies, or a specific frequency, may be desirable to avoid problems with EMI or reduce the physical size of external components. The flexibility of increasing the switching frequency above 500 kHz can also be used to operate outside a critical signal frequency band for a given application. Keep in mind that the values of inductor and output capacitor cannot be reduced dramatically by operating above 500 kHz. This is true because the design of the internal loop compensationrestrictstherangeofthesecomponents. Frequency synchronization requires some care. First the external clock frequency must be greater than the internal clock frequency, and less than 1 MHz. The maximum internal switching frequency is ensured in the ElectricalCharacteristicstable. NOTE The frequency adjust feature and the synchronization feature can not be used simultaneously. The synchronizing frequency must always be greater than the internal clock frequency. Secondly, the RT/SYNC pin must see a valid high or low voltage, during start-up, in order for the regulator to go into the synchronizing mode. Also, the amplitude of the synchronizing pulses must comport with V levels found in the Electrical SYNC Characteristics table. The regulator will synchronize on the rising edge of the external clock. If the external clock islostduringnormaloperation,theregulatorwillreverttothe500kHz(typ)internalclock. If the frequency synchronization feature is used, current limit foldback is not operational; see the Current Limit sectionfordetails. 10 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Feature Description (continued) Figure13. SwitchingFrequencyvsRT/SYNCResistor 7.3.4 Self-Synchronization It is possible to synchronize multiple LM22672 regulators together to share the same switching frequency. This can be done by tying the RT/SYNC pins together through a MOSFET and connecting a 1 kΩ resistor to ground at each pin. Figure 14 shows this connection. The gate of the MOSFET should be connected to the regulator with the highest output voltage. Also, the EN pins of both regulators should be tied to the common system enable, in order to properly initialize both regulators. The operation is as follows: When the regulators are enabled, the outputs are low and the MOSFET is off. The 1 kΩ resistors pull the RT/SYNC pins low, thus enabling the synchronization mode. These resistors are small enough to pull the RT/SYNC pin low, rather than activate the frequency adjust mode. Once the output voltage of one of the regulators is sufficient to turn on the MOSFET, the two RT/SYNC pins are tied together and the regulators will run in synchronized mode. The two regulators will be clocked at the same frequency but slightly phase shifted according to the minimum off-time of the regulator with the fastest internal oscillator. The slight phase shift helps to reduce stress on the input capacitors of the regulator. It is important to choose a MOSFET with a low gate threshold voltage so that the MOSFET will be fully enhanced. Also, a MOSFET with low inter-electrode capacitance is required. The 2N7002 isagoodchoice. ENABLE EN EN LM22672 LM22672 RT/SYNC RT/SYNC 2N7002 1 k(cid:13) 1 k(cid:13) Vout Figure14. Self-SynchronizingSetup 7.3.5 Boot-StrapSupply The LM22672 incorporates a floating high-side gate driver to control the power MOSFET. The supply for this driver is the external boot-strap capacitor connected between the BOOT pin and SW. A good quality 10 nF ceramic capacitor must be connected to these pins with short, wide PCB traces. One reason the regulator imposes a minimum off-time is to ensure that this capacitor recharges every switching cycle. A minimum load of about 5 mA is required to fully recharge the boot-strap capacitor in the minimum off-time. Some of this load can beprovidedbytheoutputvoltagedivider,ifused. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com Feature Description (continued) 7.3.6 InternalLoopCompensation The LM22672 device has internal loop compensation designed to provide a stable regulator over a wide range of external power stage components. The internal compensation of the -ADJ option is optimized for output voltages below5V.Ifanoutputvoltageof5Vorgreaterisneeded,the-5.0optionwithanexternalresistordividercanbe used. Ensuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The LM22672 stability can be verified using the WEBENCH Designer online circuit simulation tool. A quick start spreadsheetcanalsobedownloadedfromtheonlineproductfolder. The complete transfer function for the regulator loop is found by combining the compensation and power stage transfer functions. The LM22672 has internal type III loop compensation, as detailed in Figure 15. This is the approximate "straight line" function from the FB pin to the input of the PWM modulator. The power stage transfer function consists of a dc gain and a second order pole created by the inductor and output capacitor(s). Due to the input voltage feedforward employed in the LM22672, the power stage dc gain is fixed at 20 dB. The second order pole is characterized by its resonant frequency and its quality factor (Q). For a first pass design, the productofinductanceandoutputcapacitanceshouldconformtoEquation4. (4) Alternatively,thispoleshouldbeplacedbetween1.5kHzand15kHzandisgivenbyEquation5. (5) The Q factor depends on the parasitic resistance of the power stage components and is not typically in the control of the designer. Of course, loop compensation is only one consideration when selecting power stage components;seetheApplicationInformationsectionformoredetails. 40 -ADJ -5.0 35 B) N (d 30 AI G 25 R O 20 T A NS 15 E P M 10 O C 5 0 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure15. CompensatorGain In general, hand calculations or simulations can only aid in selecting good power stage components. Good designpracticedictatesthatloadandlinetransienttestingshouldbedonetoverifythestabilityoftheapplication. Also, Bode plot measurements should be made to determine stability margins. AN-1889 How to Measure the Loop Transfer Function of Power Supplies (SNVA364) shows how to perform a loop transfer function measurementwithonlyanoscilloscopeandfunctiongenerator. 7.4 Device Functional Mode 7.4.1 CurrentLimit The LM22672 device has current limiting to prevent the switch current from exceeding safe values during an accidental overload on the output. This peak current limit is found in the Electrical Characteristics table under the heading of I . The maximum load current that can be provided, before current limit is reached, is determined CL fromEquation6. 12 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Device Functional Mode (continued) (6) Where: Listhevalueofthepowerinductor. When the LM22672 device enters current limit, the output voltage will drop and the peak inductor current will be fixedatI attheendofeachcycle.Theswitchingfrequencywillremainconstantwhilethedutycycledrops.The CL loadcurrentwillnotremainconstant,butwilldependontheseverityoftheoverloadandtheoutputvoltage. For very severe overloads ("short-circuit"), the regulator changes to a low frequency current foldback mode of operation. The frequency foldback is about 1/5 of the nominal switching frequency. This will occur when the current limit trips before the minimum on-time has elapsed. This mode of operation is used to prevent inductor current "run-away", and is associated with very low output voltages when in overload. Equation 7 can be used to determinewhatlevelofoutputvoltagewillcausetheparttochangetolowfrequencycurrentfoldback. (7) Where: F isthenormalswitchingfrequency. sw V isthemaximumfortheapplication. in If the overload drives the output voltage to less than or equal to V , the part will enter current foldback mode. If a x given application can drive the output voltage to ≤ V during an overload, then a second criterion must be x checked.Equation8givesthemaximuminputvoltage,wheninthismode,beforedamageoccurs. (8) Where: V isthevalueofoutputvoltageduringtheoverload. sc F isthenormalswitchingfrequency. sw NOTE If the input voltage should exceed this value, while in foldback mode, the regulator and/or thediodemaybedamaged. It is important to note that the voltages in these equations are measured at the inductor. Normal trace and wiring resistance will cause the voltage at the inductor to be higher than that at a remote load. Therefore, even if the load is shorted with zero volts across its terminals, the inductor will still see a finite voltage. It is this value that should be used for V and V in the calculations. In order to return from foldback mode, the load must be x sc reduced to a value much lower than that required to initiate foldback. This load "hysteresis" is a normal aspect of anytypeofcurrentlimitfoldbackassociatedwithvoltageregulators. If the frequency synchronization feature is used, the current limit frequency foldback is not operational, and the systemmaynotsurviveahardshort-circuitattheoutput. The safe operating areas, when in short circuit mode, are shown in Figure 16 through Figure 18 for different switchingfrequencies.Operatingpointsbelowandtotherightofthecurverepresentsafeoperation. NOTE The curves shown in Figure 16, Figure 17, and Figure 18are not valid when the LM22672 isinfrequencysynchronizationmode. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com Device Functional Mode (continued) 45 45 40 40 E (v) 35 E (v) 35 G 30 G 30 A A T SAFE OPERATING AREA T OL 25 OL 25 SAFE OPERATING AREA V V T 20 T 20 U U P P N 15 N 15 I I 10 10 5 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 SHORT CIRCUIT VOLTAGE (v) SHORT CIRCUIT VOLTAGE (v) Figure16.SOAat300kHz Figure17.SOAat500kHz 45 40 v) 35 E ( G 30 A T OL 25 V UT 20 SAFE OPERATING AREA P N 15 I 10 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 SHORT CIRCUIT VOLTAGE (v) Figure18.SOAat800kHz 7.4.2 ThermalProtection Internal thermal shutdown circuitry protects the LM22672 should the maximum junction temperature be exceeded. This protection is activated at about 150°C, with the result that the regulator will shutdown until the temperaturedropsbelowabout135°C. 14 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Device Functional Mode (continued) 7.4.3 Duty-CycleLimits Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably controlled. This in turn places limits on the maximum and minimum input and output voltages that can be converted by the LM22672. A minimum on-time is imposed by the regulator in order to correctly measure the switch current during a current limit event. A minimum off-time is imposed in order the re-charge the bootstrap capacitor. Equation 9 can be used to determine the approximate maximum input voltage for a given output voltage. (9) Where: F istheswitchingfrequency. sw T istheminimumon-time. ON BothparameterscanbefoundintheElectricalCharacteristicstable. If the frequency adjust feature is used, that value should be used for F . Nominal values should be used. The sw worst case is lowest output voltage and highest switching frequency. If this input voltage is exceeded, the regulator will skip cycles, effectively lowering the switching frequency. The consequences of this are higher outputvoltagerippleandadegradationoftheoutputvoltageaccuracy. The second limitation is the maximum duty cycle before the output voltage will "dropout" of regulation. Equation10canbeusedtoapproximatetheminimuminputvoltagebeforedropoutoccurs. (10) Where: ThevaluesofT andR arefoundintheElectricalCharacteristicstable. OFF DS(ON) The worst case here is highest switching frequency and highest load. In this equation, R is the dc inductor L resistance.Ofcourse,thelowestinputvoltagetotheregulatormustnotbelessthan4.5V(typ). Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 8.1 Application Information The LM22672 device is a step down dc-to-dc regulator. It is typically used to convert a higher dc voltage to a lower dc voltage with a maximum output current of 1 A. Detailed Design Procedure can be used to select components for the LM22670 device. Alternately, the WEBENCH® software may be used to generate complete designs. When generating a design, the WEBENCH® software utilizes iterative design procedure and accesses comprehensive databases of components. Go to WEBENCH Designer for more details. This section presents a simplifieddiscussionofthedesignprocess. 8.1.1 OutputVoltageDividerSelection Foroutputvoltagesbetweenabout1.285Vand5V,the-ADJoptionshouldbeused,withanappropriatevoltage dividerasshowninFigure19.Equation11canbeusedtocalculatetheresistorvaluesofthisdivider: (11) A good value for R is 1k Ω. This will help to provide some of the minimum load current requirement and FBB reduce susceptibility to noise pick-up. The top of R should be connected directly to the output capacitor or to FBT the load for remote sensing. If the divider is connected to the load, a local high-frequency bypass should be providedatthatlocation. For output voltages of 5 V, the -5.0 option should be used. In this case no divider is needed and the FB pin is connected to the output. The approximate values of the internal voltage divider are as follows: 7.38k from the FB pintotheinputoftheerroramplifierand2.55kfromtheretoground. Both the -ADJ and -5.0 options can be used for output voltages greater than 5 V, by using the correct output divider. As mentioned in the Internal Loop Compensation section, the -5.0 option is optimized for output voltages of 5 V. However, for output voltages greater than 5 V, this option may provide better loop bandwidth than the - ADJoption,insomeapplications.Ifthe-5.0optionistobeusedatoutputvoltagesgreaterthan5V,Equation12 shouldbeusedtodeterminetheresistorvaluesintheoutputdivider: (12) AgainavalueofR ofabout1kΩ isagoodfirstchoice. FBB Vout RFBT FB RFBB Figure19. OutputVoltageDivider A maximum value of 10 kΩ is recommended for the sum of R and R to maintain good output voltage FBB FBT accuracy for the -ADJ option. A maximum of 2 kΩ is recommended for the -5.0 option. For the -5.0 option, the totalinternaldividerresistanceistypically9.93kΩ. 16 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Application Information (continued) In all cases the output voltage divider should be placed as close as possible to the FB pin of the LM22672; becausethisisahighimpedanceinputandissusceptibletonoisepick-up. 8.1.2 PowerDiode A Schottky type power diode is required for all LM22672 applications. Ultra-fast diodes are not recommended and may result in damage to the IC due to reverse recovery current transients. The near ideal reverse recovery characteristics and low forward voltage drop of Schottky diodes are particularly important for high input voltage and low output voltage applications common to the LM22672. The reverse breakdown rating of the diode should be selected for the maximum V , plus some safety margin. A good rule of thumb is to select a diode with a IN reversevoltageratingof1.3timesthemaximuminputvoltage. Select a diode with an average current rating at least equal to the maximum load current that will be seen in the application. 8.2 Typical Application 8.2.1 TypicalBuckRegulatorApplication Figure 20 shows an example of converting an input voltage range of 5.5 V to 35 V, to an output of 3.3 V at 1 Amp. RFBB VIN 4.5V to 35V 976: VIN FB C3 EN LM22672-ADJ 10 nF EN BOOT L1 RFBT SYNC 22 PH 1.54 k: 22 CPF2 + C2.12 PF RTS/SSYNCGND SW VOUT 3.3V D1 C4 + R3 C6 60V, 1A 120 PF 1 PF GND GND Figure20. TypicalBuckRegulatorApplication 8.2.1.1 DesignRequirements DESIGNPARAMETERS EXAMPLEVALUE DriverSupplyVoltage(VIN) 4.5to42V OutputVoltage(VOUT) 3.3V R CalculatedbasedonR andV of1.285V. FBT FBB REF R 1kΩto10kΩ FBB I 3A OUT 8.2.1.2 DetailedDesignProcedure 8.2.1.2.1 ExternalComponents Thefollowingguidelinesshouldbeusedwhendesigningastep-down(buck)converterwiththeLM22672. 8.2.1.2.1.1 Inductor The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltages. To keep the application in continuous conduction mode (CCM), the maximum ripple current, I , RIPPLE shouldbelessthantwicetheminimumloadcurrent. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com The general rule of keeping the inductor current peak-to-peak ripple around 30% of the nominal output current is a good compromise between excessive output voltage ripple and excessive component size and cost. Using this valueofripplecurrent,thevalueofinductor,L,iscalculatedusingEquation13. (13) Where: F istheswitchingfrequency. sw V shouldbetakenatitsmaximumvalue,forthegivenapplication. in The formula in Equation 13 provides a guide to select the value of the inductor L; the nearest standard value will thenbeusedinthecircuit. Oncetheinductorisselected,theactualripplecurrentcanbefoundfromEquation14: (14) Increasing the inductance will generally slow down the transient response but reduce the output voltage ripple. Reducingtheinductancewillgenerallyimprovethetransientresponsebutincreasetheoutputvoltageripple. The inductor must be rated for the peak current, I , in a given application, to prevent saturation. During normal PK loadingconditions,thepeakcurrentisequaltotheloadcurrentplus1/2oftheinductorripplecurrent. During an overload condition, as well as during certain load transients, the controller may trip current limit. In this case the peak inductor current is given by I , found in the Electrical Characteristics table. Good design practice CL requiresthattheinductorratingbeadequateforthisoverloadcondition. NOTE If the inductor is not rated for the maximum expected current, it can saturate resulting in damagetotheLM22672and/orthepowerdiode. 8.2.1.2.1.2 InputCapacitor The input capacitor selection is based on both input voltage ripple and RMS current. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the regulator current during switch on-time. Low ESR ceramic capacitors are preferred. Larger values of input capacitance are desirable to reduce voltage ripple and noise on the input supply. This noise may find its way into other circuitry, sharing the same input supply, unless adequate bypassing is provided. A very approximate formula for determiningtheinputvoltagerippleisshowninEquation15. (15) Where: V isthepeak-to-peakripplevoltageattheswitchingfrequency. ri Another concern is the RMS current passing through this capacitor. Equation 16 gives an approximation to this current: (16) ThecapacitormustberatedforatleastthislevelofRMScurrentattheswitchingfrequency. 18 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 All ceramic capacitors have large voltage coefficients, in addition to normal tolerances and temperature coefficients. To help mitigate these effects, multiple capacitors can be used in parallel to bring the minimum capacitance up to the desired value. This may also help with RMS current constraints by sharing the current among several capacitors. Many times it is desirable to use an electrolytic capacitor on the input, in parallel with the ceramics. The moderate ESR of this capacitor can help to damp any ringing on the input supply caused by long power leads. This method can also help to reduce voltage spikes that may exceed the maximum input voltageratingoftheLM22672. It is good practice to include a high frequency bypass capacitor as close as possible to the LM22672. This small case size, low ESR, ceramic capacitor should be connected directly to the VIN and GND pins with the shortest possible PCB traces. Values in the range of 0.47 µF to 1 µF are appropriate. This capacitor helps to provide a low impedance supply to sensitive internal circuitry. It also helps to suppress any fast noise spikes on the input supplythatmayleadtoincreasedEMI. 8.2.1.2.1.3 OutputCapacitor The output capacitor is responsible for filtering the output voltage and supplying load current during transients. Capacitor selection depends on application conditions as well as ripple and transient requirements. Best performance is achieved with a parallel combination of ceramic capacitors and a low ESR SP™ or POSCAP™ type. Very low ESR capacitors such as ceramics reduce the output ripple and noise spikes, while higher value electrolyticsorpolymerprovidelargebulkcapacitancetosupplytransients.AssumingverylowESR,Equation17 givesanapproximationtotheoutputvoltageripple. (17) Typically,atotalvalueof100µForgreaterisrecommendedforoutputcapacitance. In applications with V less than 3.3 V, it is critical that low ESR output capacitors are selected. This will limit out potentialoutputvoltageovershootsastheinputvoltagefallsbelowthedevicenormaloperatingrange. If the switching frequency is set higher than 500 kHz, the capacitance value may not be reduced proportionally due to stability requirements. The internal compensation is optimized for circuits with a 500 kHz switching frequency.SeetheInternalLoopCompensationsectionformoredetails. 8.2.1.2.1.4 Boot-strapCapacitor The bootstrap capacitor between the BOOT pin and the SW pin supplies the gate current to turn on the N- channel MOSFET. The recommended value of this capacitor is 10 nF and should be a good quality, low ESR ceramiccapacitor. In some cases it may be desirable to slow down the turn-on of the internal power MOSFET, in order to reduce EMI. This can be done by placing a small resistor in series with the C capacitor. Resistors in the range of 10 boot Ω to 50 Ω can be used. This technique should only be used when absolutely necessary, because it will increase switchinglossesand,therebyreduceefficiency. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 8.2.1.3 ApplicationCurves Figure21.EfficiencyvsI andV ,V =3.3V Figure22.SwitchingFrequencyvsRT/SYNCResistor OUT IN OUT 20 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 9 Power Supply Recommendations The LM22672 device is designed to operate from an input voltage supply range between 4.5 V and 42 V. This input supply should be well regulated and able to withstand maximum input current and maintain a stable voltage. The resistance of the input supply rail should be low enough that an input current transient does not cause a high enough drop at the LM22672 supply voltage that can cause a false UVLO fault triggering and system reset. If the input supply is located more than a few inches from the LM22672 device, additional bulk capacitancemayberequiredinadditiontotheceramicbypasscapacitors.Theamountofbulkcapacitanceisnot critical,buta47μFor100 μFelectrolyticcapacitorisatypicalchoice. 10 Layout 10.1 Layout Guidelines Board layout is critical for the proper operation of switching power supplies. First, the ground plane area must be sufficient for thermal dissipation purposes. Second, appropriate guidelines must be followed to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such cases, the rapid increase of input current combined with the parasitic trace inductance generates unwanted L di/dt noise spikes. The magnitude of this noise tends to increase as the output current increases. This noise may turn into electromagneticinterference(EMI)andcanalsocauseproblemsindeviceperformance.Therefore,caremustbe takeninlayouttominimizetheeffectofthisswitchingnoise. The most important layout rule is to keep the ac current loops as small as possible. Figure 23 shows the current flowinabuckconverter.ThetopschematicshowsadottedlinewhichrepresentsthecurrentflowduringtheFET switchon-state.ThemiddleschematicshowsthecurrentflowduringtheFETswitchoff-state. The bottom schematic shows the currents referred to as ac currents. These ac currents are the most critical becausetheyarechanginginaveryshorttimeperiod.Thedottedlinesofthebottomschematicarethetracesto keep as short and wide as possible. This will also yield a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the PCB layout example. Best results are achieved if the placement of theLM22672device,thebypasscapacitor,theSchottkydiode,R ,R ,andtheinductorareplacedasshown FBB FBT in the example. Note that, in the layout shown, R1 = R and R2 = R . It is also recommended to use 2 oz FBB FBT copperboardsorheaviertohelpthermaldissipationandtoreducetheparasiticinductancesofboardtraces.See applicationnoteAN-1229SIMPLESWITCHER® PCBLayoutGuidelines (SNVA054)formoreinformation. Figure23. CurrentFlowinaBuckApplication Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 10.2 Layout Example 10.3 Thermal Considerations The components with the highest power dissipation are the power diode and the power MOSFET internal to the LM22672 regulator. The easiest method to determine the power dissipation within the LM22672 is to measure the total conversion losses then subtract the power losses in the diode and inductor. The total conversion loss is the difference between the input power and the output power. An approximation for the power diode loss is showninEquation18: where • V isthediodevoltagedrop. (18) D AnapproximationfortheinductorpowerisshowninEquation19: (19) Where: R isthedcresistanceoftheinductor. L The1.1factorisanapproximationfortheaclosses. 22 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 www.ti.com SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 Thermal Considerations (continued) The regulator has an exposed thermal pad to aid power dissipation. Adding multiple vias under the device to the ground plane will greatly reduce the regulator junction temperature. Selecting a diode with an exposed pad will also aid the power dissipation of the diode. The most significant variables that affect the power dissipation of the regulator are output current, input voltage and operating frequency. The power dissipated while operating near the maximum output current and maximum input voltage can be appreciable. The junction-to-ambient thermal resistance of the LM22672 will vary with the application. The most significant variables are the area of copper in the PC board, the number of vias under the IC exposed pad and the amount of forced air cooling provided. A large continuous ground plane on the top or bottom PCB layer will provide the most effective heat dissipation. The integrity of the solder connection from the IC exposed pad to the PC board is critical. Excessive voids will greatly diminish the thermal dissipation capacity. The junction-to-ambient thermal resistance of the LM22672 SO PowerPAD package is specified in the Electrical Characteristics table. See AN-2020 Thermal Design By Insight, NotHindsight(SNVA419)formoreinformation. Copyright©2008–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM22672 LM22672-Q1

LM22672,LM22672-Q1 SNVS588M–SEPTEMBER2008–REVISEDNOVEMBER2014 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 RelatedDocumentation • AN-2020ThermalDesignByInsight,NotHindsight (SNVA419) • AN-1229SIMPLESWITCHER® PCBLayoutGuidelines (SNVA054) • AN-1896LM22672EvaluationBoard (SNVA369 • AN-1889HowtoMeasuretheLoopTransferFunctionofPowerSupplies (SNVA364) 11.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table1.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY LM22672 Clickhere Clickhere Clickhere Clickhere Clickhere LM22672-Q1 Clickhere Clickhere Clickhere Clickhere Clickhere 11.3 Trademarks WEBENCH,SIMPLESWITCHERareregisteredtrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 11.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 11.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 24 SubmitDocumentationFeedback Copyright©2008–2014,TexasInstrumentsIncorporated ProductFolderLinks:LM22672 LM22672-Q1

PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2015 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM22672MR-5.0/NOPB ACTIVE SO PowerPAD DDA 8 95 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) 5.0 LM22672MR-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 95 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) ADJ LM22672MRE-5.0/NOPB ACTIVE SO PowerPAD DDA 8 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) 5.0 LM22672MRE-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) ADJ LM22672MRX-5.0/NOPB ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) 5.0 LM22672MRX-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) ADJ LM22672QMR-5.0/NOPB ACTIVE SO PowerPAD DDA 8 95 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) Q5.0 LM22672QMR-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 95 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) QADJ LM22672QMRE-5.0/NOPB ACTIVE SO PowerPAD DDA 8 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) Q5.0 LM22672QMRE-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) QADJ LM22672QMRX-ADJ/NOPB ACTIVE SO PowerPAD DDA 8 2500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L22672 & no Sb/Br) QADJ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2015 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM22672, LM22672-Q1 : •Catalog: LM22672 •Automotive: LM22672-Q1 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2016 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM22672MRE-5.0/NOPB SO DDA 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD LM22672MRE-ADJ/NOPB SO DDA 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD LM22672MRX-5.0/NOPB SO DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD LM22672MRX-ADJ/NOPB SO DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Power PAD LM22672QMRE-5.0/NOP SO DDA 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 B Power PAD LM22672QMRE-ADJ/NOP SO DDA 8 250 178.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 B Power PAD LM22672QMRX-ADJ/NOP SO DDA 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 B Power PAD PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2016 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM22672MRE-5.0/NOPB SOPowerPAD DDA 8 250 210.0 185.0 35.0 LM22672MRE-ADJ/NOPB SOPowerPAD DDA 8 250 210.0 185.0 35.0 LM22672MRX-5.0/NOPB SOPowerPAD DDA 8 2500 367.0 367.0 35.0 LM22672MRX-ADJ/NOPB SOPowerPAD DDA 8 2500 367.0 367.0 35.0 LM22672QMRE-5.0/NOPB SOPowerPAD DDA 8 250 210.0 185.0 35.0 LM22672QMRE-ADJ/NOP SOPowerPAD DDA 8 250 210.0 185.0 35.0 B LM22672QMRX-ADJ/NOP SOPowerPAD DDA 8 2500 367.0 367.0 35.0 B PackMaterials-Page2

PACKAGE OUTLINE DDA0008B PowerPAD T M SOIC - 1.7 mm max height SCALE 2.400 PLASTIC SMALL OUTLINE C 6.2 TYP 5.8 SEATING PLANE A PIN 1 ID 0.1 C AREA 6X 1.27 8 1 5.0 2X 4.8 3.81 NOTE 3 4 5 0.51 8X 0.31 B 4.0 1.7 MAX 3.8 0.25 C A B NOTE 4 0.25 TYP 0.10 SEE DETAIL A 4 5 EXPOSED THERMAL PAD 0.25 3.4 9 2.8 GAGE PLANE 0.15 0 - 8 1.27 0.00 1 8 0.40 DETAIL A 2.71 TYPICAL 2.11 4214849/A 08/2016 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MS-012. www.ti.com

EXAMPLE BOARD LAYOUT DDA0008B PowerPAD T M SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.95) NOTE 9 SOLDER MASK (2.71) DEFINED PAD SOLDER MASK OPENING SEE DETAILS 8X (1.55) 1 8 8X (0.6) (3.4) SYMM 9 (1.3) SOLDER MASK TYP OPENING (4.9) NOTE 9 6X (1.27) 5 4 (R0.05) TYP SYMM METAL COVERED ( 0.2) TYP BY SOLDER MASK VIA (1.3) TYP (5.4) LAND PATTERN EXAMPLE SCALE:10X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND SOLDER MASK METAL SOLDER MASK METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS PADS 1-8 4214849/A 08/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004). 9. Size of metal pad may vary due to creepage requirement. 10. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DDA0008B PowerPAD T M SOIC - 1.7 mm max height PLASTIC SMALL OUTLINE (2.71) BASED ON 0.125 THICK STENCIL 8X (1.55) (R0.05) TYP 1 8 8X (0.6) (3.4) SYMM 9 BASED ON 0.125 THICK STENCIL 6X (1.27) 5 4 METAL COVERED SYMM BY SOLDER MASK SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL (5.4) THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 100% PRINTED SOLDER COVERAGE BY AREA SCALE:10X STENCIL SOLDER STENCIL THICKNESS OPENING 0.1 3.03 X 3.80 0.125 2.71 X 3.40 (SHOWN) 0.150 2.47 X 3.10 0.175 2.29 X 2.87 4214849/A 08/2016 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. www.ti.com

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