Product Order Technical Tools & Support & Folder Now Documents Software Community ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 ADS79xx Pin Compatible, 12-, 10-, 8-Bit, 1-MSPS, 16-, 12-, 8-, 4-Channel, Single-Ended, Serial Interface ADCs 1 Features 3 Description • 1-MHzSampleRateSerialDevices The ADS79xx is a 12-, 10-, 8-bit pin compatible 1 multichannel analog-to-digital converter family. The • ProductFamilyof12-,10-,8-BitResolution device comparison table shows all twelve devices • ZeroLatency fromthisproductfamily. • 20-MHzSerialInterface The devices include a capacitor based SAR A/D • AnalogSupplyRange:2.7to5.25V converterwithinherentsampleandhold. • I/OSupplyRange:1.7to5.25V The devices accept a wide analog supply range from • TwoSWSelectableUnipolar,InputRanges:0to 2.7 V to 5.25 V. Very low power consumption makes V and0to2xV these devices suitable for battery-powered and REF REF isolatedpower-supplyapplications. • AutoandManualModesforChannelSelection • 4-,8-ChannelDevicesand12-,16-Channel A wide 1.7-V to 5.25-V I/O supply range facilitates a DevicesSharetheSameFootprint glueless interface with the most commonly used digital hosts. The serial interface is controlled by CS • TwoProgrammableAlarmLevelsperChannel and SCLK for easy connection with microprocessors • FourIndividuallyConfigurableGPIOsinTSSOP andDSP. Package:OneGPIOinVQFNPackage The input signal is sampled with the falling edge of • TypicalPowerDissipation:14.5mW(+VA=5V, CS. It uses SCLK for conversion, serial data output, +VBD=3V)at1MSPS and reading serial data in. The devices allow auto • Power-DownCurrent(1μA) sequencing of preselected channels or manual • InputBandwidth(47MHzat3dB) selectionofachannelforthenextconversioncycle. • 38-,30-PinTSSOPand32-,24-PinVQFN There are two software selectable input ranges (0 V Packages to V and 0 V to 2 × V ), individually configurable REF REF GPIOs (four in case of the TSSOP and one on the 2 Applications VQFN package devices), and two programmable alarm thresholds per channel. These features make • PLC/IPC the devices suitable for most data acquisition • OpticalLineCardMonitoring applications. • MedicalInstrumentation The devices offer an attractive power-down feature. • DigitalPowerSupplies This is extremely useful for power saving when the deviceisoperatedatlowerconversionspeeds. • Multi-Channel,General-PurposeSignalMonitoring • High-SpeedDataAcquisitionSystems The 16-, 12-channel devices from this family are available in a 38-pin TSSOP and 32 pin VQFN • High-SpeedClosed-LoopSystems package and the 4/8-channel devices are available in a30-pinTSSOPand24pinVQFNpackages. DetailedBlockDiagram PGA Gain DeviceInformation(1) Control High input impedance PGA GPIO1 PARTNUMBER PACKAGE BODYSIZE(NOM) (or non inverting GPIO2 buffer such as GPIO3 THS4031) TSSOP(30) 7.80mm×4.40mm MXO AINP GPIO0 VQFN(24) 4.00mm×4.00mm CChh01 hloigwh-a-alalarmrm ADS79xx TSSOP(38) 9.70mm×4.40mm Ch2 VQFN(32) 5.00mm×5.00mm ADC SDO HToost (1) For all available packages, see the orderable addendum at theendofthedatasheet. SDI SCLK Chn(1) CS REF REF5025 10 µF o/p 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Table of Contents 1 Features.................................................................. 1 8 DetailedDescription............................................ 28 2 Applications........................................................... 1 8.1 Overview.................................................................28 3 Description............................................................. 1 8.2 FunctionalBlockDiagram.......................................29 4 RevisionHistory..................................................... 2 8.3 FeatureDescription.................................................29 8.4 DeviceFunctionalModes........................................29 5 DeviceComparisonTable..................................... 5 8.5 Programming...........................................................41 6 PinConfigurationandFunctions......................... 5 9 ApplicationandImplementation........................ 46 7 Specifications....................................................... 10 9.1 ApplicationInformation............................................46 7.1 AbsoluteMaximumRatings....................................10 9.2 TypicalApplications................................................48 7.2 ESDRatings............................................................10 10 PowerSupplyRecommendations..................... 51 7.3 RecommendedOperatingConditions.....................10 11 Layout................................................................... 52 7.4 ThermalInformation:TSSOP..................................11 7.5 ThermalInformation:VQFN....................................11 11.1 LayoutGuidelines.................................................52 7.6 ElectricalCharacteristics:ADS7950,ADS7951, 11.2 LayoutExamples...................................................52 ADS7952,ADS7953................................................12 12 DeviceandDocumentationSupport................. 54 7.7 ElectricalCharacteristics,ADS7954,ADS7955, 12.1 DocumentationSupport........................................54 ADS7956,ADS7957................................................14 12.2 RelatedLinks........................................................54 7.8 ElectricalCharacteristics,ADS7958,ADS7959, 12.3 ReceivingNotificationofDocumentationUpdates54 ADS7960,ADS7961................................................15 12.4 CommunityResources..........................................54 7.9 TimingRequirements..............................................17 12.5 Trademarks...........................................................54 7.10 TypicalCharacteristics(AllADS79xxFamily 12.6 ElectrostaticDischargeCaution............................55 Devices)................................................................... 20 12.7 Glossary................................................................55 7.11 TypicalCharacteristics(12-BitDevicesOnly).......21 13 Mechanical,Packaging,andOrderable 7.12 TypicalCharacteristics(12-BitDevicesOnly).......27 Information........................................................... 55 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(July2015)toRevisionC Page • Changed0to2.5Vand0to5Vto0toV and0to2xV inInputRangeFeaturesbullet ......................................... 1 REF REF • ChangedGPIOFeaturesbullet ............................................................................................................................................. 1 • ChangedOpticalLineCardMonitoringandMulti-Channel,General-PurposeSignalMonitoringApplicationsbullets..........1 • Changed(0Vto2.5Vand0Vto5V)to(0VtoV and0Vto2×V )inDescriptionsection..................................... 1 REF REF • DeletedCompanionProductstable........................................................................................................................................ 5 • ChangedRGEtoRHBfortwo32-pinVQFNpindiagrams ................................................................................................... 5 • Added30-pinDBTpackage .................................................................................................................................................. 5 • ChangedI/OcolumnofPinFunctions:TSSOPPackagestabletoshowfulldefinitioninsteadofabbreviation...................6 • AddedactivelowtodefinitionofCSpininPinFunctions:TSSOPPackagestable.............................................................. 7 • ChangedpinnameanddescriptionofAlarmpininPinFunctions:TSSOPPackagestable ............................................... 7 • AddedsettingstodescriptionofRangepininPinFunctions:TSSOPPackagestable:added(1)tohighand(0)tolow....7 • AddedactivelowtodescriptionofCSpininPinFunctions:VQFNPackagestable............................................................. 8 • ChangedpinnameanddescriptionofAlarmpininPinFunctions:VQFNPackagestable.................................................. 9 • ChangedvalueofInputcurrenttoanypinexceptsupplypinsrowfrom±10mA(max)to–10mA(min)and10mA (max)inAbsoluteMaximumRatingstable........................................................................................................................... 10 • ChangedVBD=1.7Vto5.25VtoVBD=1.7Vto+VAinconditionstatement................................................................. 12 • Changedminimumspecificationfrom–1LSBto–0.99LSBinfirstrowofDifferentiallinearityparameter.........................12 • AddedinputtoReferenceinputresistanceparametername............................................................................................... 13 • ChangedmaximumspecificationfromFFCHexto4092LSBinAlarmSettingparameters .............................................. 13 • ChangedunitfromNumberstoConversioninInvalidconversionsafterpoweruporresetparameter ............................. 13 • ChangedVBD=1.7Vto5.25VtoVBD=1.7Vto+VAinconditionstatement ................................................................ 14 2 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Revision History (continued) • AddedinputtoReferenceinputresistanceparametername .............................................................................................. 14 • ChangedmaximumspecificationfromFFCHexto4092LSBinAlarmSettingparameters .............................................. 14 • ChangedVBD=1.7Vto5.25VtoVBD=1.7Vto+VAinconditionstatement ................................................................ 15 • AddedinputtoReferenceinputresistanceparametername .............................................................................................. 16 • ChangedmaximumspecificationfromFFHexto255LSBinAlarmSettingparameters .................................................. 16 • ChangedunitfromNumberstoConversioninInvalidconversionsafterpoweruporresetparameter ............................. 16 • ChangedREFandGNDpinstoREFPandREFMpinsintheReferencesection ............................................................. 29 • AddedExampleManualModeTimingDiagramfigureandcorrespondingtexttoOperatinginManualModesection......33 • AddedExampleAuto-1ModeTimingDiagramfigureandcorrespondingtexttotheOperatinginAuto-1Mode section ................................................................................................................................................................................. 35 • AddedExampleAuto-2ModeTimingDiagramfigureandcorrespondingtexttotheOperatinginAuto-2Mode section ................................................................................................................................................................................. 39 • Changed2.5VtoV infirstDI06rowand5Vto2xV insecondDI06row................................................................... 40 REF REF • Changedbinarycodefrom000111111111to001111111111inFullscalerowofIdealInputVoltagesfor10-Bit DevicesandDigitalOutputCodesfor10-BitDevices(ADS7954/55/56/57)table............................................................... 41 • Changed10-Bitto8-BitintitleofIdealInputVoltagesfor8-BitDevicesandDigitalOutputCodesfor8-BitDevices (ADS7958/59/60/61)table.................................................................................................................................................... 42 • ChangedApplicationDiagramforanUnbufferedMXOfigurenote .................................................................................... 48 • ChangedRecommendedLayoutfiguretitletoRecommendedLayoutfortheTSSOPPackagedDevice.......................... 52 • AddedRecommendedLayoutfortheVQFNPackagedDevicefigure................................................................................ 53 ChangesfromRevisionA(April2010)toRevisionB Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection ................................................................................................. 1 ChangesfromOriginal(June2008)toRevisionA Page • AddedQFNinformationtoFeatures....................................................................................................................................... 1 • AddedQFNinformationtoDescription................................................................................................................................... 1 • ChangedVEEtoAGNDandVCCto+VAon38-pinTSSOPpinout..................................................................................... 5 • AddedQFNpinout.................................................................................................................................................................. 5 • AddedQFNpinout.................................................................................................................................................................. 5 • AddedQFNpinout.................................................................................................................................................................. 6 • AddedQFNpinout.................................................................................................................................................................. 6 • AddedterminalfunctionsforQFNpackages.......................................................................................................................... 8 • ChangedADS7950/4/8QFNpackageMXOpinfrom7to3.................................................................................................. 8 • AddedV =2.5V±0.1VtoElectricalCharacteristics,ADS7950/51/52/53..................................................................... 12 REF • Addedwhile2V ≤+VAtofull-scaleinputspanrange2testconditions.......................................................................... 12 REF • Addedwhile2V ≤+VAtoAbsoluteinputrangespanrange2testconditions................................................................ 12 REF • AddedTotalunadjustederror(TUE)specification............................................................................................................... 12 • ChangedreferencevoltageatREFPminandmaxvalues.................................................................................................. 13 • AddedNotetoElectricalCharacteristics,ADS7950/51/52/53............................................................................................. 13 • AddedV =2.5V±0.1VtoElectricalCharacteristics,ADS7954/55/56/57testconditions............................................. 14 REF • Addedwhile2V ≤+VAtofull-scaleinputspanrange2testconditions.......................................................................... 14 REF • Addedwhile2V ≤+VAtofull-scaleinputspanrange2testconditions.......................................................................... 14 REF Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com • ChangedV referencevoltageatREFPminvaluefrom2.49Vto2.0V........................................................................... 14 ref • ChangedV referencevoltageatREFPmaxvaluefrom2.51Vto3.0V.......................................................................... 14 ref • AddedV =2.5V±0.1VtoElectricalCharacteristics,ADS7958/59/60/61testconditions............................................... 15 ref • Addedwhile2V ≤+VAtofull-scaleinputspanrange2testconditions.......................................................................... 15 REF • Addedwhile2V ≤+VAtofull-scaleinputspanrange2testconditions.......................................................................... 15 REF • ChangedV referencevoltageatREFPminvaluefrom2.49Vto2.0V........................................................................... 16 ref • ChangedV referencevoltageatREFPmaxvaluefrom2.51Vto3.0V.......................................................................... 16 ref • Changedt valuesfrommaxtomin................................................................................................................................... 17 su1 • Changedt valuesfrommaxtomin................................................................................................................................... 17 su2 • AddedTOTALUNADJUSTEDERROR(TUEMax)graph................................................................................................... 25 • AddedTOTALUNADJUSTEDERROR(TUEMin)graph.................................................................................................... 25 • ChangedGPIOpinsdescription........................................................................................................................................... 28 • AddeddevicepowerdownthroughGPIOinthecaseoftheTSSOPpackageddevices..................................................... 28 • AddednotetoTable1.......................................................................................................................................................... 33 • AddednotetoTable2.......................................................................................................................................................... 36 • AddednotetoTable5.......................................................................................................................................................... 40 • AddednotetoProgrammingGPIORegistersdescription.................................................................................................... 42 • AddedQFNinformationtoTable11..................................................................................................................................... 43 • ChangedDI12=1?fromNoorNotoYesorNoinFigure59............................................................................................. 44 • AddednotetoFigure60....................................................................................................................................................... 46 4 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 5 Device Comparison Table RESOLUTION NUMBEROFCHANNELS 12BIT 10BIT 8BIT 16 ADS7953 ADS7957 ADS7961 12 ADS7952 ADS7956 ADS7960 8 ADS7951 ADS7955 ADS7959 4 ADS7950 ADS7954 ADS7958 6 Pin Configuration and Functions DBTPackage 38-PinTSSOP RHBPackage TopView 32-PinVQFN TopView GPIO2 1 38 GPIO1 GPIO2 1 38 GPIO1 D GRPEIFOM3 23 3376 G+VPBIOD0 GRPEIFOM3 23 3376 G+VPBIOD0 +VA REFP REFM GPIO +VBD BDGN SDO SDI REFP 4 35 BDGND REFP 4 35 BDGND 32 25 +VA 5 34 SDO +VA 5 34 SDO AGND 1 24 SCLK AGND 6 33 SDI AGND 6 33 SDI MXO CS MXO 7 32 SCLK MXO 7 32 SCLK AINP 8 31 CS AINP 8 31 CS AINP AGND AAGINNMD 190 AAADDDSSS777999556260 3209A+GVAND AAGINNMD 190 AAADDDSSS777999556371 3209A+GVAND AINM AADDSS77995537// +VA NC 11 28CH0 CH15 11 28CH0 CH15 ADS7961 CH0 NC 12 27CH1 CH14 12 27CH1 CH14 CH1 NC 13 26 CH2 CH13 13 26 CH2 CH13 CH2 NC 14 25CH3 CH12 14 25CH3 CH11 15 24CH4 CH11 15 24CH4 CH12 89 1617 CH3 CH10 16 23CH5 CH10 16 23CH5 CCHH98 1178 2221CCHH76 CCHH98 1178 2221 CCHH67 CH11 CH10 CH9 CH8 CH7 CH6 CH5 CH4 AGND 19 20 AGND AGND 19 20 AGND RHBPackage DBTPackage 32-PinVQFN 30-PinTSSOP TopView TopView D GPIO2 1 30 GPIO1 GPIO2 1 30 GPIO1 +VA REFP REFM GPIO +VBD BDGN SDO SDI GPIO3 2 29 GPIO0 GPIO3 2 29 GPIO0 REFM 3 28 +VBD REFM 3 28 +VBD 32 25 AGND 1 24 SCLK REFP 4 27 BDGND REFP 4 27 BDGND +VA 5 26 SDO +VA 5 26 SDO MXO CS AGND 6 25 SDI AGND 6 25 SDI AINP AGND MXO 7 AADDSS77995540 24 SCLK MXO 7 AADDSS77995515 24 SCLK ADS7952/ AINP 8 ADS7958 23 CS AINP 8 ADS7959 23 CS AINM ADS7956/ +VA AINM 9 22 AGND AINM 9 22 AGND NC ADS7960 NC AGND 10 21 +VA AGND 10 21 +VA NC 11 20 CH0 CH7 11 20 CH0 NC NC CH3 12 19 NC CH6 12 19 CH1 CH11 CH0 NC 13 18 CH1 CH5 13 18 CH2 CH2 14 17 NC CH4 14 17 CH3 CH10 89 1617 CH1 NC 15 16 NC NC 15 16 NC 9 8 7 6 5 4 3 2 H H H H H H H H C C C C C C C C Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com RGEPackage RGEPackage 24-PinVQFN 24-PinVQFN TopView TopView D D REFP REFM GPIO +VBD BDGN SDO REFP REFM GPIO +VBD BDGN SDO 24 19 24 19 +VA 1 18 SDI +VA 1 18 SDI AGND SCLK AGND SCLK ADS7951/ ADS7950/ MXO CS MXO CS ADS7955/ ADS7954/ AINP ADS7959 AGND AINP ADS7958 AGND AINM +VA AINM +VA CH7 6 13 CH0 NC 6 13 NC 7 12 7 12 CH6 CH5 CH4 CH3 CH2 CH1 NC CH3 CH2 CH1 CH0 NC PinFunctions:TSSOPPackages PIN ADS7953 ADS7952 ADS7951 ADS7950 I/O DESCRIPTION NAME ADS7957 ADS7956 ADS7955 ADS7954 ADS7961 ADS7960 ADS7959 ADS7958 REFERENCE Analog REFP 4 4 4 4 Referenceinput input Analog REFM 3 3 3 3 Referenceground input ADCANALOGINPUT Analog AINP 8 8 8 8 ADCinputsignal input Analog AINM 9 9 9 9 ADCinputground input MULTIPLEXER Analog MXO 7 7 7 7 Multiplexeroutput output Analog Ch0 28 28 20 20 Analogchannelformultiplexer input Analog Ch1 27 27 19 18 Analogchannelformultiplexer input Analog Ch2 26 26 18 14 Analogchannelformultiplexer input Analog Ch3 25 25 17 12 Analogchannelformultiplexer input Analog Ch4 24 24 14 — Analogchannelformultiplexer input Analog Ch5 23 23 13 — Analogchannelformultiplexer input Analog Ch6 22 22 12 — Analogchannelformultiplexer input Analog Ch7 21 21 11 — Analogchannelformultiplexer input Analog Ch8 18 18 — — Analogchannelformultiplexer input Analog Ch9 17 17 — — Analogchannelformultiplexer input 6 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 PinFunctions:TSSOPPackages(continued) PIN ADS7953 ADS7952 ADS7951 ADS7950 I/O DESCRIPTION NAME ADS7957 ADS7956 ADS7955 ADS7954 ADS7961 ADS7960 ADS7959 ADS7958 Analog Ch10 16 16 — — Analogchannelformultiplexer input Analog Ch11 15 15 — — Analogchannelformultiplexer input Analog Ch12 14 — — — Analogchannelformultiplexer input Analog Ch13 13 — — — Analogchannelformultiplexer input Analog Ch14 12 — — — Analogchannelformultiplexer input Analog Ch15 11 — — — Analogchannelformultiplexer input DIGITALCONTROLSIGNALS Digital CS 31 31 23 23 Chip-selectinputpin;activelow input Digital SCLK 32 32 24 24 Serialclockinputpin input Digital SDI 33 33 25 25 Serialdatainputpin input Digital SDO 34 34 26 26 Serialdataoutputpin output GENERAL-PURPOSEINPUTS/OUTPUTS(1) GPIO0 DigitalI/O General-purposeinputoroutput 37 37 29 29 Digital Activehighalarmoutput.Forconfiguration,seethe Alarm output Programmingsection. GPIO1 DigitalI/O General-purposeinputoroutput 38 38 30 30 Digital Lowalarm Activehighoutputindicatinglowalarm output GPIO2 DigitalI/O General-purposeinputoroutput 1 1 1 1 Digital SelectsADCinputrange:High(1)->Range2(0to Range input 2xV )/Low(0)->Range1(0toV ) REF REF GPIO3 DigitalI/O General-purposeinputoroutput 2 2 2 2 Digital PD Activelowpower-downinput input POWERSUPPLYANDGROUND +VA 5,29 5,29 5,21 5,21 — Analogpowersupply 6,10,19, 6,10,19, AGND 6,10,22 6,10,22 — Analogground 20,30 20,30 +VBD 36 36 28 28 — DigitalI/Osupply BDGND 35 35 27 27 — Digitalground NCPINS 11,12,13, 11,13,15, Pinsinternallynotconnected,donotfloatthesepins, — — 15,16 — 14 16,17,19 connectthesepinstoground (1) Thesepinshaveprogrammabledualfunctionality.SeeTable12forfunctionalityprogramming. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com PinFunctions:VQFNPackages PIN ADS7953 ADS7952 ADS7951 ADS7950 I/O DESCRIPTION PINNAME ADS7957 ADS7956 ADS7955 ADS7954 ADS7961 ADS7960 ADS7959 ADS7958 REFERENCE Analog REFP 31 31 24 24 Referenceinput input Analog REFM 30 30 23 23 Referenceground input ADCANALOGINPUT Analog AINP 3 3 4 4 ADCinputsignal input Analog AINM 4 4 5 5 ADCinputground input MULTIPLEXER Analog MXO 2 2 3 3 Multiplexeroutput output Analog Ch0 20 18 13 11 Analog-inputchannelformultiplexer input Analog Ch1 19 17 12 10 Analog-inputchannelformultiplexer input Analog Ch2 18 16 11 9 Analog-inputchannelformultiplexer input Analog Ch3 17 15 10 8 Analog-inputchannelformultiplexer input Analog Ch4 16 14 9 — Analog-inputchannelformultiplexer input Analog Ch5 15 13 8 — Analog-inputchannelformultiplexer input Analog Ch6 14 12 7 — Analog-inputchannelformultiplexer input Analog Ch7 13 11 6 — Analog-inputchannelformultiplexer input Analog Ch8 12 10 — — Analog-inputchannelformultiplexer input Analog Ch9 11 9 — — Analog-inputchannelformultiplexer input Analog Ch10 10 8 — — Analog-inputchannelformultiplexer input Analog Ch11 9 7 — — Analog-inputchannelformultiplexer input Analog Ch12 8 — — — Analog-inputchannelformultiplexer input Analog Ch13 7 — — — Analog-inputchannelformultiplexer input Analog Ch14 6 — — — Analog-inputchannelformultiplexer input Analog Ch15 5 — — — Analog-inputchannelformultiplexer input DIGITALCONTROLSIGNALS Digital CS 23 23 16 16 Chip-selectinputpin;activelow input Digital SCLK 24 24 17 17 Serialclockinputpin input Digital SDI 25 25 18 18 Serialdatainputpin input 8 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 PinFunctions:VQFNPackages(continued) PIN ADS7953 ADS7952 ADS7951 ADS7950 I/O DESCRIPTION PINNAME ADS7957 ADS7956 ADS7955 ADS7954 ADS7961 ADS7960 ADS7959 ADS7958 Digital SDO 26 26 19 19 Serialdataoutputpin output GENERAL-PURPOSEINPUT/OUTPUT(1) GPIO0 DigitalI/O Generalpurposeinputoroutput 29 29 22 22 Digital Activehighalarmoutput.Forconfiguration,seethe Alarm output Programmingsection. POWERSUPPLYANDGROUND +VA 21,32 21,32 1,14 1,14 — Analogpowersupply AGND 1,22 1,22 2,15 2,15 — Analogground +VBD 28 28 21 21 — DigitalI/Osupply BDGND 27 27 20 20 — Digitalground NCPINS 5,6,19, Pinsinternallynotconnected,donotfloatthesepins, — — — 6,7,12,13 — 20 connectthesepinstoground (1) Thispinhasprogrammabledualfunctionality.SeeTable12forfunctionalityprogramming. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)(2) MIN MAX UNIT AINPorCHntoAGND –0.3 VA+0.3 V +VAtoAGND,+VBDtoBDGND –0.3 7 V DigitalinputvoltagetoBDGND –0.3 7 V DigitaloutputtoBDGND –0.3 VA+0.3 V Inputcurrenttoanypinexceptsupplypins –10 10 mA Operatingtemperature –40 125 °C Junctiontemperature(T Max) 150 °C J Storagetemperature(T ) –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) DBTpackagedversionsofADS79xxfamilydevicesareratedforMSL2260°CpertheJSTD-020specificationsandtheRGEandRHB packagedversionsofADS79xxfamilydevicesareratedforMSL3260CperJSTD-020specifications 7.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±2000 V Electrostaticdischarge V (ESD) Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±500 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN NOM MAX UNIT V Analogpower-supplyvoltage 2.7 3.3 5.25 V (+VA) V DigitalI/O-supplyvoltage 1.7 3.3 V V (+VBD) (+VA) V Referencevoltage 2 2.5 3 V (REF) ƒ SCLKfrequency 20 MHz (SCLK) T Operatingtemperaturerange –40 125 °C A 10 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 7.4 Thermal Information: TSSOP ADS795x THERMALMETRIC(1) DBT(TSSOP) DBT(TSSOP) UNIT 38PINS 30PINS R Junction-to-ambientthermalresistance 83.6 89.8 °C/W θJA R Junction-to-case(top)thermalresistance 29.8 22.9 °C/W θJC(top) R Junction-to-boardthermalresistance 44.7 43.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 2.9 0.8 °C/W JT ψ Junction-to-boardcharacterizationparameter 44.1 42.5 °C/W JB R Junction-to-case(bottom)thermalresistance n/a n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 7.5 Thermal Information: VQFN ADS7953,ADS7957,ADS7961 THERMALMETRIC(1) RHB(VQFN) RGE(VQFN) UNIT 32PINS 24PINS R Junction-to-ambientthermalresistance 40.6 36.9 °C/W θJA R Junction-to-case(top)thermalresistance 32.1 39.3 °C/W θJC(top) R Junction-to-boardthermalresistance 13.1 14.7 °C/W θJB ψ Junction-to-topcharacterizationparameter 0.8 0.7 °C/W JT ψ Junction-to-boardcharacterizationparameter 13 14.8 °C/W JB R Junction-to-case(bottom)thermalresistance 5.7 5.6 °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 7.6 Electrical Characteristics: ADS7950, ADS7951, ADS7952, ADS7953 VA=2.7Vto5.25V,VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ANALOGINPUT Range1 0 V Full-scaleinputspan(1) REF V Range2while2xV ≤+VA 0 2*V REF REF Range1 –0.2 V +0.2 REF Absoluteinputrange V Range2while2xV ≤+VA –0.2 2*V +0.2 REF REF Inputcapacitance 15 pF Inputleakagecurrent T =125°C 61 nA A SYSTEMPERFORMANCE Resolution 12 Bits ADS795XSB(2) 12 Nomissingcodes Bits ADS795XS(2) 11 ADS795XSB(2) –1 ±0.5 1 Integrallinearity LSB(3) ADS795XS(2) –1.5 ±0.75 1.5 ADS795XSB(2) –0.99 ±0.5 1 Differentiallinearity LSB ADS795XS(2) –2 ±0.75 1.5 Offseterror(4) –3.5 ±1.1 3.5 LSB Range1 –2 ±0.2 2 Gainerror LSB Range2 ±0.2 Totalunadjustederror(TUE) ±2 LSB SAMPLINGDYNAMICS Conversiontime 20MHzSCLK 800 ns Acquisitiontime 325 ns Maximumthroughputrate 20MHzSCLK 1 MHz Aperturedelay 5 ns Stepresponse 150 ns Overvoltagerecovery 150 ns (1) Idealinputspan;doesnotincludegainoroffseterror. (2) ADS795X,whereXindicates0,1,2,or3. (3) LSBmeansleastsignificantbit. (4) Measuredrelativetoanidealfull-scaleinput. 12 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Electrical Characteristics: ADS7950, ADS7951, ADS7952, ADS7953 (continued) VA=2.7Vto5.25V,VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT DYNAMICCHARACTERISTICS Totalharmonicdistortion(5) 100kHz –82 dB 100kHz,ADS795XSB(2) 70 71.7 Signal-to-noiseratio dB 100kHz,ADS795XS(2) 70 71.7 100kHz,ADS795XSB(2) 69 71.3 Signal-to-noise+distortion dB 100kHz,ADS795XS(2) 68 71.3 Spuriousfreedynamicrange 100kHz 84 dB Smallsignalbandwidth At–3dB 47 MHz Anyoff-channelwith100kHz,Full-scaleinputto channelbeingsampledwithDCinput(isolation –95 crosstalk). Channel-to-channelcrosstalk dB Frompreviouslysampledtochannelwith100 kHz,Full-scaleinputtochannelbeingsampled –85 withDCinput(memorycrosstalk). EXTERNALREFERENCEINPUT V referencevoltageatREFP(6) 2 2.5 3 V REF Referenceinputresistance Atfsample=1MHz 100 kΩ ALARMSETTING Highthresholdrange 0 4092 LSB Lowthresholdrange 0 4092 LSB DIGITALINPUT/OUTPUT Logicfamily CMOS V 0.7*(+VBD) IH V +VBD=5V 0.8 IL Logiclevel V +VBD=3V 0.4 V IL V AtI =200μA +VBD-0.2 OH source V AtI =200μA 0.4 OL sink DataformatMSBfirst MSBFirst POWERSUPPLYREQUIREMENTS +VAsupplyvoltage 2.7 3.3 5.25 V +VBDsupplyvoltage 1.7 3.3 5.25 V At+VA=2.7to3.6Vand1MHzthroughput 1.8 At+VA=2.7to3.6Vstaticstate 1.05 Supplycurrent(normalmode) mA At+VA=4.7to5.25Vand1MHzthroughput 2.3 3 At+VA=4.7to5.25Vstaticstate 1.1 1.5 Power-downstatesupplycurrent 1 μA +VBDsupplycurrent +VA=5.25V,f =1MHz 1 mA s Power-uptime 1 μs Invalidconversionsafterpowerupor 1 Conversion reset (5) Calculatedonthefirstnineharmonicsoftheinputfrequency. (6) DeviceisdesignedtooperateoverV =2Vto3V.HoweveronecanexpectlowernoiseperformanceatV <2.4V.Thisisdueto REF ref SNRdegradationresultingfromloweredsignalrange. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 7.7 Electrical Characteristics, ADS7954, ADS7955, ADS7956, ADS7957 +VA=2.7Vto5.25V,+VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ANALOGINPUT Range1 0 V Full-scaleinputspan(1) REF V Range2while2xV ≤+VA 0 2*V REF REF Range1 –0.20 V +0.20 REF Absoluteinputrange V Range2while2xV ≤+VA –0.20 2*V +0.20 REF REF Inputcapacitance 15 pF Inputleakagecurrent T =125°C 61 nA A SYSTEMPERFORMANCE Resolution 10 Bits Nomissingcodes 10 Bits Integrallinearity –0.5 ±0.2 0.5 LSB(2) Differentiallinearity –0.5 ±0.2 0.5 LSB Offseterror(3) –1.5 ±0.5 1.5 LSB Range1 –1 ±0.1 1 Gainerror LSB Range2 ±0.1 SAMPLINGDYNAMICS Conversiontime 20MHzSCLK 800 ns Acquisitiontime 325 ns Maximumthroughputrate 20MHzSCLK 1 MHz Aperturedelay 5 ns Stepresponse 150 ns Overvoltagerecovery 150 ns DYNAMICCHARACTERISTICS Totalharmonicdistortion(4) 100kHz –80 dB Signal-to-noiseratio 100kHz 60 dB Signal-to-noise+distortion 100kHz 60 Spuriousfreedynamicrange 100kHz 82 dB Fullpowerbandwidth At–3dB 47 MHz Anyoff-channelwith100kHz,Full-scaleinputto –95 channelbeingsampledwithDCinput. Channel-to-channelcrosstalk Frompreviouslysampledtochannelwith100kHz, –85 dB Full-scaleinputtochannelbeingsampledwithDC input. EXTERNALREFERENCEINPUT V referencevoltageatREFP 2 2.5 3 V REF Referenceinputresistance fsample=1MHz 100 kΩ ALARMSETTING Highthresholdrange 000 4092 LSB Lowthresholdrange 000 4092 LSB (1) Idealinputspan;doesnotincludegainoroffseterror. (2) LSBmeansleastsignificantbit. (3) Measuredrelativetoanidealfull-scaleinput. (4) Calculatedonthefirstnineharmonicsoftheinputfrequency. 14 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Electrical Characteristics, ADS7954, ADS7955, ADS7956, ADS7957 (continued) +VA=2.7Vto5.25V,+VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT DIGITALINPUT/OUTPUT Logicfamily CMOS V 0.7*(+VBD) IH V +VBD=5V 0.8 IL Logiclevel V +VBD=3V 0.4 V IL V AtI =200μA +VBD-0.2 OH source V AtI =200μA 0.4 OL sink DataformatMSBfirst MSBFirst POWERSUPPLYREQUIREMENTS +VAsupplyvoltage 2.7 3.3 5.25 V +VBDsupplyvoltage 1.7 3.3 5.25 V At+VA=2.7to3.6Vand1MHzthroughput 1.8 At+VA=2.7to3.6Vstaticstate 1.05 1 Supplycurrent(normalmode) mA At+VA=4.7to5.25Vand1MHzthroughput 2.3 3 At+VA=4.7to5.25Vstaticstate 1.1 1.5 Power-downstatesupplycurrent 1 μA +VBDsupplycurrent +VA=5.25V,f =1MHz 1 mA s Power-uptime 1 μs Invalidconversionsafterpowerupor 1 Conversion reset 7.8 Electrical Characteristics, ADS7958, ADS7959, ADS7960, ADS7961 +VA=2.7Vto5.25V,+VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT ANALOGINPUT Range1 0 V Full-scaleinputspan(1) REF V Range2while2xV ≤+VA 0 2*V REF REF Range1 –0.20 V +0.2 REF Absoluteinputrange V Range2while2xV ≤+VA –0.20 2*V +0.2 REF REF Inputcapacitance 15 pF Inputleakagecurrent T =125°C 61 nA A SYSTEMPERFORMANCE Resolution 8 Bits Nomissingcodes 8 Bits Integrallinearity –0.3 ±0.1 0.3 LSB(2) Differentiallinearity –0.3 ±0.1 0.3 LSB Offseterror(3) –0.5 ±0.2 0.5 LSB Range1 –0.6 ±0.1 0.6 Gainerror LSB Range2 ±0.1 (1) Idealinputspan;doesnotincludegainoroffseterror. (2) LSBmeansleastsignificantbit. (3) Measuredrelativetoanidealfull-scaleinput. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Electrical Characteristics, ADS7958, ADS7959, ADS7960, ADS7961 (continued) +VA=2.7Vto5.25V,+VBD=1.7Vto+VA,V =2.5V±0.1V,T =–40°Cto125°C,f =1MHz(unlessotherwise REF A sample noted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SAMPLINGDYNAMICS Conversiontime 20MHzSCLK 800 ns Acquisitiontime 325 ns Maximumthroughputrate 20MHzSCLK 1 MHz Aperturedelay 5 ns Stepresponse 150 ns Overvoltagerecovery 150 ns DYNAMICCHARACTERISTICS Totalharmonicdistortion(4) 100kHz –75 dB Signal-to-noiseratio 100kHz 49 dB Signal-to-noise+distortion 100kHz 49 Spuriousfreedynamicrange 100kHz –78 dB Fullpowerbandwidth At–3dB 47 MHz Anyoff-channelwith100kHz,Full-scaleinputto –95 channelbeingsampledwithDCinput. Channel-to-channelcrosstalk Frompreviouslysampledtochannelwith100kHz, dB Full-scaleinputtochannelbeingsampledwithDC –85 input. EXTERNALREFERENCEINPUT V referencevoltageatREFP 2 2.5 3 V REF Referenceinputresistance fsample=1MHz 100 kΩ ALARMSETTING Highthresholdrange 000 255 LSB Lowthresholdrange 000 255 LSB DIGITALINPUT/OUTPUT Logicfamily CMOS V 0.7*(+VBD) IH V +VBD=5V 0.8 IL Logiclevel V +VBD=3V 0.4 V IL V AtI =200μA +VBD-0.2 OH source V AtI =200μA 0.4 OL sink Dataformat MSBFirst POWERSUPPLYREQUIREMENTS +VAsupplyvoltage 2.7 3.3 5.25 V +VBDsupplyvoltage 1.7 3.3 5.25 V At+VA=2.7to3.6Vand1MHzthroughput 1.8 At+VA=2.7to3.6Vstaticstate 1.05 Supplycurrent(normalmode) mA At+VA=4.7to5.25Vand1MHzthroughput 2.3 3 At+VA=4.7to5.25Vstaticstate 1.1 1.5 Power-downstatesupplycurrent 1 μA +VBDsupplycurrent +VA=5.25V,f =1MHz 1 mA s Power-uptime 1 μs Invalidconversionsafterpowerupor 1 Conversion reset (4) Calculatedonthefirstnineharmonicsoftheinputfrequency. 16 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 7.9 Timing Requirements Allspecificationstypicalat–40°Cto125°C,+VA=2.7Vto5.25V(unlessotherwisespecified)(1)(2)(seeFigure1,Figure2, Figure3,andFigure4) MIN NOM MAX UNIT +VBD=1.8V 16 t Conversiontime +VBD=3V 16 SCLK conv +VBD=5V 16 +VBD=1.8V 40 Minimumquietsamplingtimeneededfrombus3- t +VBD=3V 40 ns q statetostartofnextconversion +VBD=5V 40 +VBD=1.8V 38 t Delaytime,CSlowtofirstdata(DO–15)out +VBD=3V 27 ns d1 +VBD=5V 17 +VBD=1.8V 8 t Setuptime,CSlowtofirstrisingedgeofSCLK +VBD=3V 6 ns su1 +VBD=5V 4 +VBD=1.8V 35 t Delaytime,SCLKfallingtoSDOnextdatabitvalid +VBD=3V 27 ns d2 +VBD=5V 17 +VBD=1.8V 7 t Holdtime,SCLKfallingtoSDOdatabitvalid +VBD=3V 5 ns h1 +VBD=5V 3 +VBD=1.8V 26 t Delaytime,16thSCLKfallingedgetoSDO3-state +VBD=3V 22 ns d3 +VBD=5V 13 +VBD=1.8V 2 t Setuptime,SDIvalidtorisingedgeofSCLK +VBD=3V 3 ns su2 +VBD=5V 4 +VBD=1.8V 12 t Holdtime,risingedgeofSCLKtoSDIvalid +VBD=3V 10 ns h2 +VBD=5V 6 +VBD=1.8V 20 t PulsedurationCShigh +VBD=3V 20 ns w1 +VBD=5V 20 +VBD=1.8V 24 t DelaytimeCShightoSDO3-state +VBD=3V 21 ns d4 +VBD=5V 12 +VBD=1.8V 20 t PulsedurationSCLKhigh +VBD=3V 20 ns wh +VBD=5V 20 +VBD=1.8V 20 t PulsedurationSCLKlow +VBD=3V 20 ns wl +VBD=5V 20 +VBD=1.8V 20 FrequencySCLK +VBD=3V 20 MHz +VBD=5V 20 (1) 1.8Vspecificationsapplyfrom1.7Vto1.9V,3Vspecificationsapplyfrom2.7Vto3.6V,5Vspecificationsapplyfrom4.75Vto 5.25V. (2) With50-pFload Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Frame n Frame n + 1 CS 1 3 5 7 9 11 13 15 16 1 3 5 7 9 11 13 15 16 SCLK SDO Top 4 Bit 12-Bit Conversion Result Top 4 Bit 12-Bit Conversion Result SDI 16-Bit I/PWord 16-Bit I/PWord Mux Chan Change Mux Chan Change MUX Analog I/PSettlingAfter Chan Change Sampling Acquisition Instance Acquisition Phase t acq Conversion Conversion Phase Conversion Phase tcnv GPO Data Written (through SDI) in Frame n–1 Data Written (through SDI) in Frame n GPI GPI status is latched in onCSfalling edge and transferred to SDO frame n Figure1. DeviceOperationTimingDiagram a 1/tThroughput (Single Frame) CS t t w1 su1 SCLK 1 2 3 4 5 6 14 15 16 t t t h1 t d3 d1 d2 SDO DO- DO-14 DO-13 DO-12 DO-11 DO-10 DO-2 DO-1 DO-0 15 MSB MSB-1 LSB+2 LSB+1 LSB t t su2 q SDI DI-15 DI-14 DI-13 DI-12 DI-11 DI-10 DI-2 DI-1 DI-0 t h2 Figure2. SerialInterfaceTimingDiagramfor12-BitDevices(ADS7950/51/52/53) 18 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 a 1/tThroughput (Single Frame) CS t t w1 su1 SCLK 1 2 3 4 5 6 14 15 16 t t t h1 t d3 d1 d2 SDO DO- DO-14 DO-13 DO-12 DO-11 DO-10 DO-2 DO-1 DO-0 15 MSB MSB-1 LSB t t su2 q SDI DI-15 DI-14 DI-13 DI-12 DI-11 DI-10 DI-2 DI-1 DI-0 t h2 Figure3. SerialInterfaceTimingDiagramfor10-BitDevices(ADS7954/55/56/57) a 1/tThroughput (Single Frame) CS t t w1 su1 SCLK 1 2 3 4 5 6 12 13 16 t t t h1 t d3 d1 d2 SDO DO- DO-14 DO-13 DO-12 DO-11 DO-10 DO-4 DO-3 DO-0 15 MSB MSB-1 LSB t t su2 q SDI DI-15 DI-14 DI-13 DI-12 DI-11 DI-10 DI-4 DI-3 DI-0 t h2 Figure4. SerialInterfaceTimingDiagramfor8-BitDevices(ADS7958/59/60/61) Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 7.10 Typical Characteristics (All ADS79xx Family Devices) 3.5 1.5 fS= 1 MSPS, TA= 25°C T = 25°C A 1.4 3 mA mA +VA- Supply Current - 12..525 +VA- Supply Current - 111...1123 1 0.9 2.7 3.4 4.1 4.8 5.5 2.7 3.4 4.1 4.8 5.5 +VA- Supply Voltage - V +VA- Supply Voltage - V Figure5.SupplyCurrentvsSupplyVoltage Figure6.StaticSupplyCurrentvsSupplyVoltage 1.115 3.4 fVS= 1= M5.S5P VS, 1.11 VDD= 5.5 V DD A3.2 m A1.105 ent - 3 nt - m 1.1 +VA- Supply Curr222...468 +VA- Supply Curre11..1100..89005589 2.2 1.075 1.07 2 -40 15 70 125 -40 15 70 125 T - Free-Air Temperature - °C TA- Free-Air Temperature - °C A Figure7.SupplyCurrentvsFree-AirTemperature Figure8.StaticSupplyCurrentvsFree-AirTemperature 2.5 2.5 No Powerdown, With Powerdown, TA= 25°C TA= 25°C mA 2 5 V mA 2 +VA- Supply Current - 01..551 2.7 V +VA- Supply Current - 01..515 5 V 2.7 V 0 0 0 200 400 600 800 1000 0 100 200 300 400 500 fS- Sample Rate - KSPS fS- Sample Rate - KSPS Figure9.SupplyCurrentvsSampleRate Figure10.SupplyCurrentvsSampleRate 20 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 7.11 Typical Characteristics (12-Bit Devices Only) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves 1 1 L- Differential Nonlinearity - LSBs---0000000.......64224680 fTSA== 12 5M°SCPS, DDNNLLmmaixn NL- Integral Nonlinearity - LSBs---0000000.......64202468 fTSA== 12 5M°SCPS, ININLLmmaixn DN-0.8 I-0.8 -1 -1 2.7 3.2 3.7 4.2 4.7 5.2 5.5 2.7 3.2 3.7 4.2 4.7 5.2 +VA- Supply Voltage - V +VA- Supply Voltage - V Figure11.DifferentialNonlinearityvsSupplyVoltage Figure12.IntegralNonlinearityvsSupplyVoltage 1 1 +VA= 5 V, +VA= 5 V, Bs 0.8 +VBD = 5 V, 0.8 +VBD = 5 V, nlinearity - LS 000...246 fS= 1 MSPS DNLmax nearity - LSBs 000...246 fS= 1 MSPS INLmax No 0 nli 0 al No nti -0.2 al -0.2 DNL- Differe ---000...864 DNLmin INL- Integr---000...864 INLmin -1 -1 -40 15 70 125 -40 15 70 125 TA- Free-Air Temperature - °C TA- Free-Air Temperature - °C Figure13.DifferentialNonlinearityvsFree-AirTemperature Figure14.IntegralNonlinearityvsFree-AirTemperature 2 2 11..68 +fTSVA=B= D12 5M=° SC1P.8S V,, 11..68 +fTSVA=A= 1=2 5M5°.SC5P VS,, Bs 1.4 Bs1.4 Error - LS 1.21 Error - LS1.21 Offset 00..68 Offset 00..68 0.4 0.4 0.2 0.2 0 0 2.7 3.4 4.1 4.8 5.5 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.35.5 +VA- Supply Voltage - V +VBD - Interace Supply - V Figure15.OffsetErrorvsSupplyVoltage Figure16.OffsetErrorvsInterfaceSupplyVoltage Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Typical Characteristics (12-Bit Devices Only) (continued) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves 1 1 +VBD = 1.8 V, +VA= 5.5 V, 0.8 fS= 1 MSPS, 0.8 fS= 1 MSPS, 0.6 TA= 25°C 0.6 TA= 25°C 0.4 0.4 Bs Bs S 0.2 S 0.2 L L or - 0 or - 0 n Err -0.2 n Err-0.2 Gai -0.4 Gai-0.4 -0.6 -0.6 -0.8 -0.8 -1 -1 2.7 3.4 4.1 4.8 5.5 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.35.5 +VA- Supply Voltage - V +VBD - Interace Supply - V Figure17.GainErrorvsSupplyVoltage Figure18.GainErrorvsInterfaceSupplyVoltage 2 1 1.8 ++VVABD= =5. 51 .V8 ,V, 0.9 ++VVABD= =5. 51 .V8 ,V, 1.6 fS= 1 MSPS 0.8 fS= 1 MSPS Bs 1.4 Bs 0.7 Offset Error - LS 001...6812 Gain Error - LS 0000....3456 0.4 0.2 0.2 0.1 0 0 -40 15 70 125 -40 15 70 125 TA- Free-Air Temperature - °C TA- Free-Air Temperature - °C Figure19.OffsetErrorvsFree-AirTemperature Figure20.GainErrorvsFree-AirTemperature 72 B 72 d o-Noise Ratio - dB 77017..515 oise and Distortion - 77017..515 SNR - Signal-t 697.50 +ffTSINVA=B== D121 50M=°0 SC3 kP HVS,z, D - Signal-to-N697.50 +ffTSINVA=B== D121 50M=°0 SC3 kP HVS,z, A N 69 SI 69 2.7 3.4 4.1 4.8 5.5 2.7 3.4 4.1 4.8 5.5 +VA- Supply Voltage - V +VA- Supply Voltage - V Figure21.Signal-to-NoiseRatiovsSupplyVoltage Figure22.Signal-to-Noise+DistortionvsSupplyVoltage 22 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Typical Characteristics (12-Bit Devices Only) (continued) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves -80 90 B d +VBD = 3 V, D - Total Harmonic Distortion - --------8888888887654321 +ffSINV=B= D11 0M=0 S3 kP HVS,z, Spurious Free Dynamic Range - 8888888823456789 ffTSINA=== 121 50M°0SC kPHSz, TH -89 TA= 25°C DR - 81 F -90 S80 2.7 3.4 4.1 4.8 5.5 2.7 3.4 4.1 4.8 5.5 +VA- Supply Voltage - V +VA- Supply Voltage - V Figure23.TotalHarmonicDistortionvsSupplyVoltage Figure24.SpuriousFreeDynamicRangevsSupplyVoltage 72 72 B d +VA= 5 V o-Noise Ratio - dB 77017..551 oise and Distortion - 77017..515 +ffSINV=B= D11 0M=0 S3 kP HVS,z, R - Signal-t 70 ++VVABD= =5 V3 V, Signal-to-N 70 SN 69.5 fS= 1 MSPS, D - 69.5 f = 100 kHz A IN N 69 SI 69 -40 15 70 125 -40 15 70 125 TA- Free-Air Temperature - °C TA- Free-Air Temperature - °C Figure25.Signal-To-NoiseRatiovsFree-AirTemperature Figure26.Signal-to-Noise+DistortionvsFree-Air Temperature -80 90 B THD - Total Harmonic Distortion - dB ---------888888888987654321 ++ffSINVV=AB= D1=1 0M=50 SV3 kP HVS,z, DR - Spurious Free Dynamic Range - d 888888888123456789 ++ffSINVV=AB= D1=1 0M=50 SV3 kP HVS,z, F -90 S 80 -40 15 70 125 -40 15 70 125 TA- Free-Air Temperature - °C TA- Free-Air Temperature - °C Figure27.TotalHarmonicDistortionvsFree-Air Figure28.SpuriousFreeDynamicRangevsFree-Air Temperature Temperature Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Typical Characteristics (12-Bit Devices Only) (continued) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves 73 73 B d +VA= 5 V B 72.5 n - 72.5 +VBD = 3 V, d o f = 1 MSPS, Ratio - 72 Distorti 72 TMSAX=O 2 S5h°Cor,ted toAINP oise 71.5 and 71.5 NR - Signal-to-N 7077.051 ++fSVV=AB D1= M=5 SV3P VS,, Signal-to-Noise 7077.051 S 69.5 TMAX=O 2 S5h°Cor,ted toAINP AD - 69.5 N 69 SI 69 10 30 50 70 90 110 130 150 10 30 50 70 90 110 130 150 fIN- Input Frequency - KHz fIN- Input Frequency - KHz Figure29.Signal-to-NoiseRatiovsInputFrequency Figure30.Signal-to-Noise+DistortionvsInputFrequency -70 100 B Distortion - dB ----77778642 ++fTMSVVAX=AB=O D1=2 S 5M=5h° SCVo3Pr ,VtSe,d, toAINP namic Range - d 9905 ++fTMSVVAX=AB=O D1=2 S 5M=5h° SCVo3Pr ,VtSe,d, toAINP THD - Total Harmonic -----8888886420 DR - Spurious Free Dy 788505 F -90 S 70 10 30 50 70 90 110 130 150 10 30 50 70 90 110 130 150 fIN- Input Frequency - KHz fIN- Input Frequency - KHz Figure31.TotalHarmonicDistortionvsInputFrequency Figure32.SpuriousFreeDynamicRangevsInput Frequency 72 -70 ortion - dB 71.5 500W 1000W on - dB --7742 ++fTSVVA=AB= D1=2 5M=5° SCV5P ,VS,, Dist 71 orti -76 Buffer Between MXO andAINP se and 70.5 10W 100W nic Dist --8708 1000W 500W NAD - Signal-to-Noi 697.50 ++fTBSVVAu=AfB=f e D1=2r 5M=B5° SeCV5tP ,wVSe,,en MXO andAINP THD - Total Harmo ----88888642 10W 100W SI 69 -90 20 40 60 80 100 20 40 60 80 100 fIN- Input Frequency - KHz fIN- Input Frequency - KHz Figure33.Signal-to-Noise+DistortionvsInputFrequency Figure34.TotalHarmonicDistortionvsInputFrequency (AcrossDifferentSourceResistanceValues) (AcrossDifferentSourceResistanceValues) 24 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Typical Characteristics (12-Bit Devices Only) (continued) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves 90 1 B +VA= 5 V, mic Range - d888468 10W 100W earity - LSBs 000...468 +fSV=B D1 M= S5P VS, DNLmax Spurious Free Dyna7778846802 1000W++fVV=5AB0 D1=0 M=5W SV5P VS,, - Differential Nonlin ---0000....64202 DNLmin FDR - 72 TBSAuf=fe 2r 5B°eCt,ween MXO andAINP DNL -0.8 S70 -1 20 40 60 80 100 0 5 10 15 fIN- Input Frequency - KHz Channel Number Figure36.DifferentialNonlinearityVariationAcross Figure35.SpuriousFreeDynamicRangevsInput Channels Frequency(AcrossDifferentSourceResistanceValues) 1 1.6 +VA= 5 V, 0.8 1.4 +VBD = 5 V, SBs 0.6 INLmax fS= 1 MSPS L s 1.2 nlinearity - 00..024 Error - LSB 0.81 No et egral --00..42 INLmin - Offs 0.6 L- Int-0.6 +VA= 5 V, EO 0.4 IN-0.8 +fV=B D1 M= S5P VS, 0.2 S -1 0 0 5 10 15 0 5 10 15 20 Channel Number Channel Number Figure37.IntegralNonlinearityVariationAcrossChannels Figure38.OffsetErrorVariationAcrossChannels 0.25 73 +VA= 5 V, +VBD = 5 V, Gain Error - LSBs 00.01..512 fS= 1 MSPS nal-to-Noise Ratio - dB77127..525 E- G 0.05 SNR - Sig707.51 ++VVABD= =5 V5 ,V, f = 1 MSPS S 0 70 0 5 10 15 20 1 2 3 4 5 6 7 8 9 10111213141516 Channel Number Channel Number Figure39.GainErrorVariationAcrossChannels Figure40.Signal-to-NoiseRatioVariationAcrossChannels Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Typical Characteristics (12-Bit Devices Only) (continued) Variationsfor10-bitand8-bitdevicesaretoosmalltobeillustratedthroughthecharacteristiccurves B 73 120 n - d ++VVABD= =5 V5 ,V, Isolation ortio72.5 fS= 1 MSPS 100 st Noise and Di717.52 sstalk - dB6800 Memory al-to- 71 Cro40 gn +VA= 5 V, Si +VBD = 5 V, D - 70.5 20 fS= 1 MSPS, A CH0, CH1 N SI 70 0 1 2 3 4 5 6 7 8 910111213141516 0 50 100 150 200 250 Channel Number fIN- Input Frequency - KHz Figure41.Signal-to-Noise+DistortionVariationAcross Figure42.CrosstalkvsInputFrequency Channels 100 25 90 +VA= 5 V, +VBD = 5 V A 80 20 n nt - 70 s e e Curr 60 evic15 NP- Leakage 345000 V= 2.5 VVI= 1.25 VVI= 0 V Number of D10 AI 20 I 5 10 0 0 -40-25 -10 5 20 35 50 65 80 95 110125 0.25 0.5 0.75 1 1.25 1.5 1.75 2 TA- Free-Air Temperature - °C TUE Max - LSB Figure43.InputLeakageCurrentvsFree-AirTemperature Figure44.TotalUnadjustedError(TUEMaximum) 25 20 s e c vi15 e D of ber 10 m u N 5 0 -1.75 -1.5 -1.25 -1 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1 TUE Min- LSB Figure45.TotalUnadjustedError(TUEMinimum) 26 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 7.12 Typical Characteristics (12-Bit Devices Only) DNL INL 1 1 0.8 +VA= 5 V 0.8 +VA= 5 V +VBD = 5 V, +VBD = 5 V, 0.6 fS= 1 MSPS, 0.6 fS= 1 MSPS 0.4 T = 25°C 0.4 Bs 0.2 A Bs 0.2 S S - L 0 - L 0 L L N -0.2 N -0.2 D I -0.4 -0.4 -0.6 -0.6 -0.8 -0.8 -1 -1 0 1024 2048 3072 4096 0 1024 2048 3072 4096 Code Code Figure46.TypicalDNLforAllCodes Figure47.TypicalINLforAllCodes FFT 0 +VA= 5 V -20 +VBD = 5 V, f = 1 MSPS, -40 S f = 100 kHz B IN d -60 Npoints = 16384 e - d -80 u mplit -100 A -120 -140 -160 0 100000 200000 300000 400000 500000 f - Frequency - Hz Figure48.TypicalFFTPlot Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 8 Detailed Description 8.1 Overview The ADS7950 to ADS7961 are 12-, 10-, 8-bit multichannel pin-compatible devices. The ADS79xx is a family of 12-,10-,8-bit,high-speed,low-power,successiveapproximationregister(SAR)analog-to-digitalconverter(ADC) that uses an external reference. The architecture is based on charge redistribution, which inherently includes a sample/hold function. The analog inputs to the ADS79xx are provided to CHX input channels. All input channels share a common analog ground AGND. ADS79xx has multiplexer breakout feature which allows user to connect the signal conditioning circuit between multiplexer output (MXO) and ADC input (AINP). This feature enables use of common signal conditioning block for the input signal which exhibit similar performance characteristics. ADS79xx can be programmed to select a channel manually or can be programmed into the auto channel select modetosweepthroughtheinputchannelsautomatically Figure 1, Figure 2, Figure 3, and Figure 4 show device operation timing. Device operation is controlled with CS, SCLK,andSDI.ThedeviceoutputsitsdataonSDO. Each frame begins with the falling edge of CS. With the falling edge of CS, the input signal from the selected channel is sampled, and the conversion process is initiated. The device outputs data while the conversion is in progress. The 16-bit data word contains a 4-bit channel address, followed by a 12-bit conversion result in MSB first format. There is an option to read the GPIO status instead of the channel address. (Refer to Table 1, Table2,andTable5formoredetails.) The device selects a new multiplexer channel on the second SCLK falling edge. The acquisition phase starts on the fourteenth SCLK rising edge. On the next CS falling edge the acquisition phase will end, and the device startsanewframe. The TSSOP packaged devices have four General Purpose IO (GPIO) pins while QFN versions have only one GPIO. These four pins can be individually programmed as GPO or GPI. It is also possible to use them for preassigned functions, refer to Table 11. GPO data can be written into the device through the SDI line. The devicerefreshestheGPOdataontheCSfallingedgeaspertheSDIdatawritteninpreviousframe. Similarly the device latches GPI status on the CS falling edge and outputs the GPI data on the SDO line (if GPI readisenabledbywritingDI04=1inthepreviousframe)inthesameframestartingwiththe CSfallingedge. The falling edge of CS clocks out DO15 (first bit of the four bit channel address), and remaining address bits are clocked out on every falling edge of SCLK until the third falling edge. The conversion result MSB is clocked out on the 4th SCLK falling edge and LSB on the 15th/13th/11th falling edge respectively for 12/10/8-bit devices. On the 16th falling edge of SCLK, SDO goes to the 3-state condition. The conversion ends on the 16th falling edge ofSCLK.CScanbeasserted(pulledhigh)onlyafter16clockshaveelapsed The device reads a sixteen bit word on the SDI pin while it outputs the data on the SDO pin. SDI data is latched oneveryrisingedgeofSCLKstartingwiththe1stclockasshowninFigure2,Figure3,andFigure4. CScanbeasserted(pulledhigh)onlyafter16clockshaveelapsed. The device has two (high and low) programmable alarm thresholds per channel. If the input crosses these limits; the device flags out an alarm on GPIO0/GPIO1 depending on the GPIO program register settings (refer to Table 11). The alarm is asserted (under the alarm conditions) on the 12th falling edge of SCLK in the same frame when a data conversion is in progress. The alarm output is reset on the 10th falling edge of SCLK in the nextframe. The device offers a power-down feature to save power when not in use. There are two ways to powerdown the device. It can be powered down by writing DI05 = 1 in the mode control register (refer to Table 1, Table 2, and Table 5); in this case the device powers down on the 16th falling edge of SCLK in the next data frame. Another way to powerdown the device is through GPIO in the case of the TSSOP packaged devices. GPIO3 can act as the PD input (refer to Table 11 to assign this functionality to GPIO3). This is an asynchronous and active low input. The device powers down instantaneously after GPIO3 (PD) = 0. The device will power up again on the CS fallingedgewithDI05=0inthemodecontrolregisterandGPIO3(PD)=1. 28 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 8.2 Functional Block Diagram MXO AINP REF +VA AGND Ch0 Ch1 ADC SDO Ch2 Compare Alarm Threshold Control Logic SDI Ch n* & SCLK Sequencing CS GPIO BDGND VBD NOTE: n*isnumberofchannels(16,12,8,or4)dependingonthedevicefromtheADS79xxproductfamily. NOTE: Thereare4GPIOsintheTSSOPpackageand1GPIOintheQFNpackage.. 8.3 Feature Description 8.3.1 Reference The ADS79xx can operate with an external 2.5-V ± 10-mV reference. A clean, low noise, well-decoupled reference voltage on the REFP pin is required to ensure good performance of the converter. A low noise band- gap reference like the REF5025 can be used to drive this pin. A 10-μF ceramic decoupling capacitor is required between the REFP and REFM pins of the converter. The capacitor should be placed as close as possible to the pinsofthedevice. 8.3.2 PowerSaving The ADS79xx devices offer a power-down feature to save power when not in use. There are two ways to power down the device. It can be powered down by writing DI05 = 1 in the Mode Control register (refer to Table 1, Table 2 and Table 5); in this case the device powers down on the 16th falling edge of SCLK in the next data frame. Another way to powerdown the device is through GPIO. GPIO3 can act as a PD input (refer to Table 11, for assigning this functionality to GPIO3). This is an asynchronous and active low input. The device powers down instantaneously after GPIO3 (PD) = 0. The device will powerup again on the CS falling edge while DI05 = 0 in theModeControlregisterandGPIO3(PD)=1. 8.4 Device Functional Modes 8.4.1 ChannelSequencingModes There are three modes for channel sequencing, namely Manual mode, Auto-1 mode, Auto-2 mode. Mode selection is done by writing into the Mode Control Register (refer to Table 1, Table 2, and Table 5). A new multiplexerchannelisselectedonthesecondfallingedgeofSCLK(asshowninFigure1)inallthreemodes. Manual mode: When configured to operate in Manual mode, the next channel to be selected is programmed in each frame and the device selects the programmed channel in the next frame. On powerup or after reset the defaultchannelis'Channel-0'andthedeviceisinManualmode. Auto-1 mode: In this mode the device scans pre-programmed channels in ascending order. A new multiplexer channel is selected every frame on the second falling edge of SCLK. There is a separate Program Register for pre-programmingthechannelsequence.Table3andTable4showAuto-1 ‘programregister’settings. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Device Functional Modes (continued) Once programmed the device retains ‘Program Register settings until the device is powered down, reset, or reprogrammed. It is allowed to exit and re-enter the Auto-1 mode any number of times without disturbing ‘programregister’ settings. The Auto-1 program register is reset to FFFF/FFF/FF/F hex for the 16-, 12-, 8-, 4 channel devices respectively upondevicepoweruporreset;implyingthedevicescansallchannelsinascendingorder. Auto-2 mode: In this mode the user can configure the program register to select the last channel in the scan sequence.Thedevicescansallchannelsfromchannel0uptoandincludingthelastchannelinascendingorder. The multiplexer channel is selected every frame on the second falling edge of SCLK. There is a separate ‘program register’ for pre-programming of the last channel in the sequence (multiplexer depth). Table 6 lists the ‘Auto-2prog’ registersettingsforselectionofthelastchannelinthesequence. Once programmed the device retains program register settings until the device is powered down, reset, or reprogrammed. It is allowed to exit and re-enter Auto-2 mode any number of times, without disturbing the ‘programregister’ settings. On powerup or reset the bits D9-D6 of the Auto-2 program register are reset to F/B/7/3 hex for the 16/12/8/4 channeldevicesrespectively;implyingthedevicescansallchannelsinascendingorder. 8.4.2 DeviceProgrammingandModeControl The following section describes device programming and mode control. These devices feature two types of registers to configure and operate the devices in different modes. These registers are referred as ‘Configuration Registers’. There are two types of ‘Configuration Registers’ namely ‘Mode Control Registers’ and ‘Program Registers’. 8.4.2.1 ModeControlRegister A‘ModeControlRegister’isconfiguredtooperatethedevicein one of three channel sequencing modes, namely Manual mode, Auto-1 Mode, Auto-2 Mode. It is also used to control user programmable features like range selection,devicepower-downcontrol,GPIOreadcontrol,andwritingoutputdataintotheGPIO. 8.4.2.2 ProgramRegisters The 'Program Registers’ are used for device configuration settings and are typically programmed once on powerup or after device reset. There are different program registers such as ‘Auto-1 mode programming’ for pre- programming the channel sequence, ‘Auto-2 mode programming’ for selection of the last channel in the sequence, ‘Alarm programming’ for all 16 channels (or 12, 8, 4 channels depending on the device) and GPIO for individualpinconfigurationasGPIorGPOorapre-assignedfunction. 8.4.3 DevicePower-UpSequence The device power-up sequence is shown in Figure 49. By default, the Mode Control Register is configured for manual mode and the default channel is channel 0. As explained previously, these devices offer Program Registers to configure user programmable features like GPIOs, Alarms, and to pre-program the channel sequence for Auto modes. At ‘power up or on reset’ these registers are set to the default values listed in Table 1 to Table 11. On power up or after reset It is required to program Mode Control Register and Program Register to required mode of operation. Once configured; the device is ready to use in any of the three channel sequencing modesnamelyManual,Auto-1,andAuto-2. 30 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Device Functional Modes (continued) Device power up or reset Device operation in manual mode, Channel 0; CS SDO Invalid in first frame First frame CS Auto 1 register program (note 1) CS Auto 2 register program (note 1) CS Alarm register program (note 1) CS GPIO register program (note 1) CS Operation in manual mode CS Operation inAuto 1 mode CS Operation inAuto 2 mode (1) The device continues its operation in manual mode channel 0 throughout the programming sequence and outputs valid conversion results. It is possible to change channel, range, GPIO by inserting extra frames in between two programming blocks. It is also possible to bypass any programming block if the user does not intend to use that feature. (2) Itispossibletoreprogramthedeviceatanytimeduringoperation,regardlessofwhatmodethedeviceisin.During programmingthedevicecontinuesitsoperationinwhatevermodeitisinandoutputsvaliddata. Figure49. DevicePower-UpSequence 8.4.4 OperatinginManualMode The flowchart in Figure 50 illustrates the steps involved in operating in manual channel sequencing mode. Table 1 lists the mode control register settings for manual mode. There are no program registers in manual mode. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Device Functional Modes (continued) Device operation inAuto1or CS Auto2mode Frame:n-1 No Change to Manual mode? Yes *Sample:Samples and converts channel selected in‘frame n-1’ *Mux :Selects channel incremented from previous frame as per auto sequence this channel will be acquired in this frame and sampled at start of‘frame n+1’ *Range:As programmed in‘frame n-1’.Applies to channel selected for acquisition in current fram.e *SDI :Programming for‘frame n+1’ DI15..12=0001binary ….Selects manual mode DI11=1enables programming of‘range and GPIO’ CS DI10..7=binary address of channel DI6..As per required range for channel to be selected Frame:n DI5=0..No power down Request DI4..0…as per GPIO settings for Manual *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n-1’ mode *GPIO: O/P:latched onCSfalling edge as per DI3..0written in frame n-1’ I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame *Sample:Samples and converts channel selected in‘frame n’ *Mux :Selects channel programmed in‘frame n’(Manual mode)this channel will be acquired in this frame and sampled at start of‘frame n+2’ *Range:As programmed in‘frame n’.Applies to channel selected for acquisition in current fram.e* SDI :Programming for‘frame n+2’ DI15..12=0001binary ….To continue in manual mode DI11=1enables programming of‘range and GPIO’ CS DI10..7=binary address of channel DI6..As per required range for channel to be selected DI5=0..No power down Frame: DI4..0…as per GPIO settings n+1 *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n’ Entry into *GPIO: Manual O/P:latched onCSfalling edge as per DI3..0written in frame‘n’ Mode I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame *Sample:Samples and converts channel selected in‘frame n+1’ *Mux :Selects channel programmed in‘frame n+1’(Manual mode),this channel will be acquired in this frame and sampled at start of‘frame n+3’ *Range:As programmed in‘frame n+1’.Applies to channel selected for acquisition in current frame.* SDI :Programming for‘frame n+3’ DI15..12=0001binary ….Selects manual mode DI11=1enables programming of‘range and GPIO’ CS DI10..7=binary address of channel DI6..As per required range for channel to be selected Frame: DI5=0..No power down n+2 DI4..0…as per GPIO settings Operation *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n+1’ in Manual *GPIO: mode O/P:latched onCSfalling edge as per DI3..0written in frame n+1’ I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame CS Continue operationinmanual mode Figure50. EnteringandRunninginManualChannelSequencingMode 32 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Device Functional Modes (continued) Figure 51 shows an example in which manual mode is used to scan channels 4, 7, and 9. The command to selectchannel4(CH4)isissuedintheNthframeandthedatacorrespondingtoCH4isavailableinthe(N+2)th frame. Internally, the SDI command is parsed and on the rising edge of CS of the (N+1)th frame and the MUX switches accordingly on the second falling edge of SCLK in this frame. On the rising edge of CS of the (N+2)th frame, the input signal for CH4 is sampled and the ADC sends the conversion data in this third frame. The device follows the same steps and the ADC sends the conversion data for CH7 and CH9 in the subsequent two frames. Sample Sample Sample Sample CHx CHy CH4 CH7 t CYCLE CS SCLK SDI Select CH4 Select CH7 Select CH9 SDO Data CHx Data CHy Data CH4 Frame N Frame (N + 1) Frame (N + 2) Figure51. ExampleManualModeTimingDiagram Table1.ModeControlRegisterSettingsforManualMode RESET LOGIC BITS FUNCTION STATE STATE DI15-12 0001 0001 SelectsManualMode DI11 0 1 EnablesprogrammingofbitsDI06-00. 0 DeviceretainsvaluesofDI06-00fromthepreviousframe. DI10-07 0000 Thisfourbitdatarepresentstheaddressofthenextchanneltobeselectedinthenextframe.DI10:MSBand DI07:LSB.Forexample,0000representschannel-0,0001representschannel-1andsoforth. DI06 0 0 Selects0toV inputrange(Range1) REF 1 Selects0to2xV inputrange(Range2) REF DI05 0 0 Devicenormaloperation(nopowerdown) 1 Devicepowersdownon16thSCLKfallingedge DI04 0 SDOoutputscurrentchanneladdressofthechannelonDO15..12followedby12bitconversion 0 resultonDO11..00. 1 GPIO3-GPIO0data(bothinputandoutput)ismappedontoDO15-DO12intheordershownbelow. LowerdatabitsDO11-DO00represent12-bitconversionresultofthecurrentchannel. DOI5 DOI4 DOI3 DOI2 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) DI03-00 0000 GPIOdataforthechannelsconfiguredasoutput.Devicewillignorethedataforthechannelwhichisconfigured asinput.SDIbitandcorrespondingGPIOinformationisgivenbelow DI03 DI02 DI01 DI00 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) (1) GPIO1to3areavailableonlyinTSSOPpackageddevices.QFNdeviceoffersGPIO0only. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 8.4.5 OperatinginAuto-1Mode Figure 52 illustrates the steps involved in entering and operating in Auto-1 Channel Sequencing mode. Table 2 liststheModeControlRegistersettingsforAuto-1mode. DeviceoperationinManualor CS Auto-2mode Frame:n-1 No ChangetoAuto-1mode? Yes *Sample:Samples and converts channel selected in‘frame n-1’ *Mux :Selects channel incremented from previous frame as perAuto-2sequence,or channel programmed in previous frame in case of manual mode.This channel will be acquired in this frame and sampled at start of‘frame n+1’ *Range:As programmed in‘frame n-1’.Applies to channel selected for acquisition in current fram.e *SDI :Programming for‘frame n+1’ DI15..12=0010binary ….SelectsAuto-1mode DI11=1enables programming of‘range and GPIO’ CS DI10=x,Device automatically resets channel to lowest number inAuto-1sequence. DI6..As per required range for channel to be selected Frame:n DI5=0..No power down Request DI4..0…as per GPIO settings forAuto-1 *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n-1’ mode *GPIO: O/P:latched onCSfalling edge as per DI3..0written in frame n-1’ I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame *Sample:Samples and converts channel selected in‘frame n’ *Mux :Selects lowest channel#inAuto-1sequence;this channel will be acquired in this frame and sampled at start of‘frame n+2’ *Range:As programmed in‘frame n’.Applies to channel selected for acquisition in current fram.e *SDI :Programming for‘frame n+2’ DI15..12=0010binary ….To continue inAuto-1mode DI11=1enables programming of‘range and GPIO’ CS DI10=0,not to reset channel sequence DI6..As per required range for channel to be selected DI5=0..No power down Frame: DI4..0…as per GPIO settings n+1 *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n’ Entry into *GPIO: Auto-1 O/P:latched onCSfalling edge as per DI3..0written in frame‘n’ Mode I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame *Sample:Samples and converts channel selected in‘frame n+1’(ie.Lowest channel#inAuto-1 sequence) *Mux :Selects next higher channel inAuto-1sequence,this channel will be acquired in this frame and sampled at start of‘frame n+3’ *Range:As programmed in‘frame n+1’.Applies to channel selected for acquisition in current frame.* SDI :Programming for‘frame n+3’ DI15..12=0010binary ….To continue inAuto-1mode DI11=1enables programming of‘range and GPIO’ CS DI10=0not to reset channel sequence Frame: DI6..As per required range for channel to be selected n+2 DI5=0..No power down Operation DI4..0…as per GPIO settings inAuto-1 *SDO :DO15..0address(or GPIO data)&conversion data of channel selected in‘frame n+1’ mode *GPIO: O/P:latched onCSfalling edge as per DI3..0written in frame n+1’ I/P:Input status latched on falling edge ofCSand transferred serially on SDO in the same frame CS ContinueoperationinAuto-1mode Figure52. EnteringandRunninginAuto-1ChannelSequencingMode 34 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 ConsideracasewhereAuto-1modeisselectedtoscanchannels2(CH2),5(CH5),and6(CH6)asrepresented in Figure 53. The program register for Auto-1 mode must be programmed as described in Figure 53 before entering into this auto sequencing mode. The device enters into Auto-1 mode on receiving the Auto-1 mode command in the Nth frame. This step causes the device to find the first enabled channel in ascending order and switch the MUX for CH2 in the (N+1)th frame. In the (N+2)th frame, the ADC samples the signal on CH2, shifts out the conversion results, and the MUX also internally switches to CH5. In the (N+3)th frame, the ADC samples and shifts out the conversion result for CH5 and the MUX also internally switches to CH6. This process repeats until the last enabled channel is reached, in which case the process loops back to the first enabled channel. Entering Auto-1 mode from any other mode also causes the device to restart from the first enabled channel. However, modifying the contents of the Auto-1 mode program register while operating in Auto-1 mode causes thedevicetoscanforthenextenabledchannel. Sample Sample Sample Sample CHy CH2 CH5 CH6 tCYCLE CS SCLK SDI AUTO-1 Start AUTO-1 AUTO-1 AUTO1 AUTO-1 SDO Data CHx Data CHy Data CH2 Data CH5 Data CH6 Frame N Frame (N + 1) Frame (N + 2) Frame (N + 3) Scan channels CH2 , CH5 and CH6 Figure53. ExampleAuto-1ModeTimingDiagram Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Table2.ModeControlRegisterSettingsforAuto-1Mode RESET LOGIC BITS FUNCTION STATE STATE DI15-12 0001 0010 SelectsAuto-1Mode DI11 0 1 EnablesprogrammingofbitsDI10-00. 0 DeviceretainsvaluesofDI10-00frompreviousframe. DI10 0 1 ThechannelcounterisresettothelowestprogrammedchannelintheAuto-1ProgramRegister 0 Thechannelcounterincrementseveryconversion(Noreset) DI09-07 000 xxx Donotcare DI06 0 0 Selects0toV inputrange(Range1) REF 1 Selects0to2xV inputrange(Range2) REF DI05 0 0 Devicenormaloperation(nopowerdown) 1 Devicepowersdownonthe16thSCLKfallingedge DI04 0 SDOoutputscurrentchanneladdressofthechannelonDO15..12followedby12-bitconversion 0 resultonDO11..00. 1 GPIO3-GPIO0data(bothinputandoutput)ismappedontoDO15-DO12intheordershownbelow. LowerdatabitsDO11-DO00represent12-bitconversionresultofthecurrentchannel. DO15 DO14 DO13 DO12 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) DI03-00 0000 GPIOdataforthechannelsconfiguredasoutput.Devicewillignorethedataforthechannelwhichisconfigured asinput.SDIbitandcorrespondingGPIOinformationisgivenbelow DI03 DI02 DI01 DI00 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) (1) GPIO1to3areavailableonlyinTSSOPpackageddevices.QFNdeviceoffersGPIO0only. 36 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 The Auto-1 Program Register is programmed (once on powerup or reset) to pre-select the channels for the Auto- 1 sequence. Auto-1 Program Register programming requires two CS frames for complete programming. In the first CS frame the device enters the Auto-1 register programming sequence and in the second frame it programs theAuto-1ProgramRegister.RefertoTable2,Table3,andTable4forcompletedetails. CS Device in any operation mode No ProgramAuto 1 register? Yes CS SDI: DI15..12 = 1000 (Device entersAuto 1 programming sequence) Entry intoAuto1 register programming sequence CS SDI: DI15..0 as per tables 4,5 Auto1register programming End ofAuto 1 register programming NOTE: Thedevicecontinuesitsoperationinselectedmodeduringprogramming.SDOisvalid,howeveritisnotpossibleto changetherangeorwriteGPIOdataintothedeviceduringprogramming. Figure54. Auto-1RegisterProgrammingFlowchart Table3.ProgramRegisterSettingsforAuto-1Mode RESET BITS LOGICSTATE FUNCTION STATE FRAME1 DI15-12 NA 1000 DeviceentersAuto-1programsequence.Deviceprogrammingisdoneinthenextframe. DI11-00 NA Donotcare FRAME2 DI15-00 All1s 1(individualbit) Aparticularchannelisprogrammedtobeselectedinthechannelscanningsequence.The channelnumbersaremappedone-to-onewithrespecttotheSDIbits;forexample, DI15→Ch15,DI14→Ch14…DI00→Ch00 Aparticularchannelisprogrammedtobeskippedinthechannelscanningsequence.The 0(individualbit) channelnumbersaremappedone-to-onewithrespecttotheSDIbits;forexample DI15→Ch15,DI14→Ch14…DI00→Ch00 Table4.MappingofChannelstoSDIBitsfor16,12,8,4ChannelDevices Device(1) SDIBITS DI15 DI14 DI13 DI12 DI11 DI10 DI09 DI08 DI07 DI06 DI05 DI04 DI03 DI02 DI01 DI00 16Chan 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 12Chan X X X X 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 8Chan X X X X X X X X 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 4Chan X X X X X X X X X X X X 1/0 1/0 1/0 1/0 (1) WhenoperatinginAuto-1mode,thedeviceonlyscansthechannelsprogrammedtobeselected. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 37 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 8.4.6 OperatinginAuto-2Mode Figure 55 illustrates the steps involved in entering and operating in Auto-2 channel sequencing mode. Table 5 liststhemodecontrolregistersettingsforAuto-2mode. Device operation in Manual or CS Auto-1mode Frame:n-1 No Change toAuto-2mode? Yes *Sample:Samplesand convertschannelselected in‘frame n-1’ *Mux :Selectschannelincrementedfrom previousframe asperAuto-1sequence,or channel programmed in previousframe in case of manual mod.e.Thischannelwill be acquiredin thisframe and sampledat startof‘frame n+1’ *Range:Asprogrammed in‘frame n-1’.Appliesto channelselected for acquisition in currentfram.e *SDI :Programming for‘frame n+1’ DI15..12=0011binary ….SelectsAuto-2mode DI11=1enablesprogramming of‘range and GPIO’ CS DI10=x,Device automaticallyresetsto channel0. DI6..Asper required range for channelto be selected Frame:n DI5=0..No power down Request DI4..0…asper GPIO settings forAuto-2 *SDO :DO15..0address(or GPIO data)&conversiondata of channelselected in‘frame n-1’ mode *GPIO: O/P:latchedonCSfalling edge asper DI3..0written in frame n-1’ I/P:Input statuslatchedon falling edge ofCSand transferredseriallyon SDO in the same frame *Sample:Samplesand convertschannelselected in‘frame n’ *Mux :Selects channel0(Auto-2sequence alwaysstartswith Ch-0);thischannelwill be acquired in thisframe and sampledat startof‘frame n+2’ *Range:Asprogrammed in‘frame n’.Appliesto channelselected for acquisition in currentfram.e *SDI :Programming for‘frame n+2’ DI15..12=0011binary ….To continueinAuto-2mode DI11=1enablesprogramming of‘range and GPIO’ CS DI10=0,not to resetchannelsequence DI6..Asper required range for channelto be selected DI5=0..No power down Frame: DI4..0…asper GPIO settings n+1 *SDO :DO15..0address(or GPIO data)&conversiondata of channelselected in‘frame n’ Entryinto *GPIO: Auto-2 O/P:latchedonCSfalling edge asper DI3..0written in frame‘n’ Mode I/P:Input statuslatchedon falling edge ofCSand transferredseriallyon SDO in the same frame *Sample:Samplesand convertschannel0 *Mux :Selectsnexthigher channelinAuto-2sequence,thischannelwill be acquiredin thisframe and sampledat startof‘frame n+3’ *Range:Asprogrammed in‘frame n+1’.Appliesto channelselected for acquisition in currentframe.* SDI :Programming for‘frame n+3’ DI15..12=0011binary ….To continueinAuto-2mode DI11=1enablesprogramming of‘range and GPIO’ CS DI10=0 not to resetchannelsequence DI6..Asper required range for channelto be selected Frame: DI5=0..No power down n+2 DI4..0…asper GPIO settings Operation *SDO :DO15..0address(or GPIO data)&conversiondata of channelselected in‘frame n+1’ inAuto-2 *GPIO: mode O/P:latchedonCSfalling edge asper DI3..0written in frame n+1’ I/P:Input statuslatchedon falling edge ofCSand transferredseriallyon SDO in the same frame CS Continue operation inAuto-2mode Figure55. EnteringandRunninginAuto-2ChannelSequencingMode 38 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Figure 56 shows an example in which Auto-2 mode is used to scan channels 0, 1, and 2. Auto-2 mode is selected to scan all channels until channel 2 (CH2) in ascending order by programming the Auto-2 register as described in Figure 56. The device enters Auto-2 mode on receiving the Auto-2 mode command in the Nth frame. This step causes the MUX to switch to CH0 in the (N+1)th frame. In the (N+2)th frame, the ADC samples and shifts out the conversion results for CH0 because the MUX internally switches to CH1. In the (N+3)th frame, theADCsamplesandtheshiftsouttheconversionresultforCH1andtheMUXalsoswitchestoCH2,andsoon. When this process reaches the maximum selected channel, CH2 in this case, the device returns to CH0 and repeats the cycle as long as the device remains in Auto-2 mode. Entering Auto-2 mode from any other mode also causes the device to restart from CH0. Additionally, modifying the contents of the for Auto-2 program registerwhileoperatinginAuto-2alsocausesthedevicetoscanforrestartfromCH0. Sample Sample Sample Sample CHy CH0 CH1 CH2 tCYCLE CS SCLK SDI AUTO-2 Start AUTO-2 AUTO-2 AUTO2 AUTO-2 SDO Data CHx Data CHy Data CH0 Data CH1 Data CH2 Frame N Frame (N + 1) Frame (N + 2) Frame (N + 3) Scan channels CH0 ,CH1 and CH2 Figure56. ExampleAuto-2ModeTimingDiagram Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 39 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Table5.ModeControlRegisterSettingsforAuto-2Mode RESET LOGIC BITS FUNCTION STATE STATE DI15-12 0001 0011 SelectsAuto-2Mode DI11 0 1 EnablesprogrammingofbitsDI10-00. 0 DeviceretainsvaluesofDI10-00fromthepreviousframe. DI10 0 1 ChannelnumberisresettoCh-00. 0 Channelcounterincrementseveryconversion.(Noreset). DI09-07 000 xxx Donotcare DI06 0 0 SelectsV i/prange(Range1) REF 1 Selects2xV i/prange(Range2) REF DI05 0 0 Devicenormaloperation(nopowerdown) 1 Devicepowersdownonthe16thSCLKfallingedge DI04 0 SDOoutputsthecurrentchanneladdressofthechannelonDO15..12followedbythe12-bit 0 conversionresultonDO11..00. 1 GPIO3-GPIO0data(bothinputandoutput)ismappedontoDO15-DO12intheordershownbelow. LowerdatabitsDO11-DO00representthe12-bitconversionresultofthecurrentchannel. DO15 DO14 DO13 DO12 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) DI03-00 0000 GPIOdataforthechannelsconfiguredasoutput.Deviceignoresdataforthechannelwhichisconfiguredas input.SDIbitandcorrespondingGPIOinformationisgivenbelow DI03 DI02 DI01 DI00 GPIO3(1) GPIO2(1) GPIO1(1) GPIO0(1) (1) GPIO1to3areavailableonlyinTSSOPpackageddevices.QFNdeviceoffersGPIO0only. The Auto-2 Program Register is programmed (once on powerup or reset) to pre-select the last channel (or sequence depth) in the Auto-2 sequence. Unlike Auto-1 Program Register programming, Auto-2 Program Register programming requires only 1 CS frame for complete programming. See Figure 57 and Table 6 for completedetails. CS Device in any operation mode No ProgramAuto 2 register? Yes SDI: Di15..12 = 1001 CS DI9..6 = binary address of last channel in the sequence refer tables 6 Auto 2register programming End ofAuto 2 register programming NOTE: Thedevicecontinuesitsoperationintheselectedmodeduringprogramming.SDOisvalid,howeveritisnotpossible tochangetherangeorwriteGPIOdataintothedeviceduringprogramming. Figure57. Auto-2RegisterProgrammingFlowchart 40 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Table6.ProgramRegisterSettingsforAuto-2Mode RESET LOGIC BITS FUNCTION STATE STATE DI15-12 NA 1001 Auto-2programregisterisselectedforprogramming DI11-10 NA Donotcare DI09-06 NA aaaa This4-bitdatarepresentstheaddressofthelastchannelinthescanningsequence.Duringdevice operationinAuto-2mode,thechannelcounterstartsatCH-00andincrementseveryframeuntilit equals“aaaa”.ThechannelcounterrolesovertoCH-00inthenextframe. DI05-00 NA Donotcare 8.4.7 ContinuedOperationinaSelectedMode Once a device is programmed to operate in one of the modes, the user may want to continue operating in the samemode.ModeControlRegistersettingstocontinueoperatinginaselectedmodearedetailedinTable7. Table7.ContinuedOperationinaSelectedMode RESET LOGIC BITS FUNCTION STATE STATE DI15-12 0001 0000 Thedevicecontinuestooperateintheselectedmode.InAuto-1andAuto-2modesthechannel counterincrementsnormally,whereasintheManualmodeitcontinueswiththelastselected channel.ThedeviceignoresdataonDI11-DI00andcontinuesoperatingaspertheprevious settings.ThisfeatureisprovidedsothatSDIcanbeheldlowwhennochangesarerequiredinthe ModeControlRegistersettings. DI11-00 All'0' DeviceignoresthesebitswhenDI15-12issetto0000logicstate 8.5 Programming 8.5.1 DigitalOutput As discussed previously in Overview, the digital output of the ADS79xx devices is SPI compatible. The following tableslisttheoutputcodescorrespondingtovariousanaloginputvoltages. Table8.IdealInputVoltagesfor12-BitDevicesandOutputCodesfor12-BitDevices(ADS7950/51/52/53) DESCRIPTION ANALOGVALUE DIGITALOUTPUT Fullscalerange Range1→V Range2→2×V STRAIGHTBINARY REF REF Leastsignificantbit(LSB) V /4096 2V /4096 BINARYCODE HEXCODE REF REF Fullscale V –1LSB 2V –1LSB 111111111111 FFF REF REF Midscale V /2 V 100000000000 800 REF REF Midscale–1LSB V /2–1LSB V –1LSB 011111111111 7FF REF REF Zero 0V 0V 000000000000 000 Table9.IdealInputVoltagesfor10-BitDevicesandDigitalOutputCodesfor10-BitDevices (ADS7954/55/56/57) DESCRIPTION ANALOGVALUE DIGITALOUTPUT Fullscalerange Range1→V Range2→2×V STRAIGHTBINARY REF REF Leastsignificantbit(LSB) V /1024 2V /1024 BINARYCODE HEXCODE REF REF Fullscale V –1LSB 2V –1LSB 001111111111 3FF REF REF Midscale V /2 V 001000000000 200 REF REF Midscale–1LSB V /2–1LSB V –1LSB 000111111111 1FF REF REF Zero 0V 0V 000000000000 000 Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 41 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Table10.IdealInputVoltagesfor8-BitDevicesandDigitalOutputCodesfor8-BitDevices (ADS7958/59/60/61) DESCRIPTION ANALOGVALUE DIGITALOUTPUT Fullscalerange Range1→V Range2→2×V STRAIGHTBINARY REF REF Leastsignificantbit(LSB) V /256 2V /256 BINARYCODE HEXCODE REF REF Fullscale V –1LSB 2V –1LSB 11111111 FF REF REF Midscale V /2 V 10000000 80 REF REF Midscale–1LSB V /2–1LSB V –1LSB 01111111 7F REF REF Zero 0V 0V 00000000 00 8.5.2 GPIORegisters NOTE GPIO 0, 1, 2, and 3 are available in the TSSOP packages. Only GPIO 0 is available in the VQFNpackages. The device has four general purpose input and output (GPIO) pins. Each of the four pins can be independently programmed as general purpose output (GPO) or general purpose input (GPI). It is also possible to use the GPIOs for some pre-assigned functions (refer to Table 11 for details). GPO data can be written into the device through the SDI line. The device refreshes the GPO data on every CS falling edge as per the SDI data written in the previous frame. Similarly, the device latches GPI status on the CS falling edge and outputs it on SDO (if GPI isreadenabledbywritingDI04=1duringthepreviousframe)inthesameframestartingonthe CSfallingedge. The details regarding programming the GPIO registers are illustrated in the flowchart in Figure 58. Table 11 lists thedetailsregardingGPIORegisterprogrammingsettings. CS Device in any operation mode No Program GPIO register? Yes CS SDI: DI15..12 = 0100 Refer table 9 for DI11..00 data GPIO register programming End of GPIO register programming NOTE: Thedevicecontinuesitsoperationinselectedmodeduringprogramming.SDOisvalid,howeveritisnotpossibleto changetherangeorwriteGPIOdataintothedeviceduringprogramming. Figure58. GPIOProgramRegisterProgrammingFlowchart 42 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Table11.GPIOProgramRegisterSettings RESET LOGIC BITS FUNCTION STATE STATE DI15-12 NA 0100 DeviceselectsGPIOProgramRegistersforprogramming. DI11-10 00 00 Donotprogramthesebitstoanylogicstateotherthan‘00’ DI09 0 1 DeviceresetsallregistersinthenextCSframetotheresetstateshowninthecorrespondingtables(it alsoresetsitself). 0 Devicenormaloperation DI08 0 1 DeviceconfiguresGPIO3asthedevicepower-downinput. 0 GPIO3remainsgeneralpurposeIorO.Program0forQFNpackageddevices. DI07 0 1 DeviceconfiguresGPIO2asdevicerangeinput. 0 GPIO2remainsgeneralpurposeIorO.Program0forQFNpackageddevices. DI06-04 000 000 GPIO1andGPIO0remaingeneralpurposeIorO.ValidsettingforQFNpackageddevices. xx1 DeviceconfiguresGPIO0as‘highorlow’alarmoutput.Thisisanactivehighoutput.GPIO1remains generalpurposeIorO.ValidsettingforQFNpackageddevices. 010 DeviceconfiguresGPIO0ashighalarmoutput.Thisisanactivehighoutput.GPIO1remainsgeneral purposeIorO.ValidsettingforQFNpackageddevices. 100 DeviceconfiguresGPIO1aslowalarmoutput.Thisisanactivehighoutput.GPIO0remainsgeneral purposeIorO.SettingnotallowedforQFNpackageddevices. 110 DeviceconfiguresGPIO1aslowalarmoutputandGPIO0asahighalarmoutput.Theseareactivehigh outputs.SettingnotallowedforQFNpackageddevices. Note:ThefollowingsettingsarevalidforGPIOwhicharenotassignedaspecificfunctionthroughbitsDI08..04 DI03 0 1 GPIO3pinisconfiguredasgeneralpurposeoutput.Program1forQFNpackageddevices. 0 GPIO3pinisconfiguredasgeneralpurposeinput.SettingnotallowedforQFNpackageddevices. DI02 0 1 GPIO2pinisconfiguredasgeneralpurposeoutput.Program1forQFNpackageddevices. 0 GPIO2pinisconfiguredasgeneralpurposeinput.SettingnotallowedforQFNpackageddevices. DI01 0 1 GPIO1pinisconfiguredasgeneralpurposeoutput.Program1forQFNpackageddevices. 0 GPIO1pinisconfiguredasgeneralpurposeinput.SettingnotallowedforQFNpackageddevices. DI00 0 1 GPIO0pinisconfiguredasgeneralpurposeoutput.ValidsettingforQFNpackageddevices. 0 GPIO0pinisconfiguredasgeneralpurposeinput.ValidsettingforQFNpackageddevices. 8.5.3 AlarmThresholdsforGPIOPins Each channel has two alarm program registers, one for setting the high alarm threshold and the other for setting the low alarm threshold. For ease of programming, two alarm programming registers per channel, corresponding to four consecutive channels, are assembled into one group (a total eight registers). There are four such groups for 16 channel devices and 3/2/1 such groups for 12/8/4 channel devices respectively. The grouping of the various channels for each device in the ADS79xx family is listed in Table 12. The details regarding programming the alarm thresholds are illustrated in the flowchart in Figure 59. Table 13 lists the details regarding the Alarm ProgramRegistersettings. Table12.GroupingofAlarmProgramRegisters GROUPNO. REGISTERS APPLICABLEFORDEVICE 0 Highandlowalarmforchannel0,1,2,and3 ADS7953..50,ADS7957..54,ADS7961..58 1 Highandlowalarmforchannel4,5,6,and7 ADS7953..51,ADS7957..55,ADS7961..59 2 Highandlowalarmforchannel8,9,10,and11 ADS7953and52,ADS7957and56,ADS7961and60 3 Highandlowalarmforchannel12,13,14,and15 ADS7953,ADS7957,ADS7961 Each alarm group requires 9 CS frames for programming their respective alarm thresholds. In the first frame the device enters the programming sequence and in each subsequent frame it programs one of the registers from the group. The device offers a feature to program less than eight registers in one programming sequence. The device exits the alarm threshold programming sequence in the next frame after it encounters the first ‘Exit Alarm Program’bithigh. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 43 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com CS Device in any operation mode No Program alarm thresholds? Yes SDI: DI15..12 = 11XX CS (xx indicates group of four channels; refer table 8) Device enters alarm register programming sequence Entry into alarm register programming sequence CS SDI: DI15..0 as per table 8 (program alarm thresholds) Alarm register programming sequence No Yes DI12 = 1? Yes Program another group of four channels? No End of alarm programing NOTE: Thedevicecontinuesitsoperationinselectedmodeduringprogramming.SDOisvalid,howeveritisnotpossibleto changetherangeorwriteGPIOdataintothedeviceduringprogramming. Figure59. AlarmProgramRegisterProgrammingFlowchart 44 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Table13.AlarmProgramRegisterSettings LOGIC BITS RESETSTATE FUNCTION STATE FRAME1 DI15-12 NA 1100 Deviceenters‘alarmprogrammingsequence’forgroup0 1101 Deviceenters‘alarmprogrammingsequence’forgroup1 1110 Deviceenters‘alarmprogrammingsequence’forgroup2 1111 Deviceenters‘alarmprogrammingsequence’forgroup3 Note:DI15-12=11bbisthealarmprogrammingrequestforgroupbb.Here‘bb’representsthealarmprogramminggroupnumberinbinary format. DI11-14 NA Donotcare FRAME2ANDONWARDS DI15-14 NA cc Where“cc”representsthelowertwobitsofthechannelnumberinbinaryformat.Thedevice programsthealarmforthechannelrepresentedbythebinarynumber“bbcc”.“bb”is programmedinthefirstframe. DI13 NA 1 Highalarmregisterselection 0 Lowalarmregisterselection DI12 NA 0 Continuealarmprogrammingsequenceinnextframe 1 ExitAlarmProgramminginthenextframe.Note:Ifthealarmprogrammingsequenceisnot terminatedusingthisfeaturethenthedevicewillremaininthealarmprogrammingsequence stateandallSDIdatawillbetreatedasalarmthresholds. DI11-10 NA xx Donotcare DI09-00 Allonesforhigh This10-bitdatarepresentsthealarmthreshold.The10-bitalarmthresholdiscomparedwiththeupper10-bit alarmregister wordofthe12-bitconversionresult.Thedevicesetsoffanalarmwhentheconversionresultishigher(High andallzerosfor Alarm)orlower(LowAlarm)thanthisnumber.For10-bitdevices,all10bitsoftheconversionresultare lowalarmregister comparedwiththesetthreshold.For8-bitdevices,all8bitsoftheconversionresultarecomparedwithDI09 toDI02andDI00,01are'donotcare'. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 45 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information In general applications, when the internal multiplexer is updated, the previously converted channel charge is stored in the 15-pF internal input capacitance that disturbs the voltage at the newly selected channel. This disturbance is expected to settle to 1 LSB during sampling (acquisition) time to avoid degrading converter performance. The initial absolute disturbance error at the channel input must be less than 0.5 V to prevent source current saturation or slewing that causes significantly long settling times. Fortunately, significantly reducing disturbance error is easy to accomplish by simply placing a large enough capacitor at the input of each channel. Specifically, with a 150-pF capacitor, instantaneous charge distribution keeps disturbance error less than 0.46 V because the internal input capacitance can only hold up to 75 pC (or 5 V × 15 pF). The remaining error must be corrected by the voltage source at each input, with impedance low enough to settle within 1 LSB. Thefollowingapplicationexamplesexplaintheconsiderationsfortheinputsourceimpedance(R ). SOURCE 9.1.1 AnalogInput The ADS79xx device family offers 12/10/8-bit ADCSs with 16/12/8/4 channel multiplexers for analog input. The multiplexer output is available on the MXO pin. AINP is the ADC input pin. The devices offers flexibility for a systemdesignerasbothsignalsareaccessibleexternally. Typically it is convenient to short MXO to the AINP pin so that signal input to each multiplexer channel can be processed independently. In this condition, TI recommends limiting source impedance to 50 Ω or less. Higher source impedance may affect the signal settling time after a multiplexer channel change. This condition can affectlinearityandtotalharmonicdistortion. MXO AINP GPIO 0, HAlarm Ch0 Ch1 GPIO 1, LAlarm Ch2 GPIO 2, Range From sensors, INAetc. GPIO 3,PD There is a restriction on To source impedance. ADC SDO Host R £50W SOURCE SDI SCLK Chn* CS REF 10mF REF5025 o/p GPIO0,1,2and3areavailableonlyinTSSOPpackageddevices.QFNdeviceoffers'GPIO0'only.Asaresultall referencesrelatedto'GPIO0'onlyarevalidincaseofQFNpackagedevices. Figure60. TypicalApplicationDiagramShowingMXOShortedtoAINP 46 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Application Information (continued) Another option is to add a common ADC driver buffer between the MXO and AINP pins. This relaxes the restriction on source impedance to a large extent. Refer to Typical Characteristics (All ADS79xx Family Devices) for the effect of source impedance on device performance. The typical characteristics show that the device has respectable performance with up to 1kΩ source impedance. This topology (including a common ADC driver) is useful when all channel signals are within the acceptable range of the ADC. In this case the user can save on signalconditioningcircuitforeachchannel. High input impedance PGA (or non inverting buffer such asTHS4031) PGAGain Control GPIO1 GPIO2 GPIO3 MXO AINP GPIO0 high-alarm Ch0 low-alarm Ch1 Ch2 See noteA. To ADC SDO Host SDI SCLK Chn* CS REF 10 µF REF5025 o/p Figure61. TypicalApplicationDiagramShowingCommonBuffer/PGAforAllChannels When the converter samples an input, the voltage difference between AINP and AGND is captured on the internal capacitor array. The (peak) input current through the analog inputs depends upon a number of factors: sample rate, input voltage, and source impedance. The current into the ADS79xx charges the internal capacitor array during the sample period. After this capacitance has been fully charged, there is no further input current. Whentheconvertergoesintoholdmode,theinputimpedanceisgreaterthan1GΩ. Care must be taken regarding the absolute analog input voltage. To maintain linearity of the converter, the Ch0 .. Chn and AINP inputs should be within the limits specified. Outside of these ranges, converter linearity may not meetspecifications. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 47 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Application Information (continued) MXO 80 (cid:13) Ch0 200 (cid:13) AINP 3 pF 5 pF 7 pF Chn 20 M(cid:13) 3 pF Ch0 assumed to be on Chn assumed to be off Figure62. ADCandMUXEquivalentCircuit 9.2 Typical Applications 9.2.1 UnbufferedMultiplexerOutput(MXO) This application is the most typical application, but requires the lowest R for good performance. In this SOURCE configuration, the 2xV range allows larger source impedance than the 1xV range because the 1xV REF REF REF rangeLSBsizeissmaller,thusmakingitmoresensitivetosettlingerror. MXO AINP RSOURCE Ch0 GPIO 0 GPIO 1 150 pF GPIO 2 RSOURCE Ch1 GPIO 3 To See Host Note A 150 pF ADC SSDDIO RSOURCE Chn SCLK CS 150 pF REF REF5025 o/p 10 PF A. Arestrictiononthesourceimpedanceexists.R ≤100Ωforthe1xV 12-bitsettlingat1MSPSorR ≤ SOURCE REF SOURCE 250Ωforthe2xV 12-bitsettlingat1MSPS. REF Figure63. ApplicationDiagramforanUnbufferedMXO 9.2.1.1 DesignRequirements The design is optimized to show the input source impedance (R ) from the 100 Ω to 10000 Ω required to SOURCE meet the 1-LSB settling at 12-bit, 10-bit, and 8-bit resolutions at different throughput in 1xV (2.5-V) and REF 2xV (5-V)inputranges. REF 9.2.1.2 DetailedDesignProcedure Although the required input source impedance can be estimated assuming a 0.5-V initial error and exponential recovery during sampling (acquisition) time, this estimation over-simplifies the complex interaction between the converter and source, thus yielding inaccurate estimates. Thus, this design uses an iterative approach with the converteritselftoprovidereliableimpedancevalues. To determine the actual maximum source impedance for a particular resolution and sampling rate, two subsequent channels are set at least 95% of the full-scale range apart. With a 1xV range and 2.5 V , the REF REF channel difference is at least 2.375 V. With 2xV and 2.5 V , the difference is at least 4.75 V. With a source REF REF impedance from 100 Ω to 10,000 Ω, the conversion runs at a constant rate and a channel update is issued that captures the first couple samples after the update. This process is repeated at least 100 times to remove any noise and to show a clear settling error. The first sample after the channel update is then compared against the second one. If the first and second samples are more than 1 LSB apart, throughput rate is reduced until the settling error becomes 1 LSB, which then sets the maximum throughput for the selected impedance. The whole processisrepeatedforninedifferentimpedancesfrom100Ω to10000Ω. 48 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Typical Applications (continued) 9.2.1.3 ApplicationCurves ThesecurvesshowtheR foranunbufferedMXO. SOURCE 1000 1000 12-bit 12-bit 900 10-bit 900 10-bit 800 8-bit 800 8-bit S) S) SP 700 SP 700 K K ut ( 600 ut ( 600 p p h 500 h 500 g g u u o 400 o 400 hr hr X T 300 X T 300 A A M 200 M 200 100 100 0 0 100 1000 10000 100 1000 10000 Rsource (:) DD110010 Rsource (:) D101 Figure64.2xV InputRangeSettlingWithoutanMXO Figure65.1xV InputRangeSettlingWithoutanMXO REF REF Buffer Buffer Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 49 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com Typical Applications (continued) 9.2.2 OPA192BufferedMultiplexerOutput(MXO) The use of a buffer relaxes the R requirements to an extent. Charge from the sample-and-hold capacitor SOURCE no longer dominates as a residual charge from a previous channel. Although having good performance is possible with a larger impedance using the OPA192, the output capacitance of the MXO also holds the previous channel charge and cannot be isolated, which limits how large the input impedance can finally be for good performance. In this configuration, the 1xV range allows slightly higher impedance because the OPA192 REF (20 V/µs) slews approximately 2.5 V in contrast to the 2xV range that requires the OPA192 to slew REF approximately5V. 5V + OPA192 - 100(cid:13)(cid:3) 150pF MXO AINP RSOURCE Ch0 GPIO 0 GPIO 1 150 pF GPIO 2 RSOURCE Ch1 GPIO 3 To See Host Note A 150 pF ADC SSDDIO RSOURCE Chn SCLK CS 150 pF REF REF5025 o/p 10 PF A. Restrictiononthesourceimpedanceexists.R ≤500Ωfora12-bitsettlingat1MSPSwithboth1xV and (SOURCE) REF 2xV ranges. REF Figure66. ApplicationDiagramforanOPA192BufferedMXO 9.2.2.1 DesignRequirements The design is optimized to show the input source impedance (R ) from the 100 Ω to 10000 Ω required to SOURCE meet a 1-LSB settling at 12-bit, 10-bit, and 8-bit resolutions at different throughput in 1xV (2.5 V) and 2xV REF REF (5V)inputranges. 9.2.2.2 DetailedDesignProcedure The design procedure is similar to the unbuffered-MXO application, but includes an operation amplifier in unity gain as a buffer. The most important parameter for multiplexer buffering is slew rate. The amplifier must finish slewing before the start of sampling (acquisition) to keep the buffer operating in small-signal mode during sampling (acquisition) time. Also, between the buffer output and converter input (INP), there must be a capacitor large enough to keep the buffer in small-signal operation during sampling (acquisition) time. Because 150 pF is large enough to protect the buffer form hold charge from internal capacitors, this value selected along with the lowestimpedancethatallowstheopamptoremainstable. The converter allows the MXO to settle approximately 600 ns before sampling. During this time, the buffer slews and then enters small-signal operation. For a 5-V step change, slew rate stays constant during the first 4 V. The last 1 V includes a transition from slewing and non-slewing. Thus, the buffer cannot be assumed to keep a constant slew during the 600 ns available for MXO settling. Assuming that the last 1-V slew is reduced to half is recommended. For this reason, slew is 10 V/µs or (5 V + 1 V) / 0.6 µs to account for the 1-V slow slew. The ref OPA192 has a 20-V/us slew, and is capable of driving 150 pF with more than a 50° phase margin with a 50-Ω or 100-ΩR ,makingtheOPA192anidealselectionfortheADS79xx-Q1familyofconverters. iso 50 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Typical Applications (continued) 9.2.2.3 ApplicationCurves ThesecurvesshowtheR foranOPA192bufferedMXO. SOURCE 1000 1000 12-bit 12-bit 900 10-bit 900 10-bit 800 8-bit 800 8-bit S) S) SP 700 SP 700 K K ut ( 600 ut ( 600 p p h 500 h 500 g g u u o 400 o 400 hr hr X T 300 X T 300 A A M 200 M 200 100 100 0 0 100 1000 10000 100 1000 10000 Rsource (:) D102 Rsource (:) D103 Figure67.2xV InputRangeSettlingwithanOPA192 Figure68.1xV InputRangeSettlingwithanOPA192 REF REF MXOBuffer MXOBuffer 10 Power Supply Recommendations The devices are designed to operate from an analog supply voltage (+VA) range from 2.7 V to 5.25 V and a digital supply voltage (+VBD) range from 1.7 V to 5.25 V. Both supplies must be well regulated. The analog supply is always greater than or equal to the digital supply. A 1-µF ceramic decoupling capacitor is required at eachsupplypinandmustbeplacedascloseaspossibletothedevice. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 51 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 11 Layout 11.1 Layout Guidelines • A copper fill area underneath the device ties the AGND, BDGND, AINM, and REFM pins together. This copperfillareamustalsobeconnectedtotheanaloggroundplaneofthePCBusingatleastfourvias. • The power sources must be clean and properly decoupled by placing a capacitor close to each of the three supply pins, as shown in Figure 69 and Figure 70. To minimize ground inductance, ensure that each capacitorgroundpinisconnectedtoagroundingviabyaveryshortandthicktrace. • The REFP pin requires a 10-μF ceramic capacitor to meet performance specifications. Place the capacitor directly next to the device. This capacitor ground pin must be routed to the REFM pin by a very short trace, asshowninFigure69andFigure70. • Donotplaceanyviasbetweenacapacitorpinandadevicepin. NOTE The full-power bandwidth of the converter makes the ADC sensitive to high frequencies in digital lines. Organize components in the PCB by keeping digital lines apart from the analog signal paths. This design configuration is critical to minimize crosstalk. For example, in Figure 69, input drivers are expected to be on the left of the converter and the microcontrollerontheright. 11.2 Layout Examples VA EFP Analog Inputs 1 µF + R10 µF Pin 1 GPIO Analog Ground 1 µF +VBD GPIO SPI 1 µF Analog Inputs A V + Figure69. RecommendedLayoutfortheTSSOPPackagedDevice 52 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 Layout Examples (continued) F F AGND FP 1 P 1 P 1 D +VA REFP REFM GPIO +VBD BDGN SDO SDI 32 25 AGND 1 24 SCLK R Optional R- FLT AGND MXO CS C filter between AINP AGND MXO and AINP CFLT 1 PF AINM +VA 8 17 9 16 Analog Input Analog Input Analog Input Channels Channels Channels Figure70. RecommendedLayoutfortheVQFNPackagedDevice Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 53 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 SLAS605C–JUNE2008–REVISEDJULY2018 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • REF50xxLow-Noise,VeryLowDrift,PrecisionVoltageReference • OPAx192 36-V, Precision, Rail-to-Rail Input/Output, Low Offset Voltage, Low Input Bias Current Op Amp with e-trim™ 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstoordernow. Table14.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER ORDERNOW DOCUMENTS SOFTWARE COMMUNITY ADS7950 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7951 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7952 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7953 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7954 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7955 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7956 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7957 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7958 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7959 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7960 Clickhere Clickhere Clickhere Clickhere Clickhere ADS7961 Clickhere Clickhere Clickhere Clickhere Clickhere 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.5 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 54 SubmitDocumentationFeedback Copyright©2008–2018,TexasInstrumentsIncorporated ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

ADS7950,ADS7951,ADS7952,ADS7953,ADS7954,ADS7955 ADS7956,ADS7957,ADS7958,ADS7959,ADS7960,ADS7961 www.ti.com SLAS605C–JUNE2008–REVISEDJULY2018 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 12.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2008–2018,TexasInstrumentsIncorporated SubmitDocumentationFeedback 55 ProductFolderLinks:ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955ADS7956 ADS7957 ADS7958 ADS7959 ADS7960 ADS7961

PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ADS7950SBDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7950 & no Sb/Br) B ADS7950SBDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7950 & no Sb/Br) B ADS7950SBRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7950 B ADS7950SBRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7950 B ADS7950SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7950 & no Sb/Br) ADS7950SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7950 & no Sb/Br) ADS7951SBDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7951 & no Sb/Br) B ADS7951SBDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7951 & no Sb/Br) B ADS7951SBRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS & no Sb/Br) 7951 B ADS7951SBRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS & no Sb/Br) 7951 B ADS7951SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7951 & no Sb/Br) ADS7951SDBTG4 ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7951 & no Sb/Br) ADS7951SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7951 & no Sb/Br) ADS7951SRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS & no Sb/Br) 7951 ADS7951SRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS & no Sb/Br) 7951 Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ADS7952SBDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) B ADS7952SBDBTG4 ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) B ADS7952SBDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) B ADS7952SBRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7952 B ADS7952SBRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7952 B ADS7952SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) ADS7952SDBTG4 ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) ADS7952SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7952 & no Sb/Br) ADS7952SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7952 ADS7952SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7952 ADS7953SBDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7953 & no Sb/Br) B ADS7953SBDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7953 & no Sb/Br) B ADS7953SBRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7953 B ADS7953SBRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7953 B ADS7953SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7953 & no Sb/Br) ADS7953SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7953 & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ADS7953SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7953 ADS7953SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7953 ADS7954SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7954 & no Sb/Br) ADS7954SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7954 & no Sb/Br) ADS7954SRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7954 ADS7954SRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7954 ADS7955SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7955 & no Sb/Br) ADS7955SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7955 & no Sb/Br) ADS7955SRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7955 ADS7955SRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7955 ADS7956SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7956 & no Sb/Br) ADS7956SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7956 & no Sb/Br) ADS7956SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7956 ADS7956SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7956 ADS7957SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7957 & no Sb/Br) ADS7957SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7957 & no Sb/Br) ADS7957SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7957 ADS7957SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7957 Addendum-Page 3

PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) ADS7958SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7958 & no Sb/Br) ADS7958SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7958 & no Sb/Br) ADS7958SRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7958 ADS7958SRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7958 ADS7959SDBT ACTIVE TSSOP DBT 30 60 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7959 & no Sb/Br) ADS7959SDBTR ACTIVE TSSOP DBT 30 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7959 & no Sb/Br) ADS7959SRGER ACTIVE VQFN RGE 24 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7959 ADS7959SRGET ACTIVE VQFN RGE 24 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7959 ADS7960SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7960 & no Sb/Br) ADS7960SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7960 & no Sb/Br) ADS7960SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7960 ADS7960SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7960 ADS7961SDBT ACTIVE TSSOP DBT 38 50 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7961 & no Sb/Br) ADS7961SDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7961 & no Sb/Br) ADS7961SDBTRG4 ACTIVE TSSOP DBT 38 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS7961 & no Sb/Br) ADS7961SRHBR ACTIVE VQFN RHB 32 3000 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7961 ADS7961SRHBT ACTIVE VQFN RHB 32 250 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 125 ADS & no Sb/Br) 7961 (1) The marketing status values are defined as follows: Addendum-Page 4

PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2020 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF ADS7950, ADS7951, ADS7952, ADS7953, ADS7954, ADS7955, ADS7956, ADS7957, ADS7958, ADS7959, ADS7960, ADS7961 : •Automotive: ADS7950-Q1, ADS7951-Q1, ADS7952-Q1, ADS7953-Q1, ADS7954-Q1, ADS7955-Q1, ADS7956-Q1, ADS7957-Q1, ADS7958-Q1, ADS7959-Q1, ADS7960-Q1, ADS7961-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 22-Feb-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) ADS7950SBDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7950SBRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7950SBRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7950SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7951SBDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7951SBRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7951SBRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7951SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7951SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7951SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7952SBDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7952SBRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7952SBRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7952SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7952SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7952SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7953SBDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7953SBRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 22-Feb-2020 Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) ADS7953SBRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7953SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7953SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7953SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7954SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7954SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7954SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7955SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7955SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7955SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7956SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7956SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7956SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7957SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7957SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7957SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7958SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7958SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7958SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7959SDBTR TSSOP DBT 30 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 ADS7959SRGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7959SRGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 ADS7960SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7960SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7960SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7961SDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1 ADS7961SRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 ADS7961SRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 PackMaterials-Page2

PACKAGE MATERIALS INFORMATION www.ti.com 22-Feb-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) ADS7950SBDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7950SBRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7950SBRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7950SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7951SBDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7951SBRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7951SBRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7951SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7951SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7951SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7952SBDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7952SBRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7952SBRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7952SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7952SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7952SRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7953SBDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7953SBRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7953SBRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7953SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 PackMaterials-Page3

PACKAGE MATERIALS INFORMATION www.ti.com 22-Feb-2020 Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) ADS7953SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7953SRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7954SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7954SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7954SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7955SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7955SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7955SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7956SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7956SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7956SRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7957SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7957SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7957SRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7958SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7958SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7958SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7959SDBTR TSSOP DBT 30 2000 367.0 367.0 38.0 ADS7959SRGER VQFN RGE 24 3000 367.0 367.0 35.0 ADS7959SRGET VQFN RGE 24 250 210.0 185.0 35.0 ADS7960SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7960SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7960SRHBT VQFN RHB 32 250 210.0 185.0 35.0 ADS7961SDBTR TSSOP DBT 38 2000 367.0 367.0 38.0 ADS7961SRHBR VQFN RHB 32 3000 367.0 367.0 35.0 ADS7961SRHBT VQFN RHB 32 250 210.0 185.0 35.0 PackMaterials-Page4

GENERIC PACKAGE VIEW RGE 24 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204104/H

PACKAGEOUTLINE RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD A 4.1 B 3.9 4.1 PIN1INDEXAREA 3.9 1MAX C SEATINGPLANE 0.05 0.00 0.08 C (cid:3)(cid:3)(cid:3)(cid:3)(cid:21)(cid:17)(cid:26)(cid:147)(cid:19)(cid:17)(cid:20) 2X2.5 (0.2)TYP 7 12 20X0.5 6 13 2X 25 SYMM 2.5 1 18 0.30 PIN1ID 24X 0.18 (OPTIONAL) 24 19 0.1 C A B SYMM 0.48 0.05 C 24X 0.28 4219016 A 082017 NOTES: 1. Alllineardimensionsareinmillimeters.Anydimensionsinparenthesisareforreferenceonly.Dimensioningandtolerancing perASMEY14.5M. 2. Thisdrawingissubjecttochangewithoutnotice. 3. Thepackagethermalpadmustbesolderedtotheprintedcircuitboardforthermalandmechanicalperformance. www.ti.com

EXAMPLEBOARDLAYOUT RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD (3.825) (2.7) 24 19 24X(0.58) 24X(0.24) 1 18 20X(0.5) 25 SYMM (3.825) 2X (cid:11)(cid:145)(cid:19)(cid:17)(cid:21)(cid:12)(cid:3)(cid:57)(cid:44)(cid:36) (1.1) TYP 6 13 (R0.05) 7 12 2X(1.1) SYMM LANDPATTERNEXAMPLE SCALE:20X 0.07MAX 0.07MIN ALLAROUND METAL ALLAROUND SOLDERMASK OPENING SOLDERMASK METALUNDER OPENING SOLDERMASK NONSOLDERMASK DEFINED SOLDERMASK (PREFERRED) DEFINED SOLDERMASKDETAILS 4219016 A 082017 NOTES:(continued) 4. Thispackageisdesignedtobesolderedtoathermalpadontheboard.Formoreinformation,seeTexasInstruments literaturenumber SLUA271(www.ti.comlitslua271) . 5. Soldermasktolerancesbetweenandaroundsignalpadscanvarybasedonboardfabricationsite. www.ti.com

EXAMPLESTENCILDESIGN RGE0024H VQFN- 1mmmaxheight PLASTICQUADFLATPACK-NOLEAD (3.825) 4X(1.188) 24 19 24X(0.58) 24X(0.24) 1 18 20X(0.5) SYMM (3.825) (0.694) TYP 6 13 (R0.05)TYP 25 METAL TYP 7 12 (0.694) TYP SYMM SOLDERPASTEEXAMPLE BASEDON0.125mmTHICKSTENCIL EXPOSEDPAD 78PRINTEDCOVERAGEBYAREA SCALE:20X 4219016 A 082017 NOTES:(continued) 6. Lasercuttingapertureswithtrapezoidalwallsandroundedcornersmayofferbetterpasterelease.IPC-7525mayhavealternate designrecommendations.. www.ti.com

GENERIC PACKAGE VIEW RHB 32 VQFN - 1 mm max height 5 x 5, 0.5 mm pitch PLASTIC QUAD FLATPACK - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224745/A www.ti.com

None

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PACKAGE OUTLINE DBT0030A TSSOP - 1.2 mm max height SCALE 2.000 SMALL OUTLINE PACKAGE SEATING PLANE C 6.55 TYP 6.25 A 0.1 C PIN 1 INDEX AREA 28X 0.5 30 1 2X 7.15 7.85 7.75 NOTE 3 15 16 0.23 30X B 4.5 0.17 1.2 MAX 4.3 0.1 C A B NOTE 4 0.25 GAGE PLANE 0.15 0.05 (0.15) TYP SEE DETAIL A 0.75 0 -8 0.50 DETA 20AIL A TYPICAL 4220214/A 05/2020 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT DBT0030A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 30X (1.5) SYMM (R0.05) TYP 1 30X (0.3) 30 30X (0.5) SYMM 15 16 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220214/A 05/2020 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBT0030A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 30X (1.5) SYMM (R0.05) TYP 1 30X (0.3) 30 30X (0.5) SYMM 15 16 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220214/A 05/2020 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

PACKAGE OUTLINE DBT0038A TSSOP - 1.2 mm max height SCALE 2.000 SMALL OUTLINE PACKAGE 6.55 SEATING 6.25 TYP C PLANE A 0.1 C PIN 1 INDEX AREA 38 X 0.5 38 1 2X 9 9.75 9.65 NOTE 3 19 20 0.23 38 X 0.17 B 4.45 0.1 C A B 1.2 MAX 4.35 NOTE 4 0.25 GAGE PLANE 0.15 0.05 (0.15) TYP SEE DETAIL A 0.75 0.50 0 -8 DETA 20AIL A TYPICAL 4220221/A 05/2020 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. www.ti.com

EXAMPLE BOARD LAYOUT DBT0038A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 38 X (1.5) SYMM (R0.05) TYP 1 38 38 X (0.3) 38 X (0.5) SYMM 19 20 (5.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDE15.000R MASK DETAILS 4220221/A 05/2020 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBT0038A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 38 X (1.5) SYMM (R0.05) TYP 1 38 38 X (0.3) 38 X (0.5) SYMM 19 20 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X 4220221/A 05/2020 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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