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  • 制造商: Microchip
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93AA86C-I/P产品简介:

ICGOO电子元器件商城为您提供93AA86C-I/P由Microchip设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 提供93AA86C-I/P价格参考以及Microchip93AA86C-I/P封装/规格参数等产品信息。 你可以下载93AA86C-I/P参考资料、Datasheet数据手册功能说明书, 资料中有93AA86C-I/P详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC EEPROM 16KBIT 3MHZ 8DIP电可擦除可编程只读存储器 1024x16-2048x8 1.8V

产品分类

存储器

品牌

Microchip Technology

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

内存,电可擦除可编程只读存储器,Microchip Technology 93AA86C-I/P-

数据手册

http://www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en014781

产品型号

93AA86C-I/P

PCN组件/产地

http://www.microchip.com/mymicrochip/NotificationDetails.aspx?id=5828&print=viewhttp://www.microchip.com/mymicrochip/NotificationDetails.aspx?id=5987&print=view

产品种类

电可擦除可编程只读存储器

供应商器件封装

8-PDIP

包装

管件

商标

Microchip Technology

存储器类型

EEPROM

存储容量

16 kbit

安装风格

Through Hole

封装

Tube

封装/外壳

8-DIP(0.300",7.62mm)

封装/箱体

PDIP-8

工作温度

-40°C ~ 85°C

工作电流

3 mA

工作电源电压

1.8 V, 5.5 V

工厂包装数量

60

接口

Microwire 3 线串行

接口类型

Microwire

数据保留

200 yr

最大工作温度

+ 85 C

最大工作电流

3 mA

最大时钟频率

3 MHz

最小工作温度

- 40 C

标准包装

60

格式-存储器

EEPROMs - 串行

电压-电源

1.8 V ~ 5.5 V

电源电压-最大

5.5 V

电源电压-最小

1.8 V

组织

2 k x 8, 1 k x 16

访问时间

100 ns

速度

1MHz,2MHz,3MHz

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PDF Datasheet 数据手册内容提取

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 16K Microwire Compatible Serial EEPROM Device Selection Table Part Number VCC Range ORG Pin PE Pin Word Size Temp Ranges Packages 93AA86A 1.8-5.5 No No 8-bit I OT 93AA86B 1.8-5-5 No No 16-bit I OT 93LC86A 2.5-5.5 No No 8-bit I, E OT 93LC86B 2.5-5.5 No No 16-bit I, E OT 93C86A 4.5-5.5 No No 8-bit I, E OT 93C86B 4.5-5.5 No No 16-bit I, E OT 93AA86C 1.8-5.5 Yes Yes 8 or 16-bit I P, SN, ST, MS 93LC86C 2.5-5.5 Yes Yes 8 or 16-bit I, E P, SN, ST, MS 93C86C 4.5-5.5 Yes Yes 8 or 16-bit I, E P, SN, ST, MS Features Description • Low-power CMOS technology The Microchip Technology Inc. 93XX86A/B/C devices (cid:127) ORG pin to select word size for ‘86C’ version are 16K bit low-voltage serial Electrically Erasable PROMs (EEPROM). Word-selectable devices such as (cid:127) 2048 x 8-bit organization ‘A’ devices (no ORG) the 93XX86C are dependent upon external logic (cid:127) 1024 x 16-bit organization ‘B’ devices (no ORG) levels driving the ORG pin to set word size. For (cid:127) Program Enable pin to write-protect the entire dedicated 8-bit communication, the 93XX86A devices array are available, while the 93XX86B devices provide (cid:127) Self-timed ERASE/WRITE cycles (including dedicated 16-bit communication, available on SOT-23 auto-erase) devices only. A Program Enable (PE) pin allows the (cid:127) Automatic ERAL before WRAL user to write-protect the entire memory array. (cid:127) Power-on/off data protection circuitry Advanced CMOS technology makes these devices ideal for low-power, nonvolatile memory applications. (cid:127) Industry standard 3-wire serial I/O The entire 93XX Series is available in standard pack- (cid:127) Device Status signal (READY/BUSY ) ages including 8-lead PDIP and SOIC, and advanced (cid:127) Sequential READ function packaging including 8-lead MSOP, 6-lead SOT-23, (cid:127) 1,000,000 E/W cycles and 8-lead TSSOP. Pb-free (Pure Matte Sn) finish is (cid:127) Data retention > 200 years also available. (cid:127) Temperature ranges supported: Package Types (not to scale) - Industrial (I) -40°C to +85°C PDIP/SOIC SOT-23 - Automotive (E) -40°C to +125°C (P, SN) (OT) Pin Function Table CS 1 8 VCC DO 1 6 VCC Name Function CLK 2 7 PE VSS 2 5 CS DI 3 6 ORG CS Chip Select DO 4 5 VSS DI 3 4 CLK CLK Serial Data Clock TSSOP/MSOP DI Serial Data Input (ST, MS) DO Serial Data Output CS 1 8 VCC VSS Ground CLK 2 7 PE PE Program Enable DI 3 6 ORG ORG Memory Configuration DO 4 5 VSS VCC Power Supply  2004 Microchip Technology Inc. DS21797D-page 1

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS.........................................................................................................-0.6V to VCC +1.0V Storage temperature...............................................................................................................................-65°C to +150°C Ambient temperature with power applied................................................................................................-40°C to +125°C ESD protection on all pins......................................................................................................................................................≥ 4kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS VCC = 1.8V to 5.5V All parameters apply over the specified Industrial (I): TA = -40°C to +85°C ranges unless otherwise noted. Automotive (E): TA = -40°C to +125°C Param. Symbol Parameter Min Typ Max Units Conditions No. D1 VIH1 High-level input voltage 2.0 — VCC +1 V VCC ≥ 2.7V VIH2 0.7 VCC — VCC +1 V VCC < 2.7V D2 VIL1 Low-level input voltage -0.3 — 0.8 V VCC ≥ 2.7V VIL2 -0.3 — 0.2 VCC V VCC < 2.7V D3 VOL1 Low-level output voltage — — 0.4 V IOL = 2.1 mA, VCC = 4.5V VOL2 — — 0.2 V IOL = 100 µA, VCC = 2.5V D4 VOH1 High-level output voltage 2.4 — — V IOH = -400 µA, VCC = 4.5V VOH2 VCC - 0.2 — — V IOH = -100 µA, VCC = 2.5V D5 ILI Input leakage current — — ±1 µA VIN = VSS to VCC D6 ILO Output leakage current — — ±1 µA VOUT = VSS to VCC D7 CIN, Pin capacitance (all inputs/ — — 7 pF VIN/VOUT = 0V (Note 1) COUT outputs) TA = 25°C, FCLK = 1 MHz D8 ICC write Write current — — 3 mA FCLK = 3 MHz, VCC = 5.5V — 500 — µA FCLK = 2 MHz, VCC = 2.5V D9 ICC read Read current — — 1 mA FCLK = 3 MHz, VCC = 5.5V — — 500 µA FCLK = 2 MHz, VCC = 3.0V — 100 — µA FCLK = 2 MHz, VCC = 2.5V D10 ICCS Standby current — — 1 µA I – Temp — — 5 µA E – Temp CLK = Cs = 0V ORG = DI = VSS or VCC (Note 2) (Note 3) D11 VPOR VCC voltage detect 93AA86A/B/C, 93LC86A/B/C — 1.5V — V (Note 1) 93C86A/B/C — 3.8V — V Note 1: This parameter is periodically sampled and not 100% tested. 2: ORG pin not available on ‘A’ or ‘B’ versions. 3: READY/BUSY status must be cleared from DO, see Section3.4 “Data Out (DO)”. DS21797D-page 2  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C TABLE 1-2: AC CHARACTERISTICS VCC = 1.8V to 5.5V All parameters apply over the specified Industrial (I): TA = -40°C to +85°C ranges unless otherwise noted. Automotive (E): TA = -40°C to +125°C Param. Symbol Parameter Min Max Units Conditions No. A1 FCLK Clock frequency — 3 MHz 4.5V ≤ VCC < 5.5V 2 MHz 2.5V ≤ VCC < 4.5V 1 MHz 1.8V ≤ VCC < 2.5V A2 TCKH Clock high time 200 — ns 4.5V ≤ VCC < 5.5V 250 ns 2.5V ≤ VCC < 4.5V 450 ns 1.8V ≤ VCC < 2.5V A3 TCKL Clock low time 100 — ns 4.5V ≤ VCC < 5.5V 200 ns 2.5V ≤ VCC < 4.5V 450 ns 1.8V ≤ VCC < 2.5V A4 TCSS Chip Select setup time 50 — ns 4.5V ≤ VCC < 5.5V 100 ns 2.5V ≤ VCC < 4.5V 250 ns 1.8V ≤ VCC < 2.5V A5 TCSH Chip Select hold time 0 — ns 1.8V ≤ VCC < 5.5V A6 TCSL Chip Select low time 250 — ns 1.8V ≤ VCC < 5.5V A7 TDIS Data input setup time 50 — ns 4.5V ≤ VCC < 5.5V 100 ns 2.5V ≤ VCC < 4.5V 250 ns 1.8V ≤ VCC < 2.5V A8 TDIH Data input hold time 50 — ns 4.5V ≤ VCC < 5.5V 100 ns 2.5V ≤ VCC < 4.5V 250 ns 1.8V ≤ VCC < 2.5V A9 TPD Data output delay time — 100 ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 250 ns 2.5V ≤ VCC < 4.5V, CL = 100 pF 400 ns 1.8V ≤ VCC < 2.5V, CL = 100 pF A10 TCZ Data output disable time — 100 ns 4.5V ≤ VCC < 5.5V, (Note 1) 200 ns 1.8V ≤ VCC < 4.5V, (Note 1) A11 TSV Status valid time — 200 ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 300 ns 2.5V ≤ VCC < 4.5V, CL = 100 pF 500 ns 1.8V ≤ VCC < 2.5V, CL = 100 pF A12 TWC Program cycle time — 5 ms ERASE/WRITE mode (AA and LC versions) A13 TWC — 2 ms ERASE/WRITE mode (93C versions) A14 TEC — 6 ms ERAL mode, 4.5V ≤ VCC ≤ 5.5V A15 TWL — 15 ms WRAL mode, 4.5V ≤ VCC ≤ 5.5V A16 — Endurance 1M — cycles 25°C, VCC = 5.0V, (Note 2) Note 1: This parameter is periodically sampled and not 100% tested. 2: This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which may be obtained from www.microchip.com.  2004 Microchip Technology Inc. DS21797D-page 3

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C FIGURE 1-1: SYNCHRONOUS DATA TIMING VIH CS VIL TCSS TCKH TCKL TCSH VIH CLK VIL TDIS TDIH VIH DI VIL TPD TPD TCZ VOH DO (READ) VOL TCZ TSV DO VOH (PROGRAM) STATUS VALID VOL Note: TSV is relative to CS. TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX86B OR 93XX86C WITH ORG = 1) Req. CLK Instruction SB Opcode Address Data In Data Out Cycles READ 1 10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15 – D0 29 EWEN 1 00 1 1 X X X X X X X X — HIGH-Z 13 ERASE 1 11 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 13 ERAL 1 00 1 0 X X X X X X X X — (RDY/BSY) 13 WRITE 1 01 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY) 29 WRAL 1 00 0 1 X X X X X X X X D15 – D0 (RDY/BSY) 29 EWDS 1 00 0 0 X X X X X X X X — HIGH-Z 13 TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX86A OR 93XX86C WITH ORG = 0) Req. CLK Instruction SB Opcode Address Data In Data Out Cycles READ 1 10 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D7 – D0 22 EWEN 1 00 1 1 X X X X X X X X X — HIGH-Z 14 ERASE 1 11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 14 ERAL 1 00 1 0 X X X X X X X X X — (RDY/BSY) 14 WRITE 1 01 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY) 22 WRAL 1 00 0 1 X X X X X X X X X D7 – D0 (RDY/BSY) 22 EWDS 1 00 0 0 X X X X X X X X X — HIGH-Z 14 DS21797D-page 4  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.0 FUNCTIONAL DESCRIPTION 2.2 Data In/Data Out (DI/DO) When the ORG* pin is connected to VCC, the (x16) It is possible to connect the Data In and Data Out pins organization is selected. When it is connected to together. However, with this configuration it is possible ground, the (x8) organization is selected. Instructions, for a “bus conflict” to occur during the “dummy zero” addresses and write data are clocked into the DI pin on that precedes the read operation, if A0 is a logic high the rising edge of the clock (CLK). The DO pin is level. Under such a condition the voltage level seen at normally held in a HIGH-Z state except when reading Data Out is undefined and will depend upon the relative data from the device, or when checking the READY/ impedances of Data Out and the signal source driving BUSY status during a programming operation. The A0. The higher the current sourcing capability of the READY/BUSY status can be verified during an Erase/ driver, the higher the voltage at the Data Out pin. In Write operation by polling the DO pin; DO low indicates order to limit this current, a resistor should be con- that programming is still in progress, while DO high nected between DI and DO. indicates the device is ready. DO will enter the HIGH-Z state on the falling edge of CS. 2.3 Data Protection 2.1 Start Condition All modes of operation are inhibited when VCC is below a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices The Start bit is detected by the device if CS and DI are or 3.8V for ‘93C’ devices. both high with respect to the positive edge of CLK for The EWEN and EWDS commands give additional the first time. protection against accidentally programming during Before a Start condition is detected, CS, CLK, and DI normal operation. may change in any combination (except to that of a Note: For added protection, an EWDS command Start condition), without resulting in any device should be performed after every write operation (READ, WRITE, ERASE, EWEN, EWDS, operation. ERAL or WRAL). As soon as CS is high, the device is After power-up, the device is automatically in the no longer in Standby mode. EWDS mode. Therefore, an EWEN instruction must be An instruction following a Start condition will only be performed before the initial ERASE or WRITE instruction executed if the required opcode, address and data bits can be executed. for any particular instruction are clocked in. Block Diagram VCC VSS Memory Address Array Decoder Address Counter DO Output Data Register Buffer DI Mode ORG* Decode CS Logic PE* Clock CLK Register *ORG and PE inputs are not available on A/B devices.  2004 Microchip Technology Inc. DS21797D-page 5

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.4 ERASE The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns The ERASE instruction forces all data bits of the low (TCSL). DO at logical ‘0’ indicates that programming specified address to the logical ‘1’ state. The rising is still in progress. DO at logical ‘1’ indicates that the edge of CLK before the last address bit initiates the register at the specified address has been erased and write cycle. the device is ready for another instruction. Note: Issuing a Start bit and then taking CS low will clear the READY/BUSY status from DO. FIGURE 2-1: ERASE TIMING TCSL CS CHECK STATUS CLK DI 1 1 1 AN AN-1 AN-2 (cid:127)(cid:127)(cid:127) A0 TSV TCZ HIGH-Z DO BUSY READY HIGH-Z TWC DS21797D-page 6  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.5 ERASE ALL (ERAL) The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns The Erase All (ERAL) instruction will erase the entire low (TCSL). memory array to the logical ‘1’ state. The ERAL cycle is Note: Issuing a Start bit and then taking CS low identical to the ERASE cycle, except for the different will clear the READY/BUSY status from opcode. The ERAL cycle is completely self-timed. The DO. rising edge of CLK before the last data bit initiates the write cycle. Clocking of the CLK pin is not necessary VCC must be ≥ 4.5V for proper operation of ERAL. after the device has entered the ERAL cycle. FIGURE 2-2: ERAL TIMING TCSL CS CHECK STATUS CLK DI 1 0 0 1 0 X (cid:127)(cid:127)(cid:127) X TSV TCZ HIGH-Z DO BUSY READY HIGH-Z TEC  2004 Microchip Technology Inc. DS21797D-page 7

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.6 ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN) The 93XX86A/B/C powers up in the ERASE/WRITE To protect against accidental data disturbance, the Disable (EWDS) state. All programming modes must be EWDS instruction can be used to disable all ERASE/ preceded by an ERASE/WRITE Enable (EWEN) instruc- WRITE functions and should follow all programming tion. Once the EWEN instruction is executed, program- operations. Execution of a READ instruction is ming remains enabled until an EWDS instruction is independent of both the EWEN and EWDS instructions. executed or VCC is removed from the device. FIGURE 2-3: EWDS TIMING TCSL CS CLK DI 1 0 0 0 0 X (cid:127)(cid:127)(cid:127) X FIGURE 2-4: EWEN TIMING TCSL CS CLK 1 0 0 1 1 X (cid:127)(cid:127)(cid:127) X DI 2.7 READ devices) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the spec- The READ instruction outputs the serial data of the ified time delay (TPD). Sequential read is possible when addressed memory location on the DO pin. A dummy CS is held high. The memory data will automatically cycle zero bit precedes the 8-bit (If ORG pin is low or A-Version to the next register and output sequentially. devices) or 16-bit (If ORG pin is high or B-version FIGURE 2-5: READ TIMING CS CLK DI 1 1 0 An (cid:127)(cid:127)(cid:127) A0 HIGH-Z DO 0 Dx (cid:127)(cid:127)(cid:127) D0 Dx (cid:127)(cid:127)(cid:127) D0 Dx (cid:127)(cid:127)(cid:127) D0 DS21797D-page 8  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.8 WRITE The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns The WRITE instruction is followed by 8 bits (If ORG is low (TCSL). DO at logical ‘0’ indicates that programming low or A-version devices) or 16 bits (If ORG pin is high is still in progress. DO at logical ‘1’ indicates that the or B-version devices) of data which are written into the register at the specified address has been written with specified address. The self-timed auto-erase and the data specified and the device is ready for another programming cycle is initiated by the rising edge of CLK instruction. on the last data bit. Note: Issuing a Start bit and then taking CS low will clear the READY/BUSY status from DO. FIGURE 2-6: WRITE TIMING TCSL CS CLK DI 1 0 1 An (cid:127)(cid:127)(cid:127) A0 Dx (cid:127)(cid:127)(cid:127) D0 TSV TCZ HIGH-Z DO BUSY READY HIGH-Z Twc  2004 Microchip Technology Inc. DS21797D-page 9

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 2.9 WRITE ALL (WRAL) The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns The Write All (WRAL) instruction will write the entire low (TCSL). memory array with the data specified in the command. Note: Issuing a Start bit and then taking CS low The self-timed auto-erase and programming cycle is will clear the READY/BUSY status from initiated by the rising edge of CLK on the last data bit. DO. Clocking of the CLK pin is not necessary after the device has entered the WRAL cycle. The WRAL VCC must be ≥ 4.5V for proper operation of WRAL. command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction but the chip must be in the EWEN status. FIGURE 2-7: WRAL TIMING TCSL CS CLK DI 1 0 0 0 1 X (cid:127)(cid:127)(cid:127) X Dx (cid:127)(cid:127)(cid:127) D0 TSV TCZ HIGH-Z DO BUSY READY HIGH-Z TWL DS21797D-page 10  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 3.0 PIN DESCRIPTIONS TABLE 3-1: PIN DESCRIPTIONS SOIC/PDIP/ Name SOT-23 Function MSOP/TSSOP CS 1 5 Chip Select CLK 2 4 Serial Clock DI 3 3 Data In DO 4 1 Data Out VSS 5 2 Ground ORG 6 N/A Organization / 93XX86C PE 7 N/A Program Enable VCC 8 6 Power Supply 3.1 Chip Select (CS) 3.3 Data In (DI) A high level selects the device; a low level deselects Data In (DI) is used to clock in a Start bit, opcode, the device and forces it into Standby mode. However, a address and data synchronously with the CLK input. programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input 3.4 Data Out (DO) signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the Data Out (DO) is used in the Read mode to output data programming cycle is completed. synchronously with the CLK input (TPD after the posi- tive edge of CLK). CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal This pin also provides READY/BUSY status informa- control logic is held in a Reset status. tion during ERASE and WRITE cycles. READY/BUSY status information is available on the DO pin if CS is 3.2 Serial Clock (CLK) brought high after being low for minimum Chip Select low time (TCSL) and an erase or write operation has The Serial Clock is used to synchronize the communi- been initiated. cation between a master device and the 93XX series The Status signal is not available on DO, if CS is held device. Opcodes, address and data bits are clocked in low during the entire ERASE or WRITE cycle. In this on the positive edge of CLK. Data bits are also clocked case, DO is in the HIGH-Z mode. If status is checked out on the positive edge of CLK. after the ERASE/WRITE cycle, the data line will be high CLK can be stopped anywhere in the transmission to indicate the device is ready. sequence (at high or low level) and can be continued Note: Issuing a Start bit and then taking CS low anytime with respect to clock high time (TCKH) and will clear the READY/BUSY status from clock low time (TCKL). This gives the controlling master DO. freedom in preparing opcode, address and data. CLK is a “don't care” if CS is low (device deselected). If 3.5 Organization (ORG) CS is high, but the Start condition has not been detected (DI = 0), any number of clock cycles can be When the ORG pin is connected to VCC or Logic HI, the received by the device without changing its status (i.e., (x16) memory organization is selected. When the ORG waiting for a Start condition). pin is tied to VSS or Logic LO, the (x8) memory organization is selected. For proper operation, ORG CLK cycles are not required during the self-timed must be tied to a valid logic level. WRITE (i.e., auto ERASE/WRITE) cycle. 93XX86A devices are always x8 organization and After detection of a Start condition the specified number 93XX86B devices are always x16 organization. of clock cycles (respectively low-to-high transitions of CLK) must be provided. These clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed. CLK and DI then become don't care inputs waiting for a new Start condition to be detected.  2004 Microchip Technology Inc. DS21797D-page 11

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 3.6 Program Enable (PE) This pin allows the user to enable or disable the ability to write data to the memory array. If the PE pin is tied to VCC, the device can be programmed. If the PE pin is tied to VSS, programming will be inhibited. PE is not available on 93XX86A or 93XX86B. On those devices, programming is always enabled. This pin cannot be floated, it must be tied to VCC or VSS. DS21797D-page 12  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead MSOP (150 mil) Example: MSOP 1st Line Marking Codes Pb-free Device std mark mark XXXXXXT 3L86I 93AA86C 3A86CT GA86CT YWWNNN 2281L7 93LC86C 3L86CT GL86CT 93C86C 3C86CT GC86CT T = blank for commercial, “I” for Industrial, “E” for Extended. 6-Lead SOT-23 Example: SOT23 Marking Codes Device I-temp E-temp XXNN 5EL7 93AA86A 5BNN – 93AA86B 5LNN – 93LC86A 5ENN 5FNN 93LC86B 5PNN 5RNN 8-Lead PDIP Example: 93C86A 5HNN 5JNN 93C86B 5TNN 5UNN Pb-free topside mark is same; Pb-free XXXXXXXX 93LC86 noted only on carton label. XXXXXNNN I/P 1L7 YYWW 0228 8-Lead SOIC Example: XXXXXXXX 93LC86 XXXXYYWW I/SN 0228 NNN 1L7 TSSOP 1st Line Marking Codes Pb-free 8-Lead TSSOP Example: Device std mark mark 93AA86C A86C GAEC XXXX L86 TYWW I228 93LC86C L86C GLEC NNN 1L7 93C86C C86C GCEC Temperature grade is marked on line 2. Legend: XX...X Part number T Temperature Blank Commercial I Industrial E Extended YY Year code (last 2 digits of calendar year) except TSSOP and MSOP which use only the last 1 digit WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: Custom marking available.  2004 Microchip Technology Inc. DS21797D-page 13

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) E E1 p D 2 B n 1 α A A2 c φ A1 (F) L β Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .026 BSC 0.65 BSC Overall Height A - - .043 - - 1.10 Molded Package Thickness A2 .030 .033 .037 0.75 0.85 0.95 Standoff A1 .000 - .006 0.00 - 0.15 Overall Width E .193 TYP. 4.90 BSC Molded Package Width E1 .118 BSC 3.00 BSC Overall Length D .118 BSC 3.00 BSC Foot Length L .016 .024 .031 0.40 0.60 0.80 Footprint (Reference) F .037 REF 0.95 REF Foot Angle φ 0° - 8° 0° - 8° Lead Thickness c .003 .006 .009 0.08 - 0.23 Lead Width B .009 .012 .016 0.22 - 0.40 Mold Draft Angle Top α 5° - 15° 5° - 15° Mold Draft Angle Bottom β 5° - 15° 5° - 15° *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-187 Drawing No. C04-111 DS21797D-page 14  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 6-Lead Plastic Small Outline Transistor (OT) (SOT-23) E E1 B p1 D n 1 α c A A2 φ A1 L β Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 6 6 Pitch p .038 0.95 Outside lead pitch (basic) p1 .075 1.90 Overall Height A .035 .046 .057 0.90 1.18 1.45 Molded Package Thickness A2 .035 .043 .051 0.90 1.10 1.30 Standoff A1 .000 .003 .006 0.00 0.08 0.15 Overall Width E .102 .110 .118 2.60 2.80 3.00 Molded Package Width E1 .059 .064 .069 1.50 1.63 1.75 Overall Length D .110 .116 .122 2.80 2.95 3.10 Foot Length L .014 .018 .022 0.35 0.45 0.55 Foot Angle φ 0 5 10 0 5 10 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .014 .017 .020 0.35 0.43 0.50 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEITA (formerly EIAJ) equivalent: SC-74A Drawing No. C04-120  2004 Microchip Technology Inc. DS21797D-page 15

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A A2 L c A1 β B1 p eB B Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS21797D-page 16  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 8-Lead Plastic Small Outline (SN) –Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h α 45° c A A2 φ β L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .050 1.27 Overall Height A .053 .061 .069 1.35 1.55 1.75 Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55 Standoff § A1 .004 .007 .010 0.10 0.18 0.25 Overall Width E .228 .237 .244 5.79 6.02 6.20 Molded Package Width E1 .146 .154 .157 3.71 3.91 3.99 Overall Length D .189 .193 .197 4.80 4.90 5.00 Chamfer Distance h .010 .015 .020 0.25 0.38 0.51 Foot Length L .019 .025 .030 0.48 0.62 0.76 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .008 .009 .010 0.20 0.23 0.25 Lead Width B .013 .017 .020 0.33 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057  2004 Microchip Technology Inc. DS21797D-page 17

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) E E1 p D 2 1 n B α A c φ A1 A2 β L Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .026 0.65 Overall Height A .043 1.10 Molded Package Thickness A2 .033 .035 .037 0.85 0.90 0.95 Standoff § A1 .002 .004 .006 0.05 0.10 0.15 Overall Width E .246 .251 .256 6.25 6.38 6.50 Molded Package Width E1 .169 .173 .177 4.30 4.40 4.50 Molded Package Length D .114 .118 .122 2.90 3.00 3.10 Foot Length L .020 .024 .028 0.50 0.60 0.70 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .007 .010 .012 0.19 0.25 0.30 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086 DS21797D-page 18  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C APPENDIX A: REVISION HISTORY Revision C Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT. Revision D Corrections to Device Selection Table, Table 1-1, Table 1-2, Section 2.4, Section 2.5, Section 2.8 and Section 2.9. Added note to Figure 2-7.  2004 Microchip Technology Inc. DS21797D-page 19

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C NOTES: DS21797D-page 20  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C ON-LINE SUPPORT SYSTEMS INFORMATION AND UPGRADE HOT LINE Microchip provides on-line support on the Microchip World Wide Web site. The Systems Information and Upgrade Line provides The web site is used by Microchip as a means to make system users a listing of the latest versions of all of files and information easily available to customers. To Microchip's development systems software products. view the site, the user must have access to the Internet Plus, this line provides information on how customers and a web browser, such as Netscape® or Microsoft® can receive the most current upgrade kits.The Hot Line Internet Explorer. Files are also available for FTP Numbers are: download from our FTP site. 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. Connecting to the Microchip Internet Web Site 042003 The Microchip web site is available at the following URL: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A vari- ety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: (cid:127) Latest Microchip Press Releases (cid:127) Technical Support Section with Frequently Asked Questions (cid:127) Design Tips (cid:127) Device Errata (cid:127) Job Postings (cid:127) Microchip Consultant Program Member Listing (cid:127) Links to other useful web sites related to Microchip Products (cid:127) Conferences for products, Development Systems, technical information and more (cid:127) Listing of seminars and events  2004 Microchip Technology Inc. DS21797D-page 21

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: Technical Publications Manager Total Pages Sent ________ RE: Reader Response From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: 93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C Literature Number: DS21797D Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21797D-page 22  2004 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X X /XX X Examples: a) 93AA86C-I/MS: 16K, 2048x8 or 1024x16 Device Tape & Reel Temperature Package Lead Finish Serial EEPROM, MSOP package, 1.8V Range b) 93AA86AT-I/OT: 16K, 2048x8 Serial EEPROM, SOT-23 package, tape and reel, 1.8V Device 93AA86A: 16K 1.8V Microwire Serial EEPROM (x8) c) 93AA86CT-I/MS: 16K, 2048x8 or 1024x16 93AA86B: 16K 1.8V Microwire Serial EEPROM (x16) Serial EEPROM, MSOP package, tape and 93AA86C: 16K 1.8V Microwire Serial EEPROM w/ORG reel, 1.8V 93LC86A: 16K 2.5V Microwire Serial EEPROM (x8) 93LC86B: 16K 2.5V Microwire Serial EEPROM (x16) a) 93LC86C-I/MS: 16K, 2048x8, 1024x16 Serial 93LC86C: 16K 2.5V Microwire Serial EEPROM w/ORG EEPROM, MSOP package, 2.5V b) 93LC86BT-I/OT: 16K, 1024x16 Serial 93C86A: 16K 5.0V Microwire Serial EEPROM (x8) EEPROM, SOT-23 package, tape and reel, 93C86B: 16K 5.0V Microwire Serial EEPROM (x16) 2.5V 93C86C: 16K 5.0V Microwire Serial EEPROM w/ORG c) 93LC86CT-I/SNG: 16K, 2048x8 or 1024x16 Serial EEPROM, SOIC package, Industrial temperature, tape and reel, Pb-free finish, 2.5V Tape & Reel: Blank = Standard packaging a) 93C86C-I/MS: 16K, 2048x8 or 1024x16 Serial T = Tape & Reel EEPROM, MSOP package, 5.0V b) 93C86AT-I/OT: 16K, 2048x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V Temperature Range I = -40°C to +85°C E = -40°C to +125°C Package MS = Plastic MSOP (Micro Small outline, 8-lead) OT = SOT-23, 6-lead (Tape & Reel only) P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (150 mil body), 8-lead ST = TSSOP, 8-lead Lead Finish: Blank = Standard 63% / 37% SnPb G = Pb-free (Matte Tin - Pure Sn) Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2004 Microchip Technology Inc. DS21797D-page 23

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C NOTES: DS21797D-page 24  2004 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: (cid:127) Microchip products meet the specification contained in their particular Microchip Data Sheet. (cid:127) Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. (cid:127) There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. (cid:127) Microchip is willing to work with the customer who is concerned about the integrity of their code. (cid:127) Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is intended through suggestion only The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PROMATE and PowerSmart are registered trademarks of No representation or warranty is given and no liability is Microchip Technology Incorporated in the U.S.A. and other assumed by Microchip Technology Incorporated with respect countries. to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, use or otherwise. Use of Microchip’s products as critical SEEVAL, SmartShunt and The Embedded Control Solutions components in life support systems is not authorized except Company are registered trademarks of Microchip Technology with express written approval by Microchip. No licenses are Incorporated in the U.S.A. conveyed, implicitly or otherwise, under any intellectual Application Maestro, dsPICDEM, dsPICDEM.net, property rights. dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2004 Microchip Technology Inc. DS21797D-page 25

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: 93LC86CT-I/MS 93LC86AT-I/OT 93LC86CT-I/ST 93LC86CT-I/SN 93LC86BT-I/OT 93C86C-E/SN 93C86C-E/ST 93C86C-E/MS 93C86CT-I/SN 93C86AT-I/OT 93C86BT-I/OT 93C86CT-I/ST 93C86CT-I/MS 93C86C-I/MS 93C86C- I/ST 93C86C-I/SN 93LC86C-I/MS 93LC86C-I/SN 93LC86C-I/ST 93AA86CT-I/SN 93AA86CT-I/ST 93AA86AT-I/OT 93AA86BT-I/OT 93AA86CT-I/MS 93LC86C-E/SN 93LC86C-E/ST 93C86C-I/P 93LC86C-I/P 93C86CT-E/SN 93C86BT-E/OT 93C86AT-E/OT 93C86CT-E/ST 93C86CT-E/MS 93AA86C-I/MS 93AA86C-I/ST 93AA86C-I/P 93LC86CT-E/ST 93LC86BT-E/OT 93LC86CT-E/MS 93LC86AT-E/OT 93LC86CT-E/SN 93LC86C-E/P 93LC86C- E/MS 93C86C-E/P