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  • 型号: 74LCX244WM
  • 制造商: Fairchild Semiconductor
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ICGOO电子元器件商城为您提供74LCX244WM由Fairchild Semiconductor设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 74LCX244WM价格参考。Fairchild Semiconductor74LCX244WM封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Non-Inverting 2 Element 4 Bit per Element 3-State Output 20-SOIC。您可以下载74LCX244WM参考资料、Datasheet数据手册功能说明书,资料中有74LCX244WM 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC BUFF DVR LOW V N-INV 20SOIC缓冲器和线路驱动器 Buffer/Line Driver

产品分类

逻辑 - 缓冲器,驱动器,接收器,收发器

品牌

Fairchild Semiconductor

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,缓冲器和线路驱动器,Fairchild Semiconductor 74LCX244WM74LCX

数据手册

点击此处下载产品Datasheet

产品型号

74LCX244WM

产品目录页面

点击此处下载产品Datasheet

产品种类

缓冲器和线路驱动器

传播延迟时间

7.5 ns at 2.7 V, 6.5 ns at 3.3 V

低电平输出电流

24 mA

供应商器件封装

20-SOIC

元件数

2

包装

管件

单位重量

801 mg

商标

Fairchild Semiconductor

安装类型

表面贴装

安装风格

SMD/SMT

封装

Tube

封装/外壳

20-SOIC(0.295",7.50mm 宽)

封装/箱体

SOIC-20

工作温度

-40°C ~ 85°C

工厂包装数量

36

最大工作温度

+ 85 C

最小工作温度

- 40 C

极性

Non-Inverting

标准包装

36

每元件位数

4

每芯片的通道数量

8

电压-电源

2 V ~ 3.6 V

电流-输出高,低

24mA,24mA

电源电压-最大

3.6 V

电源电压-最小

2 V

系列

74LCX244

输入线路数量

8

输出类型

3-State

输出线路数量

8

逻辑类型

CMOS

逻辑系列

LCX

零件号别名

74LCX244WM_NL

高电平输出电流

- 24 mA

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PDF Datasheet 数据手册内容提取

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

7 4 L C X December 2013 2 4 4 (cid:151) 74LCX244 L o Low Voltage Buffer/Line Driver with 5V Tolerant w V Inputs and Outputs o l t a g e Features General Description B u ■ 5V tolerant inputs and outputs The LCX244 contains eight non-inverting buffers with f f ■ 2.3V to 3.6V VCC specifications provided 3-STATE outputs. The device may be employed as a er ■ 6.5ns t max. (V = 3.3V), 10(cid:181)A I max. memory address driver, clock driver and bus-oriented /L PD CC CC transmitter/receiver. The LCX244 is designed for low in ■ Power down high impedance inputs and outputs voltage (2.5V or 3.3V) V applications with capability of e ■ Supports live insertion/withdrawal(1) interfacing to a 5V signaCl eCnvironment. D r ■ –24mA output drive (V = 3.0V) i CC The LCX244 is fabricated with an advanced CMOS tech- v ■ Implements proprietary noise/EMI reduction circuitry e nology to achieve high speed operation while maintain- r ■ Latch-up performance exceeds 500mA ing CMOS low power dissipation. w i ■ ESD performance: th (cid:150) Human body model > 2000V 5 V (cid:150) Machine model > 200V T ■ Leadless DQFN package o l e r a Note: n 1. To ensure the high-impedance state during power up t I or down, OE should be tied to V through a pull-up n CC p resistor: the minimum value or the resistor is u determined by the current-sourcing capability of the ts driver. a n d O Ordering Information u t p Package u t Order Number Number Package Description s 74LCX244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LCX244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), 74LCX244BQX(2) MLP20B JEDEC MO-241, 2.5 x 4.5mm 74LCX244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LCX244MTC 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, MTC20 4.4mm Wide Note: 2. DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter (cid:147)X(cid:148) to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2

7 4 Connection Diagram Logic Diagram L C X Pin Assignments for SOIC, SOP, SSOP, and TSSOP 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e Pad Assignments for DQFN r w i t h 5 Truth Tables V T Inputs Outputs o l e OE1 In (Pins 12, 14, 16, 18) ra n L L L t I L H H n p H X Z u t s a Inputs Outputs n d OE I (Pins 3, 5, 7, 9) O 2 n u L L L t p u L H H t s H X Z (Top Through View) (Bottom View) H = HIGH Voltage Level L = LOW Voltage Level Pin Description X = Immaterial Pin Names Description Z = High Impedance OE , OE 3-STATE Output Enable Inputs 1 2 I (cid:150)I Inputs 0 7 O (cid:150)O Outputs 0 7 DAP No Connect Note: DAP (Die Attach Pad) '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 2

7 4 Absolute Maximum Ratings L C Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be X 2 operable above the recommended operating conditions and stressing the parts to these levels is not recommended. 4 In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. 4 The absolute maximum ratings are stress ratings only. (cid:151) L Symbol Parameter Rating o w V Supply Voltage (cid:150)0.5V to +7.0V CC V V DC Input Voltage (cid:150)0.5V to +7.0V o I l t V DC Output Voltage a O g Output in 3-STATE (cid:150)0.5V to +7.0V e B Output in HIGH or LOW State(3) (cid:150)0.5V to VCC + 0.5V u f IIK DC Input Diode Current, VI < GND (cid:150)50mA fe r IOK DC Output Diode Current /L i V < GND (cid:150)50mA n O e V > V +50mA D O CC r IO DC Output Source/Sink Current –50mA iv e I DC Supply Current per Supply Pin –100mA r CC w IGND DC Ground Current per Ground Pin –100mA it h TSTG Storage Temperature (cid:150)65(cid:176)C to +150(cid:176)C 5 V Note: T 3. I Absolute Maximum Rating must be observed. o O l e r a Recommended Operating Conditions(4) nt I The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended n p operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not u recommend exceeding them or designing to absolute maximum ratings. ts a Symbol Parameter Min. Max. Units n d V Supply Voltage CC O Operating 2.0 3.6 V u t p Data Retention 1.5 3.6 u t V Input Voltage 0 5.5 V s I V Output Voltage O 3-STATE 0 5.5 V HIGH or LOW State 0 V CC IOH / IOL Output Current V = 3.0V(cid:150)3.6V –24 mA CC V = 2.7V(cid:150)3.0V –12 CC V = 2.3V(cid:150)2.7V –8 CC T Free-Air Operating Temperature (cid:150)40 85 (cid:176)C A Δt / ΔV Input Edge Rate, VIN = 0.8V(cid:150)2.0V, VCC = 3.0V 0 10 ns / V Note: 4. Unused inputs must be held HIGH or LOW. They may not float. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 3

7 4 DC Electrical Characteristics L C X TA = (cid:150)40(cid:176)C to +85(cid:176)C 2 4 Symbol Parameter V (V) Conditions Min. Max. Units 4 CC (cid:151) V HIGH Level Input Voltage 2.3(cid:150)2.7 1.7 V IH L 2.7(cid:150)3.6 2.0 o w VIL LOW Level Input Voltage 2.3(cid:150)2.7 0.7 V V 2.7(cid:150)3.6 0.8 o l t a V HIGH Level Output Voltage 2.3(cid:150)3.6 I = (cid:150)100(cid:181)A V (cid:150) 0.2 V OH OH CC g e 2.3 IOH = (cid:150)8mA 1.8 B 2.7 I = (cid:150)12mA 2.2 u OH f f 3.0 I = (cid:150)18mA 2.4 e OH r / I = (cid:150)24mA 2.2 L OH i n VOL LOW Level Output Voltage 2.3(cid:150)3.6 IOL = 100(cid:181)A 0.2 V e 2.3 I = 8mA 0.6 D OL r i 2.7 I = 12mA 0.4 v OL e 3.0 IOL = 16mA 0.4 r w I = 24mA 0.55 i OL t h II Input Leakage Current 2.3(cid:150)3.6 0 ≤ VI ≤ 5.5V –5.0 (cid:181)A 5 V IOZ 3-STATE Output Leakage 2.3(cid:150)3.6 0 ≤ VO ≤ 5.5V, –5.0 (cid:181)A T VI = VIH or VIL o l e I Power-Off Leakage Current 0 V or V = 5.5V 10 (cid:181)A OFF I O r a I Quiescent Supply Current 2.3(cid:150)3.6 V = V or GND 10 (cid:181)A n CC I CC t 3.6V ≤ VI, VO ≤ 5.5V(5) –10 In p ΔICC Increase in ICC per Input 2.3(cid:150)3.6 VIH = VCC (cid:150) 0.6V 500 (cid:181)A u t s Note: a 5. Outputs disabled or 3-STATE only. n d O u AC Electrical Characteristics t p u T = (cid:150)40(cid:176)C to +85(cid:176)C, R = 500Ω t A L s V = 3.3V – 0.3V, V = 2.7V, V = 2.5V – 0.2V, CC CC CC C = 50pF C = 50pF C = 30pF L L L Symbol Parameter Min. Max. Min. Max. Min. Max. Units t , t Propagation Delay, 1.5 6.5 1.5 7.5 1.5 7.8 ns PHL PLH Data to Output t , t Output Enable Time 1.5 8.0 1.5 9.0 1.5 10.0 ns PZL PZH t , t Output Disable Time 1.5 7.0 1.5 8.0 1.5 8.4 ns PLZ PHZ t , t Output to Output Skew(6) 1.0 ns OSHL OSLH Note: 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to- LOW (t ) or LOW-to-HIGH (t ). OSHL OSLH '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 4

7 4 Dynamic Switching Characteristics L C X TA = 25(cid:176)C 2 4 Symbol Parameter V (V) Conditions Typical Unit 4 CC (cid:151) V Quiet Output Dynamic Peak V 3.3 C = 50pF, V = 3.3V, V = 0V 0.8 V OLP OL L IH IL L 2.5 C = 30pF, V = 2.5V, V = 0V 0.6 o L IH IL w VOLV Quiet Output Dynamic Valley VOL 3.3 CL = 50pF, VIH = 3.3V, VIL = 0V (cid:150)0.8 V V 2.5 C = 30pF, V = 2.5V, V = 0V (cid:150)0.6 o L IH IL l t a g e B Capacitance u f f e Symbol Parameter Conditions Typical Units r / L CIN Input Capacitance VCC = Open, VI = 0V or VCC 7.0 pF in e C Output Capacitance V = 3.3V, V = 0V or V 8.0 pF OUT CC I CC D C Power Dissipation Capacitance V = 3.3V, V = 0V or V , f = 10MHz 25.0 pF r PD CC I CC i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 5

7 4 AC Loading and Waveforms (Generic for LCX Family) LC X 2 Test Switch 4 4 t , t Open (cid:151) PLH PHL tPZL, tPLZ 6V at VCC = 3.3 – 0.3V L V x 2 at V = 2.5 – 0.2V o CC CC w tPZH, tPHZ GND V o l t a g Figure 1. AC Test Circuit (CL includes probe and jig capacitance) e B u f f e r / L i n e D r i v e r Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and w Disable Times for Logic i t h 5 V T o l e r a n t I n p u t s a Propagation Delay. Pulse Width and t Waveforms Setup Time, Hold Time and Recovery Time for Logic n rec d O u t p u t s 3-STATE Output Low Enable and t and t rise fall Disable Times for Logic V CC Symbol 3.3V – 0.3V 2.7V 2.5V – 0.2V Vmi 1.5V 1.5V VCC / 2 Vmo 1.5V 1.5V VCC / 2 V V + 0.3V V + 0.3V V + 0.15V x OL OL OL V V (cid:150) 0.3V V (cid:150) 0.3V V (cid:150) 0.15V y OH OH OH Figure 2. Waveforms (Input Characteristics; f = 1MHz, t = t = 3ns) r f '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 6

7 4 Schematic Diagram (Generic for LCX Family) LC X 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 7

7 4 Tape and Reel Specification L C X Tape Format for DQFN 2 4 Package Designator Tape Section Number of Cavities Cavity Status Cover Tape Status 4 (cid:151) BQX Leader (Start End) 125 (typ.) Empty Sealed L Carrier 3000 Filled Sealed o w Trailer (Hub End) 75 (typ.) Empty Sealed V o l t a Tape Dimension inches (millimeters) g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s Reel Dimensions inches (millimeters) Tape Size A B C D N W1 W2 12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) 0.724 (18.4) '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 8

7 4 Physical Dimensions L C X 2 4 4 (cid:151) L o 13.00 w 12.60 A V o 11.43 l t a 20 11 g B e B u f f e 9.50 r / 10.65 7.60 L 10.00 7.40 in e 2.25 D r i v e r w PIN ONE 1 0.51 1.27 10 1.27 0.65 ith 0.35 INDICATOR 5 0.25 M C B A V LAND PATTERN RECOMMENDATION T o l e 2.65 MAX r SEE DETAIL A a n t I 0.33 n C 0.20 p u t 0.30 0.10 C s 0.75 0.10 SEATING PLANE a X 45° n 0.25 d NOTES: UNLESS OTHERWISE SPECIFIED O (R0.10) u A) THIS PACKAGE CONFORMS TO JEDEC t GAGE PLANE p (R0.10) MS-013, VARIATION AC, ISSUE E u 0.25 B) ALL DIMENSIONS ARE IN MILLIMETERS. ts 8° 0° C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. 1.27 D) CONFORMS TO ASME Y14.5M-1994 0.40 SEATING PLANE E) LANDPATTERN STANDARD: SOIC127P1030X265-20L (1.40) DETAIL A F) DRAWING FILENAME: MKT-M20BREV3 SCALE: 2:1 Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild(cid:146)s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor(cid:146)s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 9

7 4 Physical Dimensions (Continued) LC X 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild(cid:146)s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor(cid:146)s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 10

7 4 Physical Dimensions (Continued) LC X 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s Figure 5. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild(cid:146)s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor(cid:146)s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 11

7 4 Physical Dimensions (Continued) LC X 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild(cid:146)s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor(cid:146)s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 12

7 4 Physical Dimensions (Continued) LC X 2 4 4 (cid:151) L o w V o l t a g e B u f f e r / L i n e D r i v e r w i t h 5 V T o l e r a n t I n p u t s a n d O u t p u t s Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild(cid:146)s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor(cid:146)s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. '1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX244 Rev. 1.12.2 13

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