Model 625 HCMOS Clock Oscillator FEATURES • Standard 2.5mm x 2.0mm 4-Pad Surface Mount Package • HCMOS Output • Fundamental and 3rd Overtone Crystal Designs • Frequency Range 1 – 110 MHz • Frequency Stability ±50 ppm Standard, ±25 ppm and ±20 ppm Available • Operating Voltages +1.8Vdc, +2.5Vdc or +3.3Vdc • Operating Temperature to -40°C to +85°C • Output Enable Standard • Tape & Reel Packaging Standard, EIA-418 • RoHS/Green Compliant [6/6] APPLICATIONS Model 625 is ideal for applications; such as broadband access, Ethernet/Gigabit Ethernet, microprocessors/DSP/FPGA, networking equipment computers and peripherals, digital video, cameras and other portable devices. ORDERING INFORMATION 625 M SUPPLY VOLTAGE FREQUENCY IN MHz M = +1.8Vdc M - indicates MHz and decimal point. 2 N = +2.5Vdc L = +3.3Vdc OPERATING TEMPERATURE RANGE FREQUENCY STABILITY A = -10°C to +60°C 6 = ± 20 ppm 1 C = -20°C to +70°C [standard] 5 = ± 25 ppm I = -40°C to +85°C 3 = ± 50 ppm [standard] 1] Consult factory for 6I Stability/Temperature availability. 2] Frequency is recorded with three leading significant digits before the ‘M’ and 5 significant digits after the ‘M’ (including zeros). [Ex. 3.579545 MHz, code as 003M57954; 14.31818 MHz, code as 014M31818; 125 MHz, code as 125M00000] Not all performance combinations and frequencies may be available. Contact your local CTS Representative or CTS Customer Service for availability. PACKAGING INFORMATION [reference] Device quantity is 1k pcs. minimum and 3k pcs. maximum per 180mm reel. 8mm tape width. Document No. 008-0329-0 Page 1- 3 Rev. C www.ctscorp.com

Model 625 2.5mm x 2.0mm Low Cost HCMOS Clock Oscillator ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Maximum Supply Voltage V - -0.5 - 4.0 V CC Storage Temperature TSTG - -40 - +100 °C Frequency Range f - 1.0 - 110 MHz O Frequency Stability Δf/f - - - 20, 25, 50 ± ppm [See Note 1 and Ordering Information] O Aging Δf/f @+25°C, 1st year - - 3 ± ppm O Operating Temperature -10 +60 Commercial TA - -20 +25 +70 °C Industrial -40 +85 Supply Voltage Model 625M 1.62 1.8 1.98 V ±10% V Model 625N CC 2.25 2.5 2.75 Model 625L 2.97 3.3 3.63 Supply Current CL = 15pF Model 625M 1.0 MHz to 50 MHz - - 7 [+1.8V] 50.1 MHz to 110 MHz - - 15 S Model 625N ICC 1.0 MHz to 50 MHz - - 10 mA R [+2.5V] 50.1 MHz to 110 MHz - - 15 E T Model 625L 1.0 MHz to 50 MHz - - 15 E M [+3.3V] 50.1 MHz to 110 MHz - - 20 RA Output Load CL - - 15 pF PA Output Voltage Levels AL Logic '1' Level VOH CMOS Load 90%VCC - - V IC Logic '0' Level VOL CMOS Load - - 10%VCC R T Output Current C LE Logic '1' Level [M,N,L] IOH VOH = 90%VCC (1.8V, 2.5, 3.3V) - - -2, -4, -8 mA E Logic '0' Level [M,N,L] IOL VOL = 10%VCC (1.8V, 2.5, 3.3V) - - +2, +4, +8 Output Duty Cycle SYM @ 50% Level 45 - 55 % Rise and Fall Time @ 10% - 90% Levels, C = 15pF L Model 625M 1.0 MHz to 20 MHz - - 5 [+1.8V] 20.1 MHz to 110 MHz - - 4 Model 625N TR, TF 1.0 MHz to 20 MHz - - 4 ns [+2.5V] 20.1 MHz to 110 MHz - - 3 Model 625L 1.0 MHz to 20 MHz - - 3 [+3.3V] 20.1 MHz to 110 MHz - - 2 Start Up Time TS Application of VCC - 2 5 ms Enable Function Enable Input Voltage V Pin 1 Logic '1', Output Enabled 0.7*V - - IH CC V Disable Input Voltage V Pin 1 Logic '0', Output Disabled - - 0.3*V IL CC Enable Time [M,N,L] T Pin 1 Logic '1' - - 5 ms PLZ Standby Current I Pin 1 Logic '0', Output Disabled - - 15 µA ST Period Jitter, pk-pk pjpk-pk - - - 40 Period Jitter, RMS pjrms - - 25 ps Phase Jitter, RMS tjrms Bandwidth 12 kHz - 20 MHz - - 1 Notes: 1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and aging. LVCMOS OUTPUT WAVEFORM TEST CIRCUIT, CMOS LOAD ENABLE TRUTH TABLE PIN 1 PIN 3 Logic ‘1’ Output Open Output Logic ‘0’ High Imp. Document No. 008-0329-0 Page 2 - 3 Rev. C

Model 625 2.5mm x 2.0mm Low Cost HCMOS Clock Oscillator MECHANICAL SPECIFICATIONS PACKAGE DRAWING MARKING INFORMATION 1. XX.XX – Frequency in MHz. 2. C – CTS and Pin 1 identifier. 3. ** - Manufacturing Site Code. 4. D – Manufacturing Date Code. [See Table 1 for codes.] XX.XX 5. Complete CTS part number, frequency value and C**D date code information must appear on reel and carton labels. NOTES 1. Termination pads [e4]. Barrier-plating is nickel [Ni] with gold [Au] flash plate. 2. Reflow conditions per JEDEC J-STD-020; 260°C maximum, 20 seconds. 3. MSL = 1. TABLE I MONTH JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC YEAR 2001 2005 2009 2013 2017 A B C D E F G H J K L M 2002 2006 2010 2014 2018 N P Q R S T U V W X Y Z 2003 2007 2011 2015 2019 a b c d e f g h j k l m 2004 2008 2012 2016 2020 n p q r s t u v w x y z SUGGESTED SOLDER PAD GEOMETRY D.U.T. PIN ASSIGNMENTS CBYPASS should be ≥ 0.01 uF. PIN SYMBOL DESCRIPTION 1 EOH Enable 2 GND Circuit & Package Ground 3 Output RF Output 4 VCC Supply Voltage Document No. 008-0329-0 Page 3 - 3 Rev. C