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ICGOO电子元器件商城为您提供24LC00T-I/OT由Microchip设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 24LC00T-I/OT价格参考。Microchip24LC00T-I/OT封装/规格:存储器, EEPROM 存储器 IC 128b(16 x 8) I²C 400kHz 3500ns SOT-23-5。您可以下载24LC00T-I/OT参考资料、Datasheet数据手册功能说明书,资料中有24LC00T-I/OT 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC EEPROM 128BIT 400KHZ SOT23-5电可擦除可编程只读存储器 16byte 128kb 1.8V

产品分类

存储器

品牌

Microchip Technology

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

内存,电可擦除可编程只读存储器,Microchip Technology 24LC00T-I/OT-

数据手册

点击此处下载产品Datasheet

产品型号

24LC00T-I/OT

产品培训模块

http://www.digikey.cn/PTM/IndividualPTM.page?site=cn&lang=zhs&ptm=4315

产品目录页面

点击此处下载产品Datasheet

产品种类

电可擦除可编程只读存储器

供应商器件封装

SOT-23-5

其它名称

24LC00T-I/OTDKR

包装

Digi-Reel®

商标

Microchip Technology

存储器类型

EEPROM

存储容量

128(16 x 8)

安装风格

SMD/SMT

封装

Reel

封装/外壳

SC-74A,SOT-753

封装/箱体

SOT-23-5

工作温度

-40°C ~ 85°C

工作电流

500 uA

工作电源电压

2.5 V to 5.5 V

工厂包装数量

3000

接口

I²C,2 线串口

接口类型

I2C, Serial (2-Wire)

数据保留

200 yr

最大工作温度

+ 85 C

最大工作电流

2 mA

最大时钟频率

400 kHz

最小工作温度

- 40 C

标准包装

1

格式-存储器

EEPROMs - 串行

电压-电源

2.5 V ~ 5.5 V

电源电压-最大

5.5 V

电源电压-最小

2.5 V

组织

16 x 8

访问时间

900 nS

速度

100kHz,400kHz

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PDF Datasheet 数据手册内容提取

24AA00/24LC00/24C00 2 128 Bit I C™ Bus Serial EEPROM Device Selection Table Package Types 8-PIN PDIP/SOIC Device VCC Range Temp Range NC 1 8 VCC 24AA00 1.8 - 5.5 C,I 24LC00 2.5 - 5.5 C,I NC 2 24 7 NC X 24C00 4.5 - 5.5 C,I,E NC 3 X0 6 SCL 0 Vss 4 5 SDA Features 8-PIN TSSOP • Low-power CMOS technology - 500 µA typical active current NC 1 2 8 VCC 2 4 7 - 250 nA typical standby current NC X NC 3 X 6 (cid:127) Organized as 16 bytes x 8 bits NC 0 SCL 4 0 5 (cid:127) 2-wire serial interface bus, I 2C™ compatible VSS SDA (cid:127) 100 kHz (1.8V) and 400 kHz (5V) compatibility 5-PIN SOT-23 (cid:127) Self-timed write cycle (including auto-erase) SCL 1 5 VCC (cid:127) 4 ms maximum byte write cycle time 24 VSS 2 X (cid:127) 1,000,000 erase/write cycles X 0 (cid:127) ESD protection > 4 kV SDA 3 0 4 NC (cid:127) Data retention > 200 years (cid:127) 8L DIP, SOIC, TSSOP and 5L SOT-23 packages Block Diagram (cid:127) Standard or Pb-free finish available (cid:127) Temperature ranges available: HV Generator - Commercial (C): 0°C to +70°C - Industrial (I): -40°C to +85°C I/O Memory - Automotive (E): -40°C to +125°C CLoongtriocl CLoongtricol XDEC EEPROM Array Description SDA SCL The Microchip Technology Inc. 24AA00/24LC00/ YDEC 24C00 (24XX00*) is a 128-bit Electrically Erasable PROM memory organized as 16 x 8 with a 2-wire serial VCC Sense AMP interface. Low voltage design permits operation down VSS R/W Control to 1.8 volts for the 24XX00 version, and every version maintains a maximum standby current of only 1 µA and Pin Function Table typical active current of only 500 µA. This device was designed for where a small amount of EEPROM is Name Function needed for the storage of calibration values, ID VSS Ground numbers or manufacturing information, etc. The 24XX00 is available in 8-pin PDIP, 8-pin SOIC (150 SDA Serial Data mil), 8-pin TSSOP and the 5-pin SOT-23 packages. SCL Serial Clock VCC +1.8V to 5.5V (24AA00) +2.5V to 5.5V (24LC00) I2C is a trademark of Philips Corporation. +4.5V to 5.5V (24C00) *24XX00 is used in this document as a generic part number for NC No Internal Connection the 24AA00/24LC00/24C00 devices.  2003 Microchip Technology Inc. DS21178D-page 1

24AA00/24LC00/24C00 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS.........................................................................................................-0.6V to VCC +1.0V Storage temperature...............................................................................................................................-65°C to +150°C Ambient temperature with power applied................................................................................................-65°C to +125°C ESD protection on all pins..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS All Parameters apply across the Commercial (C): TA = 0°C to +70°C, VCC = 1.8V to 5.5V recommended operating ranges unless Industrial (I): TA = -40°C to +85°C, VCC = 1.8V to 5.5V otherwise noted Automotive (E) TA = -40°C to +125°C, VCC = 4.5V to 5.5V Parameter Symbol Min. Max. Units Conditions SCL and SDA pins: High-level input voltage VIH 0.7 VCC V (Note) Low-level input voltage VIL 0.3 VCC V (Note) Hysteresis of Schmitt Trigger VHYS .05 VCC — V VCC ≥ 2.5V (Note) inputs Low-level output voltage VOL 0.4 V IOL = 3.0 mA, VCC = 4.5V IOL = 2.1 mA, VCC = 2.5V Input leakage current ILI — ±1 µA VIN = VCC or VSS Output leakage current ILO — ±1 µA VOUT = VCC or VSS Pin capacitance (all inputs/outputs) CIN, — 10 pF VCC = 5.0V (Note) COUT TA = 25°C, f = 1 MHz Operating current ICC Write — 2 mA VCC = 5.5V, SCL = 400 kHz ICC Read — 1 mA VCC = 5.5V, SCL = 400 kHz Standby current ICCS — 1 µA VCC = 5.5V, SDA = SCL = VCC Note: This parameter is periodically sampled and not 100% tested. FIGURE 1-1: BUS TIMING DATA THIGH TF TR SCL TSU:STA TLOW THD:DAT TSU:DAT TSU:STO SDA THD:STA IN TSP TBUF TAA SDA OUT DS21178D-page 2  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 TABLE 1-2: AC CHARACTERISTICS All Parameters apply across all Commercial (C): TA = 0°C to +70°C, VCC = 1.8V to 5.5V recommended operating ranges Industrial (I): TA = -40°C to +85°C, VCC = 1.8V to 5.5V unless otherwise noted Automotive (E): TA = -40°C to +125°C, VCC = 4.5V to 5.5V Parameter Symbol Min Max Units Conditions Clock frequency FCLK — 100 kHz 4.5V ≤ Vcc ≤ 5.5V (E Temp range) — 100 1.8V ≤ Vcc ≤ 4.5V — 400 4.5V ≤ Vcc ≤ 5.5V Clock high time THIGH 4000 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 4000 — 1.8V ≤ Vcc ≤ 4.5V 600 — 4.5V ≤ Vcc ≤ 5.5V Clock low time TLOW 4700 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 4700 — 1.8V ≤ Vcc ≤ 4.5V 1300 — 4.5V ≤ Vcc ≤ 5.5V SDA and SCL rise time TR — 1000 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) (Note1) — 1000 1.8V ≤ Vcc ≤ 4.5V — 300 4.5V ≤ Vcc ≤ 5.5V SDA and SCL fall time TF — 300 ns (Note1) Start condition hold time THD:STA 4000 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 4000 — 1.8V ≤ Vcc ≤ 4.5V 600 — 4.5V ≤ Vcc ≤ 5.5V Start condition setup time TSU:STA 4700 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 4700 — 1.8V ≤ Vcc ≤ 4.5V 600 — 4.5V ≤ Vcc ≤ 5.5V Data input hold time THD:DAT 0 — ns (Note2) Data input setup time TSU:DAT 250 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 250 — 1.8V ≤ Vcc ≤ 4.5V 100 — 4.5V ≤ Vcc ≤ 5.5V Stop condition setup time TSU:STO 4000 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) 4000 — 1.8V ≤ Vcc ≤ 4.5V 600 — 4.5V ≤ Vcc ≤ 5.5V Output valid from clock TAA — 3500 ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) (Note2) — 3500 1.8V ≤ Vcc ≤ 4.5V — 900 4.5V ≤ Vcc ≤ 5.5V Bus free time: Time the bus must TBUF 4700 — ns 4.5V ≤ Vcc ≤ 5.5V (E Temp range) be free before a new transmis- 4700 — 1.8V ≤ Vcc ≤ 4.5V sion can start 1300 — 4.5V ≤ Vcc ≤ 5.5V Output fall time from VIH TOF 20+0.1 250 ns (Note1), CB ≤ 100 pF minimum to VIL maximum CB Input filter spike suppression TSP — 50 ns (Notes1, 3) (SDA and SCL pins) Write cycle time TWC — 4 ms Endurance 1M — cycles (Note4) Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained on www.microchip.com.  2003 Microchip Technology Inc. DS21178D-page 3

24AA00/24LC00/24C00 2.0 PIN DESCRIPTIONS 4.0 BUS CHARACTERISTICS The following bus protocol has been defined: 2.1 SDA Serial Data (cid:127) Data transfer may be initiated only when the bus This is a bidirectional pin used to transfer addresses is not busy. and data into and data out of the device. It is an open (cid:127) During data transfer, the data line must remain drain terminal, therefore the SDA bus requires a pull-up stable whenever the clock line is high. Changes in resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for the data line while the clock line is high will be 400kHz). interpreted as a Start or Stop condition. For normal data transfer SDA is allowed to change only Accordingly, the following bus conditions have been during SCL low. Changes during SCL high are defined (Figure4-1). reserved for indicating the Start and Stop conditions. 4.1 Bus Not Busy (A) 2.2 SCL Serial Clock Both data and clock lines remain high. This input is used to synchronize the data transfer from and to the device. 4.2 Start Data Transfer (B) 2.3 Noise Protection A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All The SCL and SDA inputs have Schmitt Trigger and commands must be preceded by a Start condition. filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus. 4.3 Stop Data Transfer (C) 3.0 FUNCTIONAL DESCRIPTION A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All The 24XX00 supports a bidirectional 2-wire bus and operations must be ended with a Stop condition. data transmission protocol. A device that sends data onto the bus is defined as a transmitter, and a device 4.4 Data Valid (D) receiving data as a receiver. The bus has to be controlled by a master device which generates the The state of the data line represents valid data when, serial clock (SCL), controls the bus access, and after a Start condition, the data line is stable for the generates the Start and Stop conditions, while the duration of the high period of the clock signal. 24XX00 works as slave. Both master and slave can The data on the line must be changed during the low operate as transmitter or receiver, but the master period of the clock signal. There is one bit of data per device determines which mode is activated. clock pulse. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of the data bytes transferred between the Start and Stop conditions is determined by the master device and is theoretically unlimited. DS21178D-page 4  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 4.5 Acknowledge The device that acknowledges has to pull down the SDA line during the Acknowledge clock pulse in such a Each receiving device, when addressed, is obliged to way that the SDA line is stable low during the high generate an acknowledge after the reception of each period of the acknowledge related clock pulse. Of byte. The master device must generate an extra clock course, setup and hold times must be taken into pulse which is associated with this Acknowledge bit. account. A master must signal an end of data to the Note: The 24XX00 does not generate any slave by not generating an Acknowledge bit on the last Acknowledge bits if an internal program- byte that has been clocked out of the slave. In this ming cycle is in progress. case, the slave must leave the data line high to enable the master to generate the Stop condition (Figure4-2). FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS (A) (B) (C) (D) (C) (A) SCL SDA START ADDRESS OR DATA STOP CONDITION ACKNOWLEDGE ALLOWED CONDITION VALID TO CHANGE FIGURE 4-2: ACKNOWLEDGE TIMING Acknowledge Bit SCL 1 2 3 4 5 6 7 8 9 1 2 3 SDA Data from transmitter Data from transmitter Transmitter must release the SDA line at this point Receiver must release the SDA line at this point allowing the Receiver to pull the SDA line low to so the Transmitter can continue sending data. acknowledge the previous eight bits of data.  2003 Microchip Technology Inc. DS21178D-page 5

24AA00/24LC00/24C00 5.0 DEVICE ADDRESSING 6.0 WRITE OPERATIONS After generating a Start condition, the bus master 6.1 Byte Write transmits a control byte consisting of a slave address and a Read/Write bit that indicates what type of Following the Start signal from the master, the device operation is to be performed. The slave address for the code (4 bits), the don't care bits (3 bits), and the R/W bit 24XX00 consists of a 4-bit device code ‘1010’ followed (which is a logic low) are placed onto the bus by the by three don't care bits. master transmitter. This indicates to the addressed The last bit of the control byte determines the operation slave receiver that a byte with a word address will to be performed. When set to a one a read operation is follow after it has generated an Acknowledge bit during selected, and when set to a zero a write operation is the ninth clock cycle. Therefore, the next byte transmit- selected. (Figure5-1). The 24XX00 monitors the bus ted by the master is the word address and will be for its corresponding slave address all the time. It written into the address pointer of the 24XX00. Only the generates an Acknowledge bit if the slave address was lower four address bits are used by the device, and the true and it is not in a Programming mode. upper four bits are don’t cares. The 24XX00 will acknowledge the address byte and the master device FIGURE 5-1: CONTROL BYTE FORMAT will then transmit the data word to be written into the addressed memory location. The 24XX00 acknowl- Read/Write Bit edges again and the master generates a Stop condition. This initiates the internal write cycle, and Device Select Don’t Care during this time the 24XX00 will not generate Acknowl- Bits Bits edge signals (Figure7-2). After a byte Write command, the internal address counter will not be incremented S 1 0 1 0 X X X R/W ACK and will point to the same address location that was just written. If a Stop bit is transmitted to the device at any point in the Write command sequence before the entire Slave Address sequence is complete, then the command will abort Start Bit Acknowledge Bit and no data will be written. If more than 8 data bits are transmitted before the Stop bit is sent, then the device will clear the previously loaded byte and begin loading the data buffer again. If more than one data byte is transmitted to the device and a Stop bit is sent before a full eight data bits have been transmitted, then the Write command will abort and no data will be written. The 24XX00 employs a VCC threshold detector circuit which disables the internal erase/write logic if the VCC is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00) at nominal conditions. DS21178D-page 6  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 7.0 ACKNOWLEDGE POLLING FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is Send complete (this feature can be used to maximize bus Write Command throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master Send Stop sending a Start condition followed by the control byte Condition to Initiate Write Cycle for a Write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If no ACK is returned, then the Start bit and control byte must be re-sent. If the cycle is complete, then the Send Start device will return the ACK and the master can then proceed with the next Read or Write command. See Figure7-1 for flow diagram. Send Control Byte with R/W = 0 Did Device NO Acknowledge (ACK = 0)? YES Next Operation FIGURE 7-2: BYTE WRITE S S T BUS ACTIVITY CONTROL WORD T MASTER A BYTE ADDRESS DATA O R P T SDA LINE S 1 0 1 0 X X X 0 X X X X P A A A BUS ACTIVITY C C C K K K X = Don’t Care Bit  2003 Microchip Technology Inc. DS21178D-page 7

24AA00/24LC00/24C00 8.0 READ OPERATIONS After the word address is sent, the master generates a Start condition following the acknowledge. This termi- Read operations are initiated in the same way as write nates the write operation, but not before the internal operations with the exception that the R/W bit of the address pointer is set. Then the master issues the slave address is set to one. There are three basic types control byte again but with the R/W bit set to a one. The of read operations: current address read, random read, 24XX00 will then issue an acknowledge and transmits and sequential read. the eight bit data word. The master will not acknowl- edge the transfer but does generate a Stop condition 8.1 Current Address Read and the device discontinues transmission (Figure8-2). After this command, the internal address counter will The 24XX00 contains an address counter that main- point to the address location following the one that was tains the address of the last word accessed, internally just read. incremented by one. Therefore, if the previous read access was to address n, the next current address read 8.3 Sequential Read operation would access data from address n + 1. Upon receipt of the slave address with the R/W bit set to one, Sequential reads are initiated in the same way as a the device issues an acknowledge and transmits the random read except that after the device transmits the eight-bit data word. The master will not acknowledge first data byte, the master issues an acknowledge as the transfer but does generate a Stop condition and the opposed to a Stop condition in a random read. This device discontinues transmission (Figure8-1). directs the device to transmit the next sequentially addressed 8-bit word (Figure8-3). 8.2 Random Read To provide sequential reads the 24XX00 contains an Random read operations allow the master to access internal address pointer which is incremented by one at any memory location in a random manner. To perform the completion of each read operation. This address this type of read operation, first the word address must pointer allows the entire memory contents to be serially be set. This is done by sending the word address to the read during one operation. device as part of a write operation. FIGURE 8-1: CURRENT ADDRESS READ S T S BUS ACTIVITY A CONTROL T MASTER R BYTE DATA O T P SDA LINE S 1 0 1 0 XXX 1 P A N BUS ACTIVITY C O K A C X = Don’t Care Bit K DS21178D-page 8  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 FIGURE 8-2: RANDOM READ S S T T S BUS ACTIVITY A CONTROL WORD A CONTROL T MASTER R BYTE ADDRESS (n) R BYTE DATA (n) O T T P S 1 0 1 0 X X X 0 X X XX S 1 0 1 0 XX X 1 P SDA LINE A A A N C C C O K K K BUS ACTIVITY A C X = Don’t Care Bit K FIGURE 8-3: SEQUENTIAL READ S BUS ACTIVITY CONTROL T MASTER BYTE DATA n DATA n + 1 DATA n + 2 DATA n + X O P SDA LINE P A A A A N BUS ACTIVITY C C C C O K K K K A C K  2003 Microchip Technology Inc. DS21178D-page 9

24AA00/24LC00/24C00 9.0 PACKAGING INFORMATION 9.1 Package Marking Information 8-Lead PDIP (300 mil) Example: XXXXXXXX 24LC00 T/XXXNNN I/P13F YYWW 0327 8-Lead SOIC (150 mil) Example: XXXXXXXX 24LC00 T/XXYYWW I/SN0327 NNN 13F 8-Lead TSSOP Example: XXXX 4L00 TYWW I327 NNN 13F TSSOP Marking Part Code Number STD Pb-Free 24AA00 4A00 G4A0 24LC00 4L00 G4L0 5-Lead SOT-23 SOT-23 Marking Code Example: Part Number C I E 24AA00 A0 B0 — 24LC00 L0 M0 N0 XXNN 24C00 C0 D0 E0 M03F Note: Pb-free parts are marked same as standard finish. Pb-free part number using “G” suffix is marked on carton.. Legend: XX...X Customer specific information* T Temperature grade (I,E) YY Year code (last 2 digits of calendar year) Y Year code (last digit of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard QTP marking consists of Microchip part number, year code, week code, and traceability code. DS21178D-page 10  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A A2 L c A1 β B1 p eB B Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane A1 .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018  2003 Microchip Technology Inc. DS21178D-page 11

24AA00/24LC00/24C00 8-Lead Plastic Small Outline (SN) –Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h α 45° c A A2 φ β L A1 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .050 1.27 Overall Height A .053 .061 .069 1.35 1.55 1.75 Molded Package Thickness A2 .052 .056 .061 1.32 1.42 1.55 Standoff § A1 .004 .007 .010 0.10 0.18 0.25 Overall Width E .228 .237 .244 5.79 6.02 6.20 Molded Package Width E1 .146 .154 .157 3.71 3.91 3.99 Overall Length D .189 .193 .197 4.80 4.90 5.00 Chamfer Distance h .010 .015 .020 0.25 0.38 0.51 Foot Length L .019 .025 .030 0.48 0.62 0.76 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .008 .009 .010 0.20 0.23 0.25 Lead Width B .013 .017 .020 0.33 0.42 0.51 Mold Draft Angle Top α 0 12 15 0 12 15 Mold Draft Angle Bottom β 0 12 15 0 12 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 DS21178D-page 12  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) E E1 p D 2 1 n B α A c φ A1 A2 β L Units INCHES MILLIMETERS* Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 8 8 Pitch p .026 0.65 Overall Height A .043 1.10 Molded Package Thickness A2 .033 .035 .037 0.85 0.90 0.95 Standoff § A1 .002 .004 .006 0.05 0.10 0.15 Overall Width E .246 .251 .256 6.25 6.38 6.50 Molded Package Width E1 .169 .173 .177 4.30 4.40 4.50 Molded Package Length D .114 .118 .122 2.90 3.00 3.10 Foot Length L .020 .024 .028 0.50 0.60 0.70 Foot Angle φ 0 4 8 0 4 8 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .007 .010 .012 0.19 0.25 0.30 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086  2003 Microchip Technology Inc. DS21178D-page 13

24AA00/24LC00/24C00 5-Lead Plastic Small Outline Transistor (OT) (SOT-23) E E1 p B p1 D n 1 α c A A2 φ A1 β L Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n 5 5 Pitch p .038 0.95 Outside lead pitch (basic) p1 .075 1.90 Overall Height A .035 .046 .057 0.90 1.18 1.45 Molded Package Thickness A2 .035 .043 .051 0.90 1.10 1.30 Standoff § A1 .000 .003 .006 0.00 0.08 0.15 Overall Width E .102 .110 .118 2.60 2.80 3.00 Molded Package Width E1 .059 .064 .069 1.50 1.63 1.75 Overall Length D .110 .116 .122 2.80 2.95 3.10 Foot Length L .014 .018 .022 0.35 0.45 0.55 Foot Angle φ 0 5 10 0 5 10 Lead Thickness c .004 .006 .008 0.09 0.15 0.20 Lead Width B .014 .017 .020 0.35 0.43 0.50 Mold Draft Angle Top α 0 5 10 0 5 10 Mold Draft Angle Bottom β 0 5 10 0 5 10 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091 DS21178D-page 14  2003 Microchip Technology Inc.

24AA00/24LC00/24C00 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX X Examples: Device Temperature Package Lead Finish a) 24AA00-I/P: Industrial Temperature,1.8V Range PDIP package b) 24AA00-I/SN: Industrial Temperature, Device: 24AA00: = 1.8V, 128 bit I2C™ Serial EEPROM 1.8V, SOIC package 24AA00T: = 1.8V, 128 bit I2C Serial EEPROM c) 24AA00T-I/OT: Industrial Temperature, (Tape and Reel) 1.8V, SOT-23 package, tape and reel 24LC00: = 2.5V, 128 bit I2C Serial EEPROM d) 24LC00-I/P: Industrial Temperature, 24LC00T: = 2.5V, 128 bit I2C Serial EEPROM 2.5V, PDIP package (Tape and Reel) e) 24C00-E/SN: Extended Temperature, 24C00: = 5V, 128 bit I2C™ Serial EEPROM 5V, SOIC package 24C00T: = 5V, 128 bit I2C™ Serial EEPROM f) 24LC00T-I/OT: Industrial Temperature, (Tape and Reel) 2.5V, SOT-23 package, tape and reel g) 24LC00-I/PG: Industrial Temperature, 2.5V Temperature Blank = 0°C to 70°C PDIP package, Pb-free Range: I = -40°C to +85°C h) 24LC00T-I/OTG: Industrial Temperature, E = -40°C to +125°C 2.5V, SOT-23 package, tape and reel, Pb-free Package: P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (150 mil body), 8-lead ST = Plastic TSSOP (4.4 mm), 8-lead OT = SOT-23, 5-lead (Tape and Reel only) Lead finish Blank=Standard 63/37 SnPb G =Matte Tin (pure Sn) Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales office 2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 3. The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2003 Microchip Technology Inc. DS21178D-page15

24AA00/24LC00/24C00 NOTES: DS21178D-page 16  2003 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: (cid:127) Microchip products meet the specification contained in their particular Microchip Data Sheet. (cid:127) Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. (cid:127) There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. (cid:127) Microchip is willing to work with the customer who is concerned about the integrity of their code. (cid:127) Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is intended through suggestion only The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PRO MATE and PowerSmart are registered trademarks of No representation or warranty is given and no liability is Microchip Technology Incorporated in the U.S.A. and other assumed by Microchip Technology Incorporated with respect countries. to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, use or otherwise. Use of Microchip’s products as critical com- SEEVAL and The Embedded Control Solutions Company are ponents in life support systems is not authorized except with registered trademarks of Microchip Technology Incorporated express written approval by Microchip. No licenses are con- in the U.S.A. veyed, implicitly or otherwise, under any intellectual property Application Maestro, dsPICDEM, dsPICDEM.net, ECAN, rights. ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified.  2003 Microchip Technology Inc. DS21178D-page 17

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Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: M icrochip: 24AA00-I/ST 24LC00/ST 24LC00/P 24C00/ST 24C00/SN 24AA00T-I/ST 24AA00T-I/SN 24AA00T-I/OT 24AA00- I/SN 24C00T/OT 24AA00-I/P 24LC00-I/P 24C00-I/SN 24C00-I/ST 24C00-E/SN 24C00-E/ST 24LC00/SN 24C00T/ST 24C00T/SN 24LC00T-I/SN 24LC00T-I/OT 24LC00T-I/ST 24C00-E/P 24C00/P 24C00-I/P 24LC00-I/SN 24LC00-I/ST 24AA00/P 24AA00/ST 24AA00/SN 24LC00T-I/OTG 24C00T-E/SN 24C00T-E/ST 24C00T-E/OT 24LC00T/SN 24AA00T/SN 24AA00T/ST 24LC00T/ST 24AA00T/OT 24LC00T/OT 24C00T-I/OT 24C00T-I/SN 24C00T-I/ST 24AA00T-I/MC