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  • 制造商: ZILOG
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参数 数值
产品目录

编程器,开发系统嵌入式解决方案

描述

DEV KIT FOR Z16F ZNEO开发板和工具包 - 其他处理器 ZNEO Modular Dev. System(MDS)

产品分类

评估板 - 嵌入式 - MCU, DSP工程工具

品牌

ZiLOG

产品手册

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产品图片

rohs

否无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

嵌入式开发工具,嵌入式处理器开发套件,开发板和工具包 - 其他处理器,ZiLOG Z16F2800100ZCOGZNEO™

数据手册

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产品型号

Z16F2800100ZCOG

产品

Development Kits

产品目录页面

点击此处下载产品Datasheet

产品种类

开发板和工具包 - 其他处理器

其它名称

269-4537

内容

板,电缆,电源,配件

商标

ZiLOG

安装类型

固定

工作电源电压

5 V

工具用于评估

Z16F2811AL20SG

工厂包装数量

1

平台

-

接口类型

IrDA, RS-232

操作系统

-

数据总线宽度

32 bit

板类型

评估平台

标准包装

1

核心

ZNEO

核心处理器

ZNEO

相关产品

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类型

MCU 16-位

系列

Z16F2800

配套使用产品/相关产品

Z16F

配用

/product-detail/zh/ZENETSC0100ZACG/269-4661-ND/1236586

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PDF Datasheet 数据手册内容提取

Z16F2800100ZCOG ® ZNEO Z16F Series Development Kit User Manual UM020205-0908 Copyright ©2008 by Zilog®, Inc. All rights reserved. www.zilog.com

ZNEO® Z16F Series Development Kit User Manual Warning: DO NOT USE IN LIFE SUPPORT LIFE SUPPORT POLICY ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION. As used herein Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Document Disclaimer ©2008 by Zilog, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. ZNEO is a registered trademark of Zilog, Inc. All other product or service names are the property of their respective owners. UM020205-0908

ZNEO® Z16F Series Development Kit User Manual iii Revision History Each instance in Revision History reflects a change to this document from its previous revision. For more details, refer to the corresponding pages and appropriate links in the table below. Revision Date Level Description Page No September 05 Updated Introduction section. 1 2008 September 04 Updated Title, Schematics. Implemented Zilog Style All 2007 Guide. June 2006 03 Added note on the ZNEO development board 16-bit 5 bus and programming external Flash memory. May 2006 02 Updated all schematics. 12 Jan. 2006 01 Original Issue All UM020205-0908 Revision History

ZNEO® Z16F Series Development Kit User Manual iv Table of Contents Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Safeguards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ZNEO Z16F Series Development Board . . . . . . . . . . . . . . . . . . . . . . 2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Development Kit Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 4 ZNEO MEMORY LAYOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 UART with IrDA ENDEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switches and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 External Interface Headers JP1, JP2, and JP4 . . . . . . . . . . . . . . . 11 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Customer Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 UM020205-0908 Table of Contents

ZNEO® Z16F Series Development Kit User Manual 1 Introduction Zilog’s ZNEO® Z16F Series MCU is part of its microcontroller products. The ZNEO Z16F Series MCU Development Kit (Z16F2800100ZCOG) familiarizes with the hardware and software tools available with this product. This kit consists of the 128 KB version of the ZNEO development board that supports and presents the features of the ZNEO Z16F Series. This kit allows you to write application software and contains all supporting documents. This User Manual acquaints you with the ZNEO Z16F Series MCU Development Kit, and provides instructions on setting up and using the tools to start building designs and applications. Z16F2811AL20SG is the silicon used in the board. For more details, refer to ZNEO Z16F Series Product Specification (PS0220) available for down- load at www.zilog.com. Safeguards The following precaution must be observed when working with the devices described in this document. Caution: Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). Installation For information on software installation and setup of the ZNEO Z16F Series development kit, refer to ZNEO® Series of Microcontrollers Development Kit Quick Start Guide (QS0057). UM020205-0908 Introduction

ZNEO® Z16F Series Development Kit User Manual 2 ZNEO Z16F Series Development Board Introduction The ZNEO Z16F Series development board is a development and proto- typing board for the ZNEO Z16F Series MCU. The board allows you to evaluate the features of ZNEO Z16F Series MCU, and to develop an application before building the hardware. Figure 1. ZNEO Z16F Series Development Board UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 3 Features The features of ZNEO Z16F Series of Microcontrollers include: • ZNEO MCU (100-Lead LQFP package) • 1 M x 16 External Flash memory • 256 K x 16 External RAM • 3 LEDs • RS-232 interface • On-Chip Debugger interface • IrDA transceiver • Electrical and mechanical compatibility with Zilog Modular Develop- ment System (MDS) architecture • One RESET pushbutton (S1) • Two SPST switches (S2-STOP/RUN and S3-DIRECTION) • 5 V DC power connector • 20 MHz Ceramic Oscillator (Y1) • Header for Analog-to-Digital Converter (ADC) input • External interface connectors JP1, JP2, and JP4 • 2.7 V to 3.6 V operating voltage with 5 V tolerant inputs UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 4 Development Kit Block Diagram Figure 2 displays the block diagram of ZNEO Z16F Series development kit. O Z8F1285 GPIO alGPI(JP2) Z(N124E8KKBOBS®FRLMAAMSC,HU, xternBus 12channelADC, E 3channelPWM) 20MHz al XTAL ExternalInterfaceAddressandControlbus eripherP1) P(J ExternalInterfaceDatabus xternalBus E ADCJP4(JP3) Externalonnector c FLASH (1 M x 16,CS0) SRAM (256 K x 16, CS1) RS-232 IrDA Figure 2. ZNEO Z16F Series Development Kit Block Diagram UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 5 ZNEO MEMORY LAYOUT The ZNEO CPU has a unique memory architecture with a unified 24-bit physical address space, which is partitioned into several distinct memory areas. In terms of physical memory spaces, the overall address space includes the following: • Internal non-volatile memory • Internal RAM • Internal I/O memory and special function registers (SFRs) • External memory and memory mapped peripherals The internal memory listed above are always present in ZNEO devices, while the external memory is optional. Every address space is defined as a specific range of addresses located at a given place in the framework of the unified 24-bit address space, and the address ranges of the different spaces do not overlap. To promote code efficiency, the ZNEO CPU supports shorter 16-bit addressing for the memory located in the address ranges 00_0000H-00_7FFFH and FF_8000H-FF_FFFFH. Table 1 on page 6 displays the physical layout of memory spaces available in the ZNEO architecture. Note: The external Flash memory on the ZNEO development board has a 16-bit bus. All Write operation to Flash Memory must be 16 bits at even addresses only. Attempts to Write 1 byte will result in the byte being replicated on both the upper and lower bytes of the 16-bit bus. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 6 Table 1. ZNEO Physical Memory Layout Memory Address Chip Selects Internal I/O Memory & SFRs FF_FFFFH–FF_E000H External Memory Mapped Peripherals FF_DFFFH–FF_C800H CS3 – CS5 (optional) External Memory at CS2 (optional) FF_C7FFH–FF_C000H CS2 Internal RAM FF_BFFFH–FF_8000H External Memory at CS2 (optional) F0_0000H CS2 External Memory at CS1 (optional) 80_0000H CS1 External Memory at CS0 (optional) 02_0000H CS0 Internal Non-Volatile Memory 01_FFFFH–00_0000H Each internal memory space has a distinct purpose. Internal non-volatile memory contains executable program code and constant data. ZNEO CPU based devices have internal non-volatile memory starting at address 00_0000H. For example, a device equipped with 128 K of Flash has internal non-volatile memory starting at address 00_0000H and ending at address 01_FFFFH. Internal RAM contains non-constant data and the stack. Executable program code can also reside in internal RAM, if desired. ZNEO CPU based devices have internal RAM ending at address FF_BFFFH, while the beginning address (and hence the total extent of this space) is device dependent. For example, a device equipped with 4 K of RAM has internal RAM starting at address FF_B000H and ending at address FF_BFFFH. Since internal RAM is accessed using 16-bit addressing, the lowest possi- ble starting address for internal RAM on any device is FF_8000H. ZNEO CPU based devices support 8 K of internal I/O memory located at addresses FF_E000H–FF_FFFFH. This memory contains CPU control registers and other SFRs, on-chip peripherals, and memory-mapped I/O ports. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 7 ZNEO CPU based devices also provide an external interface that allows seamless connection to external memory and/or peripherals. External memory can be non-volatile memory such as Flash, or RAM, or both. External non-volatile memory is used to store program code or constant data, while external RAM is available primarily for non-constant data. The external interface supports multiple chip select signals (CSx), which are asserted by the CPU when an access to external memory is requested. These signals are used to access distinct ranges and devices in external memory. The boundaries between memory ranges selected by the chip select signals are at fixed addresses, and, in some cases, the ranges covered by chip selects might overlap. For example, there might be some addresses in the range of both the CS0 and CS1 signals. In this case, the ZNEO CPU uses a chip select priority scheme. It asserts only a single chip select with the highest priority among those that contain the addresses to be accessed, with CS0 having the lowest priority and CS5 the highest. Also, the chip selects can be individually enabled or disabled. On-chip memory has greater priority over external memory. CS0 starts at address 00_0000H, and CS1 starts at address 80_0000H. CS2 to CS5 start at addresses F0_0000H and beyond. For more information, refer to ZNEO® CPU Core User Manual (UM0188) and the individual device product specification. MCU The ZNEO Z16F Series Flash microcontrollers are based on Zilog’s advanced ZNEO 16-bit CPU core. The ZNEO Z16F Series MCU family of devices sets a new standard of performance and efficiency with a 24-bit address bus and 16-bit data bus. The ZNEO Z16F Series External Interface allows seamless connection to external memory and peripherals. A 24-bit address bus and selectable 8-bit or 16-bit data bus allows parallel access up to 16 MB. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 8 The Development board contains circuitry to support and present all the features of the ZNEO Z16F Series. The key features of ZNEO Z16F Series include: • 20 MHz ZNEO CPU Core • Up to 128 KB internal Flash program memory with 16-bit access and in-circuit programming capability • Up to 4 KB internal RAM with 16-bit access • External Interface allows seamless connection to external data memory and peripherals with: – 6 chip selects with Programmable Wait states – 24-bit address bus supports up to 16 MB – Selectable 8-bit or 16-bit data bus widths – Programmable Chip Select signal polarity – ISA-compatible mode • Up to 12 channels 10-bit ADC • Operational Amplifier • Analog Comparator • 4-channel DMA controller supports internal or external DMA requests • Two full-duplex 9-bit Universal Asynchronous Receiver/Transmitter (UARTs) with support for Local Interconnect Network (LIN) and Infrared Data Association (IrDA) • Internal Precision Oscillator (IPO) • I2C Master-Slave controller • Enhanced Serial Peripheral Interface (ESPI) controller UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 9 • 12-bit Pulse Width Modulator (PWM) module with three complementary pairs or six independent PWM outputs with dead- band generation and fault trip input • Three standard 16-bit timers with capture, compare, and PWM capa- bility • Watchdog Timer (WDT) with internal RC oscillator • Up to 76 I/O pins • Up to 24 interrupts with programmable priority • Single-pin on-chip debugger • Power-on Reset (POR) • Voltage Brownout Protection (VBO) • 2.7 V to 3.6 V operating voltage with 5 V tolerant inputs • 0 °C to +70 °C standard temperature, -40 °C to +105 °C extended temperature, and -40 °C to +125 °C automotive operating ranges For more information, refer to ZNEO® Z16F Series Product Specification (PS0220) available for download at www.zilog.com. UART with IrDA ENDEC The ZNEO Z16F Series contains a fully-functional, high-performance UART with Infrared Encoder/Decoder (ENDEC). The Infrared ENDEC is integrated with an on-chip UART (component U13) allowing easy com- munication between the ZNEO Z16F Series and IrDA transceivers. Infra- red communication provides secure, reliable, low-cost, point-to-point communication between PCs, PDAs, cell phones, printers, and other infrared enabled devices. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 10 Switches and LEDs The ZNEO development board contains the following LEDs and switches: • Green LED D1, which when illuminated indicates the presence of 3.3 V DC on the board’s VCC_3 V power bus • Red LED D2, connected to chip port PA0_T0IN • Yellow LED D3, connected to the chip port PA1_T0OUT • Green LED D4, connected to the chip port PA2_DE0 • RESET switch S1, connected to the chip port RESET • SPST switch S2, connected to the chip port PA7_SDA • SPST switch S3, connected to the chip port PC0_T1IN Potentiometer R10 is reserved for future use. Jumper Settings Table 2 provides information on the shunt status, functions, and default settings of jumpers on the ZNEO Z16F Series development board. Table 2. ZNEO Jumper Settings Jumper Status Function Default OUT (not Enables ZNEO MCU access to external 16-bit memory bus J1 X installed) on development board. Disables 16-bit external memory bus and makes ZNEO J1 IN MCU analog ports available through connector JP4. Refer to schematic for JP4 pinouts. J2* OUT RS-232 interface enabled. X J2 IN RS-232 interface disabled. J3* OUT IrDA interface enabled. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 11 Table 2. ZNEO Jumper Settings (Continued) Jumper Status Function Default IrDA interface J3 IN X disabled. 8-bit MDS interface J6 OUT X disabled. 8-bit MDS interface J6 IN enabled. J7 OUT External Flash Write Protect disabled. X J7 IN External Flash Write Protect enabled. Note: * These jumpers must not be OUT at the same time. External Interface Headers JP1, JP2, and JP4 External interface headers JP1, JP2, and JP4 are provided in Schematics on page 12. UM020205-0908 ZNEO Z16F Series Development Board

ZNEO® Z16F Series Development Kit User Manual 12 Schematics Figure 3 through Figure 6 on page 15 display the schematics for the ZNEO Z16F Series Development Kit. Rev C: Swapped ANA 8 and ANA 9 on MCU page and MDS interface page POWER&COMMUNICATIONS MCU MDS INTERFACE PA0 D[15:0] PA0_T0IN PA1 PA0 D[15:0] D[15:0] PA1_T0OUT PA2 PA1 A[23:0] PA2_DE0 PA2 A[23:0] A[23:0] PA7 -DIS_IrDA PA7_SDA PA7 -WR -WR -DIS_IrDA -DIS_232 PC0_T1IN PC0_T1IN -RD -RD -DIS_232 AA11 PA3 PA3_CTS0 PA4 PA3 PA4_RXD0 PA5 PA4 -MC_EN -MC_EN PA5_TXD0 PA5 -XM_EN -XM_EN PK[7:0] PK[7:0] PC[7:0] PK[7:0] -RESET PC[7:0] PC[7:0] PA2 -RESET -RESET ANA_M[2:0] PA2 PA3 TXD1 ANA_M[2:0] ANA[11:10] ANA_M[2:0] PA3 PA4 TXD1 ANA[11:10] ANA[11:10] PA4 PA5 -DIS_232 ANA[7:0] PA5 PA6 -DIS_232 RXD1 ANA[7:0] ANA[7:0] PA6 PA7 -DIS_IrDA RXD1 RXD1 ANA_8 ANA8 PA7 -DIS_IRDA ANA_9 ANA9 RXD1 FFAABB nRCXTDS11 nCTS1 POWER&COMMUNICATIONS nCTS1 nCTS1 PWML1 PWML1 -RESET PWMH1 PWMH1 -RESET PWML2 PWML2 PWMH2 PWMH2 DE1 TXD1 DE1 TXD1 TXD1 VREF VREF PA6 PA6 MCU MDS_INTERFACE TOP TTTiiitttllleee ZZZ1886FFF112228881551 EEvvaalluuaattiioonn MMoodduullee.. SScchheemmaattiicc.. SSSiiizzzeee RRReeevvv BBB Document Number 999666CCC000999999999---000000111 CCC DDDaaattteee::: TTThhhuuurrrsssdddaaayyy,,, MMMaaarrrccchhh 000222,,, 222000000666 SSShhheeeeeettt 111 ooofff 444 Figure 3. ZNEO Z16F Series MCU Development Kit UM020205-0908 Schematics

ZNEO® Z16F Series Development Kit User Manual 13 5 4 3 2 1 RR11 1100KK UU11 D UU22 PJ0_DTAA8100/PJ0DATA8PJ1_DATA999PJ1/DATA9PJ2_DTAA1098PJ2/DATA103_DPJATA1197PJ3/DATA11VC_33Cv96VDDPA1_T0OUT95PA/TOUT/DM0CK10APA2_DE094PA2/DE0/FAULTYPA3_nCTS0933PA/CTS0/FAULT0GND92NDGVCC_33v91VDDARPF7_D790PF7/ADR7P5_CMISO89PC5ISO/CS/M5PD3_DE1_ADR1688D3/DE/ADR1P16PD4_RXD1_ADR1887PD4/RXD1/ADR18PD5_TXD1_ADR1986PD5/TXD1/ADR19PC4_MOSI85I/DAPC4/MOSMA2CKGND84GNDPJ4_DATA1283PJ4/DATA12PJ5_DATA1382JDATAP5/13PJ6_DATA1481JDATAP6/14PJ7_DATA1580PJ7/DATA15VCC_33v79VDDGND78NDGPA4_RXD077PA4/RXD0/CS1PA5_TXD076PA5/TXD0/CS2 VAGreNfD RR44RRRR3322CCCC22111100KK110000CC001177..22..pp448811..FFRRKK44uu55KKFF1122pp44FF99..99KK OPCOOINIPPNPIOPN_UAAAANCNNNNTI-NAAAAMN____AAACMMM5NNN_210EAAAN___MMM120112234567890113 AAAAAAAAAANO1123456789CE0SSNN77G44VBCCNCABBBBBBBBB1BBNDC1234567890TTALL_VVM22211111112133210987654342[88266:011]VCAAAAAAAACNNNNNNNN_AAAAAAAA3C0C0671023513P..1V3300C110uu_FFT1IN PPPPPPPPAAAAAAAA70652314________STSDTnTRC0X0DCEXIODTAL0DNSU0P00TC0 PPCC[07_:0T]1PPPPPPPPINAAAAAAAA01234567 PPPPPPPPPPPPPPPPEEEEEEEEJJJJJJJJ0123564751742036________________DDDDDDDDDDDDDDDDAAAAAAAAAAAAAAAATTTTTTTTTTTTTTTTAAAAAAAAAAAAAAAA8911111151742036013425 DDDDDDDDDDDDDDDD1111115817420936013425 D[15:0] D C C2C22255ppFF 1-RESET2YY112200 MMHHPPPPPPPPPPPzz3EEEEEFFFDDDPP-PPP53430412012RCFFFF___________EPAAA0162DDDDD2PPPSA_____DDDAAAAAWWWEAAAA0nRRRTTTTT_MMMTSDDDDC2C2AAAAAGGVV534T22SRRRRHHL6630412CCNN0pp1016212ICCFFDD_N____AAAG33DDDN33RRRvvD22210211111111112222221234567891023456789012345 PPPPRVPPPPPGPPPGPPPVPPEXGFDFFFFFFDTADDDCEEEEEXENNN6543210A034210TDD2S012DDD/////////////L////AEAAAAAAATDDDDDPPPSLTDDDDDDD0WWWAAAAASIRRRRRRRTTTTT/NMMMCAAAAA6543210/SOHHL342101421U1PK3/CS///ATAAPK2/CS0/DDDDRRRPK1/BLENM222A1PK0/BHEN200RVDDEADDVQPH0/ANA8/WRPH1/ANA9/RDNAPB0/A0/T0IN0PB1/ANA1/T0IN1PB4/ANA4P5/NA5BAP6/ANA6/PNP/CINNBOIPB7/ANA7/OPINNPB3/ANA3/OPOUTNAPB2/A2/T0IN2PH2/ANA10/CS0PH3/ANA11/CPINP/WAITVFREANDGPPK4/CS2CP0PK5/CS3C/T1PK6/CS41/TINPK7/CS51PO/COVDDUP6PPUCT/CDTTP/37D2/7DD//I/SMTNPM6C2PWA/P/AOCOKA1APPPPPPM1PPPTU/UA76PPDRGGGGGGEEESLT/C/TSGGMSE76543227651//KPDP//////10C/////QAAAAAAAADDDA/W//AWCL2/AADDDDDDDDAAAC//GGDROMVVDDCCMRRRRRRRTTTRIBENNNDDURRHSSAAA1111112L1QGNDDDDT54321003439877650 77555555555666666667777665412345678901245678012393 PPPPDCCDVGVPP6767AACCN____PPPPPPPDPPPPPPPG76nCCTTPDEEECCCGGGGGGGGB__NC22W__SS5763G01OI01623547DT33N___M___DC________33SUDDD_STTAAAAAAAAvvALL1TP1OAAACDDDDDDDD2__IWTTT_KUANRRRRRRRRPAAAADTM89111111WD576401325RHMR102L730 PPPPPPPPPPBBBBBBBBHH6457321023__________A__A____AAAAAAAANNNNNNNNNNAAAAAAAAAA6711_45_321001OO_____OTTTCPP000PPIINNIIIONNNINPN210UPT_nWAAAAAAAAAJJNNNNNNNNI11TAAAAAAAA32164507 AANNAA1110VCACN_3A3R1R1[7V0066:KK014]ANAUU[1441AAPPPPPPPPPPPPPPP:1CCKCKCKKKKKKCCC0105764234523176]_______________nnnnnnnnMMnSTTTBBCCCCCCSO22COIPPSLHOISSSSSSSKUNHHSEOE354201UT_1I0NNTP___AAWPNNPPPPPPPPMWAADDDDDDDDH98M563421700__________LnnTnDRPPPP0RWCXWWWWEXPPPPPPPPDDTR1DKKKKKKKKMMMMS_PPPPPPP1157064213LLHHA_1CCCCCCC_12A_D21A1345267__A__DRDAAAADR1RDDDDR611RRRR918227221320 PK[7:0] 11201323456789 AAAAAAAAAAOUU1123456789E330 PPPPPPPPPPPPPPPPVFFFFFFFFGGGGGGGGBC42375610BBBBBBBBB017345621________C________0123456789AAAAAAAAAAAAAAAADDDDDDDDDDDDDDDDRRRRRRRR22211111112RRRRRRRR210987654344237561089111111512340 VCAAAAAAAAAAAAAAAAAAAAAAAAC428375691011111122211112_5123400126897333V -RR1R1DA-00W33[KK255R3:0] C 26272829303132333435363738394041424344454647484950 Z16F2811AL20SG 1 1 2 1 NC GND 12 CC77 B PK3_nCS1PK2_nCS0PK1_nBLENPK0_nBHENVCC_33VAVCCPH0_ANA8_nWRPH1_ANA9_nRDPB0__ANA0_T0IN0PB1__ANA1_0IN1TPB4__ANA4PB5__ANA5CC88PB6_ANA6_OPINPPB7_ANA7_OPINNPB3__ANA3_OPOUTPB2__AA0IN2N2_TPH2_ANA10PH3_ANA11_CPINP_nWAITVREFNAGDPK4_nCS2PK5_nCS3PK6S_nC4PK7_nCS5VCC_33v RR77 00 OOHHmm XHHMDD_RRO//UPPTII/2NNM 11Cxx_22IN 7 SSNN7744LLVVCC0044 PPPPPPPPDDDDDDDD65340721________TnDRPPPPCXWWWWEXDT1DMMMMS_11LLHHA_1_21A_D12A__A__DRDAAAADR1RDDDDR611RRRR918227223102 110123456789 AAAAAAAAAAUU1123456789550 SSBBBBBBBBBBNN112345678907744CCBB22211111112109876543TTLLVV33DnPPTPPRAA88CXNNWWWWEX66DT11AA1DMMMMS1__1LLHH1981221 00..0011uuFFAAPPPPDTRnCXNNWWWWEXDTAA1DMMMMS1__1LLHH1981212 B RR88 00 OOHHmm VREF -MC_EN 23 OE VCC 24 VCC_33V VCC_33V 00..0011uuFF CC99 00..0011uuFF 1 NC GND 12 CC1100 ++ VCC_33V SSNN7744CCBBTTLLVV33886611 00..0011uuFF RR99 1100KK CC1111 1100uuFF A DBG RR1111 11KK 3 RR1100 CC1122 CC1133 CC1144 CC1155 CC1166 CC1177 CC1188 CC1199 CC2200 CC2211 CC2222 --XMMC__EENN A PP33INTERFACE ANA_5 2 55KK 00..0011uuFF 00..0011uuFF 00..0011uuFF 00..0011uuFF 00..0011uuFF 00..0011uuFF 00..00G11uuNFFD 00..0011uuFF 00..0011uuFF 00..0011uuFF 00..0011uuFF MCU VCC_33V 13 24 -REDSBEGT CC2233 1 TTTiiitttllleee 5 6 11000000ppFF Z1ZZZ6888FFFF2111822218881555 EEEvvvaaallluuuaaatttiiiooonnn MMMoooddduuullleee... SSSccchhheeemmmaaatttiiiccc... HHDDRR//PPIINN 22xx33 SSSiiizzzeee DDDooocccuuummmeeennnttt NNNuuummmbbbeeerrr RRReeevvv BBB 999666CCC000999999999---000000111 CCC DDDaaattteee::: MMMooonnndddaaayyy,,, MMMaaayyy 000888,,, 222000000666 SSShhheeeeeettt 222 ooofff 444 5 4 3 2 1 Figure 4. ZNEO Z16F Series MCU Development Kit UM020205-0908 Schematics

ZNEO® Z16F Series Development Kit User Manual 14 5 4 3 2 1 UU66 VCC_33V AA01 PPFF01__AADDRR01 D[15:0] D0 PE0_DATA0 JJPP11 D -RE---FRWSLDAAAAAAAAAAAAAAAAAAAAERA31654928711111111112TS14587036290HRR_22E88N11222222114112211140054321098876681257876543219KK AAAAAAAAAAAAAAAAAAAACOWRRBAAY11111111110123456789EEYTTEE0123456789T44S_99EBEBBYTVV116622DAA1TT5GGVV/DDDDDANNCNNPDDDDDDDDDD11111-DDCCCP1012340123456789VC23333444333334442431119135802402469135767043C_33V DDDDDDDDDDDDDDDD1111115631704892540231C0C0..22004411uu-FFFVLACC0C0SC..22H00_5511_3uuE3FFVN VC6C_33R1R1SSJJ-V0077F33NNKKHHL0077APDD44SCLLRR12HVV[//7PPCC_:II0P00NN]R00 11F xxL 4522UUAPSR77HOBB_TWERCIT-TDEIS_PF3CLA0SHR1R1V0033CKK33C_14733VPC012A_USUS[TNN27713AA77I:N440LL]VVCC-00C00S0 AAAAAAAAAAAAAAAAAAAAAA121111111212127296583413438206709152 PPPPPPGGGGGGPPPPPPPPFFGFFGFFJHJH365427661726534______DD10______AAAAAA__RR2AAAAAADDDDDDAA//DDDDDDPPDDRRRRRRIIRRRRRRRR1111118NN-726534143205FB98 11I9xxT122__MWDESP_KE[NV7A:C0BC]L_E33V R1R10033KK44PPPPPPPPKKKKKKKK27605341DDDDDDDDDDDDDDD111111413250762841953 PPPPPPPPJJJJJJJJPPPPPPP01635472EEEEEEE________7624153--DDDDDDDDBB------_______AAAAAAAACCCCCCLHDDDDDDDTTTTTTTTSSSSSSEEAAAAAAAAAAAAAAA054312NNTTTTTTT89111111AAAAAAA4132507624153-WR --BC-HSDAAAAAAADDADAA-ACCE4854211111173522S-ADDDAS83951N12F2610118GG9-D-002GBW1NN1_UN--DD5RMTWSDRRAESECTQKN 1357911111222223333344444555551357913579135791357913579 11111222223333344444555556024680246802468024680246802468 ---BIIGONAAAUAAAG-VVVASNDADD-ADAA-R011D3CRS121CCCNT649721D0642EIDDDD02RSDSCCC37RDQ11191E____D134FQ333L333-BAVVVLSEHN--CCSS35 -RD D CB --RCES----AAAAAAAAAAAAAAAAAABBRWS1928563714111111111LHD106735428EREETNNR0R0 22OO99HHmm222222114212111115432109887654321862817453 UTUTAAAAAAAAAAAAAAAAACCOWAULOCC11B11111111012345678900EEB55EPEE012345675512EVVNNCCMM221166IIIIIIGG//////VIIIIIIIIIIOOOOOO//////////NNCNNNNOOOOOOOOOO111111DDCCCCC0123456712345890 232333344414143344493337791358024670669135024 VDDDDDDDDDDDDDDDDC1111119243605718C0C0C321405..2200_77113uu3FFV C0C0..22008811uuFF PPPPPPPCCCCCCC1654327 PC-PM7C-_CX6T_M_2E_TONE2UINNT__PPWWMMLH00 RRP33C111_PPPP-TFJJJJO0090123 1U____OO_DDDDTHHWAAAAmmAAAVETTTTRNNNAAAAEAAA8911F89101G1ND 11112211111221147812314781233478134781 SS111112222212111112222212NNUUAAAAAAAAAAAAAAAAAAAAOOOO779912345123451234512345EEEE44CCBBGGTTVV11111222221111122222LLNNCCBBBBBBBBBBBBBBBBBBBBVVDDCC1234512345123451234533338844256911112221256911112221UU056903420569034288 VCGCNV_PPPPPPPPD3CCCCCCCCCC0C0CC3C54452233..V222200_________6699PPPP113MMMMnnSSuuJJJJ3SSCCIOOIFF0123VSSSSKKSSOOII RR3322 00 OOPPP-HHRWWWmmTDEPPPPXMMMSEAAAADE17346LHH11T21 APPPAAPPPA-V-RFVCNNANNAACACLEPPPPP-C73644AAAA3CCASDDCJJ______C__74_SSGG01ESCSRMS531MM3_H3NNT__DCTCX33O02_TTDDSV3ALDKSPXOV00IRDU1TNNNCCC HHJJ1357911111222223333344444555PP13579135791357913579135DD22RR//PPII111112222233333444445555NN0246802468024680246802462468 22xx3300 PPNNNNCCCCCC76__PPPPPPGWTTCACDDWN22AAAGPPAA55064OIDMINANNNNC_NT____UGT2_LMATAAA2nRDTPN2X_C1_356XIGPP_SnIWMDDTDNJJPNSOS02311MWSD1HPM0HL30_AAAANNNNAAAA___1MMM1PPPRn102CAAWXT25DMS1L12 --DDIIASSN__AI2r3_D2MA[2:0] CB SSNN7744CCBBTTLLVV33338844 00..0011uuFF VCC_33V NC 5579 5680 NNCC HHDDRR//PPIINN 22xx3300 FIX for REV C AANNAA89 ANA8 IRfS 2M3o2d uilnet eirsf apcleu gigse dd iosnatbol etdh eb yD epvi nP l5a0t foofr mJ Pt2he local ANA0 JJPP44 A C0C0..331100uuFF C0C0..331111uuFF C0C0..331122uuFF C0C0..331133uuFF C0C0..331144uuFF C0C0..331155uuFF C0C0..331166uuFF C0C0..331177uuFF C0C0..331188uuFF C0C0..331199uuFF C0C0..441100uuFF C0C0..441111AAAAAAAAAuuFFNNNNNNNNNAAAAAAAAA23765411101 ANA[A11N:A10[7]:0]ANA9VREF AANNAA1101 AAAAAAAANNNNNNNNAAAAAAAAAANNPP57306214AAHH9823__PPPPPPPPAAPBBBBBBBBNNVH57306214AAR________111PAAAAAAAAE_01HANNNNNNNNF0NAAAAAAAA_A57306214A9NA8 135791111122213579135 1111122222468024680246 TSTSTSiiiiiitttzzzllleeeeee ZZZZ18886FFFF11122228888M15551E EEEMvvvOaaaRllluuuYaaattt iiioooAnnn NMMMDooo ddduuuMlllDeee...S SSS cccIhhheeeNmmmTaaaEtttiiiRccc...FACE RRReeevvv A HHDDRR//PPIINN 22xx1133 BBB Document Number 999666CCC000999999999---000000111 CCC DDDaaattteee::: MMMooonnndddaaayyy,,, MMMaaayyy 000888,,, 222000000666 SSShhheeeeeettt 333 ooofff 444 5 4 3 2 1 Figure 5. ZNEO Z16F Series MCU Development Kit UM020205-0908 Schematics

ZNEO® Z16F Series Development Kit User Manual 15 5 4 3 2 1 PP11 2 VCC_5V VCC_33V 3 1 5V VCC_5V CC4422 CCOONN DDCC CC4455 ++ CC4433 CC4444 UU1111 19 00..11uuFF 00..11uuFF 1100uuFF 00..11uuFF 2 C1+ CC V+ 3 VCC_33V 4 C1- V CC4466 CC4477 CONSOLE D 3 USUSVPPI1122XX228811ND55AAUU--33V..33O 2 VCC_33V C0C0..441188uuFF 56 CC22-+ V- 7 00..11uuFF 00..11uuFF 61 PP22 D 1G CC5500 ++ C1C10044uu99FF R1R100110022 OOHHmm PA5_TXD0 PA5_TXD0 GND 1132 TT12IINN TT12OOUUTT 187 TCRXTXDSD000 8372 00..11uuFF 4 2 DD11 PA3_CTS0 PA3_CTS0 15 R1OUT R1IN 16 59 USER GGRREEEENN PA4_RXD0 PA4_RXD0 10 R2OUT R2IN 9 3.3 OK DDBB99 FFeemmaallee 1 VCC_33V VCC_33V 210 ESHNDN GND NNCC 1114 SSPP33222222EEBBCCAA 18 RR1133 1100KK C -DIS_232 14 UU44BB C 3 4 JJ22 DIS RS232 12 GND 7 SSNN7744LLVVCC0044 VCC_33V RR11996688RR CC5511 HHDDRR//PPIINN 11xx22 00..3333uuFF -RESET R1R10022KK22 RR2211 22RR22 5 VUUC11C33 DD22 RR1177 VCC_33VRR1188 SS11 14 UU44FF TXD1 21 TLEXDDA PA0_T0IN 1 2 1 2 -DIS_IRDA 13 12 IRDA_SD 4 SD B PA1_T0OUT 1 DYDYRREEEE33LLDDLL 2 11R1R1000022000000 1100KK -RSSWWES PPEBB TNNOO RR1144 VCC_33V RR1155 RR1166 DIS IJJR1233DA GND 7 SSNN7744LLVVCC0044 RXD1 36 RGXNDD0T ZZHHXX11881100 B 1100KK 1100KK 1100KK PA2_DE0 1 DD44 2 RR2233 14 UU44CC 14 UU44DD 14 UU44EE HHDDRR//PPIINN 11xx22 GGRREEEENN 5 6 9 8 11 10 110000 RR2244 1100KK STOP/RUN 7 SSNN7744LLVVCC0044 7 SSNN7744LLVVCC0044 7 SSNN7744LLVVCC0044 RR2255 SS22 PA7_SDA UU77CC UU77DD 9 12 110000 RR2266 8 11 1100KK EEGG11221188 10 13 RR2277 SS33 SSNN7744LLVVCC0000 SSNN7744LLVVCC0000 PC0_T1IN GND A POWER & LOCAL INTERFACES A 110000 GND VCC_33V EEGG11221188 DIRECTION TTTiiitttllleee 123 123 ZZZZ18886FFFF1112222888811555 EEEvvvaaallluuuaaatttiiiooonnn MMMoooddduuullleee... SSSccchhheeemmmaaatttiiiccc... GND VCC 3.3V SSSiiizzzeee RRReeevvv BBB Document Number 999666CCC000999999999---000000111 CCC TTPP11 TTPP22 DDDaaattteee::: TTThhhuuurrrsssdddaaayyy,,, MMMaaarrrccchhh 000222,,, 222000000666 SSShhheeeeeettt 444 ooofff 444 5 4 3 2 1 Figure 6. ZNEO Z16F Series MCU Development Kit UM020205-0908 Schematics

ZNEO® Z16F Series Development Kit User Manual 16 Customer Support For answers to technical questions about the product, documentation, or any other issues with Zilog’s offerings, please visit Zilog’s Knowledge Base at http://www.zilog.com/kb. For any comments, detail technical questions, or reporting problems, please visit Zilog’s Technical Support at http://support.zilog.com. UM020205-0908 Customer Support

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