图片仅供参考

详细数据请看参考数据手册

Datasheet下载
  • 型号: VN5160STR-E
  • 制造商: STMicroelectronics
  • 库位|库存: xxxx|xxxx
  • 要求:
数量阶梯 香港交货 国内含税
+xxxx $xxxx ¥xxxx

查看当月历史价格

查看今年历史价格

VN5160STR-E产品简介:

ICGOO电子元器件商城为您提供VN5160STR-E由STMicroelectronics设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 VN5160STR-E价格参考。STMicroelectronicsVN5160STR-E封装/规格:PMIC - 配电开关,负载驱动器, Power Switch/Driver 1:1 N-Channel 3.8A 8-SO。您可以下载VN5160STR-E参考资料、Datasheet数据手册功能说明书,资料中有VN5160STR-E 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC DVR HIGHSIDE AUTO 8-SOIC门驱动器 Sngl Ch HiSide Drivr

产品分类

PMIC - MOSFET,电桥驱动器 - 内部开关集成电路 - IC

品牌

STMicroelectronics

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

电源管理 IC,门驱动器,STMicroelectronics VN5160STR-EVIPower™

数据手册

点击此处下载产品Datasheet

产品型号

VN5160STR-E

产品种类

门驱动器

供应商器件封装

8-SO

其它名称

497-11467-2
VN5160STR-E-ND
VN5160STRE

其它有关文件

http://www.st.com/web/catalog/sense_power/FM1965/CL1969/SC1037/PF139079?referrer=70071840

包装

带卷 (TR)

商标

STMicroelectronics

安装类型

表面贴装

安装风格

SMD/SMT

导通电阻

160 毫欧

封装

Reel

封装/外壳

8-SOIC(0.154",3.90mm 宽)

封装/箱体

SO-8

工作温度

-40°C ~ 150°C

工厂包装数量

2500

最大工作温度

+ 150 C

最小工作温度

- 40 C

标准包装

2,500

电压-电源

4.5 V ~ 36 V

电流-峰值输出

5.4A

电流-输出/通道

-

电源电压-最大

41 V

电源电压-最小

4.5 V

电源电流

2 uA

类型

高端

系列

VN5160S-E

输入类型

非反相

输出数

1

输出电流

5.4 A

VN5160STR-E 相关产品

AAT4280AIJS-3-T1

品牌:Skyworks Solutions Inc.

价格:

RT9701GB

品牌:Richtek USA Inc.

价格:

T2117-TASY

品牌:Microchip Technology

价格:

BTS4140NHUMA1

品牌:Infineon Technologies

价格:¥4.83-¥7.67

BUK108-50DL,118

品牌:NXP USA Inc.

价格:

L9822EPD

品牌:STMicroelectronics

价格:

ST890BD

品牌:STMicroelectronics

价格:

VNQ6040STR-E

品牌:STMicroelectronics

价格:

PDF Datasheet 数据手册内容提取

VN5160S-E Single channel high side driver for automotive applications Features Max supply voltage V 41V CC Operating voltage range V 4.5 to 36V CC Max on-state resistance (per ch.) R 160 m ON SO-8 Current limitation (typ) I 5.4 A LIMH – Reverse battery protection (see Figure28) Off-state supply current I 2 µA(1) S – Electrostatic discharge protection 1. Typical value with all loads connected Applications ■ Main ■ All types of resistive, inductive and capacitive – Inrush current active management by loads power limitation – Very low stand-by current Description – 3.0V CMOS compatible input – Optimized electromagnetic emission The VN5160S-E is a monolithic device made using STMicroelectronics VIPower M0-5 – Very low electromagnetic susceptibility technology. It is intended for driving resistive or – In compliance with the 2002/95/EC inductive loads with one side connected to european directive ground. Active V voltage clamp protects the CC ■ Diagnostic Functions device against low energy spikes.The device – Open drain status output detects open load condition both in on and off- – On-state open load detection state, when STAT_DIS is left open or driven low. Output shorted to V is detected in the off-state. – Off-state open load detection CC When STAT_DIS is driven high, STATUS is in a – Thermal shutdown indication high impedance condition. Output current ■ Protection limitation protects the device in overload – Undervoltage shutdown condition. In case of long duration overload, the – Overvoltage clamp device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal – Output stuck to Vcc detection shutdown with automatic restart allows the device – Load current limitation to recover normal operation as soon as fault – Self limiting of fast thermal transients condition disappears. – Protection against loss of ground and loss of VCC – Thermal shutdown Table 1. Device summary Order codes Package Tube Tape and reel SO-8 VN5160S-E VN5160STR-E September 2013 Doc ID 13493 Rev 5 1/31 www.st.com 1

Contents VN5160S-E Contents 1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20 3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 Doc ID 13493 Rev 5

VN5160S-E List of tables List of tables Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pins function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Power section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. Switching (VCC=13V; Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. Status pin (V =0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 SD Table 9. Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 13. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 15. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 16. Thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 17. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 13493 Rev 5 3/31

List of figures VN5160S-E List of figures Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. Status timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10. High-level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. Input high-level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. Input low-level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 14. Status low-output voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 15. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 16. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17. On-state resistance vs T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 case Figure 18. On-state resistance vs V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 CC Figure 19. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20. Open-load off-state voltage detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 21. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 22. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 23. I vs T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 LIM case Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 25. STAT_DIS clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 26. High-level STAT_DIS voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 27. Low-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 28. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 29. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 30. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 31. SO-8 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 32. Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . . . . . 24 Figure 33. SO-8 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 34. Thermal fitting model of a single-channel HSD in SO-8(1) . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 35. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 36. SO-8 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 37. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4/31 Doc ID 13493 Rev 5

VN5160S-E Block diagram and pins description 1 Block diagram and pins description Figure 1. Block diagram V CC V CC CLAMP UNDERVOLTAGE PwCLAMP GND DRIVER I INPUT LIM LOGIC VDSLIM STATUS OPENLOAD ON STAT_DIS OPENLOAD OFF OVERTEMP. Pwr LIM T able 2. Pins function Name Function V Battery connection. CC OUTPUT Power output. Ground connection. Must be reverse battery protected by an external GND diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output INPUT switch state. STATUS Open drain digital diagnostic pin. STAT_DIS Active high CMOS compatible pin, to disable the STATUS pin. Doc ID 13493 Rev 5 5/31

Block diagram and pins description VN5160S-E Figure 2. Configuration diagram (top view) V 5 4 STAT_DIS CC OUTPUT 6 3 STATUS OUTPUT 7 2 INPUT V CC 8 1 GND SO-8 Table 3. Suggested connections for unused and N.C. pins Connection / Pin Status N.C. Output Input STAT_DIS Floating X X X X X Through 10K Through 10K To ground N.R.(1) X N.R. resistor resistor 1. Not recommended. 6/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications 2 Electrical specifications Figure 3. Current and voltage conventions I S V CC V V CC F I I SD OUT STAT_DIS OUTPUT V V SD OUT I I IN STAT INPUT STATUS V V INn STAT GND I GND Note: V = V - V during reverse battery condition. F OUT CC 2.1 Absolute maximum ratings Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. T able 4. Absolute maximum ratings Symbol Parameter Value Unit V DC supply voltage 41 V CC - V Reverse DC supply voltage 0.3 V CC - I DC reverse ground pin current 200 mA GND Internally I DC output current A OUT limited - I Reverse DC output current 6 A OUT I DC input current +10 / -1 mA IN I DC status current +10 / -1 mA STAT I DC status disable current +10 / -1 mA STAT_DIS Maximum switching energy (single pulse) E 34 mJ MAX (L= 12mH; R = 0; V =13.5V; T =150ºC; I = I (Typ.)) L bat jstart OUT limL Doc ID 13493 Rev 5 7/31

Electrical specifications VN5160S-E Table 4. Absolute maximum ratings (continued) Symbol Parameter Value Unit Electrostatic discharge (Human Body Model: R=1.5K C=100pF) – INPUT 4000 V – STATUS 4000 V V ESD – STAT_DIS 4000 V – OUTPUT 5000 V 5000 V – V CC V Charge device model (CDM-AEC-Q100-011) 750 V ESD T Junction operating temperature -40 to 150 °C j T Storage temperature -55 to 150 °C stg 2.2 Thermal data T able 5. Thermal data Symbol Parameter Value Unit R Thermal resistance junction-pins (MAX) 30 °C/W thj-pins °C/W R Thermal resistance junction-ambient (MAX) See Figure32 thj-amb 8/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications 2.3 Electrical characteristics Values specified in this section are for 8V<V <36V; -40°C<T<150°C, unless otherwise CC j stated. T able 6. Power section Symbol Parameter Test conditions Min. Typ. Max. Unit Operating supply V 4.5 13 36 V CC voltage V Undervoltage shutdown 3.5 4.5 V USD Undervoltage shutdown V 0.5 V USDhyst hysteresis I =1A; T=25°C 160 m OUT j R (1) On-state resistance I =1A; T=150°C 320 m ON OUT j I =1A; V =5V; T=25°C 210 m OUT CC j V Clamp voltage I = 20mA 41 46 52 V clamp S Off-state; V =13V; V =V =0V; CC IN OUT T=25°C; 2(2) 5(1)(2) µA I Supply current j S On-state; V =13V; V =5V; CC IN IOUT=0A 1.9 3.5 mA V =V =0V; V =13V; Tj=25°C 0 0.01 3 IL(off1) Ocuffr-rsetnatt(e2) output VIINN=VOOUUTT=0V; VCCCC=13V; Tj=125°C 0 5 µA I V = 0V; V = 4V -75 0 L(off2) IN OUT Output - V diode V CC -I = 0.6A; T= 150°C 0.7 V F voltage OUT j 1. Guaranteed by design/characterization 2. PowerMOS leakage included Table 7. Switching (V =13V; T =25°C) CC j Symbol Parameter Test conditions Min. Typ. Max. Unit t Turn-on delay time R = 13 (see Figure6) 10 µs d(on) L t Turn-off delay time R = 13(see Figure6) 15 µs d(off) L dV /dt Turn-on voltage slope R = 13 See Figure21 Vµs OUT (on) L dV /dt Turn-off voltage slope R = 13 See Figure22 Vµs OUT (off) L Switching energy W R = 13(see Figure6) 0.04 mJ ON losses during t L won Switching energy W R = 13(see Figure6) 0.04 mJ OFF losses during t L woff Doc ID 13493 Rev 5 9/31

Electrical specifications VN5160S-E Table 8. Status pin (V =0) SD Symbol Parameter Test conditions Min. Typ. Max. Unit V Status low output voltage I = 1.6 mA, V = 0V 0.5 V STAT STAT SD Normal operation or V = 5V, I Status leakage current SD 10 µA LSTAT V = 5V STAT Status pin input Normal operation or V =5V, C SD 100 pF STAT capacitance V = 5V STAT I = 1mA 5.5 7 V V Status clamp voltage STAT SCL I = - 1mA -0.7 V STAT T able 9. Protection (1) Symbol Parameter Test conditions Min. Typ. Max. Unit V = 13V 3.8 5.4 7.5 A I DC short circuit current CC limH 5V<V <36V 7.5 A CC Short circuit current during I V = 13V; T <T<T 2 A limL thermal cycling CC R j TSD T Shutdown temperature 150 175 200 °C TSD T Reset temperature T + 1 T + 5 °C R RS RS T Thermal reset of STATUS 135 °C RS T Thermal hysteresis (T -T ) 7 °C HYST TSD R Status delay in overload t T>T 20 µs SDL conditions j TSD Turn-off output voltage V I =150mA; V =0 V -41 V -46 V -52 V DEMAG clamp OUT IN CC CC CC I = 0.03A; Output voltage drop OUT VON limitation Tj=-40°C...+150°C 25 mV (see Figure5) 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications T able 10. Openload detection Symbol Parameter Test conditions Min. Typ. Max. Unit Openload on-state See I V = 5V, 8V<V <18V 10 40 mA OL detection threshold IN CC Figure19 Openload on-state I = 0A, V =13V t OUT CC 200 µs DOL(on) detection delay (see Figure4) Delay between INPUT falling t edge and STATUS rising I = 0A (see Figure4) 200 500 1000 µs POL OUT edge in openload condition Openload off-state voltage See V V = 0V, 8V<V <16V 2 4 V OL detection threshold IN CC Figure20 Output short circuit to V t cc (see Figure4) 180 t µs DSTKON detection delay at turn-off POL T able 11. Logic input Symbol Parameter Test conditions Min. Typ. Max. Unit V Input low level voltage 0.9 V IL I Low level input current V = 0.9V 1 µA IL IN V Input high level voltage 2.1 V IH I High level input current V = 2.1V 10 µA IH IN V Input hysteresis voltage 0.25 V I(hyst) I = 1mA 5.5 7 V V Input clamp voltage IN ICL I = -1mA -0.7 V IN V STAT_DIS low level voltage 0.9 V SDL I Low level STAT_DIS current V = 0.9V 1 µA SDL CSD V STAT_DIS high level voltage 2.1 V SDH I High level STAT_DIS current V = 2.1V 10 µA SDH CSD V STAT_DIS hysteresis voltage 0.25 V SD(hyst) I = 1mA 5.5 7 V V STAT_DIS clamp voltage SD SDCL I = -1mA -0.7 V SD Doc ID 13493 Rev 5 11/31

Electrical specifications VN5160S-E Figure 4. Status timings OPEN LOAD STATUS TIMING (without external pull-up) OPEN LOAD STATUS TIMING (with external pull-up) VIN IOUT < IOL VIN IOUT < IOL VOUT < VOL VOUT > VOL VSTAT VSTAT tDOL(on) tPOL tDOL(on) OUTPUT STUCK TO Vcc OVER TEMP STATUS TIMING VIN IOUT > IOL VOUT > VOL VIN Tj > TTSD VSTAT VSTAT tDOL(on) tDSTKON tSDL tSDL Figure 5. Output voltage drop limitation V -V cc out Tj=150oC T=25oC j T=-40oC j V on I out V /R on on(T) 12/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications T able 12. Truth table Conditions INPUT OUTPUT STATUS (V =0V)(1) SD L L H Normal operation H H H L L H Current limitation H X H L L H Overtemperature H L L L L X Undervoltage H L X L H L(2) Output voltage > V OL H H H L L H(3) Output current < I OL H H L 1. If the V is high, the STATUS pin is in a high impedance. SD 2. The STATUS pin is low with a delay equal to t after INPUT falling edge. DSTKON 3. The STATUS pin becomes high with a delay equal to t after INPUT falling edge. POL Figure 6. Switching characteristics V OUT tWon tWoff 90% 80% dVOUT/dt(on) dVOUT/dt(off) tr 10% tf t INPUT td(on) td(off) t Doc ID 13493 Rev 5 13/31

Electrical specifications VN5160S-E T able 13. Electrical transient requirements (part 1/3) ISO 7637-2: Test levels Number of Burst cycle/pulse Delays and 2004(E) pulses or repetition time impedance Test pulse III IV test times 1 -75V -100V 5000 pulses 0.5 s 5 s 2 ms, 10  2a +37V +50V 5000 pulses 0.2 s 5 s 50 µs, 2  3a -100V -150V 1h 90 ms 100 ms 0.1 µs, 50  3b +75V +100V 1h 90 ms 100 ms 0.1 µs, 50  100 ms, 4 -6V -7V 1 pulse 0.01 5b(1) +65V +87V 1 pulse 400 ms, 2  1. Valid in case of external load dump clamp: 40V maximum referred to ground. T able 14. Electrical transient requirements (part 2/3) ISO 7637-2: Test level results(1) 2004(E) Test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C 5b(2) C C 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. T able 15. Electrical transient requirements (part 3/3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to E disturbance and cannot be returned to proper operation without replacing the device. 14/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications Figure 7. Waveforms NORMAL OPERATION INPUT STAT_DIS LOAD CURRENT STATUS UNDERVOLTAGE V USDhyst VCC VUSD INPUT STAT_DIS LOAD CURRENT STATUS undefined OPEN LOAD with external pull-up INPUT STAT_DIS V >V LOAD VOLTAGE OUT OL V OL STATUS OPEN LOAD without external pull-up INPUT STAT_DIS LOAD VOLTAGE I <I LOAD CURRENT OUT OL t POL STATUS RESISTIVE SHORT TO Vcc, NORMAL LOAD INPUT STAT_DIS LOAD VOLTAGE IOUT>IOL VOUT>VOL V OL STATUS t DSTKON OVERLOAD OPERATION Tj TR TTSD T RS INPUT STAT_DIS I LIMH I LOAD CURRENT LIML STATUS currentpower thermal cycling limitationlimitation SHORTED LOAD NORMAL LOAD Doc ID 13493 Rev 5 15/31

Electrical specifications VN5160S-E 2.4 Electrical characteristics curves Figure 8. Off-state output current Figure 9. Input clamp voltage Iloff[nA] Vicl[V] 600 7.0 6.8 500 6.6 Iin = 1mA 400 Off-state 6.4 Vcc=13V 6.2 Vin=Vout=0V 300 6.0 5.8 200 5.6 5.4 100 5.2 0 5.0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 10. High-level input current Figure 11. Input high-level voltage Iih[µA] Vih[V] 5.0 4.0 4.5 3.5 4.0 3.0 3.5 3.0 Vin = 2.1V 2.5 2.5 2.0 2.0 1.5 1.5 1.0 1.0 0.5 0.5 0.0 0.0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 12. Input low-level voltage Figure 13. Input hysteresis voltage Vil[V] Vihyst[V] 2.0 1.0 1.8 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1.0 0.5 0.8 0.4 0.6 0.3 0.4 0.2 0.2 0.1 0.0 0.0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 16/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications Figure 14. Status low-output voltage Figure 15. Status leakage current Vstat[V] Ilstat[µA] 1.0 0.075 0.9 0.8 0.065 0.7 0.055 0.6 Vstat = 5V 0.5 0.045 0.4 Istat = 1.6mA 0.3 0.035 0.2 0.025 0.1 0.0 0.015 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 16. Status clamp voltage Figure 17. On-state resistance vs T case Vscl[V] Ronl[mOhm] 9.0 300 8.5 250 8.0 7.5 200 7.0 6.5 150 6.0 Istat = 1mA Iout = 1A 100 5.5 Vcc = 13V 5.0 50 4.5 4.0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 18. On-state resistance vs V Figure 19. Open-load on-state detection CC threshold Ronl[mOhm] Iol[mA] 300 100 275 90 Tc = 150°C 250 80 225 70 200 Tc = 125°C 60 175 50 150 40 125 Tc = 25°C 30 100 20 75 Tc = -40°C 10 50 0 0 5 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 125 150 175 Vcc[V] Tc (°C) Doc ID 13493 Rev 5 17/31

Electrical specifications VN5160S-E Figure 20. Open-load off-state voltage Figure 21. Turn-on voltage slope detection threshold Vol[V] (dVout/dt)on[V/ms] 5.0 1000 4.5 900 4.0 800 3.5 700 3.0 600 Vin = 0V 2.5 500 Vcc = 13V RL = 13Ohm 2.0 400 1.5 300 1.0 200 0.5 100 0.0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 22. Turn-off voltage slope Figure 23. I vs T LIM case (dVout/dt)off[V/ms] Ilimh[A] 1000 16 900 14 800 12 700 600 10 500 Vcc = 13V 8 Vcc = 13V RL = 13Ohm 400 6 300 4 200 100 2 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 24. Undervoltage shutdown Figure 25. STAT_DIS clamp voltage Vusd[V] Vsdcl[V] 16 8.0 14 7.5 12 7.0 10 6.5 8 6.0 Ini = 1mA 6 5.5 4 5.0 2 4.5 0 4.0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 18/31 Doc ID 13493 Rev 5

VN5160S-E Electrical specifications Figure 26. High-level STAT_DIS voltage Figure 27. Low-level STAT_DIS voltage VsdH[V] VsdL[V] 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Doc ID 13493 Rev 5 19/31

Application Information VN5160S-E 3 Application Information Figure 28. Application schematic +5V +5V VCC Rprot STAT_DIS Dld Rprot INPUT µC OUTPUT Rprot STATUS GND RGND VGND DGND 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (R only) GND This can be used with any type of load. The following is an indication on how to dimension the R resistor. GND 1. R  600mV / (I ) GND S(on)max 2. R V ) / (-I ) GND CC GND where -I is the DC reverse ground pin current and can be found in the absolute GND maximum rating section of the device datasheet. Power dissipation in R (when V <0: during reverse battery situations) is: GND CC P = (-V )2/ R D CC GND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I becomes the sum of the S(on)max maximum On-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the R will produce a shift (I * R ) in the input thresholds and the status output GND S(on)max GND values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same R . GND If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 20/31 Doc ID 13493 Rev 5

VN5160S-E Application Information 3.1.2 Solution 2: a diode (D ) in the ground line GND A resistor (R =1kshould be inserted in parallel to D if the device drives an GND GND inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection D is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the ld V max DC rating. The same applies if the device is subject to transients on the V line CC CC that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the V line, CC the control pins will be pulled negative. ST suggests to insert a resistor (R ) in line to prot prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -V /I  R  (V -V -V ) / I CCpeak latchup prot OHC IH GND IHmax Calculation example: For V = - 100V and I  20mA; V  4.5V CCpeak latchup OHµC 5k  R  180k. prot Recommended R values is 10k prot 3.4 Open load detection in off-state Off-state open load detection requires an external pull-up resistor (R ) connected between PU OUTPUT pin and a positive supply voltage (V ) like the +5V line used to supply the PU microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open load indication when load is connected: in this case we have to avoid V to be higher than V ; this results in the following condition OUT Olmin V = (V /(R +R ))R <V . OUT PU L PU L Olmin 2. no misdetection when load is disconnected: in this case the V has to be higher than out V ; this results in the following condition R <(V –V )/I . OLmax PU PU OLmax L(off2) Because I may significantly increase if V is pulled high (up to several mA), the pull- s(OFF) out up resistor R should be connected to a supply that is switched OFF when the module is in PU standby. Doc ID 13493 Rev 5 21/31

Application Information VN5160S-E The values of V , V and I are available in the Electrical characteristics OLmin OLmax L(off2) section. Figure 29. Open-load detection in off-state V batt. V PU VCC R PU DRIVER INPUT + IL(off2) LOGIC OUT + R - STATUS V OL R L GROUND 22/31 Doc ID 13493 Rev 5

VN5160S-E Application Information 3.5 Maximum demagnetization energy (V = 13.5V) CC Figure 30. Maximum turn-off current versus inductance 10 A B C 1 A) I ( 0,1 0,1 1 L (mH) 10 100 A: T =150°C single pulse jstart B: T =100°C repetitive pulse jstart C: T =125°C repetitive pulse jstart V , I IN L Demagnetization Demagnetization Demagnetization t Note: Values are generated with R =0 In case of repetitive pulses, T (at beginning of each L jstart demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 13493 Rev 5 23/31

Package and PCB thermal data VN5160S-E 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 31. SO-8 PC board Note: Layout condition of R and Z measurements (PCB: FR4 area= 4.8mm x 4.8mm, PCB th th thickness=2mm, Cu thickness= 35µm, Copper areas: from minimum pad lay-out to 2cm2). Figure 32. R vs PCB copper area in open box free air condition thj-amb RTHj_amb(°C/W) 110 100 90 80 70 60 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) 24/31 Doc ID 13493 Rev 5

VN5160S-E Package and PCB thermal data Figure 33. SO-8 Thermal impedance junction ambient single pulse ZTH (°C/W) 1000 Footprint 100 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Equation 1: pulse calculation formula Z = R +Z 1– TH TH THtp where  = t /T P Figure 34. Thermal fitting model of a single-channel HSD in SO-8(1) 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 13493 Rev 5 25/31

Package and PCB thermal data VN5160S-E T able 16. Thermal parameter Area/island (cm2) Footprint 2 R1 (°C/W) 1.2 R2 (°C/W) 6 R3 (°C/W) 3.5 R4 (°C/W) 21 R5 (°C/W) 16 R6 (°C/W) 58 28 C1 (W.s/°C) 0.0008 C2 (W.s/°C) 0.0016 C3 (W.s/°C) 0.0075 C4 (W.s/°C) 0.045 C5 (W.s/°C) 0.35 C6 (W.s/°C) 1.05 2 26/31 Doc ID 13493 Rev 5

VN5160S-E Package and packing information 5 Package and packing information ® 5.1 ECOPACK packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 Package mechanical data Figure 35. SO-8 package dimensions Doc ID 13493 Rev 5 27/31

Package and packing information VN5160S-E T aSO-8ble 17. SO-8 mechanical data Millimeter Dim. Min. Typ. Max. A 1.75 a1 0.1 0.25 a2 1.65 a3 0.65 0.85 b 0.35 0.48 b1 0.19 0.25 C 0.25 0.5 c1 45 (typ.) D 4.8 5 E 5.8 6.2 e 1.27 e3 3.81 F 3.8 4 L 0.4 1.27 M 0.6 S 8 (max.) L1 0.8 1.2 28/31 Doc ID 13493 Rev 5

VN5160S-E Package and packing information 5.3 Packing information Figure 36. SO-8 tube shipment (no suffix) B C Base Q.ty 100 Bulk Q.ty 2000 Tube length (± 0.5) 532 A A 3.2 B 6 C (± 0.1) 0.6 All dimensions are in mm. Figure 37. SO-8 tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 12.4 N (min) 60 T (max) 18.4 All dimensions are in mm. Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width W 12 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 8 Hole Diameter D (+ 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 5.5 Compartment Depth K (max) 4.5 Hole Spacing P1 (± 0.1) 2 All dimensions are in mm. End Start Top No components Components No components cover tape 500mm min Empty components pockets 500mm min saled with cover tape. User direction of feed Doc ID 13493 Rev 5 29/31

Revision history VN5160S-E 6 Revision history T able 18. Document revision history Date Revision Changes Feb-2007 1 Initial release. Document rewritten, restructured and put in corporate technical May-2007 2 literature template. Table4: Absolute maximum ratings: changed EMAX value from 14 to 34 mJ. Table13: Electrical transient requirements (part 1/3): updated test level values III and IV for test pulse 5b and notes. 17-Dec-2007 3 Added Section3.5: Maximum demagnetization energy (VCC = 13.5V). Figure34: Thermal fitting model of a single-channel HSD in SO-8(1): added note. Updated Section2.3: Electrical characteristics. 23-Nov-2009 4 Updated Section2.4: Electrical characteristics curves. Updated Table6: Power section. 20-Sep-2013 5 Updated Disclaimer 30/31 Doc ID 13493 Rev 5

VN5160S-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 13493 Rev 5 31/31