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ICGOO电子元器件商城为您提供TPS76750QD由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 TPS76750QD价格参考¥12.56-¥25.74。Texas InstrumentsTPS76750QD封装/规格:PMIC - 稳压器 - 线性, Linear Voltage Regulator IC Positive Fixed 1 Output 5V 1A 8-SOIC。您可以下载TPS76750QD参考资料、Datasheet数据手册功能说明书,资料中有TPS76750QD 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC REG LDO 5V 1A 8SOIC低压差稳压器 Fast-Transient Response 1-A

产品分类

PMIC - 稳压器 - 线性

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

电源管理 IC,低压差稳压器,Texas Instruments TPS76750QD-

数据手册

点击此处下载产品Datasheet

产品型号

TPS76750QD

产品目录页面

点击此处下载产品Datasheet

产品种类

低压差稳压器

供应商器件封装

8-SOIC

其它名称

296-2739-5

包装

管件

单位重量

76 mg

商标

Texas Instruments

回动电压—最大值

380 mV at 1 A

安装类型

表面贴装

安装风格

SMD/SMT

封装

Tube

封装/外壳

8-SOIC(0.154",3.90mm 宽)

封装/箱体

SOIC-8

工作温度

-40°C ~ 125°C

工厂包装数量

75

最大功率耗散

0.904 W

最大工作温度

+ 125 C

最大输入电压

10 V

最小工作温度

- 40 C

最小输入电压

+ 2.7 V

标准包装

75

电压-跌落(典型值)

0.23V @ 1A

电压-输入

最高 10V

电压-输出

5V

电压调节准确度

2 %

电流-输出

1A

电流-限制(最小值)

1.2A

稳压器拓扑

正,固定式

稳压器数

1

系列

TPS76750

线路调整率

0.01 % / V

负载调节

3 mV

输入偏压电流—最大

0.085 mA

输出电压

5 V

输出电流

1 A

输出端数量

1 Output

输出类型

Fixed

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Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 TPS767xxQ Fast-Transient-Response 1-A Low-Dropout Linear Regulators 1 Features 2 Description • 1ALow-DropoutVoltageRegulator This device is designed to have a fast transient 1 response and be stable with 10 µF low ESR • Availablein1.5-V,1.8-V,2.5-V,2.7-V,2.8-V,3.0- capacitors. This combination provides high V,3.3-V,5.0-VFixedOutputandAdjustable performanceatareasonablecost. Versions Because the PMOS device behaves as a low-value • DropoutVoltageDownto230mVat1A resistor, the dropout voltage is very low (typically (TPS76750) 230mVatanoutputcurrentof1AfortheTPS76750) • Ultralow85µATypicalQuiescentCurrent and is directly proportional to the output current. • FastTransientResponse Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very • 2%ToleranceOverSpecifiedConditionsfor low and independent of output loading (typically Fixed-OutputVersions 85 µA over the full range of output current, 0 mA to • OpenDrainPower-OnResetWith200-msDelay 1 A). These two key specifications yield a significant (SeeTPS768xxforPGOption) improvement in operating life for battery-powered • 8-PinSOICand20-PinTSSOP PowerPAD™ systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) (PWP)Package shuts down the regulator, reducing the quiescent • ThermalShutdownProtection currentto1µAatT =25°C. J DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 4.90mm×3.91mm TPS767xx HTSSOP(20) 6.50mmx4.40mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. TPS76733DropoutVoltagevsFree-air Temperature TPS76733LoadTransientResponse 103 100 V nm −mV 102 IO= 1A −Change iOutVoltage− 500 Voltage 101 ∆VOutp −50 ut A V−DropoDO110−010 IO= 10 mA put Current− 0.15 Out 0 IO= 0 − Co= 10μF O 10−2 I −60 −40 −20 0 20 40 60 80 100 120 140 0 100 200 300 400500 600 700 800 9001000 TA−Free-AirTemperature−°C t−Time−μs 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com Table of Contents 1 Features.................................................................. 1 9.2 FunctionalBlockDiagram.......................................13 2 Description............................................................. 1 9.3 FeatureDescription.................................................14 3 RevisionHistory..................................................... 2 9.4 DeviceFunctionalModes........................................15 9.5 Programming..........................................................15 4 Description(Continued)........................................ 3 10 ApplicationandImplementation........................ 16 5 DeviceOptions....................................................... 3 10.1 ApplicationInformation..........................................16 6 PinConfigurationandFunctions......................... 4 10.2 TypicalApplication ...............................................16 7 Specifications......................................................... 5 11 Layout................................................................... 18 7.1 AbsoluteMaximumRatings......................................5 11.1 PowerDissipationandJunctionTemperature......18 7.2 ESDRatings..............................................................5 12 DeviceandDocumentationSupport................. 19 7.3 RecommendedOperatingConditions.......................5 12.1 RelatedLinks........................................................19 7.4 ThermalInformation..................................................5 12.2 CommunityResources..........................................19 7.5 ElectricalCharacteristics...........................................6 12.3 Trademarks...........................................................19 7.6 TypicalCharacteristics..............................................8 12.4 ElectrostaticDischargeCaution............................19 8 ParameterMeasurementInformation................12 12.5 Glossary................................................................19 9 DetailedDescription............................................ 13 13 Mechanical,Packaging,andOrderable 9.1 Overview.................................................................13 Information........................................................... 19 3 Revision History ChangesfromRevisionI(January2004)toRevisionJ Page • AddedESDRatingstable,Overviewsection,FeatureDescriptionsection,DeviceFunctionalModes,Application andImplementationsection,DeviceandDocumentationSupportsection,andMechanical,Packaging,and OrderableInformationsection. .............................................................................................................................................. 1 2 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 4 Description (Continued) The RESET output of the TPS767xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS767xx monitors the output voltage of the regulatortodetectanundervoltageconditionontheregulatedoutputvoltage. The TPS767xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS767xx family is available in 8-pin SOIC and20-pinPWPpackages. 5 Device Options VOLTAGEOPTIONS PARTNO. (1) (V) TSSOP SOIC TYP (PWP) (D) TPS76750Q TPS76750Q 5 TPS76733Q TPS76733Q 3.3 TPS76730Q TPS76730Q 3 TPS76728Q TPS76728Q 2.8 TPS76727Q TPS76727Q 2.7 TPS76725Q TPS76725Q 2.5 TPS76718Q TPS76718Q 1.8 TPS76715Q TPS76715Q 1.5 TPS76701Q TPS76701Q Adjustable1.5Vto5.5V (1) TheTPS76701isprogrammableusinganexternalresistordivider(seeapplicationinformation).TheDandPWPpackagesareavailable tapedandreeled.AddanRsuffixtothedevicetype(e.g.,TPS76701QDR). Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 6 Pin Configuration and Functions PWPPackage 20PinHTSSOP TopView GND/HSINK 1 20 GND/HSINK GND/HSINK 2 19 GND/HSINK GND 3 18 NC NC 4 17 NC EN 5 16 RESET IN 6 15 FB/NC IN 7 14 OUT NC 8 13 OUT GND/HSINK 9 12 GND/HSINK GND/HSINK 10 11 GND/HSINK NC−No internal connection DPackage 8PinSOIC TopView GND 1 8 RESET EN 2 7 FB/NC IN 3 6 OUT IN 4 5 OUT PinFunctions PIN I/O DESCRIPTION NAME NO. SOICPACKAGE EN 2 I Enableinput FB/NC 7 I Feedbackinputvoltageforadjustabledevice(noconnectforfixedoptions) GND 1 Regulatorground IN 3,4 I Inputvoltage OUT 5,6 O Regulatedoutputvoltage RESET 8 O RESEToutput HTSSOPPACKAGE EN 5 I Enableinput FB/NC 15 I Feedbackinputvoltageforadjustabledevice(noconnectforfixedoptions) GND 3 Regulatorground GND/HSINK 1,2,9,10,11,12,19,20 Ground/heatsink IN 6,7 I Inputvoltage NC 4,8,17,18 Noconnect OUT 13,14 O Regulatedoutputvoltage RESET 16 O RESEToutput 4 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted) (1) MIN MAX UNIT V Inputvoltagerange(2) –0.3 13.5 V I VoltagerangeatEN –0.3 V +0.3 V I MaximumRESETvoltage 16.5 Peakoutputcurrent Internallylimited V Outputvoltage(OUT,FB) 7 V O Continuoustotalpowerdissipation SeeThermalInformation T Operatingjunctiontemperaturerange –40 125 °C J T Storagetemperaturerange −65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevaluesarewithrespecttonetworkterminalground. 7.2 ESD Ratings VALUE UNIT Electrostatic Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) V 2000 V (ESD) discharge (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V(1) Inputvoltage 2.7 10 V I V Outputvoltagerange 1.2 5.5 V O I (2) Outputcurrent 0 1.0 A O T (2) Operatingjunctiontemperature –40 125 °C J (1) MaximumV =V +V or2.7V,whicheverisgreater. IN OUT DO (2) Continuouscurrentandoperatingjunctiontemperaturearelimitedbyinternalprotectioncircuitry,butitisnotrecommendedthatthe deviceoperateunderconditionsbeyondthosespecifiedinthistableforextendedperiodsoftime. 7.4 Thermal Information TPS767xxQ THERMALMETRIC(1) PWP(HTSSOP) D(SOIC) UNIT (20PINS) (8PINS) R Junction-to-ambientthermalresistance 35.8 106.9 °C/W θJA R Junction-to-case(top)thermalresistance 26.1 52.5 °C/W θJC(top) R Junction-to-boardthermalresistance 8.7 47.7 °C/W θJB ψ Junction-to-topcharacterizationparameter 0.4 9.0 °C/W JT ψ Junction-to-boardcharacterizationparameter 8.6 47.1 °C/W JB R Junction-to-case(bottom)thermalresistance 2.6 n/a °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report,SPRA953. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 7.5 Electrical Characteristics V =V +1V,I =1mA,EN=0V,C =10µF(overrecommendedoperatingfree-airtemperaturerange,unless I O(typ) O o otherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT 1.5V≤VO≤5.5V, TJ=25°C VO TPS76701 V 1.5V≤VO≤5.5V, TJ=−40°Cto125°C 0.98VO 1.02VO TJ=25°C, 2.7V<VIN<10V 1.5 TPS76715 V TJ=−40°Cto125°C, 2.7V<VIN<10V 1.470 1.530 TJ=25°C, 2.8V<VIN<10V 1.8 TPS76718 V TJ=−40°Cto125°C, 2.8V<VIN<10V 1.7646 1.836 TJ=25°C, 3.5V<VIN<10V 2.5 TPS76725 V TJ=−40°Cto125°C, 3.5V<VIN<10V 2.450 2.550 Outputvoltage TJ=25°C, 3.7V<VIN<10V 2.7 TPS76727 V (10µAto1Aload) TJ=−40°Cto125°C, 3.7V<VIN<10V 2.646 2.754 TJ=25°C, 3.8V<VIN<10V 2.8 TPS76728 V TJ=−40°Cto125°C, 3.8V<VIN<10V 2.7446 2.856 TJ=25°C, 4.0V<VIN<10V 3 TPS76730 V TJ=−40°Cto125°C, 4.0V<VIN<10V 2.9400 3.060 TJ=25°C, 4.3V<VIN<10V 3.3 TPS76733 TJ=−40°Cto125°C, 4.3V<VIN<10V 3.2346 3.366 TJ=25°C, 6.0V<VIN<10V 5 TPS76750 TJ=−40°Cto125°C, 6.0V<VIN<10V 4.900 5.100 10µA<IO<1A, TJ=25°C 85 Quiescentcurrent(GNDcurrent)EN=0V µA IO=1A, TJ=−40°Cto125°C 125 Outputvoltagelineregulation(∆VO/VO) VO+1V<VI≤10V, TJ=25°C 0.01 %/V Loadregulation 3 mV Outputnoisevoltage TPS76718 BW=200Hzto100kHz, IC=1A, 55 µVrms Co=10µF, TJ=25°C Outputcurrentlimit VO=0V 1.2 1.7 2 A Thermalshutdownjunctiontemperature 150 °C EN=VI, TJ=25°C,2.7V<VI<10V 1 µA Standbycurrent EN=VI, TJ=−40°Cto125°C, 10 µA 2.7V<VI<10V FBinputcurrent TPS76701 FB=1.5V 2 nA Highlevelenableinputvoltage 1.7 V Lowlevelenableinputvoltage 0.9 V Powersupplyripplerejection f=1kHz,Co=10µF, TJ=25°C 60 dB Minimuminputvoltageforvalid RESET IO(RESET)=300μA 1.1 Tripthresholdvoltage VOdecreasing 92 98 Reset Hysteresisvoltage MeasuredatVO 0.5 Outputlowvoltage VI=2.7V, IO(RESET)=1mA 0.15 0.4 Leakagecurrent V(RESET)=5V 1 RESETtime-outdelay 200 EN=0V –1 0 1 Inputcurrent(EN) µA EN=VI –1 1 6 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 Electrical Characteristics (continued) V =V +1V,I =1mA,EN=0V,C =10µF(overrecommendedoperatingfree-airtemperaturerange,unless I O(typ) O o otherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT TJ=25°C 500 TPS76728 IO=1A mV TJ=−40°Cto125°C 825 TJ=25°C 450 TPS76730 IO=1A mV Dropoutvoltage(1) TJ=−40°Cto125°C 675 TJ=25°C 350 TPS76733 IO=1A mV TJ=−40°Cto125°C 575 TJ=25°C 230 TPS76750 IO=1A mV TJ=−40°Cto125°C 380 (1) INvoltageequalsV (typ)−100mV;TPS76701outputvoltagesetto3.3Vnominalwithexternalresistordivider.TPS76715,TPS76718, O TPS76725,andTPS76727dropoutvoltagelimitedbyinputvoltagerangelimitations(i.e.,TPS76730inputvoltageneedstodropto2.9 Vforpurposeofthistest). VI Vres(1) Vres t VO VIT+(2) VIT+(2) Threshold Voltage Less than 5% of the VIT−(2) output voltage VIT−(2) t RESET Output 200 ms 200 ms Delay Delay Output Output Undefined Undefined t Figure1. TimingDiagram Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 7.6 Typical Characteristics Table1.TableofGraphs FIGURE vsOutputcurrent Figure2,Figure3,Figure4 V Outputvoltage O vsFree-airtemperature Figure5,Figure6,Figure7 Groundcurrent vsFree-airtemperature Figure8,Figure9 Powersupplyripplerejection vsFrequency Figure10 Outputspectralnoisedensity vsFrequency Figure11 Inputvoltage(min) vsOutputvoltage Figure12 Z Outputimpedance vsFrequency Figure13 o V Dropoutvoltage vsFree-airtemperature Figure14 DO Linetransientresponse Figure15,Figure16 Loadtransientresponse Figure17,Figure18 V Outputvoltage vsTime Figure19 O Dropoutvoltage vsInputvoltage Figure20 Equivalentseriesresistance(ESR)(1) vsOutputcurrent Figure21–Figure24 (1) Equivalentseriesresistance(ESR)referstothetotalseriesresistance,includingtheESRofthecapacitor,anyseriesresistanceadded externally,andPWBtraceresistancetoC . o 3.2835 1.4985 3.2830 1.4980 V3.2825 V1.4975 − − Voltage3.2820 Voltage1.4970 Output 3.2815 Output 1.4965 −O3.2810 −O1.4960 V V 3.2805 1.4955 3.2800 1.4950 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 IO−OutputCurrent−A IO−Output Current−A VI=4.3V TA=25°C VI=2.7V TA=25°C Figure2.TPS76733OutputVoltagevsOutputCurrent Figure3.TPS76715OutputVoltagevsOutputCurrent 8 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 2.4960 3.32 2.4955 3.31 2.4950 V V 3.30 − − Output Voltage222...444999443505 Output Voltage 33..2298 IO= 1A IO= 1 mA V−O2.4930 V−O 3.27 2.4925 3.26 2.4920 3.25 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 −60−40 −20 0 20 40 60 80 100 120 140 IO−OutputCurrent−A TA−Free-AirTemperature−°C V =3.5V T =25°C V =4.3V I A I Figure4.TPS76725OutputVoltagevsOutputCurrent Figure5.TPS76733OutputVoltagevsFree-AirTemperature 1.515 2.515 2.510 1.510 V V 2.505 − 1.505 − e e g g ut Volta 1.500 IO= 1A ut Volta 2.500 IO= 1A p p 2.495 Out IO= 1 mA Out −O1.495 −O2.490 IO= 1 mA V V 1.490 2.485 1.485 2.480 −60−40 −20 0 20 40 60 80 100 120 140 −60 −40 −20 0 20 40 60 80 100 120 TA−Free-AirTemperature−°C TA−Free-AirTemperature−°C V =2.7V V =3.5V I I Figure6.TPS76715OutputVoltagevsFree-AirTemperature Figure7.TPS767125OutputVoltagevsFree-Air Temperature 92 100 90 88 95 A 86 A μGround Current− 88874208 IO= 1A IO= 1 mA μGround Current− 9805 IO= 1 mA IOIO= =1 5A00 mA IO= 500 mA 76 80 74 72 75 −60−40 −20 0 20 40 60 80 100 120 140 −60−40 −20 0 20 40 60 80 100 120 140 TA−Free-AirTemperature−°C TA−Free-AirTemperature−°C VI=4.3V VI=2.7V Figure8.TPS76733GroundCurrentvsFree-Air Figure9.TPS76715GroundCurrentvsFree-Air Temperature Temperature Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 90 10−5 B d 80 n− Hz ctio µV wer Supply Ripple Reje 6543200000 ectral Noise Density− 1100−−67 IO= 1A IO= 7 mA Po Sp − 10 ut R p PSR 0 Out −10 10−8 10 100 1k 10k 100k 1M 102 103 104 105 f−Frequency−Hz f−Frequency−Hz VI=4.3V Co=10µF VI=4.3V Co=10µF TA=25°C I =1A T =25°C O A Figure10.TPS76733PowerSupplyRippleRejectionvs Figure11.TPS76733OutputSpectralNoiseDensityvs Frequency Frequency 4 0 TA= 25°C Min)−V TA= 125°C Ωance− IO= 1 mA age ( 3 mped 10−1 Volt TA=−40°C ut I nput 2.7 Outp −I −o VI Z IO= 1A 2 10−2 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 101 102 103 104 105 106 VO−OutputVoltage−V f−Frequency−kHz IO=1A VI=4.3V Co=10µF TA=25°C Figure12.InputVoltage(MIN)vsOutputVoltage Figure13.TPS76733OutputImpedancevsFrequency 103 V − IO= 1A age 3.7 mV 102 ut Volt − np Voltage 101 V−II 2.7 ut V−DropoDO 110−010 IO= 10 mA Change inoltage−mV 100 −V−10 IO= 0 ∆VOutput 10−2 O −60 −40 −20 0 20 40 60 80 100 120 140 0 20 40 60 80 100 120 140 160 180 200 TA−Free-AirTemperature−°C t−Time−μs CO=10µF CO=10µF TA=25°C Figure14.TPS76733DropoutVoltagevsFree-Air Figure15.TPS76715LineTransientResponse Temperature 10 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 100 V V − ∆V−Change inOOutputVoltage−m −55000 V−Input VoltageI 5.3 −100 4.3 A V −Output Current− 0.105 ∆V−Change inOOutputVoltage−m −11000 O I 0 100 200 300 400 500 600 700 800 900 1000 0 20 40 60 80 100 120 140 160 180 200 t−Time−μs t−Time−μs CO=10µF TA=25°C CO=10µF TA=25°C Figure16.TPS76715LoadTransientResponse Figure17.TPS76733LineTransientResponse 100 4 V V nm − ∆V−Change iOutputVoltage− −55000 Output Voltage 321 O −O V −100 0 A − ent 1 V Output Curr 0.05 ble Pulse− 0 − na O E I 0 100 200 300 400 500 600 700 800 9001000 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 t−Time−μs t−Time−ms CO=10µF TA=25°C CO=10µF IO=1A TA=25°C Figure18.TPS76733LoadTransientResponse Figure19.TJPS7633OutputVoltagevsTime(AtStartup) 900 10 Ω 800 − Region of Instability e c mV 700 stan −DropoutVoltage− 546300000000 TA= 25°C TA= 125°C quivalent Series Resi 1 Region of Stability O E VD 200 TA=−40°C SR− E 100 0 0.1 2.5 3 3.5 4 4.5 5 0 200 400 600 800 1000 VI−InputVoltage−V IO−Output Current−mA IO=1A VO=3.3V Co=4.7µF V =4.3A T =25°C I A Figure20.TPS76701DropoutVoltagevsInputVoltage Figure21.TypicalRegionofStability EquivalentSeriesResistancevsOutputCurrent Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 10 10 Ω Ω Equivalent Series Resistance− 1 RegioRneogfioInns toafb Siltiatybility Equivalent Series Resistance− 1 ReRgeigoino no fo Ifn Ssttaabbiilliittyy ESR− ESR− 0.1 0.1 0 200 400 600 800 1000 0 200 400 600 800 1000 IO−Output Current−mA IO−Output Current−mA V =3.3V C =4.7µF V =3.3V C =22µF O o O o V =4.3A T =125°C V =4.3A T =25°C I A I A Figure22.TypicalRegionofStability Figure23.TypicalRegionofStability EquivalentSeriesResistancevsOutputCurrent EquivalentSeriesResistancevsOutputCurrent 10 Ω RegionofInstability − e c n a st si e R s e eri 1 S nt e val Region of Stability ui q E − R S E 0.1 0 200 400 600 800 1000 IO−Output Current−mA V =3.3V C =22µF O o V =4.3A T =125°C I A Figure24.TypicalRegionofStability EquivalentSeriesResistancevsOutputCurrent 8 Parameter Measurement Information To Load VI IN OUT + Co EN RL GND ESR Figure25. TestCircuitforTypicalRegionsofStability(Figure21 throughFigure24)(FixedOutput Options) 12 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 9 Detailed Description 9.1 Overview The TPS767xx features very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (I = I /β). The TPS767xx uses a PMOS transistor to pass current; because B C thegateofthePMOSisvoltagedriven,operatingcurrentislowandinvariableoverthefullloadrange. Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in I to maintain the load. During power up, this translates to B large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS767xxquiescentcurrentremainslowevenwhentheregulatordropsout,eliminatingbothproblems. The TPS767xx family also features a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown featureisnotused, ENshouldbetiedtoground. 9.2 Functional Block Diagram IN EN RESET _ + OUT + 200msDelay R1 _ Vref= 1.1834 V FB/NC R2 GND Externaltothedevice Figure26. AdjustableVersion Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com Functional Block Diagram (continued) IN EN RESET _ + OUT + _ 200 ms Delay R1 Vref= 1.1834 V R2 GND Figure27. Fixed-VoltageVersion 9.3 Feature Description 9.3.1 FB—PinConnection(adjustableversiononly) The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output voltage is sensed through a resistor divider network to close the loop as shown in Figure 28. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. 9.3.2 ResetIndicator The TPS767xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to Figure 1 timingdiagramforstart-upsequence). 9.3.3 RegulatorProtection The TPS767xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS767xx also features internal current limiting and thermal protection. During normal operation, the TPS767xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,careshouldbetakennottoexceedthepowerdissipationratingsofthepackage.Ifthetemperatureofthe device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ),regulatoroperationresumes. 14 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 9.4 Device Functional Modes 9.4.1 MinimumLoadRequirements TheTPS767xxfamilyisstableevenatzeroload;nominimumloadisrequiredforoperation. 9.5 Programming 9.5.1 ProgrammingtheTPS76701AdjustableLDORegulator The output voltage of the TPS76701 adjustable regulator is programmed using an external resistor divider as showninFigure28.Theoutputvoltageiscalculatedusing: æ R1ö V = V ´ 1+ O ref çè R2÷ø (1) Where:f=1.1834Vtyp(theinternalreferencevoltage) Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ tosetthedividercurrentat50 µAandthencalculateR1using: æ V ö R1=ç O -1÷´R2 V è ref ø (2) OUTPUTVOLTAGE TPS76701 PROGRAMMING GUIDE OUTPUT R1 R2 UNIT VI IN RESET Reset Output VOLTAGE 0.1μF 2.5V 33.2 30.1 kΩ ≥1.7V 250 kΩ 3.3 V 53.6 30.1 kΩ EN OUT VO 3.6 V 61.9 30.1 kΩ ≤0.9V R1 Co 4.75 V 90.8 30.1 kΩ FB / NC GND R2 Figure28. TPS76701AdjustableLDORegulatorProgramming Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 10.1 Application Information The TPS767xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V, 3.3 V,and5.0V),andanadjustableregulator,theTPS76701(adjustablefrom1.5Vto5.5V). 10.1.1 ExternalCapacitorRequirements An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS767xx is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transientswithfastrisetimesareanticipated. Like all low dropout regulators, the TPS767xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 10 µF surface-mount ceramic capacitors, including devices from Sprague and Kemet, meettheESRrequirementsstatedabove. 10.2 Typical Application TPS767xx 6 16 RESET VI IN RESET 7 IN 250 kΩ 14 OUT VO C1 5 13 0.1μF EN OUT + Co 10μF GND 3 Figure29. TypicalApplicationCircuit(FixedVersions) 16 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 Typical Application (continued) TPS767xx 6 16 VI IN RESET RESET 7 IN 14 OUT VO 0.1μF 5 13 EN OUT Co(1) + 10μF GND 3 (1)Seeapplicationinformationsectionforcapacitorselectiondetails. Figure30. TypicalApplicationConfiguration(ForFixedOutputOptions) Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17

TPS767 SLVS208J–MAY1999–REVISEDAUGUST2015 www.ti.com 11 Layout 11.1 Power Dissipation and Junction Temperature Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P , and the actual dissipation, P , which must be less than or D(max) D equaltoP . D(max) Themaximum-power-dissipationlimitisdeterminedusingthefollowingequation: T max-T P = J A D(max) R qJA (3) Where: T maxisthemaximumallowablejunctiontemperature. J R is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal SOIC and θJA RθJA32.6°C/Wforthe20-terminalPWPwithnoairflow. T istheambienttemperature. A Theregulatordissipationiscalculatedusing: P =(V -V )´I D I O O (4) Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermalprotectioncircuit. 18 SubmitDocumentationFeedback Copyright©1999–2015,TexasInstrumentsIncorporated

TPS767 www.ti.com SLVS208J–MAY1999–REVISEDAUGUST2015 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table2.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TPS76715 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76718 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76725 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76727 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76728 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76730 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76733 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76750 Clickhere Clickhere Clickhere Clickhere Clickhere TPS76701 Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.3 Trademarks PowerPAD,E2EaretrademarksofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.4 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.5 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©1999–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS76701QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76701 & no Sb/Br) TPS76701QDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76701 & no Sb/Br) TPS76701QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76701 & no Sb/Br) TPS76701QPWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76701 & no Sb/Br) TPS76701QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76701 & no Sb/Br) TPS76701QPWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76701 & no Sb/Br) TPS76715QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76715 & no Sb/Br) TPS76715QDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76715 & no Sb/Br) TPS76715QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76715 & no Sb/Br) TPS76715QPWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76715 & no Sb/Br) TPS76718QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76718 & no Sb/Br) TPS76718QDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76718 & no Sb/Br) X TPS76718QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76718 & no Sb/Br) TPS76718QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76718 & no Sb/Br) TPS76725QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76725 & no Sb/Br) TPS76725QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76725 & no Sb/Br) TPS76725QPWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76725 & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS76725QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76725 & no Sb/Br) TPS76727QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76727 & no Sb/Br) TPS76727QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76727 & no Sb/Br) TPS76728QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76728 & no Sb/Br) TPS76730QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76730 & no Sb/Br) TPS76730QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76730 & no Sb/Br) TPS76730QPWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76730 & no Sb/Br) TPS76730QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76730 & no Sb/Br) TPS76733QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76733 & no Sb/Br) TPS76733QDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76733 & no Sb/Br) TPS76733QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76733 & no Sb/Br) TPS76733QPWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76733 & no Sb/Br) TPS76733QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76733 & no Sb/Br) TPS76733QPWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76733 & no Sb/Br) TPS76750QD ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76750 & no Sb/Br) TPS76750QDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 76750 & no Sb/Br) TPS76750QPWP ACTIVE HTSSOP PWP 20 70 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76750 & no Sb/Br) TPS76750QPWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 PT76750 & no Sb/Br) Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS767 : •Automotive: TPS767-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS76701QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS76701QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS76715QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS76718QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS76718QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS76725QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS76730QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS76733QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS76733QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TPS76750QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS76750QPWPR HTSSOP PWP 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS76701QDR SOIC D 8 2500 350.0 350.0 43.0 TPS76701QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS76715QDR SOIC D 8 2500 350.0 350.0 43.0 TPS76718QDR SOIC D 8 2500 350.0 350.0 43.0 TPS76718QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS76725QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS76730QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS76733QDR SOIC D 8 2500 350.0 350.0 43.0 TPS76733QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS76750QDR SOIC D 8 2500 350.0 350.0 43.0 TPS76750QPWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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