Product Sample & Technical Tools & Support & Folder Buy Documents Software Community TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 TPS54160 1.5-A, 60-V, Step-Down DC/DC Converter with Eco-mode™ 1 Features 3 Description • 3.5Vto60VInputVoltageRange The TPS54160A device is a 60-V, 1.5-A, step down 1 regulator with an integrated high-side MOSFET. • 200-mΩ High-SideMOSFET Current mode control provides simple external • HighEfficiencyatLightLoadswithaPulse compensation and flexible component selection. A SkippingEco-mode™ low ripple pulse skip mode reduces the no load, • TPS54160AhasTighterEnableThresholdThan regulated output supply current to 116 μA. Using the enable pin, shutdown supply current is reduced to 1.3 TPS54160forMoreAccurateUVLOvoltage μA. • AdjustableUVLOVoltageandHysteresis Under voltage lockout is internally set at 2.5 V, but • 116μAOperatingQuiescentCurrent can be increased using the enable pin. The output • 1.3 μAShutdownCurrent voltage startup ramp is controlled by the slow start • 100kHzto2.5MHzSwitchingFrequency pin that can also be configured for • SynchronizestoExternalClock sequencing/tracking. An open drain power good signal indicates the output is within 94% to 107% of • AdjustableSlowStart/Sequencing itsnominalvoltage. • UVandOVPowerGoodOutput A wide switching frequency range allows efficiency • 0.8-VInternalVoltageReference and external component size to be optimized. • MSOP10and3mmx3mmVSONPackagewith Frequency fold back and thermal shutdown protects PowerPAD™ thepartduringanoverloadcondition. • Supportedby WEBBENCH®andSwitcherPro™ DeviceInformation SoftwareTool ORDERNUMBER PACKAGE(PIN) BODYSIZE 2 Applications TPS54160DGQ MSOP(10) 3mmx3mm • 12-V,24-Vand48-VIndustrialandCommercial TPS54160ADGQ LowPowerSystems TPS54160ADRC VSON(10) 3mmx3mm • AftermarketAutoAccessories:Video,GPS, Entertainment 4 Simplified Schematic Figure1. EfficiencyvsLoadCurrent VIN PWRGD 90 TPS54160A 85 80 EN BOOT PH %) 75 ( y nc 70 SS/TR e ci RT/CLK Effi 65 COMP VSENSE 60 V =12V IN GND 55 VOUT=3.3V f =1200kHz SW 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 LoadCurrent(A) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Table of Contents 1 Features.................................................................. 1 8.3 FeatureDescription.................................................13 2 Applications........................................................... 1 8.4 DeviceFunctionalModes........................................30 3 Description............................................................. 1 9 ApplicationandImplementation........................ 31 4 SimplifiedSchematic............................................. 1 9.1 ApplicationInformation............................................31 9.2 TypicalApplication..................................................31 5 RevisionHistory..................................................... 2 10 PowerSupplyRecommendations..................... 42 6 TerminalConfigurationandFunctions................ 4 11 Layout................................................................... 43 7 Specifications......................................................... 5 11.1 LayoutGuidelines.................................................43 7.1 AbsoluteMaximumRatings .....................................5 11.2 LayoutExample....................................................43 7.2 HandlingRatings.......................................................5 12 DeviceandDocumentationSupport................. 44 7.3 RecommendedOperatingConditions.......................6 7.4 ThermalInformation..................................................6 12.1 RelatedLinks........................................................44 7.5 ElectricalCharacteristics...........................................6 12.2 Trademarks...........................................................44 7.6 TypicalCharacteristics..............................................8 12.3 ElectrostaticDischargeCaution............................44 12.4 Glossary................................................................44 8 DetailedDescription............................................ 12 13 Mechanical,Packaging,andOrderable 8.1 Overview.................................................................12 Information........................................................... 44 8.2 FunctionalBlockDiagram.......................................13 5 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionB(January2014)toRevisionC Page • ChangedthedatasheettotheNewTIlayout ....................................................................................................................... 1 • ChangedFeatureFrom:TighterEnableThresholdThanTPS54160...To:TPS54160AhasTighterEnable ThresholdThanTPS54160forMoreAccurateUVLOvoltage............................................................................................... 1 • AddedtheDeviceInformationtable....................................................................................................................................... 1 • DeletedtheOrderingInformationtable ................................................................................................................................. 5 • AddedtheHandlingRatingstable.......................................................................................................................................... 5 • AddedtheRecommendedOperatingConditionstable.......................................................................................................... 6 • ChangedtheEnablethresholdvoltagetoincludevaluesforTPS54160andTPS54160A .................................................. 6 • AddedthePowerSupplyRecommendationssection.......................................................................................................... 42 ChangesfromRevisionA(July2012)toRevisionB Page • AddeddeviceTPS54160........................................................................................................................................................ 1 • DeletedSWIFTfromthedatasheetTitleandFeatures......................................................................................................... 1 2 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 ChangesfromOriginal(May2012)toRevisionA Page • ChangedtextintheDescriptionFrom:"within93%to107%ofitsnominalvoltage."To:"within94%to107%ofits nominalvoltage.".................................................................................................................................................................... 1 • ChangedthevaluesoftheHysteresiscurrentintheElectricalCharacteristicstable............................................................ 6 • ChangedtextintheErrorAmplifiersectionFrom:"thetransconductanceis25μA/V"To:"thetransconductanceis 26μA/V"............................................................................................................................................................................... 15 • ChangedtextintheSlowStartandTrackingPin(SS/TR)sectionFrom:"VINUVLOisexcedded,ENpinpulled below1.25V"To:"VINpinisbelowtheVINUVLO,ENpinpulledbelow1.25V"................................................................ 18 • ChangedStartInputVoltage(risingVIN)voltageFrom:7.25VTo:7.7V........................................................................... 31 • ChangedStartInputVoltage(fallingVIN)voltageFrom:6.25VTo:6.7V.......................................................................... 31 • ChangedEquation29........................................................................................................................................................... 32 • ChangedEquation32........................................................................................................................................................... 33 • Changed7.25Vto7.7Vand6.25Vto6.7VintheUnderVoltageLockOutSetPointsection............................................ 36 • ChangedEquation41andEquation42............................................................................................................................... 36 • ChangedEquation47........................................................................................................................................................... 37 • ChangedEquation49,Equation52,andEquation53......................................................................................................... 38 Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 6 Terminal Configuration and Functions VSON-10 MSOP-10 (TOPVIEW) (TOPVIEW) BOOT 1 10 PH BOOT 1 10 PH VIN 2 9 GND VIN 2 9 GND Thermal Thermal EN 3 8 COMP EN 3 Pad 8 COMP Pad (11) (11) SS/TR 4 7 VSENSE SS/TR 4 7 VSENSE RT/CLK 5 6 PWRGD RT/CLK 5 6 PWRGD TerminalFunctions TERMINAL I/O DESCRIPTION NAME NO. AbootstrapcapacitorisrequiredbetweenBOOTandPH.Ifthevoltageonthiscapacitorisbelowthe BOOT 1 O minimumrequiredbythedevice,theoutputisforcedtoswitchoffuntilthecapacitorisrefreshed. Erroramplifieroutput,andinputtotheoutputswitchcurrentcomparator.Connectfrequencycompensation COMP 8 O componentstothispin. Enablepin,internalpull-upcurrentsource.Pullbelow1.2Vtodisable.Floattoenable.Adjusttheinput EN 3 I undervoltagelockoutwithtworesistors. GND 9 – Ground PH 10 O Thesourceoftheinternalhigh-sidepowerMOSFET. ThermalPad 11 – GNDpinmustbeelectricallyconnectedtotheexposedpadontheprintedcircuitboardforproperoperation. Anopendrainoutput,assertslowifoutputvoltageislowduetothermalshutdown,dropout,over-voltageor PWRGD 6 O ENshutdown. ResistorTimingandExternalClock.Aninternalamplifierholdsthispinatafixedvoltagewhenusingan externalresistortogroundtosettheswitchingfrequency.IfthepinispulledabovethePLLupperthreshold, RT/CLK 5 I amodechangeoccursandthepinbecomesasynchronizationinput.Theinternalamplifierisdisabledand thepinisahighimpedanceclockinputtotheinternalPLL.Ifclockingedgesstop,theinternalamplifierisre- enabledandthemodereturnstoaresistorsetfunction. Slow-startandTracking.Anexternalcapacitorconnectedtothispinsetstheoutputrisetime.Sincethe SS/TR 4 I/O voltageonthispinoverridestheinternalreference,itcanbeusedfortrackingandsequencing. VIN 2 I Inputsupplyvoltage,3.5Vto60V. VSENSE 7 I Invertingnodeofthetransconductance(g )erroramplifier. M 4 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 7 Specifications 7.1 Absolute Maximum Ratings(1) Overoperatingtemperaturerange(unlessotherwisenoted). VALUE UNIT MIN MAX VIN –0.3 65 EN(2) –0.3 5 BOOT 73 VSENSE –0.3 3 Inputvoltage V COMP –0.3 3 PWRGD –0.3 6 SS/TR –0.3 3 RT/CLK –0.3 3.6 BOOT-PH 8 Outputvoltage PH –0.6 65 V PH,10-nsTransient –2 65 VoltageDifference PADtoGND ±200 mV EN 100 μA BOOT 100 mA Sourcecurrent VSENSE 10 μA PH CurrentLimit A RT/CLK 100 μA VIN CurrentLimit A COMP 100 μA Sinkcurrent PWRGD 10 mA SS/TR 200 μA Operatingjunctiontemperature –40 150 °C (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings onlyandfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) SeetheEnableandAdjustingUndervoltageLockoutsectionofthisdatasheetfordetails. 7.2 Handling Ratings MIN MAX UNIT T Storagetemperature –65 150 °C STG HumanBodyModel(HBM)ESDStressVoltage (2) TPS54160 1 kV QSS009-105(JESD22-A114A) V (1) HumanBodyModel(HBM)ESDStressVoltage (2) TPS54160A 2 kV ESD QSS009-105(JESD22-A114A) ChargedDeviceModel(CDM)ESDStressVoltage (3) 500 V QSS009-147(JESD22-C101B.01) (1) Electrostaticdischarge(ESD)tomeasuredevicesensitivityandimmunitytodamagecausedbyassemblylineelectrostaticdischargesin tothedevice. (2) LevellistedaboveisthepassinglevelperANSI,ESDA,andJEDECJS-001.JEDECdocumentJEP155statesthat500-VHBMallows safemanufacturingwithastandardESDcontrolprocess. (3) LevellistedaboveisthepassinglevelperEIA-JEDECJESD22-C101.JEDECdocumentJEP157statesthat250-VCDMallowssafe manufacturingwithastandardESDcontrolprocess. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyinputvoltagerange 3.5 60 V IN V Outputvoltagerange 0.8 58 V O I Outputcurrentrange 0 1.5 A O T JunctionTemperature –40 150 °C J 7.4 Thermal Information TPS54160 THERMALMETRIC(1) TPS54160A UNITS DGQ(10PINS) DRC(10PINS) θ Junction-to-ambientthermalresistance(standardboard) 62.5 40 JA θ Junction-to-case(top)thermalresistance 83 65 JCtop θ Junction-to-boardthermalresistance 28 8 JB °C/W ψ Junction-to-topcharacterizationparameter 1.7 0.6 JT ψ Junction-to-boardcharacterizationparameter 20.1 7.5 JB θ Junction-to-case(bottom)thermalresistance 21 7.8 JCbot (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 7.5 Electrical Characteristics T =–40°Cto150°C,VIN=3.5to60V(unlessotherwisenoted) J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT SUPPLYVOLTAGE(VINPIN) Operatinginputvoltage 3.5 60 V Internalundervoltagelockoutthreshold Novoltagehysteresis,risingandfalling 2.5 V Shutdownsupplycurrent EN=0V,25°C,3.5V≤VIN≤60V 1.3 4 μA Operating:nonswitchingsupplycurrent VSENSE=0.83V,VIN=12V,25°C 116 136 ENABLEANDUVLO(ENPIN) Novoltagehysteresis,risingandfalling,25°C 0.9 1.25 1.55 V Enablethresholdvoltage (TPS54160) Novoltagehysteresis,risingandfalling(TPS54160A) 1.11 1.25 1.36 V Enablethreshold+50mV –3.8 Inputcurrent μA Enablethreshold–50mV –0.9 Hysteresiscurrent 1.91 2.95 3.99 μA VOLTAGEREFERENCE TJ=25°C 0.792 0.8 0.808 Voltagereference V 0.784 0.8 0.816 HIGH-SIDEMOSFET VIN=3.5V,BOOT-PH=3V 300 On-resistance mΩ VIN=12V,BOOT-PH=6V 200 410 ERRORAMPLIFIER Inputcurrent 50 nA Erroramplifiertransconductance(gM) –2μA<I(COMP)<2μA,V(COMP)=1V 97 μMhos Erroramplifiertransconductance(gM) –2μA<I(COMP)<2μA,V(COMP)=1V, 26 μMhos duringslowstart VVSENSE=0.4V Erroramplifierdcgain VVSENSE=0.8V 10,000 V/V Erroramplifierbandwidth 2700 kHz Erroramplifiersource/sink V(COMP)=1V,100-mVoverdrive ±7 μA COMPtoswitchcurrenttransconductance 6 A/V 6 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Electrical Characteristics (continued) T =–40°Cto150°C,VIN=3.5to60V(unlessotherwisenoted) J PARAMETER TESTCONDITIONS MIN TYP MAX UNIT CURRENTLIMIT Currentlimitthreshold VIN=12V,TJ=25°C 1.8 2.7 A THERMALSHUTDOWN Thermalshutdown 182 °C TIMINGRESISTORANDEXTERNALCLOCK(RT/CLKPIN) SwitchingfrequencyrangeusingRTmode 100 2500 kHz fSW Switchingfrequency RT=200kΩ 450 581 720 kHz SwitchingfrequencyrangeusingCLK 300 2200 kHz mode MinimumCLKinputpulsewidth 40 ns RT/CLKhighthreshold 1.9 2.2 V RT/CLKlowthreshold 0.5 0.7 V RT/CLKfallingedgetoPHrisingedge Measuredat500kHzwithRTresistorinseries 60 ns delay PLLlockintime Measuredat500kHz 100 μs SLOWSTARTANDTRACKING(SS/TR) Chargecurrent VSS/TR=0.4V 2 μA SS/TR-to-VSENSEmatching VSS/TR=0.4V 45 mV SS/TR-to-referencecrossover 98%nominal 1.0 V SS/TRdischargecurrent(overload) VSENSE=0V,V(SS/TR)=0.4V 112 μA SS/TRdischargevoltage VSENSE=0V 54 mV POWERGOOD(PWRGDPIN) VSENSEfalling 92% VSENSErising 94% VVSENSE VSENSEthreshold VSENSErising 109% VSENSEfalling 107% Hysteresis VSENSEfalling 2% Outputhighleakage VSENSE=VREF,V(PWRGD)=5.5V,25°C 10 nA Onresistance I(PWRGD)=3mA,VSENSE<0.79V 50 Ω MinimumVINfordefinedoutput V(PWRGD)<0.5V,I(PWRGD)=100μA 0.95 1.5 V Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 7.6 Typical Characteristics W 0.816 m 500 nce - VI= 12 V VI= 12 V a c Drain-Source On-State Resist 213527055 BOOT-PH = 3 V BOOT-PH = 6 V V- Voltage Reference - Vref 000...788900208 ati St N - O 0.784 DS 0 -50 -25 0 25 50 75 100 125 150 R -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure3.VoltageReferencevsJunctionTemperature Figure2.OnResistancevsJunctionTemperature 3.5 610 V= 12 V, V= 12 V I I RT= 200 kW 600 Hz k A 3 cy - 590 nt - uen e q Switch Curr2.5 witching Fre 557800 S - fs 560 2 550 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure4.SwitchCurrentLimitvsJunctionTemperature Figure5.SwitchingFrequencyvsJunctionTemperature 2500 500 V= 12 V, I T = 25°C J Hz 2000 z) 400 k H Frequency - 1500 equency (k 300 witching 1000 ching Fr 200 f- Ss 500 Swit 100 0 0 0 25 50 75 100 125 150 175 200 200 300 400 500 600 700 800 900 1000 1100 1200 RT/CLK - Resistance - kW RT/CLK Resistance (kW) C006 Figure6.SwitchingFrequencyvsRT/CLKResistanceHigh Figure7.SwitchingFrequencyvsRT/CLKResistanceLow FrequencyRange FrequencyRange 8 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Typical Characteristics (continued) 40 150 V= 12 V I V= 12 V I 130 30 110 V V A/ A/ m m m - m - g g 90 20 70 10 50 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure8.EATransconductanceDuringSLOWStartvs Figure9.EATransconductancevsJunctionTemperature JunctionTemperature 1.40 -3.25 V= 12 V VI= 12 V, I VI(EN)=Threshold +50 mV -3.5 V1.30 d - ol A h m EN - Thres1.20 I-(EN)-3.75 -4 1.10 -4.25 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure10.ENPinVoltagevsJunctionTemperature Figure11.ENPinCurrentvsJunctionTemperature -0.8 -1 VI= 12 V, VI= 12 V VI(EN)=Threshold -50 mV -0.85 -1.5 Am Am I-(EN)-0.9 I-(SS/TR) -2 -0.95 -2.5 -1 -3 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure12.ENPinCurrentvsJunctionTemperature Figure13.SS/TRChargeCurrentvsJunctionTemperature Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Typical Characteristics (continued) 120 100 VI= 12 V VI= 12 V, T = 25°C J 80 115 w I-AmI(SS/TR)110 % of Nominal fs 4600 105 20 100 0 -50 -25 0 25 50 75 100 125 150 0 0.2 0.4 0.6 0.8 TJ- Junction Temperature - °C VSENSE- V Figure14.SS/TRDischargeCurrentvsJunction Figure15.SwitchingFrequencyvsVSENSE Temperature 2 2 VI= 12 V TJ= 25°C 1.5 1.5 A A m m I-(VIN) 1 I-(VIN) 1 0.5 0.5 0 0 -50 -25 0 25 50 75 100 125 150 0 10 20 30 40 50 60 TJ- Junction Temperature - °C VI- Input Voltage - V Figure16.ShutdownSupplyCurrentvsJunction Figure17.ShutdownSupplyCurrentvsInputVoltage(V ) in Temperature 140 140 VI= 12 V, TJ= 25oC, VI(VSENSE)= 0.83 V VI(VSENSE)= 0.83 V 130 130 120 120 A A m m I-(VIN) 110 I-(VIN) 110 100 100 90 90 -50 -25 0 25 50 75 100 125 150 0 20 40 60 TJ- Junction Temperature - °C VI- Input Voltage - V Figure18.VINSupplyCurrentvsJunctionTemperature Figure19.VINSupplyCurrentvsInputVoltage 10 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Typical Characteristics (continued) 100 115 VI= 12 V VI= 12 V 80 ef110 VSENSE Rising Vr of % 105 VSENSE Falling WN - 60 old - RDSO 40 GD Thresh 10905 VSENSE Rising R W P 20 90 VSENSE Falling 0 85 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure21.PWRGDThresholdvsJunctionTemperature Figure20.PWRGDOnResistancevsJunctionTemperature 2.5 3 2.3 2.75 V V- I(BOOT-PH) 2 V- VI(VIN) 2.50 1.8 2.25 1.5 2 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 TJ- Junction Temperature - °C TJ- Junction Temperature - °C Figure22.BOOT-PHUVLOvsJunctionTemperature Figure23.InputVoltage(UVLO)vsJunctionTemperature 600 60 V = 0.2 V V =12V (SS/TR) mV) 500 TIJN=25°C 55 VI= 12 V ( d hol 400 50 res mV ageTh 300 Offset - 45 olt 40 V 200 et s 35 Off 100 30 -50 -25 0 25 50 75 100 125 150 0 0 200 400 600 800 TJ- Junction Temperature - °C VoltageSense(mV) Figure25.SS/TRToVSENSEOffsetvsTemperature Figure24.SS/TRToVSENSEOffsetvsVSENSE Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 8 Detailed Description 8.1 Overview The TPS54160A device is a 60-V, 1.5-A, step-down (buck) regulator with an integrated high-side n-channel MOSFET. To improve performance during line and load transients the device implements a constant frequency, current mode control which reduces output capacitance and simplifies external frequency compensation design. The wide switching frequency of 100kHz to 2500kHz allows for efficiency and size optimization when selecting the output filter components. The switching frequency is adjusted using a resistor to ground on the RT/CLK pin. The device has an internal phase lock loop (PLL) on the RT/CLK pin that is used to synchronize the power switchturnontoafallingedgeofanexternalsystemclock. The TPS54160A has a default start up voltage of approximately 2.5V. The EN pin has an internal pull-up current source that can be used to adjust the input voltage under voltage lockout (UVLO) threshold with two external resistors. In addition, the pull up current provides a default condition. When the EN pin is floating the device operates. The operating current is 116 μA when not switching and under no load. When the device is disabled, thesupplycurrentis1.3μA. The integrated 200mΩ high-side MOSFET allows for high efficiency power supply designs capable of delivering 1.5 A of continuous current to a load. The TPS54160A reduces the external component count by integrating the boot recharge diode. The bias voltage for the integrated high-side MOSFET is supplied by a capacitor on the BOOT to PH pin. The boot capacitor voltage is monitored by an UVLO circuit and turns on the high-side MOSFET off when the boot voltage falls below a preset threshold. The TPS54160A can operate at high duty cyclesbecauseofthebootUVLO.Theoutputvoltagecanbesteppeddowntoaslowasthe0.8Vreference. The TPS54160A has a power good comparator (PWRGD) which asserts when the regulated output voltage is less than 92% or greater than 109% of the nominal output voltage. The PWRGD pin is an open drain output which deasserts when the VSENSE pin voltage is between 94% and 107% of the nominal output voltage allowingthepintotransitionhighwhenapull-upresistorisused. The TPS54160A minimizes excessive output overvoltage (OV) transients by taking advantage of the OV power good comparator. When the OV comparator is activated, the high-side MOSFET is turned off and masked from turningonuntiltheoutputvoltageislowerthan107%. The SS/TR (slow start/tracking) pin is used to minimize inrush currents or provide power supply sequencing during power up. A small value capacitor should be coupled to the pin to adjust the slow start time. A resistor dividercanbecoupledtothepinforcriticalpowersupplysequencingrequirements.TheSS/TRpinisdischarged before the output powers up. This discharging ensures a repeatable restart after an over-temperature fault, UVLOfaultoradisabledcondition. The TPS54160A, also, discharges the slow start capacitor during overload conditions with an overload recovery circuit. The overload recovery circuit will slow start the output from the fault voltage to the nominal regulation voltage once a fault condition is removed. A frequency foldback circuit reduces the switching frequency during startupandovercurrentfaultconditionstohelpcontroltheinductorcurrent. 12 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 8.2 Functional Block Diagram PWRGD EN VIN 6 3 2 Shutdown Thermal Shutdown UVLO Enable UV Logic Comparator Shutdown Shutdown Logic OV Enable Threshold Boot Charge Voltage Minimum Boot Reference Clamp UVLO Current Pulse Sense ERROR Skip AMPLIFIER PWM VSENSE 7 Comparator 1 BOOT SS/TR 4 Logic And PWM Latch Shutdown Slope Compensation COMP 8 10PH 11 POWERPAD Frequency Shift Overload Maximum Recovery Clamp Oscillator TPS54160ABlock Diagram 9 GND with PLL 5 RT/CLK 8.3 Feature Description 8.3.1 FixedFrequencyPWMControl The TPS54160A uses an adjustable fixed frequency, peak current mode control. The output voltage is compared through external resistors on the VSENSE pin to an internal voltage reference by an error amplifier which drives the COMP pin. An internal oscillator initiates the turn on of the high-side power switch. The error amplifier output is compared to the high-side power switch current. When the power switch current reaches the level set by the COMP voltage, the power switch is turned off. The COMP pin voltage will increase and decrease as the output current increases and decreases. The device implements a current limit by clamping the COMP pin voltage to a maximumlevel.TheEco-mode™isimplementedwithaminimumclampontheCOMPpin. 8.3.2 SlopeCompensationOutputCurrent The TPS54160A adds a compensating ramp to the switch current signal. This slope compensation prevents sub- harmonicoscillations.Theavailablepeakinductorcurrentremainsconstantoverthefulldutycyclerange. 8.3.3 PulseSkipEco-mode The TPS54160A enters the pulse skip mode when the voltage on the COMP pin is the minimum clamp value. The TPS54160A operates in a pulse skip mode at light load currents to improve efficiency. The peak switch current during the pulse skip mode will be the greater value of 50mA or the peak inductor current that is a function of the minimum on time, input voltage, output voltage and inductance value. When the load current is low and the output voltage is within regulation the device will enter a sleep mode and draw only 116 μA input Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) quiescentcurrent.Whilethedeviceisinsleepmodetheoutputpowerisdeliveredbytheoutputcapacitor.Asthe load current decreases, the time the output capacitor supplies the load current increases and the switching frequency decreases reducing gate drive and switching losses. As the output voltage drops, the TPS54160A wakes up from the sleep mode and the power switch turns on to recharge the output capacitor, see Figure 26. The internal PLL remains operating when in sleep mode. When operating at light load currents in the pulse skip modetheswitchingtransitionsoccursynchronouslywiththeexternalclocksignal. VOUT(ac) IL PH Figure26. PulseSkipModeOperation 8.3.4 BootstrapVoltage(BOOT) TheTPS54160AhasanintegratedbootregulatorandrequiresasmallceramiccapacitorbetweentheBOOTand PHpintoprovidethegatedrivevoltageforthehighsideMOSFET.Thevalueoftheceramiccapacitorshouldbe 0.1 μF. A ceramic capacitor with an X7R or X5R grade dielectric is recommended because of the stable characteristics over temperature and voltage. To improve drop out, the TPS54160A is designed to operate at 100% duty cycle as long as the BOOT to PH pin voltage is greater than 2.1 V. When the voltage from BOOT to PH drops below 2.1 V, the high side MOSFET is turned off using an UVLO circuit allowing for the low side diode to conduct which allows refreshing of the BOOT capacitor. Since the supply current sourced from the BOOT capacitor is low, the high side MOSFET can remain on for more switching cycles than it refreshes, thus, the effectivedutycyclelimitationthatisattributedtothebootregulatorsystemishigh. 8.3.5 LowDropoutOperation The duty cycle during dropout of the regulator will be mainly determined by the voltage drops across the power MOSFET, inductor, low side diode and printed circuit board resistance. During operating conditions in which the input voltage drops, the high side MOSFET can remain on for 100% of the duty cycle to maintain output regulationoruntiltheBOOTtoPHvoltagefallsbelow2.1V. Once the high side is off, the low side diode will conduct and the BOOT capacitor will be recharged. During this boot capacitor recharge time, the inductor current will ramp down until the high side MOSFET turns on. The recharge time is longer than the typical high side off time of previous switching cycles, and thus, the inductor current ripple is larger resulting in more ripple voltage on the output. The recharge time is a function of the input voltage,bootcapacitorvalue,andtheimpedanceoftheinternalbootrechargediode. Attention needs to be taken in maximum duty cycle applications which experience extended time periods without a load current. When the voltage across the BOOT capacitors falls below the 2.1 V threshold in applications that have a difference in the input voltage and output voltage that is less than 3V, the high side MOSFET will be turned off but there is not enough current in the inductor to pull the PH pin down to recharge the boot capacitor. Theregulatorwillnotswitchbecausethebootcapacitorislessthan2.1Vandtheoutputcapacitorwilldecayuntil the difference in the input voltage and output voltage is 2.1 V. At this time the boot under voltage lockout is exceededandthedevicewillswitchuntilthedesiredoutputvoltageisreached. 14 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) The start and stop voltages are shown in Figure 27 and Figure 28. The voltages are plotted versus load current. The start voltage is defined as the input voltage needed to regulate the output within 1%. The stop voltage is definedastheinputvoltageatwhichtheoutputdropsby5%orstopsswitching. 4 5.6 VO= 3.3 V VO= 5 V 3.8 5.4 V- Input Voltage - VI 33..46 SSttaorpt V- Input Voltage - VI 5.52 Start Stop 3.2 4.8 3 4.6 0 0.05 0.10 0.15 0.20 0 0.05 0.10 0.15 0.20 IO- Output Current -A IO- Output Current -A Figure27.3.3VStart/StopVoltage Figure28.5.0VStart/StopVoltage 8.3.6 ErrorAmplifier The TPS54160A has a transconductance amplifier for the error amplifier. The error amplifier compares the VSENSE voltage to the lower of the SS/TR pin voltage or the internal 0.8-V voltage reference. The transconductance (g ) of the error amplifier is 97 μA/V during normal operation. During the slow start operation, M the transconductance is a fraction of the normal operating transconductance. When the voltage of the VSENSE pinisbelow0.8VandthedeviceisregulatingusingtheSS/TRvoltage,thetransconductanceis26 μA/V. The frequency compensation components (capacitor, series resistor and capacitor) are added to the COMP pin toground. 8.3.7 VoltageReference The voltage reference system produces a precise ±2% voltage reference over temperature by scaling the output ofatemperaturestablebandgapcircuit. 8.3.8 AdjustingtheOutputVoltage The output voltage is set with a resistor divider from the output node to the VSENSE pin. It is recommended to use 1% tolerance or better divider resistors. Start with a 10 kΩ for the R2 resistor and use the Equation 1 to calculate R1. To improve efficiency at light loads consider using larger value resistors. If the values are too high, the regulator becomes more susceptible to noise and voltage errors from the VSENSE input current are noticeable. æ(VOUT -0.8V)ö R1=R2´ç ÷ ç 0.8V ÷ è ø (1) 8.3.9 EnableandAdjustingUndervoltageLockout The TPS54160A is disabled when the VIN pin voltage falls below 2.5 V. If an application requires a higher undervoltage lockout (UVLO), use the EN pin as shown in Figure 29 to adjust the input voltage UVLO by using the two external resistors. Though it is not necessary to use the UVLO adjust registers, for operation it is highly recommended to provide consistent power up behavior. The EN pin has an internal pull-up current source, I1, of 0.9μA that provides the default condition of the TPS54160A operating when the EN pin floats. Once the EN pin voltage exceeds 1.25V, an additional 2.9 μA of hysteresis, Ihys, is added. This additional current facilitates input voltage hysteresis. Use Equation 2 to set the external hysteresis for the input voltage. Use Equation 3 to set the inputstartvoltage. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) TPS54160A VIN Ihys I1 R1 0.9mA 2.9mA + R2 EN 1.25 V - Figure29. AdjustableUndervoltageLockout(UVLO) V -V R1= START STOP I HYS (2) V R2= ENA V -V START ENA +I R1 1 (3) Another technique to add input voltage hysteresis is shown in Figure 30. This method may be used, if the resistance values are high from the previous method and a wider voltage hysteresis is needed. The resistor R3 sourcesadditionalhysteresiscurrentintotheENpin. TPS54160A VIN Ihys R1 I1 2.9mA 0.9mA + R2 EN 1.25 V - VOUT R3 Figure30. AddingAdditionalHysteresis V -V R1= START STOP V I + OUT HYS R3 (4) V R2= ENA V -V V START ENA +I - ENA R1 1 R3 (5) Do not place a low-impedance voltage source with greater than 5 V directly on the EN pin. Do not place a capacitor directly on the EN pin if V > 5 V when using a voltage divider to adjust the start and stop voltage. EN The node voltage, (see Figure 31) must remain equal to or less than 5.8 V. The zener diode can sink up to 100 µA. The EN pin voltage can be greater than 5 V if the V voltage source has a high impedance and does not IN sourcemorethan100µAintotheENpin. 16 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) VIN R1 ENA Node 10kohm R2 5.8V Figure31. NodeVoltage Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) 8.3.10 SlowStartandTrackingPin(SS/TR) The TPS54160A effectively uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the power-supply's reference voltage and regulates the output accordingly. A capacitor on the SS/TR pin to ground implements a slow start time. The TPS54160A has an internal pull-up current source of 2μA that charges the external slow start capacitor. The calculations for the slow start time (10% to 90%) are shown in Equation 6. The voltage reference (V ) is 0.8 V and the slow start current (I ) is 2μA. The slow start capacitor should REF SS remainlowerthan0.47μFandgreaterthan0.47nF. CSS(nF)= tSSVR(mEFs()V´I)S´S0(.m8A) (6) At power up, the TPS54160A does not start switching until the slow start pin is discharged to less than 40 mV to ensureaproperpowerup,seeFigure32. Also, during normal operation, the TPS54160A stops switching and the SS/TR must be discharged to 40 mV when the voltage at the VIN pin is below the VIN UVLO, EN pin pulled below 1.25 V, or a thermal shutdown eventoccurs. The VSENSE voltage follows the SS/TR pin voltage with a 45 mV offset up to 85% of the internal voltage reference. When the SS/TR voltage is greater than 85% on the internal reference voltage the offset increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference (see Figure24).TheSS/TRvoltagerampslinearlyuntilclampedat1.7V. EN SS/TR V SENSE VOUT Figure32. OperationofSS/TRPinwhenStarting 8.3.11 OverloadRecoveryCircuit The TPS54160A has an overload recovery (OLR) circuit. The OLR circuit slow starts the output from the overload voltage to the nominal regulation voltage once the fault condition is removed. The OLR circuit discharges the SS/TR pin to a voltage slightly greater than the VSENSE pin voltage using an internal pull down of 100 μA when the error amplifier is changed to a high voltage from a fault condition. When the fault condition is removed,theoutputslow-startsfromthefaultvoltagetonominaloutputvoltage. 18 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) 8.3.12 Sequencing Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD pins. The sequential method can be implemented using an open drain output of a power on reset pin of another device. The sequential method is illustrated in Figure 33 using two TPS54160A devices. The power good is coupled to the EN pin on the TPS54160A which enables the second power supply once the primary supply reaches regulation. If needed, a 1nF ceramic capacitor on the EN pin of the second power supply provides a 1- msstart-updelay.Figure34showstheresultsofFigure33. TPS54160A PWRGD EN EN EN1 SS/TR SS/TR PWRGD1 PWRGD VOUT1 VOUT2 Figure33.SchematicforSequentialStart-Up Figure34.SequentialStartupusingENand Sequence PWRGD Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) TPS54160A 3 EN EN1, EN2 4 SS/TR 6 PWRGD VOUT1 VOUT2 TPS54160A 3 EN 4 SS/TR 6 PWRGD Figure35.SchematicforRatiometricStart-Up Figure36.Ratio-MetricStartupusingCoupled UsingCoupledSS/TRPins SS/TRpins Figure 35 shows a method for ratio-metric start up sequence by connecting the SS/TR pins together. The regulator outputs ramp up to reach regulation at the same time. When calculating the slow start time the pull up currentsourcemustbedoubledinEquation6.Figure36showstheresultsofFigure35. 20 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) TPS54160A EN VOUT1 SS/TR PWRGD TPS54160A EN VOUT2 R1 SS/TR R2 PWRGD R3 R4 Figure37. SchematicforRatiometricandSimultaneousStart-UpSequence Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network of R1 and R2 shown in Figure 37 to the output of the power supply that needs to be tracked or another voltage reference source. Using Equation 7 and Equation 8, the tracking resistors can be calculated to initiate the V OUT2 slightly before, after or at the same time as V . Equation 9 is the voltage difference between V and V OUT1 OUT1 OUT2 atthe95%ofnominaloutputregulation. The ΔV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR to VSENSE offset (V ) in the slow start circuit and the offset created by the pull-up current source (I ) and SS(offset) SS trackingresistors,theV andI areincludedasvariablesintheequations. SS(offset) SS To design a ratio-metric start up in which the V voltage is slightly greater than the V voltage when V OUT2 OUT1 OUT2 reaches regulation, use a negative number in Equation 7 through Equation 9 for ΔV. Equation 9 results in a positivenumberforapplicationswhichtheV isslightlylowerthanV whenV regulationisachieved. OUT2 OUT1 OUT2 Since the SS/TR pin must be pulled below 40 mV before starting after an EN, UVLO or thermal shutdown fault, careful selection of the tracking resistors is needed to ensure the device restarts after a fault. Make sure the calculated R1 value from Equation 7 is greater than the value calculated in Equation 10 to ensure the device can recoverfromafault. As the SS/TR voltage becomes more than 85% of the nominal reference voltage the V becomes larger as SS(offset) the slow start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR pin voltage needs to be greater than 1.3 V for a complete handoff to the internal voltage reference as shown in Figure24. V R1= VOUT2 +DV + SS(offset) V I REF SS (7) V ´R1 R2= REF V +DV-V OUT2 REF (8) DV = V -V OUT1 OUT2 (9) Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) R1>2800´V -180´DV OUT1 (10) EN EN VOUT1 VOUT1 VOUT2 VOUT2 Figure38.RatiometricStartupwithV LeadingV Figure39.RatiometricStartupwithV LeadingV OUT2 OUT1 OUT1 OUT2 EN VOUT1 VOUT2 Figure40.SimultaneousStartupWithTrackingResistor 22 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) 8.3.13 ConstantSwitchingFrequencyandTimingResistor(RT/CLKPin) The switching frequency of the TPS54160A is adjustable over a wide range from approximately 100kHz to 2500kHz by placing a resistor on the RT/CLK pin. The RT/CLK pin voltage is typically 0.5V and must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given switching frequency, use Equation 11 or the curves in Figure 41 or Figure 42. To reduce the solution size one would typically set the switching frequency as high as possible, but tradeoffs of the supply efficiency, maximum input voltageandminimumcontrollableontimeshouldbeconsidered. Theminimumcontrollableontimeistypically130nsandlimitsthemaximumoperatinginputvoltage. The maximum switching frequency is also limited by the frequency shift circuit. More discussion on the details of themaximumswitchingfrequencyislocatedbelow. 206033 RRT(kW)= 1.0888 f (kHz) SW (11) 2500 500 V= 12 V, I T = 25°C J Hz 2000 z) 400 k H Frequency - 1500 equency (k 300 witching 1000 ching Fr 200 f- Ss 500 Swit 100 0 0 0 25 50 75 100 125 150 175 200 200 300 400 500 600 700 800 900 1000 1100 1200 RT/CLK - Clock Resistance - kW RT/CLK Resistance (kW) Figure41.SwitchingFrequencyvsRT/CLKResistance C006 Figure42.SwitchingFrequencyvsRT/CLKResistance HighFrequencyRange LowFrequencyRange 8.3.14 OvercurrentProtectionandFrequencyShift The TPS54160A implements current mode control which uses the COMP pin voltage to turn off the high-side MOSFET on a cycle by cycle basis. Each cycle the switch current and COMP pin voltage are compared, when the peak switch current intersects the COMP voltage, the high-side switch is turned off. During overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP pin high, increasing theswitchcurrent.Theerroramplifieroutputisclampedinternally,whichfunctionsasaswitchcurrentlimit. To increase the maximum operating switching frequency at high input voltages the TPS54160A implements a frequency shift. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 to 0.8 volts on VSENSEpin. The device implements a digital frequency shift to enable synchronizing to an external clock during normal startup and fault conditions. Since the device can only divide the switching frequency by 8, there is a maximum inputvoltagelimitinwhichthedeviceoperatesandstillhavefrequencyshiftprotection. Duringshort-circuitevents(particularlywithhighinputvoltageapplications),thecontrolloophasafiniteminimum controllable on time and the output has a low voltage. During the switch on time, the inductor current ramps to the peak current limit because of the high input voltage and minimum on time. During the switch off time, the inductor would normally not have enough off time and output voltage for the inductor to ramp down by the ramp upamount.Thefrequencyshifteffectivelyincreasestheofftimeallowingthecurrenttorampdown. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) 8.3.15 SelectingtheSwitchingFrequency The switching frequency that is selected should be the lower value of the two equations, Equation 12 and Equation13.Equation12isthemaximumswitchingfrequencylimitationsetbytheminimumcontrollableontime. Settingtheswitchingfrequencyabovethisvaluecausestheregulatortoskipswitchingpulses. Equation 13 is the maximum switching frequency limit set by the frequency shift protection. To have adequate output short circuit protection at high input voltages, the switching frequency should be set to be less than the f frequency. In Equation 13, to calculate the maximum switching frequency, consider that the output SW(maxshift) voltage decreases from the nominal voltage to 0 V, the f integer increases from 1 to 8 corresponding to the DIV frequencyshift. In Figure 43, the solid line illustrates a typical safe operating area regarding frequency shift and assumes the output voltage is 0 V, and the resistance of the inductor is 0.1Ω, FET on-resistance of 0.2 Ω and the diode voltage drop is 0.5 V. The dashed line is the maximum switching frequency to avoid pulse skipping. Enter these equations in a spreadsheet or other software or use the SwitcherPro design software to determine the switching frequency. æ ö 1 I ´R +V +V f = ´ç L dc OUT d ÷ SW(maxskip) t çV -I ´R +V ÷ ON è IN L DS(on) d ø (12) fSWshift = fDIV ´æçIL´Rdc +VOUT(sc)+Vd ö÷ tON ç VIN-IL´RDS(on)+Vd ÷ è ø (13) I inductorcurrent L R inductorresistance dc V maximuminputvoltage IN V outputvoltage OUT V outputvoltageduringshort OUT(sc) Vd diodevoltagedrop R switchonresistance DS(on) t controllableontime ON ƒ frequencydivideequals(1,2,4,or8) DIV 2500 V = 3.3 V O kHz 2000 Shift y - c n ue 1500 q e Fr Skip g n hi 1000 c wit S - fs 500 0 10 20 30 40 50 60 VI- Input Voltage - V Figure43. MaximumSwitchingFrequencyvs.InputVoltage 24 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) 8.3.16 HowtoInterfacetoRT/CLKPin The RT/CLK pin can be used to synchronize the regulator to an external system clock. To implement the synchronization feature connect a square wave to the RT/CLK pin through the circuit network shown in Figure 44. The square wave amplitude must transition lower than 0.5V and higher than 2.2V on the RT/CLK pin and have an on time greater than 40 ns and an off time greater than 40 ns. The synchronization frequency range is 300 kHz to 2200 kHz. The rising edge of the PH is synchronized to the falling edge of RT/CLK pin signal. The external synchronization circuit should be designed in such a way that the device has the default frequency set resistor connected from the RT/CLK pin to ground should the synchronization signal turn off. It is recommended to use a frequency set resistor connected as shown in Figure 44 through a 50Ω resistor to ground. The resistor should set the switching frequency close to the external CLK frequency. It is recommended to ac couple the synchronization signal through a 10 pF ceramic capacitor to RT/CLK pin and a 4kΩ series resistor. The series resistor reduces PH jitter in heavy load applications when synchronizing to an external clock and in applications which transition from synchronizing to RT mode. The first time the CLK is pulled above the CLK threshold the device switches from the RT resistor frequency to PLL mode. The internal 0.5V voltage source is removed and the CLK pin becomes high impedance as the PLL starts to lock onto the external signal. Since there is a PLL on the regulator the switching frequency can be higher or lower than the frequency set with the external resistor. The device transitions from the resistor mode to the PLL mode and then will increase or decrease the switching frequencyuntilthePLLlocksontotheCLKfrequencywithin100microseconds. When the device transitions from the PLL to resistor mode the switching frequency will slow down from the CLK frequency to 150 kHz, then reapply the 0.5V voltage and the resistor will then set the switching frequency. The switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 to 0.8 volts on VSENSE pin. The device implements a digital frequency shift to enable synchronizing to an external clock during normal startup and fault conditions. Figure 45, Figure 46 and Figure 47 show the device synchronized to an external system clockincontinuousconductionmode(ccm)discontinuousconduction(dcm)andpulseskipmode(psm). TPS54160A 10 pF 4 kW PLL R fset EXT RT/CLK Clock 50W Source Figure44. SynchronizingtoaSystemClock Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) EXT EXT VOUT IL PH PH IL Figure45.PlotofSynchronizinginCCM Figure46.PlotofSynchronizinginDCM EXT IL PH Figure47.PlotofSynchronizinginPSM 8.3.17 PowerGood(PWRGDPin) The PWRGD pin is an open drain output. Once the VSENSE pin is between 94% and 107% of the internal voltage reference the PWRGD pin is de-asserted and the pin floats. It is recommended to use a pull-up resistor between the values of 10 and 100kΩ to a voltage source that is 5.5V or less. The PWRGD is in a defined state once the VIN input voltage is greater than 1.5V but with reduced current sinking capability. The PWRGD will achievefullcurrentsinkingcapabilityasVINinputvoltageapproaches3V. ThePWRGDpinispulledlowwhentheVSENSEislowerthan92%orgreaterthan109%ofthenominalinternal reference voltage. Also, the PWRGD is pulled low, if the UVLO or thermal shutdown are asserted or the EN pin pulledlow. 26 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) 8.3.18 OvervoltageTransientProtection The TPS54160A incorporates an overvoltage transient protection (OVTP) circuit to minimize voltage overshoot when recovering from output fault conditions or strong unload transients on power supply designs with low value output capacitance. For example, when the power supply output is overloaded the error amplifier compares the actual output voltage to the internal reference voltage. If the VSENSE pin voltage is lower than the internal reference voltage for a considerable time, the output of the error amplifier will respond by clamping the error amplifier output to a high voltage. Thus, requesting the maximum output current. Once the condition is removed, the regulator output rises and the error amplifier output transitions to the steady state duty cycle. In some applications, the power supply output voltage can respond faster than the error amplifier output can respond, this actuality leads to the possibility of an output overshoot. The OVTP feature minimizes the output overshoot, when using a low value output capacitor, by implementing a circuit to compare the VSENSE pin voltage to OVTP threshold which is 109% of the internal voltage reference. If the VSENSE pin voltage is greater than the OVTP threshold, the high-side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the VSENSE voltage drops lower than the OVTP threshold, the high-side MOSFET is allowed toturnonatthenextclockcycle. 8.3.19 ThermalShutdown The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 182°C. The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal trip threshold. Once the die temperature decreases below 182°C, the device reinitiates the power up sequence bydischargingtheSS/TRpin. 8.3.20 SmallSignalModelforLoopResponse Figure 48 shows an equivalent model for the TPS54160A control loop which can be modeled in a circuit simulation program to check frequency response and dynamic load response. The error amplifier is a transconductance amplifier with a gm of 97 μA/V. The error amplifier can be modeled using an ideal voltage EA controlled current source. The resistor R and capacitor C model the open loop gain and frequency response of O O the amplifier. The 1mV ac voltage source between the nodes a and b effectively breaks the control loop for the frequencyresponsemeasurements.Plottingc/ashowsthesmallsignalresponseofthefrequencycompensation. Plotting a/b shows the small signal response of the overall loop. The dynamic loop response can be checked by replacing R with a current source with the appropriate load step amplitude and step rate in a time domain L analysis.Thisequivalentmodelisonlyvalidforcontinuousconductionmodedesigns. PH Power Stage VO gmps6A/V a b R1 RESR COMP RL c 0.8 V VSENSE COUT R3 CO RO gmea C2 97mA/V R2 C1 Figure48. SmallSignalModelforLoopResponse Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) 8.3.21 SimpleSmallSignalModelforPeakCurrentModeControl Figure 49 describes a simple small signal model that can be used to understand how to design the frequency compensation. The TPS54160A power stage can be approximated to a voltage-controlled current source (duty cycle modulator) supplying current to the output capacitor and load resistor. The control to output transfer function is shown in Equation 14 and consists of a dc gain, one dominant pole, and one ESR zero. The quotient of the change in switch current and the change in COMP pin voltage (node c in Figure 48) is the power stage transconductance. The gm for the TPS54160A is 6 A/V. The low-frequency gain of the power stage frequency PS responseistheproductofthetransconductanceandtheloadresistanceasshowninEquation15. Astheloadcurrentincreasesanddecreases,thelow-frequencygaindecreasesandincreases,respectively.This variation with the load may seem problematic at first glance, but fortunately the dominant pole moves with the load current (see Equation 16). The combined effect is highlighted by the dashed line in the right half of Figure 49. As the load current decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same for the varying load conditions which makes it easier to design the frequency compensation. The type of output capacitor chosen determines whether the ESR zero has a profound effect on the frequency compensation design. Using high ESR aluminum electrolytic capacitors may reduce the number frequency compensation components needed to stabilize the overall loop because the phase margin increases fromtheESRzeroatthelowerfrequencies(seeEquation17). VO VC Adc RESR fp RL gmps COUT fz Figure49. SimpleSmallSignalModelandFrequencyResponseforPeakCurrentModeControl æ s ö ç1+ ÷ VOUT = Adc´è 2p´ fZ ø V æ s ö C ç1+ ÷ è 2p´ fP ø (14) Adc=gm ´ R ps L (15) 1 fP = C ´R ´2p OUT L (16) 1 fZ = C ´R ´2p OUT ESR (17) 28 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 Feature Description (continued) 8.3.22 SmallSignalModelforFrequencyCompensation The TPS54160A uses a transconductance amplifier for the error amplifier and readily supports three of the commonly-used frequency compensation circuits. Compensation circuits Type 2A, Type 2B, and Type 1 are shown in Figure 50. Type 2 circuits most likely implemented in high bandwidth power-supply designs using low ESR output capacitors. The Type 1 circuit is used with power-supply designs with high-ESR aluminum electrolytic or tantalum capacitors.. Equation 18 and Equation 19 show how to relate the frequency response of theamplifiertothesmallsignalmodelinFigure50.Theopen-loopgainandbandwidtharemodeledusingtheR O and C shown in Figure 50. See the application section for a design example using a Type 2A network with a O lowESRoutputcapacitor. Equation 18 through Equation 27 are provided as a reference for those who prefer to compensate using the preferred methods. Those who prefer to use prescribed method use the method outlined in the application sectionoruseswitchedinformation. V O R1 VSENSE gm Type 2A Type 2B Type 1 ea COMP Vref R3 C2 R3 R2 RO CO C2 C1 C1 Figure50. TypesofFrequencyCompensation Aol P1 A0 Z1 P2 A1 BW Figure51. FrequencyResponseoftheType2AandType2BFrequencyCompensation Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Feature Description (continued) Aol(V/V) Ro= gm ea (18) gm C = ea OUT 2p ´ BW (Hz) (19) æ s ö ç1+ ÷ è 2p´ fZ1ø EA = A0´ æ s ö æ s ö ç1+ ÷´ç1+ ÷ è 2p´ fP1ø è 2p´ fP2 ø (20) R2 A0=gm ´ Ro ´ ea R1+R2 (21) R2 A1=gm ´ Ro||R3 ´ ea R1+R2 (22) 1 P1= 2p´Ro´C1 (23) 1 Z1= 2p´R3´C1 (24) 1 P2= type2a 2p ´ R3||Ro ´ (C2+Co) (25) 1 P2= type2b 2p ´ R3||Ro ´ Co (26) 1 P2 = type 1 2p ´ Ro ´ (C2 + Co) (27) 8.4 Device Functional Modes 8.4.1 OperationwithV <3.5V(MinimumV ) IN IN Thedeviceisrecommendedtooperatewithinputvoltagesabove3.5V.ThetypicalVINUVLOthresholdis2.5V and the device may operate at input voltages down to the UVLO voltage. At input voltages below the actual UVLO voltage, the device will not switch. The PWRGD output will be controlled once V is above 1.5 V IN maximum.IfENisexternallypulleduptoV orleftfloating,whenVINpassestheUVLOthresholdthedevicewill IN become active. Switching is enabled the soft start sequence is initiated. The TPS54160 will start at the soft start timedeterminedbytheexternalsoftstartcapacitorattheSS/TRpin. 8.4.2 OperationwithENControl The enable threshold voltage is 1.25 V typical. With EN held below that voltage the device is disabled and switching is inhibited even if V is above its UVLO threshold. The IC quiescent current is reduced in this state. If IN the EN voltage is increased above the threshold while V is above its UVLO threshold, the device becomes IN active.Switchingisenabled,andthesoftstartsequenceisinitiated.TheTPS54160willstartatthesoftstarttime determinedbytheexternalslowstartcapacitorattheSS/TRpin. 30 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 9 Application and Implementation 9.1 Application Information TPS5426x devices are part of a family of non-synchronous, step-down converters with an integrated high-side FET and 100% duty cycle capability. Idea applications are 12-V, 24-V and 48-V industrial and commercial low powersystems.AftermarketAutoAccessories:Video,GPS,Entertainment 9.2 Typical Application L1 10mH C1 0.1mF 3.3 V at 1.5A U1 D1 + COUT TPS54160ADGQ B220A 47mF/6.3 V 8 - 18 V BOOT PH VIN GND C2 C3 C4 R3 EN COMP 2.2mF 2.2mF 0.1mF 332 kW RSTS//CTLRKPwPdPWVRSGNDS 6.8 CpFF 7R6C.8 kW 3R11.6 kW CSS RT R4 0.01mF 90.9 kW CC R2 61.9 kW 2700 pF 10 kW Figure52. HighFrequency,3.3VOutputPowerSupplyDesignwithAdjustedUVLO. 9.2.1 DesignRequirements This example details the design of a high frequency switching regulator design using ceramic output capacitors. Afewparametersmustbeknowninordertostartthedesignprocess.Theseparametersaretypicallydetermined atthesystemlevel.Forthisexample,wewillstartwiththefollowingknownparameters: Table1.DesignParameters DESIGNPARAMETER EXAMPLEVALUE OutputVoltage 3.3V TransientResponse0to1.5Aloadstep ΔV =4% OUT MaximumOutputCurrent 1.5A InputVoltage 12Vnom.8Vto18V OutputVoltageRipple <33mV pp StartInputVoltage(risingVIN) 7.7V StopInputVoltage(fallingVIN) 6.7V 9.2.2 DetailedDesignProcedures 9.2.2.1 SelectingtheSwitchingFrequency The first step is to decide on a switching frequency for the regulator. Typically, the user will want to choose the highest switching frequency possible since this will produce the smallest solution size. The high switching frequency allows for lower valued inductors and smaller output capacitors compared to a power supply that switchesatalowerfrequency.Theswitchingfrequencythatcanbeselectedislimitedbytheminimumon-timeof theinternalpowerswitch,theinputvoltageandtheoutputvoltageandthefrequencyshiftlimitation. Equation 12 and Equation 13 must be used to find the maximum switching frequency for the regulator, choose the lower value of the two equations. Switching frequencies higher than these values will result in pulse skipping orthelackofovercurrentprotectionduringashortcircuit. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com The typical minimum on time, t , is 130 ns for the TPS54160A. For this example, the output voltage is 3.3 V onmin and the maximum input voltage is 18 V, which allows for a maximum switch frequency up to 1600 kHz when including the inductor resistance, on resistance and diode voltage in Equation 12. To ensure overcurrent runaway is not a concern during short circuits in your design use Equation 13 or the solid curve in Figure 43 to determine the maximum switching frequency. With a maximum input voltage of 20 V, for some margin above 18 V, assuming a diode voltage of 0.5 V, inductor resistance of 100 mΩ, switch resistance of 200mΩ, a current limit valueof2.7A,themaximumswitchingfrequencyisapproximately2500kHz. Choosing the lower of the two values and adding some margin a switching frequency of 1200 kHz is used. To determinethetimingresistanceforagivenswitchingfrequency,useEquation11orthecurveinFigure41. TheswitchingfrequencyissetbyresistorR showninFigure52. t 9.2.2.2 OutputInductorSelection(L ) O Tocalculatetheminimumvalueoftheoutputinductor,useEquation28. K isacoefficientthatrepresentstheamountofinductorripplecurrentrelativetothemaximumoutputcurrent. IND The inductor ripple current will be filtered by the output capacitor. Therefore, choosing high inductor ripple currents will impact the selection of the output capacitor since the output capacitor must have a ripple current rating equal to or greater than the inductor ripple current. In general, the inductor ripple value is at the discretion ofthedesigner;however,thefollowingguidelinesmaybeused. For designs using low ESR output capacitors such as ceramics, a value as high as K = 0.3 may be used. IND When using higher ESR output capacitors, K = 0.2 yields better results. Since the inductor ripple current is IND part of the PWM control system, the inductor ripple current should always be greater than 100 mA for dependable operation. In a wide input voltage regulator, it is best to choose an inductor ripple current on the larger side. This allows the inductor to still have a measurable ripple current with the input voltage at its minimum. For this design example, use K = 0.2 and the minimum inductor value is calculated to be 7.6μH. For this IND design, a nearest standard value was chosen: 10μH. For the output filter inductor, it is important that the RMS current and saturation current ratings not be exceeded. The RMS and peak inductor current can be found from Equation30andEquation31. For this design, the RMS inductor current is 1.506 A and the peak inductor current is 1.62 A. The chosen inductorisaMSS6132-103.Ithasasaturationcurrentratingof1.64AandanRMScurrentratingof1.9A. As the equation set demonstrates, lower ripple currents will reduce the output voltage ripple of the regulator but will require a larger value of inductance. Selecting higher ripple currents will increase the output voltage ripple of theregulatorbutallowforalowerinductancevalue. The current flowing through the inductor is the inductor ripple current plus the output current. During power up, faults or transient load conditions, the inductor current can increase above the calculated peak inductor current level calculated above. In transient conditions, the inductor current can increase up to the switch current limit of the device. For this reason, the most conservative approach is to specify an inductor with a saturation current ratingequaltoorgreaterthantheswitchcurrentlimitratherthanthepeakinductorcurrent. L = VIN(max)-VOUT ´ VOUT O(min) IOUT´KIND VIN(max)´ fSW (28) V ´(V -V ) OUT IN(max) OUT I = RIPPLE V ´L ´ f IN(max) O SW (29) 2 2 1 æçVOUT´(VIN(max)-VOUT)ö÷ IL(rms)= (IOUT) +12´çç VIN(max)´LO´ fSW ÷÷ è ø (30) I I =I + RIPPLE L(peak) OUT 2 (31) 32 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 9.2.2.3 OutputCapacitor There are three primary considerations for selecting the value of the output capacitor. The output capacitor will determine the modulator pole, the output voltage ripple, and how the regulators responds to a large change in loadcurrent.Theoutputcapacitanceneedstobeselectedbasedonthemorestringentofthesethreecriteria. The desired response to a large change in the load current is the first criteria. The output capacitor needs to supply the load with current when the regulator can not. This situation would occur if there are desired hold-up times for the regulator where the output capacitor must hold the output voltage above a certain level for a specified amount of time after the input power is removed. The regulator also will temporarily not be able to supply sufficient output current if there is a large, fast increase in the current needs of the load such as transitioning from no load to a full load. The regulator usually needs two or more clock cycles for the control loop to see the change in load current and output voltage and adjust the duty cycle to react to the change. The output capacitor must be sized to supply the extra current to the load until the control loop responds to the load change. The output capacitance must be large enough to supply the difference in current for twoclock cycles while only allowing a tolerable amount of droop in the output voltage. Equation 32 shows the minimum output capacitance necessarytoaccomplishthis. Where ΔI is the change in output current, ƒsw is the regulators switching frequency and ΔVout is the OUT allowable change in the output voltage. For this example, the transient load response is specified as a 4% change in V for a load step from 0 A (no load) to 1.5 A (full load). For this example, ΔI = 1.5-0 = 1.5 A and OUT OUT ΔV = 0.04 × 3.3 = 0.132 V. Using these numbers gives a minimum capacitance of 18.9 μF. This value does OUT not take the ESR of the output capacitor into account in the output voltage change. For ceramic capacitors, the ESR is usually small enough to ignore in this calculation. Aluminum electrolytic and tantalum capacitors have higherESRthatshouldbetakenintoaccount. The catch diode of the regulator cannot sink current so any stored energy in the inductor produces an output voltage overshoot when the load current rapidly decreases, see Figure 53. The output capacitor must also be sized to absorb energy stored in the inductor when transitioning from a high load current to a lower load current. The excess energy that gets stored in the output capacitor increases the voltage on the capacitor. The capacitor must be sized to maintain the desired output voltage during these transient periods. Equation 33 is used to calculatetheminimumcapacitancetokeeptheoutputvoltageovershoottoadesiredvalue.WhereListhevalue of the inductor, I is the output current under heavy load, I is the output under light load, Vf is the final peak OH OL output voltage, and Vi is the initial capacitor voltage. For this example, the worst case load step will be from 1.5 A to 0 A. The output voltage increases during this load transition and the stated maximum in our specification is 4% of the output voltage. This will make Vf = 1.04 × 3.3 = 3.432. Vi is the initial capacitor voltage which is the nominaloutputvoltageof3.3V.UsingthesenumbersinEquation33yieldsaminimumcapacitanceof25.3 μF. Equation 34 calculates the minimum output capacitance needed to meet the output voltage ripple specification. Where f is the switching frequency, V is the maximum allowable output voltage ripple, and I is the SW OUT(ripple) ripple inductorripplecurrent.Equation34yields0.7 μF. Equation 35 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple specification.Equation35indicatestheESRshouldbelessthan147mΩ. The most stringent criteria for the output capacitor is 25.3 μF of capacitance to keep the output voltage in regulationduringanunloadtransient. Additional capacitance de-ratings for aging, temperature and dc bias should be factored in which increases this minimumvalue.Forthisexample,a47μF6.3VX7Rceramiccapacitorwith5mΩ ofESRisused. Capacitors generally have limits to the amount of ripple current they can handle without failing or producing excess heat. An output capacitor that can support the inductor ripple current must be specified. Some capacitor datasheetsspecifytheRootMeanSquare(RMS)valueofthemaximumripplecurrent.Equation36 canbeused to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 36 yields 64.8mA. 2´DI C > OUT OUT fSW ´DVOUT (32) ( 2 2) (IOH) -(IOL) COUT >LO´ ( 2 2) (Vf) -(Vi) (33) Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 1 1 C > ´ OUT 8´ fSW æVOUT(ripple)ö ç ÷ ç I ÷ è RIPPLE ø (34) V OUT(ripple) R = ESR I RIPPLE (35) ( ) V ´ V -V OUT IN(max) OUT I = COUT(rms) 12´V ´L ´ f IN(max) O SW (36) 9.2.2.4 CatchDiode The TPS54160A requires an external catch diode between the PH pin and GND. The selected diode must have a reverse voltage rating equal to or greater than Vinmax. The peak current rating of the diode must be greater than the maximum inductor current. The diode should also have a low forward voltage. Schottky diodes are typically a good choice for the catch diode due to their low forward voltage. The lower the forward voltage of the diode,thehighertheefficiencyoftheregulator. Typically, the higher the voltage and current ratings the diode has, the higher the forward voltage will be. Since the design example has an input voltage up to 18 V, a diode with a minimum of 20V reverse voltage will be selected. For the example design, the B220A Schottky diode is selected for its lower forward voltage and it comes in a largerpackagesizewhichhasgoodthermalcharacteristicsoversmalldevices.Thetypicalforwardvoltageofthe B220Ais0.50V. The diode must also be selected with an appropriate power rating. The diode conducts the output current during the off-time of the internal power switch. The off-time of the internal switch is a function of the maximum input voltage, the output voltage, and the switching frequency. The output current during the off-time is multiplied by the forward voltage of the diode which equals the conduction losses of the diode. At higher switch frequencies, the ac losses of the diode need to be taken into account. The ac losses of the diode are due to the charging and discharging of the junction capacitance and reverse recovery. Equation 37 is used to calculate the total power dissipation,conductionlossesplusaclosses,ofthediode. The B220A has a junction capacitance of 120pF. Using Equation 37, the selected diode will dissipate 0.632 W. This power dissipation, depending on mounting techniques, should produce a 16°C temperature rise in the diode whentheinputvoltageis18Vandtheloadcurrentis1.5A. If the power supply spends a significant amount of time at light load currents or in sleep mode consider using a diodewhichhasalowleakagecurrentandslightlyhigherforwardvoltagedrop. ( ) VIN(max)-VOUT ´ IOUT´Vfd Cj´ fSW ´(VIN+Vfd)2 P = + D V 2 IN(max) (37) 9.2.2.5 InputCapacitor The TPS54160A requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 3 μF of effective capacitance and in some applications a bulk capacitance. The effective capacitance includes any dc bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitormustalsohavearipplecurrentratinggreaterthanthemaximuminputcurrentrippleoftheTPS54160A. TheinputripplecurrentcanbecalculatedusingEquation38. The value of a ceramic capacitor varies significantly over temperature and the amount of dc bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the dc bias taken into account. The capacitance value of a capacitor decreasesasthedcbiasacrossacapacitorincreases. 34 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 For this example design, a ceramic capacitor with at least a 20 V voltage rating is required to support the maximum input voltage. Common standard ceramic capacitor voltage ratings include 4 V, 6.3 V, 10 V, 16 V, 25 V, 50 V or 100 V, so a 25 V capacitor should be selected. For this example, two 2.2 μF, 25 V capacitors in parallel have been selected. Table 2 shows a selection of high voltage capacitors. The input capacitance value determinestheinputripplevoltageoftheregulator.TheinputvoltageripplecanbecalculatedusingEquation39. Usingthedesignexamplevalues • I =1.5A OUT(max) • C =4.4μF IN • ƒ =1200kHz SW yieldsaninputvoltagerippleof71mVandarmsinputripplecurrentof0.701A. ( ) V VIN(min)-VOUT ICI(rms)=IOUT´ V OUT ´ V IN(min) IN(min) (38) I ´0.25 OUT(max) DVIN = CIN´ fSW (39) Table2.CapacitorTypes VALUE(μF) EIASize VOLTAGE(V) DIALECTRIC COMMENTS 1.0to2.2 100 1210 GRM32series 1.0to4.7 50 1.0 100 1206 GRM31series 1.0to2.2 50 1.0101.8 50 2220 1.0to1.2 100 VJX7Rseries 1.0to3.9 50 2225 1.0to1.8 100 X7R 1.0to2.2 100 1812 CseriesC4532 1.5to6.8 50 1.0.to2.2 100 1210 CseriesC3225 1.0to3.3 50 1.0to4.7 50 1210 1.0 100 X7Rdielectricseries 1.0to4.7 50 1812 1.0to2.2 100 9.2.2.6 SlowStartCapacitor The slow start capacitor determines the minimum amount of time it will take for the output voltage to reach its nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This is also used if the output capacitance is large and would require large amounts of current to quickly charge the capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the TPS54160A reach the current limit or excessive current draw from the input power supply may cause the input voltagerailtosag.Limitingtheoutputvoltageslewratesolvesbothoftheseproblems. The slow start time must be long enough to allow the regulator to charge the output capacitor up to the output voltage without drawing excessive current. Equation 40 can be used to find the minimum slow start time, tss, necessary to charge the output capacitor, Cout, from 10% to 90% of the output voltage, Vout, with an average slow start current of Issavg. In the example, to charge the 47μF output capacitor up to 3.3V while only allowing theaverageinputcurrenttobe0.125Awouldrequirea1msslowstarttime. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com Once the slow start time is known, the slow start capacitor value can be calculated using Equation 6. For the example circuit, the slow start time is not too critical since the output capacitor value is 47μF which does not require much current to charge to 3.3V. The example circuit has the slow start time set to an arbitrary value of 1mswhichrequiresa3.3nFcapacitor. C ´V ´0.8 t > OUT OUT SS I SS(avg) (40) 9.2.2.7 BootstrapCapacitorSelection A 0.1-μF ceramic capacitor must be connected between the BOOT and PH pins for proper operation. It is recommended to use a ceramic capacitor with X5R or better grade dielectric. The capacitor should have a 10V orhighervoltagerating. 9.2.2.8 UnderVoltageLockOutSetPoint The Under Voltage Lock Out (UVLO) can be adjusted using an external voltage divider on the EN pin of the TPS54160A. The UVLO has two thresholds, one for power up when the input voltage is rising and one for power downorbrownoutswhentheinputvoltageisfalling.Fortheexampledesign,thesupplyshouldturnonandstart switching once the input voltage increases above 7.7V (enabled). After the regulator starts switching, it should continuetodosountiltheinputvoltagefallsbelow6.7V(UVLOstop). The programmable UVLO and enable voltages are set using a resistor divider between V and ground to the EN IN pin. Equation 2 through Equation 3 can be used to calculate the resistance values necessary. For the example application, a 332kΩ between V and EN and a 61.9kΩ between EN and ground are required to produce the 7.7 IN and6.7voltstartandstopvoltages. 9.2.2.9 OutputVoltageandFeedbackResistorsSelection For the example design, 10.0 kΩ was selected for R2. Using Equation 1, R1 is calculated as 31.25 kΩ. The nearest standard 1% resistor is 31.6 kΩ. Due to current leakage of the VSENSE pin, the current flowing through the feedback network should be greater than 1 μA in order to maintain the output voltage accuracy. This requirement makes the maximum value of R2 equal to 800 kΩ. Choosing higher resistor values will decrease quiescentcurrentandimproveefficiencyatlowoutputcurrentsbutmayintroducenoiseimmunityproblems. 9.2.2.10 Compensation There are several industry techniques used to compensate DC/DC regulators. The method presented here yields high phase margins. For most conditions, the regulator will have a phase margin between 60 and 90 degrees. The method presented here ignores the effects of the slope compensation that is internal to the TPS54160A. Since the slope compensation is ignored, the actual crossover frequency is usually lower than the crossover frequencyusedinthecalculations. UseSwitcherProsoftwareforamoreaccuratedesign. The uncompensated regulator will have a dominant pole, typically located between 300 Hz and 3 kHz, due to the output capacitor and load resistance and a pole due to the error amplifier. One zero exists due to the output capacitorandtheESR.Thezerofrequencyishigherthaneitherofthetwopoles. Ifleftuncompensated,thedoublepolecreatedbytheerroramplifierandthemodulatorwouldleadtoanunstable regulator. To stabilize the regulator, one pole must be canceled out. One design approach is to locate a compensating zero at the modulator pole. Then select a crossover frequency that is higher than the modulator pole. The gain of the error amplifier can be calculated to achieve the desired crossover frequency. The capacitor used to create the compensation zero along with the output impedance of the error amplifier form a low frequency pole to provide a minus one slope through the crossover frequency. Then a compensating pole is added to cancel the zero due to the output capacitors ESR. If the ESR zero resides at a frequency higher than theswitchingfrequencythenitcanbeignored. TocompensatetheTPS54160Ausingthismethod,firstcalculatethemodulatorpoleandzerousingthefollowing equations: I OUT(max) f = P(mod) 2´p´VOUT´COUT 36 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 where • I isthemaximumoutputcurrent OUT(max) • C istheoutputcapacitance OUT • V isthenominaloutputvoltage (41) OUT 1 f = Z(mod) 2´p´RESR´COUT (42) Fortheexampledesign,themodulatorpoleislocatedat1.5kHzandtheESRzeroislocatedat338kHz. Next, the designer selects a crossover frequency which will determine the bandwidth of the control loop. The crossover frequency must be located at a frequency at least five times higher than the modulator pole. The crossover frequency must also be selected so that the available gain of the error amplifier at the crossover frequencyishighenoughtoallowforpropercompensation. Equation 47 is used to calculate the maximum crossover frequency when the ESR zero is located at a frequency that is higher than the desired crossover frequency. This will usually be the case for ceramic or low ESR tantalum capacitors. Aluminum Electrolytic and Tantalum capacitors will typically produce a modulator zero at a lowfrequencyduetotheirhighESR. TheexampleapplicationisusingalowESRceramiccapacitorwith10mΩ ofESRmakingthezeroat338kHz. This value is much higher than typical crossover frequencies so the maximum crossover frequency is calculated usingbothEquation43andEquation46. Using Equation 46 gives a minimum crossover frequency of 7.6 kHz and Equation 43 gives a maximum crossoverfrequencyof45.3kHz. Acrossoverfrequencyof45kHzisarbitrarilyselectedfromthisrange. ForceramiccapacitorsuseEquation43: f P(mod) f £2100 C(max) V OUT (43) FortantalumoraluminumcapacitorsuseEquation44: 51442 f £ C(max) V OUT (44) ForallcasesuseEquation45andEquation46: fSW f £ C(max) 5 (45) f ³5´ f C(min) P(mod) (46) Once a crossover frequency, ƒ , has been selected, the gain of the modulator at the crossover frequency is C calculated.ThegainofthemodulatoratthecrossoverfrequencyiscalculatedusingEquation47. gm ´R ´(2p´ f ´C ´R +1) (PS) LOAD C OUT ESR G = MOD(fc) 2p´ f ´C ´(R +R )+1 C OUT LOAD ESR (47) For the example problem, the gain of the modulator at the crossover frequency is 0.542. Next, the compensation components are calculated. A resistor in series with a capacitor is used to create a compensating zero. A capacitor in parallel to these two components forms the compensating pole. However, calculating the values of these components varies depending on if the ESR zero is located above or below the crossover frequency. For ceramic or low ESR tantalum output capacitors, the zero will usually be located above the crossover frequency. For aluminum electrolytic and tantalum capacitors, the modulator zero is usually located lower in frequency than the crossover frequency. For cases where the modulator zero is higher than the crossover frequency (ceramic capacitors). V R = OUT C G ´gm ´V MOD(fc) (EA) REF (48) Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 37 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 1 CC = 2p´RC´ fP(mod) (49) C ´R Cf = OUT ESR R C (50) Forcaseswherethemodulatorzeroislessthanthecrossoverfrequency(AluminumorTantalumcapacitors),the equationsare: V R = OUT C G ´ f ´gm ´V MOD(fc) Z(mod) (EA) REF (51) 1 CC = 2p´RC´ fP(mod) (52) 1 Cf = 2p´RC´ fZ(mod) (53) Fortheexampleproblem,theESRzeroislocatedatahigherfrequencycomparedtothecrossoverfrequencyso Equation 50 through Equation 53 are used to calculate the compensation components. In this example, the calculatedcomponentsvaluesare: • R =76.2kΩ C • C =2710pF C • Cƒ=6.17pF The calculated value of the Cf capacitor is not a standard value so a value of 2700 pF is used. 6.8 pF is used for C . The R resistor sets the gain of the error amplifier which determines the crossover frequency. The calculated C C R resistorisnotastandardvalue,so76.8kΩ isused. C 9.2.2.11 PowerDissipationEstimate The following formulas show how to estimate the device power dissipation under continuous conduction mode (CCM) operation. These equations should not be used if the device is working in discontinuous conduction mode (DCM). The power dissipation of the device includes conduction loss (Pcon), switching loss (Psw), gate drive loss (Pgd) andsupplycurrent(Pq). PCOND =(IOUT)2´RDS(on)´æçVVOUT ö÷ è IN ø (54) PSW =(VIN)2´ fSW ´IOUT´0.25´10-9 (55) PGD = VIN´3´10-9´ fSW (56) P =116´10-6´V Q IN where • I istheoutputcurrent(A) OUT • R istheon-resistanceofthehigh-sideMOSFET(Ω) DS(on) • V istheoutputvoltage(V) OUT • V istheinputvoltage(V) IN • ƒ istheswitchingfrequency(Hz) (57) SW P =P ´P ´P ´P TOT COND SW GD Q (58) ForgivenT , A T =T +R ´P J A TH TOT (59) ForgivenT =150°C JMAX 38 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 TA(max)=TJ(max)-RTH´PTOT where • P sthetotaldevicepowerdissipation(W) TOT • T istheambienttemperature(°C) A • T isthejunctiontemperature(°C) J • R isthethermalresistanceofthepackage(°C/W) TH • T ismaximumjunctiontemperature(°C) J(max) • T ismaximumambienttemperature(°C). (60) A(max) There are additional power losses in the regulator circuit due to the inductor ac and dc losses, the catch diode andtraceresistancethatwillimpacttheoverallefficiencyoftheregulator. Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 39 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 9.2.3 ApplicationCurves VIN VO VOUT IO EN IL Figure53.LoadTransmit Figure54.StartupWithEN VOUT VOUT IL PH VIN IL Figure55.VINPowerUp Figure56.OutputRippleCCM VOUT VOUT IL IL PH PH Figure57.OutputRipple,DCM Figure58.OutputRipple,PSM 40 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 VIN VIN IL IL PH PH Figure59.InputRippleCCM Figure60.InputRippleDCM 95 VI= 8 V VO= 3.3 V, 90 fsw= 1200 kHz VIN 85 80 IL cy - % 75 VI= 12 V VI= 16 V n e ci 70 Effi 65 PH 60 55 50 0 0.25 0.50 0.75 1 1.25 1.5 1.75 2 IL- Load Current -A Figure61.InputRipplePSM Figure62.EfficiencyvsLoadCurrent 60 1.015 150 V= 12 V I 1.010 40 100 Phase 1.005 50 20 %) Gain - dB 0 Gain 0 oPhase - gulation ( 1.000 -50 Re 0.995 -20 -100 0.990 -150 -40 0.985 100 1-103 1-104 1-105 1-106 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 f - Frequency - Hz Load Current -A Figure63.OverallLoopFrequencyResponse Figure64.RegulationvsLoadCurrent Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 41 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 1.015 I = 0.5A O 1.010 1.005 %) n ( atio 1.000 ul g e R 0.995 0.990 0.985 5 10 15 20 VI- Input Voltage - V Figure65.RegulationvsInputVoltage 10 Power Supply Recommendations The devices are designed to operate from an input voltage supply range between 3.5 V and 60 V. This input supply should be well regulated. If the input supply is located more than a few inches from the TPS54160 converter additional bulk capacitance may be required in addition to the ceramic bypass capacitors. An electrolyticcapacitorwithavalueof100μFisatypicalchoice 42 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A www.ti.com SLVSB56C–MAY2012–REVISEDFEBRUARY2014 11 Layout 11.1 Layout Guidelines Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise ordegradethepowersuppliesperformance. • To help eliminate these problems, the VIN pin should be bypassed to ground with a low ESR ceramic bypass capacitorwithX5RorX7Rdielectric. • Careshouldbetakentominimizetheloopareaformedbythebypasscapacitorconnections,theVINpin,and theanodeofthecatchdiode. • TheGNDpinshouldbetieddirectlytothepowerpadunderthedeviceandthepowerpad. • The power pad should be connected to any internal PCB ground planes using multiple vias directly under the device. • ThePHpinshouldberoutedtothecathodeofthecatchdiodeandtotheoutputinductor. • Since the PH connection is the switching node, the catch diode and output inductor should be located close tothePHpins,andtheareaofthePCBconductorminimizedtopreventexcessivecapacitivecoupling. • Foroperationatfullratedload,thetopsidegroundareamustprovideadequateheatdissipatingarea. • The RT/CLK pin is sensitive to noise so the RT resistor should be located as close as possible to the device androutedwithminimallengthsoftrace. • Theadditionalexternalcomponentscanbeplacedapproximatelyasshown. • It may be possible to obtain acceptable performance with alternate PCB layouts, however this layout has beenshowntoproducegoodresultsandismeantasaguideline. 11.2 Layout Example Vout Output Capacitor Output Topside Inductor Ground Route Boot Capacitor Catch Area Trace on another layer to Diode provide wide path for topside ground Input Bypass Capacitor BOOT PH Vin VIN GND EN COMP UVLO Adjust SS/TR VSENSE Compensation Resistor Resistors Network RT/CLK PWRGD Divider Slow Start Frequency Thermal VIA Capacitor Set Resistor Signal VIA Figure66. PCBLayoutExample Copyright©2012–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 43 ProductFolderLinks:TPS54160 TPS54160A

TPS54160,TPS54160A SLVSB56C–MAY2012–REVISEDFEBRUARY2014 www.ti.com 12 Device and Documentation Support 12.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources,toolsandsoftware,andquickaccesstosampleorbuy. Table3.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY TPS54160 Clickhere Clickhere Clickhere Clickhere Clickhere TPS54160A Clickhere Clickhere Clickhere Clickhere Clickhere 12.2 Trademarks Eco-mode,PowerPAD,SwitcherProaretrademarksofTexasInstruments. WEBBENCHisaregisteredtrademarkofTexasInstruments. 12.3 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 12.4 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronymsanddefinitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. 44 SubmitDocumentationFeedback Copyright©2012–2014,TexasInstrumentsIncorporated ProductFolderLinks:TPS54160 TPS54160A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) TPS54160ADGQ ACTIVE HVSSOP DGQ 10 80 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 5416A & no Sb/Br) TPS54160ADGQR ACTIVE HVSSOP DGQ 10 2500 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 5416A & no Sb/Br) TPS54160ADRCR ACTIVE VSON DRC 10 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 5416A & no Sb/Br) TPS54160ADRCT ACTIVE VSON DRC 10 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 5416A & no Sb/Br) TPS54160DGQ ACTIVE HVSSOP DGQ 10 80 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 150 54160 & no Sb/Br) TPS54160DGQG4 ACTIVE HVSSOP DGQ 10 80 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 150 54160 & no Sb/Br) TPS54160DGQR ACTIVE HVSSOP DGQ 10 2500 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 150 54160 & no Sb/Br) TPS54160DGQRG4 ACTIVE HVSSOP DGQ 10 2500 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 150 54160 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) TPS54160ADGQR HVSSOP DGQ 10 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS54160ADGQR HVSSOP DGQ 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS54160ADRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS54160ADRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.0 8.0 12.0 Q2 TPS54160ADRCT VSON DRC 10 250 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS54160DGQR HVSSOP DGQ 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS54160DGQR HVSSOP DGQ 10 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) TPS54160ADGQR HVSSOP DGQ 10 2500 346.0 346.0 35.0 TPS54160ADGQR HVSSOP DGQ 10 2500 364.0 364.0 27.0 TPS54160ADRCR VSON DRC 10 3000 338.0 355.0 50.0 TPS54160ADRCT VSON DRC 10 250 203.0 203.0 35.0 TPS54160ADRCT VSON DRC 10 250 338.0 355.0 50.0 TPS54160DGQR HVSSOP DGQ 10 2500 364.0 364.0 27.0 TPS54160DGQR HVSSOP DGQ 10 2500 346.0 346.0 35.0 PackMaterials-Page2

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GENERIC PACKAGE VIEW DRC 10 VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204102-3/M

PACKAGE OUTLINE DRC0010J VSON - 1 mm max height SCALE 4.000 PLASTIC SMALL OUTLINE - NO LEAD 3.1 B A 2.9 PIN 1 INDEX AREA 3.1 2.9 1.0 C 0.8 SEATING PLANE 0.05 0.00 0.08 C 1.65 0.1 2X (0.5) (0.2) TYP EXPOSED 4X (0.25) THERMAL PAD 5 6 2X 11 SYMM 2 2.4 0.1 10 1 8X 0.5 0.30 10X 0.18 PIN 1 ID SYMM 0.1 C A B (OPTIONAL) 0.5 0.05 C 10X 0.3 4218878/B 07/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD (1.65) (0.5) 10X (0.6) 1 10 10X (0.24) 11 SYMM (2.4) (3.4) (0.95) 8X (0.5) 6 5 (R0.05) TYP ( 0.2) VIA TYP (0.25) (0.575) SYMM (2.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4218878/B 07/2018 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN DRC0010J VSON - 1 mm max height PLASTIC SMALL OUTLINE - NO LEAD 2X (1.5) (0.5) SYMM EXPOSED METAL 11 TYP 10X (0.6) 1 10 (1.53) 10X (0.24) 2X (1.06) SYMM (0.63) 8X (0.5) 6 5 (R0.05) TYP 4X (0.34) 4X (0.25) (2.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 11: 80% PRINTED SOLDER COVERAGE BY AREA SCALE:25X 4218878/B 07/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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