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ICGOO电子元器件商城为您提供SN74LVC125ARGYR由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 SN74LVC125ARGYR价格参考¥9.00-¥11.25。Texas InstrumentsSN74LVC125ARGYR封装/规格:逻辑 - 缓冲器,驱动器,接收器,收发器, Buffer, Non-Inverting 4 Element 1 Bit per Element 3-State Output 14-VQFN (3.5x3.5)。您可以下载SN74LVC125ARGYR参考资料、Datasheet数据手册功能说明书,资料中有SN74LVC125ARGYR 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC BUS BUFF TRI-ST QD 14VQFN缓冲器和线路驱动器 Tri-State Quad Bus

产品分类

逻辑 - 缓冲器,驱动器,接收器,收发器

品牌

Texas Instruments

产品手册

点击此处下载产品Datasheet

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

逻辑集成电路,缓冲器和线路驱动器,Texas Instruments SN74LVC125ARGYR74LVC

数据手册

点击此处下载产品Datasheet

产品型号

SN74LVC125ARGYR

产品目录页面

点击此处下载产品Datasheet

产品种类

缓冲器和线路驱动器

传播延迟时间

5.3 ns at 2.7 V, 4.6 ns at 3.3 V

低电平输出电流

24 mA

供应商器件封装

14-VQFN (3.5x3.5)

元件数

4

其它名称

296-13961-1

包装

剪切带 (CT)

单位重量

32.200 mg

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

14-VFQFN 裸露焊盘

封装/箱体

VQFN-14

工作温度

-40°C ~ 85°C

工厂包装数量

3000

最大功率耗散

500 mW

最大工作温度

+ 85 C

最小工作温度

- 40 C

极性

Non-Inverting

标准包装

1

每元件位数

1

每芯片的通道数量

4

电压-电源

1.65 V ~ 3.6 V

电流-输出高,低

24mA,24mA

电源电压-最大

3.6 V

电源电压-最小

1.65 V

电源电流

0.01 mA

系列

SN74LVC125A

输入线路数量

4

输出类型

3-State

输出线路数量

3

逻辑类型

缓冲器/线路驱动器,非反相

逻辑系列

LVC

高电平输出电流

- 24 mA

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PDF Datasheet 数据手册内容提取

Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 SN74LVC125A Quadruple Bus Buffer Gate With 3-State Outputs 1 Features 3 Description • 3-StateOutputs This quadruple bus buffer gate is designed for 1.65-V 1 to3.6-VV operation. • SeparateOEforall4buffers CC The SN74LVC125A device features independent line • OperatesFrom1.65Vto3.6V drivers with 3-state outputs. Each output is disabled • SpecifiedFrom–40°Cto85°C whentheassociatedoutput-enable(OE)inputishigh. and–40°Cto125°C To ensure the high-impedance state during power up • InputsAcceptVoltagesto5.5V or power down, OE should be tied to V through a CC • Maxtpdof4.8nsat3.3V pullup resistor; the minimum value of the resistor is • TypicalV (OutputGroundBounce) determined by the current-sinking capability of the OLP <0.8VatV =3.3V,T =25°C driver. CC A • TypicalV (OutputV Undershoot) Inputs can be driven from either 3.3-V or 5-V devices. OHV OH >2VatV =3.3V,T =25°C This feature allows the use of this device as a CC A • Latch-UpPerformanceExceeds250mA translatorinamixed3.3-V/5-Vsystemenvironment. PerJESD17 DeviceInformation(1) • ESDProtectionExceedsJESD22 PARTNUMBER PACKAGE(PIN) BODYSIZE – 2000-VHuman-BodyModel SOIC(14) 8.65mm×3.91mm – 200-VMachineModel SSOP(14) 6.20mm×5.30mm – 1000-VCharged-DeviceModel SN74LVC125A SOP(14) 10.30mm×5.30mm TSSOP(14) 5.00mm×4.40mm 2 Applications VQFN(14) 3.50mm×3.50mm • CableModemTerminationSystems (1) For all available packages, see the orderable addendum at theendofthedatasheet. • IPPhones:WiredandWireless • OpticalModules 4 Simplified Schematic • OpticalNetworking: – EPONorVideoOverFiber 1OE 3OE • Point-to-PointMicrowaveBackhaul 1A 1Y 3A 3Y • Power:TelecomDC/DCModules: 2OE 4OE – AnalogorDigital 2A 2Y 4A 4Y • PrivateBranchExchanges(PBX) • TETRABaseStations • TelecomBaseBandUnits • TelecomShelters: – FilterUnits – PowerDistributionUnits(PDU) – PowerMonitoringUnits(PMU) – WirelessBatteryMonitoring – RemoteElectricalTiltUnits(RET) – RemoteRadioUnits(RRU) – TowerMountedAmplifiers(TMA) • VectorSignalAnalyzersandGenerators • VideoConferencing:IP-BasedHD • WiMAXandWirelessInfrastructureEquipment • WirelessCommunicationsTesters • xDSLModemsandDSLAM 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com Table of Contents 1 Features.................................................................. 1 9.1 Overview...................................................................9 2 Applications........................................................... 1 9.2 FunctionalBlockDiagram.........................................9 3 Description............................................................. 1 9.3 FeatureDescription...................................................9 9.4 DeviceFunctionalModes..........................................9 4 SimplifiedSchematic............................................. 1 10 ApplicationandImplementation........................ 10 5 RevisionHistory..................................................... 2 10.1 ApplicationInformation..........................................10 6 PinConfigurationandFunctions......................... 3 10.2 TypicalApplication ...............................................10 7 Specifications......................................................... 4 11 PowerSupplyRecommendations..................... 11 7.1 AbsoluteMaximumRatings .....................................4 12 Layout................................................................... 11 7.2 ESDRatings..............................................................4 12.1 LayoutGuidelines.................................................11 7.3 RecommendedOperatingConditions......................5 12.2 LayoutExample....................................................12 7.4 ThermalInformation..................................................5 13 DeviceandDocumentationSupport................. 13 7.5 ElectricalCharacteristics...........................................6 7.6 SwitchingCharacteristics..........................................6 13.1 Trademarks...........................................................13 7.7 OperatingCharacteristics..........................................6 13.2 ElectrostaticDischargeCaution............................13 7.8 TypicalCharacteristics..............................................7 13.3 Glossary................................................................13 8 ParameterMeasurementInformation..................8 14 Mechanical,Packaging,andOrderable Information........................................................... 13 9 DetailedDescription.............................................. 9 5 Revision History ChangesfromRevisionP(October2010)toRevisionQ Page • AddedApplications,DeviceInformationtable,PinFunctionstable,ESDRatingstable,ThermalInformationtable, TypicalCharacteristics,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection.................................................................................................. 1 • DeletedOrderingInformationtable........................................................................................................................................ 1 2 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 6 Pin Configuration and Functions D, DB, NS, OR PW PACKAGE (TOPVIEW) 1OE 1 14 V CC 1A 2 13 4OE 1Y 3 12 4A 2OE 4 11 4Y 2A 5 10 3OE 2Y 6 9 3A GND 7 8 3Y RGYPACKAGE (TOPVIEW) E C O C 1 V 1 14 1A 2 13 4OE 1Y 3 12 4A 2OE 4 11 4Y 2A 5 10 3OE 2Y 6 9 3A 7 8 D Y N 3 G PinFunctions PIN D,DB,NS,PW TYPE DESCRIPTION NAME andRGY 1A 2 I Input 1OE 1 I Outputenable 1Y 3 O Output 2A 5 I Input 2OE 4 I Outputenable 2Y 6 O Output 3A 9 I Input 3OE 10 I Outputenable 3Y 8 O Output 4A 12 I Input 4OE 13 I Outputenable 4Y 11 O Output GND 7 — Ground VCC 14 — Powerpin Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74LVC125A

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) MIN MAX UNIT V Supplyvoltagerange –0.5 6.5 V CC V Inputvoltagerange(2) –0.5 6.5 V I V Outputvoltagerange(2)(3) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±50 mA O ContinuouscurrentthroughV orGND ±100 mA CC P Powerdissipation T =–40°Cto125°C(4)(5) 500 mW tot A T Storagetemperaturerange –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. (3) ThevalueofV isprovidedintheRecommendedOperatingConditionstable. CC (4) FortheDpackage:above70°C,thevalueofP derateslinearlywith8mW/K. tot (5) FortheDB,NS,andPWpackages:above60°C,thevalueofP derateslinearlywith5.5mW/K. tot 7.2 ESD Ratings PARAMETER DEFINITION VALUE UNIT Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,allpins(1) 2000 Electrostatic V(ESD) discharge Cpihnasr(g2)eddevicemodel(CDM),perJEDECspecificationJESD22-C101,all 1000 V (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 4 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 7.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1) T =25°C –40°Cto85°C –40°Cto125°C A UNIT MIN MAX MIN MAX MIN MAX Operating 1.65 3.6 1.65 3.6 1.65 3.6 V Supplyvoltage V CC Dataretentiononly 1.5 1.5 1.5 V =1.65Vto1.95V 0.65×V 0.65×V 0.65×V CC CC CC CC High-level V V =2.3Vto2.7V 1.7 1.7 1.7 V IH inputvoltage CC V =2.7Vto3.6V 2 2 2 CC V =1.65Vto1.95V 0.35×V 0.35×V 0.35×V CC CC CC CC Low-level V V =2.3Vto2.7V 0.7 0.7 0.7 V IL inputvoltage CC V =2.7Vto3.6V 0.8 0.8 0.8 CC V Inputvoltage 0 5.5 0 5.5 0 5.5 V I V Outputvoltage 0 V 0 V 0 V V O CC CC CC V =1.65V –4 –4 –4 CC High-level VCC=2.3V –8 –8 –8 I mA OH outputcurrent V =2.7V –12 –12 –12 CC V =3V –24 –24 –24 CC V =1.65V 4 4 4 CC Low-level VCC=2.3V 8 8 8 I mA OL outputcurrent V =2.7V 12 12 12 CC V =3V 24 24 24 CC Δt/Δv Inputtransitionriseorfallrate 8 8 8 ns/V (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. 7.4 Thermal Information D(2) DB(2) NS(2) PW(2) RGY(3) THERMALMETRIC(1) UNIT 14PINS R Junction-to-ambientthermalresistance 86 96 76 113 47 °C/W θJA (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. (2) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-7. (3) ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51-5. Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74LVC125A

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com 7.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) T =25°C –40°Cto85°C –40°Cto125°C A PARAMETER TESTCONDITIONS V UNIT CC MIN TYP MAX MIN MAX MIN MAX 1.65Vto I =–100μA V –0.2 V –0.2 V –0.3 OH 3.6V CC CC CC I =–4mA 1.65V 1.29 1.2 1.05 OH VOH IOH=–8mA 2.3V 1.9 1.7 1.55 V 2.7V 2.2 2.2 2.05 I =–12mA OH 3V 2.4 2.4 2.25 I =–24mA 3V 2.3 2.2 2 OH 1.65Vto I =100μA 0.1 0.2 0.3 OL 3.6V I =4mA 1.65V 0.24 0.45 0.6 OL V V OL I =8mA 2.3V 0.3 0.7 0.75 OL I =12mA 2.7V 0.4 0.4 0.6 OL I =24mA 3V 0.55 0.55 0.8 OL I V =5.5VorGND 3.6V ±1 ±5 ±20 μA I I I V =V orGND 3.6V ±1 ±10 ±20 μA OZ O CC I V =V orGND, I =0 3.6V 1 10 40 μA CC I CC O OneinputatV –0.6V, 2.7Vto ΔI CC 500 500 5000 μA CC OtherinputsatV orGND 3.6V CC C V =V orGND 3.3V 5 pF i I CC 7.6 Switching Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3) FROM TO TA=25°C –40°Cto85°C –40°Cto125°C PARAMETER V UNIT (INPUT) (OUTPUT) CC MIN TYP MAX MIN MAX MIN MAX 1.8V±0.15V 1 4.5 11.8 1 12.3 1 13.8 2.5V±0.2V 1 2.7 5.8 1 6.3 1 8.4 t A Y ns pd 2.7V 1 3 5.3 1 5.5 1 7 3.3V±0.3V 1 2.5 4.6 1 4.8 1 6 1.8V±0.15V 1 4.3 13.8 1 14.3 1 15.8 2.5V±0.2V 1 2.7 6.9 1 7.4 1 9.5 t OE Y ns en 2.7V 1 3.3 6.4 1 6.6 1 8.5 3.3V±0.3V 1 2.4 5.2 1 5.4 1 7 1.8V±0.15V 1 4.3 10.6 1 11.1 1 12.6 2.5V±0.2V 1 2.2 5.1 1 5.6 1 7.7 t OE Y ns dis 2.7V 1 2.5 4.8 1 5 1 6.5 3.3V±0.3V 1 2.4 4.4 1 4.6 1 6 t 3.3V±0.3V 1 1.5 ns sk(o) 7.7 Operating Characteristics T =25°C A TEST PARAMETER V TYP UNIT CONDITIONS CC 1.8V 7.4 C Powerdissipationcapacitancepergate f=10MHz 2.5V 11.3 pF pd 3.3V 15 6 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 7.8 Typical Characteristics 14 10 VCC=3V, VCC=3V, TA=25°C TA=25°C 12 s –ns OFonuerOOuuttppuuttSswSiwtcithcihnigng e–n 8 OFonuerOOuuttppuuttSswSiwtcithcihnigng e m Tim 10 yTi y a ela Del D 8 n 6 n o atio gati g a a 6 p p o o r Pr –P 4 – d d 4 p p t t 2 2 0 50 100 150 200 250 300 0 50 100 150 200 250 300 CL–LoadCapacitance–pF CL–LoadCapacitance–pF Figure1.PropagationDelay(LowtoHighTransition) Figure2.PropagationDelay(HightoLowTransition) vsLoadCapacitance vsLoadCapacitance Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74LVC125A

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com 8 Parameter Measurement Information VLOAD From Output RL S1 Open TEST S1 Under Test GND tPLH/tPHL Open (see NoteCAL) RL tPLZ/tPZL VLOAD tPHZ/tPZH GND LOAD CIRCUIT INPUTS VCC VI tr/tf VM VLOAD CL RL V∆ 1.8 V±0.15 V VCC ≤2ns VCC/2 2×VCC 30 pF 1 kΩ 0.15 V 2.5 V±0.2 V VCC ≤2ns VCC/2 2×VCC 30 pF 500Ω 0.15 V 2.7 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500Ω 0.3 V 3.3 V±0.3 V 2.7 V ≤2.5 ns 1.5 V 6 V 50 pF 500Ω 0.3 V VI Timing Input VM 0 V tw VI tsu th VI Input VM VM Data Input VM VM 0 V 0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PULSEDURATION SETUPAND HOLD TIMES VI VI Output Input VM VM Control VM VM 0 V 0 V tPLH tPHL tPZL tPLZ Output VOH Waveform 1 VLOAD/2 Output VM VM VOL (Ss1ee a tN VoLteO ABD) VM VOL+ V∆ VOL tPHL tPLH tPZH tPHZ Output VM VM VOH WSa1v eaOftou GrtmpNu D2t VM VOH- V∆ VOH VOL (see Note B) ≈0 V VOLTAGEWAVEFORMS VOLTAGEWAVEFORMS PROPAGATIONDELAYTIMES ENABLEAND DISABLE TIMES INVERTINGAND NONINVERTING OUTPUTS LOW-ANDHIGH-LEVELENABLING NOTES: A. CLincludes probe and jig capacitance. B. Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol. Waveform2is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO= 50Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZand tPHZare the same as tdis. F. tPZLand tPZHare the same as ten. G. tPLHand tPHLare the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms 8 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 9 Detailed Description 9.1 Overview The SN74LVC125A device is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or powerdown,OEshouldbetiedtoV throughapull-upresistor;theminimumvalueoftheresistorisdetermined CC bythecurrent-sourcingcapabilityofthedriver. 9.2 Functional Block Diagram 1OE 3OE 1A 1Y 3A 3Y 2OE 4OE 2A 2Y 4A 4Y 9.3 Feature Description • Wideoperatingvoltagerange – Operatesfrom1.65Vto5.5V • Allowsdownvoltagetranslation • Inputsacceptvoltagesto5.5V 9.4 Device Functional Modes Table1.FunctionTable INPUTS OUTPUT OE A Y L H H L L L H X Z Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74LVC125A

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 10.1 Application Information SN74LVC125A is a high drive CMOS device that can be used for a multitude of bus interface type applications where output drive or PCB trace length is a concern. The inputs can accept voltages to 5.5 V at any valid V CC makingitidealfordowntranslation. 10.2 Typical Application 3 V 5 V 1OE V CC 1Y (cid:29)C/System 4OE Logic/LEDs (cid:29)C or System 4Y Logic 1A 4A GND Figure4. TypicalApplicationSchematic 10.2.1 DesignRequirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edgesintolightloadssoroutingandloadconditionsshouldbeconsideredtopreventringing. 10.2.2 DetailedDesignProcedure 1. RecommendedInputConditions: – Forrisetimeandfalltimespecifcations,see(Δt/ΔV)intheRecommendedOperatingConditions table. – Forspecifiedhighandlowlevels,see(V andV )intheRecommendedOperatingConditions table. IH IL – Inputs are overvoltage tolerant allowing them to go as high as (V max) in the Recommended Operating I ConditionstableatanyvalidV . CC 2. RecommendOutputConditions: – Load currents should not exceed (I max) per output and should not exceed (Continuous current through O V orGND)totalcurrentforthepart.TheselimitsarelocatedintheAbsoluteMaximumRatings table. CC 10 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 Typical Application (continued) – OutputsshouldnotbepulledaboveV . CC – Series resistors on the output may be used if the user desires to slow the output edge signal or limit the outputcurrent. 10.2.3 ApplicationCurves 100 60 TA=25°C,VCC=3V, TA=25°C,VCC=3V, VIH=3V,VIL=0V, 40 VIH=3V,VIL=0V, 80 AllOutputsSwitching AllOutputsSwitching 20 60 0 A A m m – 40 – –20 OL OH I I –40 20 –60 0 –80 –20 –100 –0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 –1 –0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VOL–V VOH–V Figure5.OutputDriveCurrent(I ) Figure6.OutputDriveCurrent(I ) OL OH vsLOW-levelOutputVoltage(V ) vsHIGH-levelOutputVoltage(V ) OL OH 11 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the RecommendedOperatingConditionstable. Each V terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single CC supply, a 0.1 μF capacitor is recommended. If there are multiple V terminals then 0.01 μF or 0.022 μF CC capacitors are recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject different frequencies of noise. Multiple bypass capacitors may be paralleled to reject different frequencies of noise.Thebypasscapacitorshouldbeinstalledasclosetothepowerterminalaspossibleforthebestresults. 12 Layout 12.1 Layout Guidelines When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefinedvoltagesattheoutsideconnectionsresultinundefinedoperationalstates. Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND orV ,whichevermakesmoresenseorismoreconvenient. CC Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74LVC125A

SN74LVC125A SCAS290Q–JANUARY1993–REVISEDJANUARY2015 www.ti.com 12.2 Layout Example VCC Input Unused Input Output Unused Input Output Input Figure7. LayoutDiagram 12 SubmitDocumentationFeedback Copyright©1993–2015,TexasInstrumentsIncorporated ProductFolderLinks:SN74LVC125A

SN74LVC125A www.ti.com SCAS290Q–JANUARY1993–REVISEDJANUARY2015 13 Device and Documentation Support 13.1 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 13.2 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.3 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronymsanddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowserbasedversionsofthisdatasheet,refertothelefthandnavigation. Copyright©1993–2015,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74LVC125A

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC125AD ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADBR ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125ADE4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADG4 ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADRG3 ACTIVE SOIC D 14 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADT ACTIVE SOIC D 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ADTG4 ACTIVE SOIC D 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125ANSR ACTIVE SO NS 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LVC125A & no Sb/Br) SN74LVC125APW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74LVC125APWRG3 ACTIVE TSSOP PW 14 2000 Green (RoHS SN Level-1-260C-UNLIM LC125A & no Sb/Br) SN74LVC125APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWT ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 LC125A & no Sb/Br) SN74LVC125ARGYR ACTIVE VQFN RGY 14 3000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 LC125A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 2

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC125A : •Automotive: SN74LVC125A-Q1 •Enhanced Product: SN74LVC125A-EP NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects •Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74LVC125ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC125ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC125ADR SOIC D 14 2500 330.0 16.8 6.5 9.5 2.1 8.0 16.0 Q1 SN74LVC125ADRG3 SOIC D 14 2500 330.0 16.8 6.5 9.5 2.3 8.0 16.0 Q1 SN74LVC125ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC125ADRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC125ADT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC125ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74LVC125APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC125APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC125APWRG3 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC125APWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC125APWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC125ARGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74LVC125ADR SOIC D 14 2500 333.2 345.9 28.6 SN74LVC125ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC125ADR SOIC D 14 2500 364.0 364.0 27.0 SN74LVC125ADRG3 SOIC D 14 2500 364.0 364.0 27.0 SN74LVC125ADRG4 SOIC D 14 2500 333.2 345.9 28.6 SN74LVC125ADRG4 SOIC D 14 2500 367.0 367.0 38.0 SN74LVC125ADT SOIC D 14 250 210.0 185.0 35.0 SN74LVC125ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LVC125APWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74LVC125APWR TSSOP PW 14 2000 364.0 364.0 27.0 SN74LVC125APWRG3 TSSOP PW 14 2000 364.0 364.0 27.0 SN74LVC125APWRG4 TSSOP PW 14 2000 367.0 367.0 35.0 SN74LVC125APWT TSSOP PW 14 250 367.0 367.0 35.0 SN74LVC125ARGYR VQFN RGY 14 3000 367.0 367.0 35.0 PackMaterials-Page2

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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,65 0,15 M 0,22 28 15 0,25 0,09 5,60 8,20 5,00 7,40 Gage Plane 1 14 0,25 A 0°–(cid:1)8° 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** 14 16 20 24 28 30 38 DIM A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065/E 12/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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